From patchwork Fri Sep 8 17:12:43 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eric Botcazou X-Patchwork-Id: 811689 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-461738-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="e0s9W2zT"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3xpkRG6Jqxz9sCZ for ; Sat, 9 Sep 2017 03:12:57 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:date:message-id:mime-version:content-type :content-transfer-encoding; q=dns; s=default; b=Dttvrw68lCfLV1xA 5jvCDaJau+fdej6YcYGELkkws0q/BtAYyg7XuO13giqpjcQ74Dk2pZICMKlXGt9y mWaoFVaph2XDkkgIJtUZQiljmkHpD8Rp0b+w3NmUL+0ElS0q+dpcpVH2XHAIzdax b0BvfaalW3tim5hgBVQ8zt+9Fq0= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:date:message-id:mime-version:content-type :content-transfer-encoding; s=default; bh=aG0ed8eoenFqvmAFbn6waA +Y9yk=; b=e0s9W2zTvhnrd+ATdlXDnG1xG8IJK9Xa2CixZzRbH4vol5NJozHsYM eAlvhpsoXo8V+qtTSWM7zuwolVl4z6RC84Yw9q6slkFPjlPq0Hq0CnaMCP8MPnOz 4G/Pjko7Zij/hd78plI1xVO02pI4WlwevKsdh62U5VOjesFBkM27A= Received: (qmail 42340 invoked by alias); 8 Sep 2017 17:12:50 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 42331 invoked by uid 89); 8 Sep 2017 17:12:50 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-10.9 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_PASS autolearn=ham version=3.3.2 spammy=match_operand, define_insn, cowgill, Cowgill X-HELO: smtp.eu.adacore.com Received: from mel.act-europe.fr (HELO smtp.eu.adacore.com) (194.98.77.210) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 08 Sep 2017 17:12:48 +0000 Received: from localhost (localhost [127.0.0.1]) by filtered-smtp.eu.adacore.com (Postfix) with ESMTP id AC8FC8237A for ; Fri, 8 Sep 2017 19:12:46 +0200 (CEST) Received: from smtp.eu.adacore.com ([127.0.0.1]) by localhost (smtp.eu.adacore.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id UZiMQ_Dp-dzN for ; Fri, 8 Sep 2017 19:12:46 +0200 (CEST) Received: from polaris.localnet (bon31-6-88-161-99-133.fbx.proxad.net [88.161.99.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.eu.adacore.com (Postfix) with ESMTPSA id 7C62B8233B for ; Fri, 8 Sep 2017 19:12:46 +0200 (CEST) From: Eric Botcazou To: gcc-patches@gcc.gnu.org Subject: [SPARC] Fix PR target/81988 Date: Fri, 08 Sep 2017 19:12:43 +0200 Message-ID: <1702568.05SkU9QcsH@polaris> User-Agent: KMail/4.14.10 (Linux/3.16.7-53-desktop; KDE/4.14.9; x86_64; ; ) MIME-Version: 1.0 This is a regression present on the mainline and 7 branch: when the register pressure is high, the use of DI/SI paradoxical subregs causes LRA to generate invalid accesses to odd-numbered FP registers when registers are spilled. The attached patch is aimed at drying up a big source of DI/SI paradoxical subregs, namely 32-bit multiplication operations. Tested on SPARC64/Linux, applied on mainline and 7 branch. 2017-09-08 Eric Botcazou PR target/81988 * config/sparc/sparc.md (mulsi3): Rename into *mulsi3_sp32. (*mulsi3_sp64): New instruction. (mulsi3): New expander. 2017-09-08 Eric Botcazou * gcc.dg/pr81988.c: New test. Index: config/sparc/sparc.md =================================================================== --- config/sparc/sparc.md (revision 251861) +++ config/sparc/sparc.md (working copy) @@ -4517,7 +4517,14 @@ (define_insn "*cmp_ccv_minus_sltu_set" ;; The 32-bit multiply/divide instructions are deprecated on v9, but at ;; least in UltraSPARC I, II and IIi it is a win tick-wise. -(define_insn "mulsi3" +(define_expand "mulsi3" + [(set (match_operand:SI 0 "register_operand" "") + (mult:SI (match_operand:SI 1 "arith_operand" "") + (match_operand:SI 2 "arith_operand" "")))] + "TARGET_HARD_MUL || TARGET_ARCH64" + "") + +(define_insn "*mulsi3_sp32" [(set (match_operand:SI 0 "register_operand" "=r") (mult:SI (match_operand:SI 1 "arith_operand" "%r") (match_operand:SI 2 "arith_operand" "rI")))] @@ -4525,6 +4532,14 @@ (define_insn "mulsi3" "smul\t%1, %2, %0" [(set_attr "type" "imul")]) +(define_insn "*mulsi3_sp64" + [(set (match_operand:SI 0 "register_operand" "=r") + (mult:SI (match_operand:SI 1 "arith_operand" "%r") + (match_operand:SI 2 "arith_operand" "rI")))] + "TARGET_ARCH64" + "mulx\t%1, %2, %0" + [(set_attr "type" "imul")]) + (define_expand "muldi3" [(set (match_operand:DI 0 "register_operand" "") (mult:DI (match_operand:DI 1 "arith_operand" "")