From patchwork Wed Jan 10 10:42:43 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiri Pirko X-Patchwork-Id: 858206 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=resnulli-us.20150623.gappssmtp.com header.i=@resnulli-us.20150623.gappssmtp.com header.b="AAbi73Jh"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3zGlvz0Y5dz9ryk for ; Wed, 10 Jan 2018 21:42:55 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753520AbeAJKmu (ORCPT ); Wed, 10 Jan 2018 05:42:50 -0500 Received: from mail-wr0-f196.google.com ([209.85.128.196]:44087 "EHLO mail-wr0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751696AbeAJKmr (ORCPT ); Wed, 10 Jan 2018 05:42:47 -0500 Received: by mail-wr0-f196.google.com with SMTP id w50so7690712wrc.11 for ; Wed, 10 Jan 2018 02:42:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=resnulli-us.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=g243xUspy0E+tuyb3qDNWyBh7Jc4Yhlxtif5FVcinG0=; b=AAbi73JhPluyvYWOG4425yNJDPclFcC3ehaZtNG6US0xVr1QYl8KZmVv5RJVcY5Ze7 CU8yAyubGKIuQ0XvGmxXthHqlwbvy8zfgffxMWc3tZy3idRKha6rdKRt5AlUfvWieB3g J/htuGCJA7CTYKsOSN2hCwUQWVAEAL2/VwXLGCjqzHU9ebx0KaBBYdVVB4RFxJP5JfZU WaBiiCMTha17hCSxdceWP1oCnCWRP4GGATlEeyWhXkv3hOM5Z+U3jpAB4YqX0aDI0NFl v4jlwLZjVA4fp5tELHQpvuEyPuFf2FCQIfrLQBWg+YjoVAHeY1RUfhehDV4IqXvGs6eP nuZA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=g243xUspy0E+tuyb3qDNWyBh7Jc4Yhlxtif5FVcinG0=; b=gTfO7K5JTO+54JUBGEETN8MpL0lEfEldPcX7bP6RSeqd6zKjiFehkz6KV/5VUDW1sw sj5HX2dzyRstddOQ5BCzVh2CmnZAJqberR3YAA3jGzYrt2NBuk/7r4M68bmGN0aopbJc 4qO02tPiyalCIUmEBdS3ZABZjw5E/WDXz9wGYk2VuoFvYiLf5VWl+XtuNI4Eusts7XbQ o3qKnSZlc6guw4T11FgBBPiBV3Pbyub/yS8EZI27+FBzdw0rPgodrK9umWJ+9n/Qb69x 65VZJjB1Bplry5lMYsx/GNZ2MznHbS+QwtD4+ginRgmJLWT3oKDjuAhybPB57kZdY/E/ vYEg== X-Gm-Message-State: AKGB3mKt5el28NBItWaLrT09l3jjjB49BUK0fOo227ZekbAhyKnY/QbH K508VDN7QRlusk//b2TFSilQbJpo X-Google-Smtp-Source: ACJfBovI1do62y9o31PR4deQNoOhzjrxna5vqRp0JPZI+oqoXE+rrfSqYydNOtlBXLk99RpChypKLQ== X-Received: by 10.223.159.75 with SMTP id f11mr15545096wrg.180.1515580966109; Wed, 10 Jan 2018 02:42:46 -0800 (PST) Received: from localhost (ip-94-113-220-78.net.upcbroadband.cz. [94.113.220.78]) by smtp.gmail.com with ESMTPSA id 187sm22568911wmu.19.2018.01.10.02.42.45 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 10 Jan 2018 02:42:45 -0800 (PST) From: Jiri Pirko To: netdev@vger.kernel.org Cc: davem@davemloft.net, idosch@mellanox.com, yuvalm@mellanox.com, mlxsw@mellanox.com Subject: [patch net 1/2] mlxsw: pci: Wait after reset before accessing HW Date: Wed, 10 Jan 2018 11:42:43 +0100 Message-Id: <20180110104244.25275-2-jiri@resnulli.us> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180110104244.25275-1-jiri@resnulli.us> References: <20180110104244.25275-1-jiri@resnulli.us> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org From: Yuval Mintz After performing reset driver polls on HW indication until learning that the reset is done, but immediately after reset the device becomes unresponsive which might lead to completion timeout on the first read. Wait for 100ms before starting the polling. Fixes: 233fa44bd67a ("mlxsw: pci: Implement reset done check") Signed-off-by: Yuval Mintz Reviewed-by: Ido Schimmel Signed-off-by: Jiri Pirko --- drivers/net/ethernet/mellanox/mlxsw/pci.c | 7 ++++++- drivers/net/ethernet/mellanox/mlxsw/pci_hw.h | 1 + 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/mellanox/mlxsw/pci.c b/drivers/net/ethernet/mellanox/mlxsw/pci.c index 23f7d828cf67..6ef20e5cc77d 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/pci.c +++ b/drivers/net/ethernet/mellanox/mlxsw/pci.c @@ -1643,7 +1643,12 @@ static int mlxsw_pci_sw_reset(struct mlxsw_pci *mlxsw_pci, return 0; } - wmb(); /* reset needs to be written before we read control register */ + /* Reset needs to be written before we read control register, and + * we must wait for the HW to become responsive once again + */ + wmb(); + msleep(MLXSW_PCI_SW_RESET_WAIT_MSECS); + end = jiffies + msecs_to_jiffies(MLXSW_PCI_SW_RESET_TIMEOUT_MSECS); do { u32 val = mlxsw_pci_read32(mlxsw_pci, FW_READY); diff --git a/drivers/net/ethernet/mellanox/mlxsw/pci_hw.h b/drivers/net/ethernet/mellanox/mlxsw/pci_hw.h index a6441208e9d9..fb082ad21b00 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/pci_hw.h +++ b/drivers/net/ethernet/mellanox/mlxsw/pci_hw.h @@ -59,6 +59,7 @@ #define MLXSW_PCI_SW_RESET 0xF0010 #define MLXSW_PCI_SW_RESET_RST_BIT BIT(0) #define MLXSW_PCI_SW_RESET_TIMEOUT_MSECS 5000 +#define MLXSW_PCI_SW_RESET_WAIT_MSECS 100 #define MLXSW_PCI_FW_READY 0xA1844 #define MLXSW_PCI_FW_READY_MASK 0xFFFF #define MLXSW_PCI_FW_READY_MAGIC 0x5E From patchwork Wed Jan 10 10:42:44 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiri Pirko X-Patchwork-Id: 858208 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=resnulli-us.20150623.gappssmtp.com header.i=@resnulli-us.20150623.gappssmtp.com header.b="H3lw29JT"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3zGlw43Zwqz9ryk for ; Wed, 10 Jan 2018 21:43:00 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753835AbeAJKm5 (ORCPT ); Wed, 10 Jan 2018 05:42:57 -0500 Received: from mail-wm0-f66.google.com ([74.125.82.66]:46452 "EHLO mail-wm0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752649AbeAJKms (ORCPT ); Wed, 10 Jan 2018 05:42:48 -0500 Received: by mail-wm0-f66.google.com with SMTP id 143so1030854wma.5 for ; Wed, 10 Jan 2018 02:42:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=resnulli-us.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=TeAWaya20n4o/Suttwj9+SUC8fA+BIidf/VxxmSG+HM=; b=H3lw29JTH1KmU9eI721PyfKQ0T/LJSOcXiOdSGXtgLYPq3bojkWXjtiQdwjCZJihmJ Ygs1kS2BuBPDdeVdftDC5j/Fcjv/jDRsMm9aAQqlFuLKLrgzvOMz4BcH4RYL3VzhgEip V5uVMARnOVGpTVomKX74Jp2x3GhgG8rworTXIksDx6zu6g3BSQaNtEtqTgt0TCD36c8V DAmVasqyyUBEl58yEsPA2i9ZYILGSdK5im/LV/MTWyMHV36JrbozSVnp8INs4Pm7aUjG 74JfZzJ9BhY6Cv48k3Mls0aKPdUwk8PsWa3UIAYFmwRZwJVxF0gnAqHuAcxYZcBB1VX1 W3fg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=TeAWaya20n4o/Suttwj9+SUC8fA+BIidf/VxxmSG+HM=; b=l/8/oxYZjotsUrXhqQmlFDNhsFXw6P7U2jwplnh9g0q1wDkKXOWIrs714Rr0Z/igIs Hvvj0D+zk8tUGXoMikMf0oXx5cZ48MYNYUi7n/4cWqLBg0qps665vsPe0MVFykn/R+52 k47AGCBL5DWVtOraM94iWDXWnxbLcoAzqmIvZscPg2UBOboX8LquocSwek7CnM7bhHxY f68aRyI/FGCdRtiZDuTo8Z6mrRMhR3ZXwvrH2/59AoXnWLiD+bzEWaCORtbtVM6Sn+AC Wf0nqilgeW2Tqr9IL/WDzeS6xduNzK81AH9KJPFbj22OJSolgEfZk+Dkz6saU83cAKVa DJEg== X-Gm-Message-State: AKGB3mLp69m5K149z4e2H2hV+mBPTkPVf/RQmIT4SXy2CliwsqQT2wOF TbEqLZ1W/p9HWZyzZb2BaUOE7WVZ X-Google-Smtp-Source: ACJfBose7j3hl5b+84oJMwXiOCPVF85s9KeNtfNttBZk+Z1sk5B7C5iSAiIpU38X+J/lNh8U0Zw+Wg== X-Received: by 10.28.94.5 with SMTP id s5mr15206289wmb.92.1515580966882; Wed, 10 Jan 2018 02:42:46 -0800 (PST) Received: from localhost (ip-94-113-220-78.net.upcbroadband.cz. [94.113.220.78]) by smtp.gmail.com with ESMTPSA id s45sm29348475wrc.89.2018.01.10.02.42.46 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 10 Jan 2018 02:42:46 -0800 (PST) From: Jiri Pirko To: netdev@vger.kernel.org Cc: davem@davemloft.net, idosch@mellanox.com, yuvalm@mellanox.com, mlxsw@mellanox.com Subject: [patch net 2/2] mlxsw: spectrum_qdisc: Don't use variable array in mlxsw_sp_tclass_congestion_enable Date: Wed, 10 Jan 2018 11:42:44 +0100 Message-Id: <20180110104244.25275-3-jiri@resnulli.us> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180110104244.25275-1-jiri@resnulli.us> References: <20180110104244.25275-1-jiri@resnulli.us> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org From: Jiri Pirko Resolve the sparse warning: "sparse: Variable length array is used." Use 2 arrays for 2 PRM register accesses. Fixes: 96f17e0776c2 ("mlxsw: spectrum: Support RED qdisc offload") Signed-off-by: Jiri Pirko Reviewed-by: Yuval Mintz --- drivers/net/ethernet/mellanox/mlxsw/spectrum_qdisc.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlxsw/spectrum_qdisc.c b/drivers/net/ethernet/mellanox/mlxsw/spectrum_qdisc.c index c33beac5def0..b5397da94d7f 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/spectrum_qdisc.c +++ b/drivers/net/ethernet/mellanox/mlxsw/spectrum_qdisc.c @@ -46,7 +46,8 @@ mlxsw_sp_tclass_congestion_enable(struct mlxsw_sp_port *mlxsw_sp_port, int tclass_num, u32 min, u32 max, u32 probability, bool is_ecn) { - char cwtp_cmd[max_t(u8, MLXSW_REG_CWTP_LEN, MLXSW_REG_CWTPM_LEN)]; + char cwtpm_cmd[MLXSW_REG_CWTPM_LEN]; + char cwtp_cmd[MLXSW_REG_CWTP_LEN]; struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; int err; @@ -60,10 +61,10 @@ mlxsw_sp_tclass_congestion_enable(struct mlxsw_sp_port *mlxsw_sp_port, if (err) return err; - mlxsw_reg_cwtpm_pack(cwtp_cmd, mlxsw_sp_port->local_port, tclass_num, + mlxsw_reg_cwtpm_pack(cwtpm_cmd, mlxsw_sp_port->local_port, tclass_num, MLXSW_REG_CWTP_DEFAULT_PROFILE, true, is_ecn); - return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(cwtpm), cwtp_cmd); + return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(cwtpm), cwtpm_cmd); } static int