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Wed, 30 Dec 2020 21:26:32 -0600 Received: from atlvmail01.amd.com (10.180.10.61) by SATLEXMB01.amd.com (10.181.40.142) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3 via Frontend Transport; Wed, 30 Dec 2020 21:26:32 -0600 Received: from srdcmail.amd.com (srdcmail.amd.com [10.237.16.23]) by atlvmail01.amd.com (8.14.4/8.14.4) with ESMTP id 0BV3QgeN030168; Wed, 30 Dec 2020 22:26:43 -0500 Received: from srdcws824.amd.com (srdcws824.amd.com [10.237.59.99]) by srdcmail.amd.com (8.14.7/8.13.8) with ESMTP id 0BV3QSNL031410; Thu, 31 Dec 2020 11:26:28 +0800 Received: (from weisheng@localhost) by srdcws824.amd.com (8.14.7/8.14.7/Submit) id 0BV3QP70026511; Thu, 31 Dec 2020 11:26:25 +0800 From: Wesley Sheng To: , , , , , , , , , , CC: , , , Subject: [PATCH] PCI:tegra:Correct typo for PCIe endpoint mode in Tegra194 Date: Thu, 31 Dec 2020 11:25:39 +0800 Message-ID: <20201231032539.22322-1-wesley.sheng@amd.com> X-Mailer: git-send-email 2.16.2 MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 423507ea-f59d-46d8-9c6b-08d8ad3bdfd7 X-MS-TrafficTypeDiagnostic: MW3PR12MB4571: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:6790; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 31 Dec 2020 03:26:34.1311 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 423507ea-f59d-46d8-9c6b-08d8ad3bdfd7 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB01.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT022.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW3PR12MB4571 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org In config PCIE_TEGRA194_EP the mode incorrectly referred to host mode. Signed-off-by: Wesley Sheng Acked-by: Vidya Sagar Reviewed-by: Krzysztof Wilczyński --- drivers/pci/controller/dwc/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dwc/Kconfig index 044a3761c44f..6960babe6161 100644 --- a/drivers/pci/controller/dwc/Kconfig +++ b/drivers/pci/controller/dwc/Kconfig @@ -273,7 +273,7 @@ config PCIE_TEGRA194_EP select PCIE_TEGRA194 help Enables support for the PCIe controller in the NVIDIA Tegra194 SoC to - work in host mode. There are two instances of PCIe controllers in + work in endpoint mode. There are two instances of PCIe controllers in Tegra194. This controller can work either as EP or RC. In order to enable host-specific features PCIE_TEGRA194_HOST must be selected and in order to enable device-specific features PCIE_TEGRA194_EP must be