From patchwork Thu Dec 3 16:06:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: ChiYuan Huang X-Patchwork-Id: 1410481 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=Xb/zTMHX; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4Cn12V73k6z9s0b for ; Fri, 4 Dec 2020 03:07:46 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731069AbgLCQHc (ORCPT ); Thu, 3 Dec 2020 11:07:32 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55298 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728018AbgLCQHc (ORCPT ); Thu, 3 Dec 2020 11:07:32 -0500 Received: from mail-pf1-x443.google.com (mail-pf1-x443.google.com [IPv6:2607:f8b0:4864:20::443]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 50D94C061A53; Thu, 3 Dec 2020 08:06:46 -0800 (PST) Received: by mail-pf1-x443.google.com with SMTP id w6so1591384pfu.1; Thu, 03 Dec 2020 08:06:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=UE642If1a4zIekYpvyIiLVRXQYPzDscy3Y6yH2gA0sM=; b=Xb/zTMHX46/XwB2D15m9admr6/tYWE12DDqSpsLR5rsTXO4TPwfO8eKLILOSk3WZCn kcZrN0tTwzrAtaubkQjASS44N8Z0/ilnqWfqyFNkSv8gRsY5e7desZgGaV5/SpQPKgRM JWNkw7FGoDTWMbGhH25eaPFNBGiJ+qw2BVociBnwAQfnp8e4QJ1uLHDMrGMJcwHCpXHo 8lrjZ7Gk9cqgme8+VJ41F+QrKD9RUa0Iqtpxfg2swzfaSIeiYP8+cJbrTzUTDDjPCDvk l6JjM6RwxBTzWdwmCjVq6QuweEG4BeLB31saggiLbCVTn0eGMhke2nQO4LzxYUVb9aYV 8JAw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=UE642If1a4zIekYpvyIiLVRXQYPzDscy3Y6yH2gA0sM=; b=TG0hd6ezdMtsgrfhGACDsG1kWFQdUmsVl3/NIufhXA/QMd/A06QkqlRs4XQB5QHlRn dsW382XzqHYcwFuG4KJQYGiNyybNxCVWYmEp/SMvPrtRwzsLYQRpWUMjbwaM/ZW7WV3P AIkn30psNAqQYiRV3of3l72ceYkouJPjTz0HV1DoCxU7vz/mi5pelj01gkxb1MCeckmW SpuGxZJn0iyXmvkqTKqsUiqDri9g2bdgiApMWF8wL2TOxwVAtRwbzdTrrd73Nk9akps4 eaPgFd7N8NXtxUNkHLqDTLE2/qnKwERV87eoHtgQH7ZeH/t3dvH9xYnIapLxgUWYMk9U FLnQ== X-Gm-Message-State: AOAM531W+J8cd032Q8kQq/ZxgfC+AEUvER5+9PRAJbbsCJGDLPiN9TDe VHiEtqUDCZthUKGpuGCAH7M= X-Google-Smtp-Source: ABdhPJx8p8cgzJQjOlw/dPHx3m2Cz9bpkOnXcuNcSGUV+R4UyZeYxC0bI+sZBnMixnIhoKg6l1Rocg== X-Received: by 2002:a62:7b84:0:b029:19c:7146:4bbb with SMTP id w126-20020a627b840000b029019c71464bbbmr3921680pfc.52.1607011605786; Thu, 03 Dec 2020 08:06:45 -0800 (PST) Received: from localhost.localdomain (1-171-1-217.dynamic-ip.hinet.net. [1.171.1.217]) by smtp.gmail.com with ESMTPSA id h6sm92503pgc.15.2020.12.03.08.06.43 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 03 Dec 2020 08:06:45 -0800 (PST) From: cy_huang To: lee.jones@linaro.org, robh+dt@kernel.org Cc: cy_huang@richtek.com, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 2/4] backlight: rt4831: Adds DT binding document for Richtek RT4831 backlight Date: Fri, 4 Dec 2020 00:06:33 +0800 Message-Id: <1607011595-13603-2-git-send-email-u0084500@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1607011595-13603-1-git-send-email-u0084500@gmail.com> References: <1607011595-13603-1-git-send-email-u0084500@gmail.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: ChiYuan Huang Adds DT binding document for Richtek RT4831 backlight. Signed-off-by: ChiYuan Huang --- .../leds/backlight/richtek,rt4831-backlight.yaml | 86 ++++++++++++++++++++++ 1 file changed, 86 insertions(+) create mode 100644 Documentation/devicetree/bindings/leds/backlight/richtek,rt4831-backlight.yaml diff --git a/Documentation/devicetree/bindings/leds/backlight/richtek,rt4831-backlight.yaml b/Documentation/devicetree/bindings/leds/backlight/richtek,rt4831-backlight.yaml new file mode 100644 index 00000000..df1439a --- /dev/null +++ b/Documentation/devicetree/bindings/leds/backlight/richtek,rt4831-backlight.yaml @@ -0,0 +1,86 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/leds/backlight/richtek,rt4831-backlight.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Richtek RT4831 Backlight + +maintainers: + - ChiYuan Huang + +description: | + RT4831 is a mutifunctional device that can provide power to the LCD display + and LCD backlight. + + For the LCD backlight, it can provide four channel WLED driving capability. + Each channel driving current is up to 30mA + + Datasheet is available at + https://www.richtek.com/assets/product_file/RT4831A/DS4831A-05.pdf + +properties: + compatible: + const: richtek,rt4831-backlight + + default-brightness: + description: | + The default brightness that applied to the system on start-up. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 2048 + + max-brightness: + description: | + The max brightness for the H/W limit + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 2048 + + richtek,pwm-enable: + description: | + Specify the backlight dimming following by PWM duty or by SW control. + type: boolean + + richtek,bled-ovp-sel: + description: | + Backlight OVP level selection, currently support 17V/21V/25V/29V. + $ref: /schemas/types.yaml#/definitions/uint8 + default: 1 + minimum: 0 + maximum: 3 + + richtek,channel-use: + description: | + Backlight LED channel to be used. + BIT 0/1/2/3 is used to indicate led channel 1/2/3/4 enable or disable. + $ref: /schemas/types.yaml#/definitions/uint8 + minimum: 1 + maximum: 15 + +required: + - compatible + - richtek,channel-use + +additionalProperties: false + +examples: + - | + #include + i2c { + #address-cells = <1>; + #size-cells = <0>; + + rt4831@11 { + compatible = "richtek,rt4831"; + reg = <0x11>; + + backlight { + compatible = "richtek,rt4831-backlight"; + default-brightness = <1024>; + max-brightness = <2048>; + richtek,bled-ovp-sel = /bits/ 8 ; + richtek,channel-use = /bits/ 8 ; + }; + }; + }; From patchwork Thu Dec 3 16:06:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: ChiYuan Huang X-Patchwork-Id: 1410482 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=WI9RQlZA; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4Cn12W2wNhz9sRK for ; Fri, 4 Dec 2020 03:07:47 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729419AbgLCQHi (ORCPT ); Thu, 3 Dec 2020 11:07:38 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55328 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728018AbgLCQHi (ORCPT ); Thu, 3 Dec 2020 11:07:38 -0500 Received: from mail-pg1-x542.google.com (mail-pg1-x542.google.com [IPv6:2607:f8b0:4864:20::542]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E3394C061A54; Thu, 3 Dec 2020 08:06:48 -0800 (PST) Received: by mail-pg1-x542.google.com with SMTP id w4so1637578pgg.13; Thu, 03 Dec 2020 08:06:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ufY8PAE6/5PnBalLSAkkFIU9kLkjLoZMVRGTSeVEitk=; b=WI9RQlZAlARVycG20Bs7eowahragTEq3jOwXm0GE7N5OpNfweyeT2/joUbMFRvhWIi 7vvHn1a2SQ5mO4xSBs8/u+vgw7SImKBw1HsGHvCKnFbgJQnYPUnuSsyTUV5fiHnPAW9F 0eJHj8uphNXTHVdxboM0AkfkMpVURQddNyGKRI37HMNpP22c+7N22nxDkoOq9+QXQM+r EVEoC6oD9yT2ISEYnzJPKkZ20urnRaugggDswYlyBPbtVCBo1buupb20FHHGmUJ9xqyR HOvDJlWgk7F9eZeIcir0zMiJQcHmXq70vubAkzYzFMaKlPB/7nNyQXMLOPQFyxAbLEvc cqHQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ufY8PAE6/5PnBalLSAkkFIU9kLkjLoZMVRGTSeVEitk=; b=my+TXTamFN6fALnsmLgx+fVoNBNbr0LQK4blPGy33XCrl1c3Ev7OTy8iZBwlcoy19S jKkSnZZMZL7pd2AHmLAbcvDub9jSlkCVt7cCNjCeqW0wEZqXtCOnzQDvCJT/nKmLMe9j 8X0G6vaKBf8DoyihZRf1JcdtSpm2NQzpzc9HocP1MGcMPemgaHOQvp6hlwGmthxu5BA3 G98jIkDmpb2S02/D/R0Sn3ZSuFGJPFhd0kFGkfCRpy2Uz6qJotvJJ78T2fp4U2iJ5utf 4lhFmb3+MA/2yqtdgSiUNvL9dbRiY02mqj4uMs1ifLyCasIDmaw6S6/061rmVjbWibcR KfsA== X-Gm-Message-State: AOAM531rzbsZFPZu1He6WgzPSE76ztiqSGUHGGj20pg9NVjoQku/A07j waSxayRKgSy9ONA5q34sI/UafXDssP7b7A== X-Google-Smtp-Source: ABdhPJxI5rb09SN6xC8Rvcz8RG5807/SE+xJVRxxNlXfPx8oYo+qA/MdlCtpZ53IhYFAny4/wCwCRQ== X-Received: by 2002:a63:1959:: with SMTP id 25mr3628743pgz.201.1607011608437; Thu, 03 Dec 2020 08:06:48 -0800 (PST) Received: from localhost.localdomain (1-171-1-217.dynamic-ip.hinet.net. [1.171.1.217]) by smtp.gmail.com with ESMTPSA id h6sm92503pgc.15.2020.12.03.08.06.46 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 03 Dec 2020 08:06:47 -0800 (PST) From: cy_huang To: lee.jones@linaro.org, robh+dt@kernel.org Cc: cy_huang@richtek.com, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 3/4] regulator: rt4831: Adds DT binding document for Richtek RT4831 DSV regulator Date: Fri, 4 Dec 2020 00:06:34 +0800 Message-Id: <1607011595-13603-3-git-send-email-u0084500@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1607011595-13603-1-git-send-email-u0084500@gmail.com> References: <1607011595-13603-1-git-send-email-u0084500@gmail.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: ChiYuan Huang Adds DT binding document for Richtek RT4831 DSV regulator. Signed-off-by: ChiYuan Huang --- .../regulator/richtek,rt4831-regulator.yaml | 67 ++++++++++++++++++++++ 1 file changed, 67 insertions(+) create mode 100644 Documentation/devicetree/bindings/regulator/richtek,rt4831-regulator.yaml diff --git a/Documentation/devicetree/bindings/regulator/richtek,rt4831-regulator.yaml b/Documentation/devicetree/bindings/regulator/richtek,rt4831-regulator.yaml new file mode 100644 index 00000000..bc1e976 --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/richtek,rt4831-regulator.yaml @@ -0,0 +1,67 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/richtek,rt4831-regulator.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Richtek RT4831 Display Bias Voltage Regulator + +maintainers: + - ChiYuan Huang + +description: | + RT4831 is a multifunctional device that can provide power to the LCD display + and LCD backlight. + + For Display Bias Voltage DSVP and DSVN, the output range is about 4V to 6.5V. + It is sufficient to meet the current LCD power requirement. + + DSVLCM is a boost regulator in IC internal as DSVP and DSVN input power. + Its voltage should be configured above 0.15V to 0.2V gap larger than the + voltage needed for DSVP and DSVN. Too much voltage gap could improve the + voltage drop from the heavy loading scenario. But it also make the power + efficiency worse. It's a trade-off. + + Datasheet is available at + https://www.richtek.com/assets/product_file/RT4831A/DS4831A-05.pdf + +patternProperties: + "^DSV(LCM|P|N)$": + type: object + $ref: regulator.yaml# + description: + Properties for single Display Bias Voltage regulator. + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + rt4831@11 { + compatible = "richtek,rt4831"; + reg = <0x11>; + + regulators { + DSVLCM { + regulator-min-microvolt = <4000000>; + regulator-max-microvolt = <7150000>; + regulator-allow-bypass; + }; + DSVP { + regulator-name = "rt4831-dsvp"; + regulator-min-microvolt = <4000000>; + regulator-max-microvolt = <6500000>; + regulator-boot-on; + }; + DSVN { + regulator-name = "rt4831-dsvn"; + regulator-min-microvolt = <4000000>; + regulator-max-microvolt = <6500000>; + regulator-boot-on; + }; + }; + }; + }; From patchwork Thu Dec 3 16:06:35 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: ChiYuan Huang X-Patchwork-Id: 1410483 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=Qcpbihvi; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4Cn12W5TL8z9sSs for ; Fri, 4 Dec 2020 03:07:47 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728018AbgLCQHk (ORCPT ); Thu, 3 Dec 2020 11:07:40 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55332 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730709AbgLCQHi (ORCPT ); Thu, 3 Dec 2020 11:07:38 -0500 Received: from mail-pj1-x1042.google.com (mail-pj1-x1042.google.com [IPv6:2607:f8b0:4864:20::1042]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 85371C061A55; Thu, 3 Dec 2020 08:06:51 -0800 (PST) Received: by mail-pj1-x1042.google.com with SMTP id e5so1347837pjt.0; Thu, 03 Dec 2020 08:06:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=bNsIzWavgXRSs6v26PiBrp0qwluByJmuApRMLbqgomw=; b=QcpbihviHQbQFNZweIJMQhAdX/L6ebjyuL5oYQigX0pWwnNfY4NZz2ibGR/mKz+3Xv UDBCK8tY2o7GW6SNZDkfbKW8iL12DBuUTyzU1lliqN3CIO7zBwJp6LPHs7UU/wvHGLn+ x6Qk2uNadhwB8ipm1drrZijneiI2PtVvL84WrXtmmQFghVPwbnebf4M0RK64m+C3MkCJ VaXrWNdlGMhnIPavMKKlQBLqQ4hzLxwHHpCstTZIUXGSRK2dHAHhYwLc2ipxX3RiTcaL ugU8DFuye5FlZEJrjvCp0Ek4I/3TvKsUjgGrCcSx3Xrs2lKq95MMmG1cK5aUo+TkmeM6 vb8w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=bNsIzWavgXRSs6v26PiBrp0qwluByJmuApRMLbqgomw=; b=fdv0H7icb9r2B66HW1gupCesk22lZsf5Ws0N2LkRVnlHWRoQ8XNR+0NEWXwrfliO/6 d4EHwTxFIUG3B5U+lN5mZyJUK7J/cBDXO9XuW/ja9rBiHFhRQPq3Lri9Bkte38T3NNHk +wMttcLUqYBIzFL3ndZsnSyPv/k1H2MnskQJjSZ8RuZKTxWozbAuCqqJIZWrIDl22fMc Mlj8PcMB8X1vpGkqpcg2dsuUcUuoyh12d5xrX5O4Dm79INiGNAAyq5RAdppbm3XYKYCa csAWkUmF78/Ke+12EYvNO71SOx/d+UYdy9DkRxPKB/W6va8k83mXYvnSXp3OgHtOhMef ZMoQ== X-Gm-Message-State: AOAM530iMLvrt3CrHw09xDnU+MpV+6XNOrjp6QMDgtwx6KHyVeN1JkvB 8svIaWuWQW2WGPiIku/+ZYjIWzMWI0Novw== X-Google-Smtp-Source: ABdhPJxMw2MKzEFEDu5sc4TvOl8SpD0o04uDwu13/80SkU8soYOLunwP+jjWRs49uszKSp58bOIPkw== X-Received: by 2002:a17:90a:5d0d:: with SMTP id s13mr3697503pji.230.1607011610990; Thu, 03 Dec 2020 08:06:50 -0800 (PST) Received: from localhost.localdomain (1-171-1-217.dynamic-ip.hinet.net. [1.171.1.217]) by smtp.gmail.com with ESMTPSA id h6sm92503pgc.15.2020.12.03.08.06.48 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 03 Dec 2020 08:06:50 -0800 (PST) From: cy_huang To: lee.jones@linaro.org, robh+dt@kernel.org Cc: cy_huang@richtek.com, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 4/4] mfd: rt4831: Adds DT binding document for Richtek RT4831 MFD core Date: Fri, 4 Dec 2020 00:06:35 +0800 Message-Id: <1607011595-13603-4-git-send-email-u0084500@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1607011595-13603-1-git-send-email-u0084500@gmail.com> References: <1607011595-13603-1-git-send-email-u0084500@gmail.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: ChiYuan Huang Adds DT binding document for Richtek RT4831 MFD core. This patch depends on "backlight: rt4831: Adds DT binding document for Richtek RT4831 backlight". "regulator: rt4831: Adds DT binding document for Richtek RT4831 DSV regulator". Signed-off-by: ChiYuan Huang --- Changes since v2 - Add "patch depends on" in commit description. - Adds regulator-allow-bypass flag in DSVLCM. --- .../devicetree/bindings/mfd/richtek,rt4831.yaml | 90 ++++++++++++++++++++++ include/dt-bindings/leds/rt4831-backlight.h | 23 ++++++ 2 files changed, 113 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/richtek,rt4831.yaml create mode 100644 include/dt-bindings/leds/rt4831-backlight.h diff --git a/Documentation/devicetree/bindings/mfd/richtek,rt4831.yaml b/Documentation/devicetree/bindings/mfd/richtek,rt4831.yaml new file mode 100644 index 00000000..c6ca953 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/richtek,rt4831.yaml @@ -0,0 +1,90 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/richtek,rt4831.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Richtek RT4831 DSV and Backlight Integrated IC + +maintainers: + - ChiYuan Huang + +description: | + RT4831 is a multifunctional device that can provide power to the LCD display + and LCD backlight. + + For Display Bias Voltage DSVP and DSVN, the output range is about 4V to 6.5V. + It's sufficient to meet the current LCD power requirement. + + For the LCD backlight, it can provide four channel WLED driving capability. + Each channel driving current is up to 30mA + + Datasheet is available at + https://www.richtek.com/assets/product_file/RT4831A/DS4831A-05.pdf + +properties: + compatible: + const: richtek,rt4831 + + reg: + description: I2C device address. + maxItems: 1 + + enable-gpios: + description: | + GPIO to enable/disable the chip. It is optional. + Some usage directly tied this pin to follow VIO 1.8V power on sequence. + maxItems: 1 + + regulators: + $ref: ../regulator/richtek,rt4831-regulator.yaml + + backlight: + $ref: ../leds/backlight/richtek,rt4831-backlight.yaml + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include + i2c { + #address-cells = <1>; + #size-cells = <0>; + + rt4831@11 { + compatible = "richtek,rt4831"; + reg = <0x11>; + + regulators { + DSVLCM { + regulator-min-microvolt = <4000000>; + regulator-max-microvolt = <7150000>; + regulator-allow-bypass; + }; + DSVP { + regulator-name = "rt4831-dsvp"; + regulator-min-microvolt = <4000000>; + regulator-max-microvolt = <6500000>; + regulator-boot-on; + }; + DSVN { + regulator-name = "rt4831-dsvn"; + regulator-min-microvolt = <4000000>; + regulator-max-microvolt = <6500000>; + regulator-boot-on; + }; + }; + + backlight { + compatible = "richtek,rt4831-backlight"; + default-brightness = <1024>; + max-brightness = <2048>; + richtek,bled-ovp-sel = /bits/ 8 ; + richtek,channel-use = /bits/ 8 ; + }; + }; + }; diff --git a/include/dt-bindings/leds/rt4831-backlight.h b/include/dt-bindings/leds/rt4831-backlight.h new file mode 100644 index 00000000..7084906 --- /dev/null +++ b/include/dt-bindings/leds/rt4831-backlight.h @@ -0,0 +1,23 @@ +/* + * This header provides constants for rt4831 backlight bindings. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef _DT_BINDINGS_RT4831_BACKLIGHT_H +#define _DT_BINDINGS_RT4831_BACKLIGHT_H + +#define RT4831_BLOVPLVL_17V 0 +#define RT4831_BLOVPLVL_21V 1 +#define RT4831_BLOVPLVL_25V 2 +#define RT4831_BLOVPLVL_29V 3 + +#define RT4831_BLED_CH1EN (1 << 0) +#define RT4831_BLED_CH2EN (1 << 1) +#define RT4831_BLED_CH3EN (1 << 2) +#define RT4831_BLED_CH4EN (1 << 3) +#define RT4831_BLED_ALLCHEN ((1 << 4) - 1) + +#endif /* _DT_BINDINGS_RT4831_BACKLIGHT_H */