From patchwork Mon Nov 23 16:36:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Clemens Gruber X-Patchwork-Id: 1404910 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=pqgruber.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=pqgruber.com header.i=@pqgruber.com header.a=rsa-sha256 header.s=mail header.b=kATSGPeJ; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4Cft916MT5z9sTc for ; Tue, 24 Nov 2020 03:37:09 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390090AbgKWQgt (ORCPT ); Mon, 23 Nov 2020 11:36:49 -0500 Received: from mail.pqgruber.com ([52.59.78.55]:41296 "EHLO mail.pqgruber.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2390052AbgKWQgs (ORCPT ); Mon, 23 Nov 2020 11:36:48 -0500 Received: from workstation.tuxnet (213-47-165-233.cable.dynamic.surfer.at [213.47.165.233]) by mail.pqgruber.com (Postfix) with ESMTPSA id 1D026C81EEB; Mon, 23 Nov 2020 17:36:44 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pqgruber.com; s=mail; t=1606149404; bh=hz41Z7I9zqzApgPMAgsAHyGF2DXhsrx8qvTtKK3pLh4=; h=From:To:Cc:Subject:Date:From; b=kATSGPeJgjkR1bWYcVASYBbDIU6G/k+iCDutWhBuy2HNURdglU+BJLxi+vykNxnEk H04xUD7icnDZDanZs/J89JurRbxv+lh9qyx9CSwC6cpy9GohYkHMhPD0x1wtanerki pUaUHI3hKDzWwYtfvY9NXGahiWrcyCae+R1l1h3s= From: Clemens Gruber To: linux-pwm@vger.kernel.org Cc: Thierry Reding , u.kleine-koenig@pengutronix.de, Lee Jones , linux-kernel@vger.kernel.org, Sven Van Asbroeck , Mika Westerberg , David Jander , Clemens Gruber Subject: [PATCH v2 1/4] pwm: pca9685: Switch to atomic API Date: Mon, 23 Nov 2020 17:36:20 +0100 Message-Id: <20201123163622.166048-1-clemens.gruber@pqgruber.com> X-Mailer: git-send-email 2.29.2 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org This switch to the atomic API goes hand in hand with a few fixes to previously experienced issues: - The duty cycle is no longer lost after disable/enable (previously the OFF registers were cleared in disable and the user was required to call config to restore the duty cycle settings) - The prescale register is now read out. If one sets a period resulting in the same prescale register value, the sleep and write to the register is skipped - On systems without CONFIG_PM, the chip is now woken up in probe and put to sleep in remove (before, the chip was stuck in sleep when the default period was configured after POR) The hardware readout may return slightly different values than those that were set in apply due to the limited range of possible prescale and counter register values. If one channel is reconfigured with new duty cycle and period, the others will keep the same relative duty cycle to period ratio as they had before, even though the per-chip / global frequency changed. (The PCA9685 has only one prescaler!) Note that although the datasheet mentions 200 Hz as default frequency when using the internal 25 MHz oscillator, the calculated period from the default prescaler register setting of 30 is 5079040ns. Signed-off-by: Clemens Gruber --- Changes since v1: - Fixed a logic error - Impoved PM runtime handling and fixed !CONFIG_PM - Write default prescale reg value if invalid in probe - Reuse full_off/_on functions throughout driver - Use cached prescale value whenever possible drivers/pwm/pwm-pca9685.c | 295 ++++++++++++++++++++------------------ 1 file changed, 159 insertions(+), 136 deletions(-) diff --git a/drivers/pwm/pwm-pca9685.c b/drivers/pwm/pwm-pca9685.c index 4a55dc18656c..47a69ee7951f 100644 --- a/drivers/pwm/pwm-pca9685.c +++ b/drivers/pwm/pwm-pca9685.c @@ -47,11 +47,11 @@ #define PCA9685_ALL_LED_OFF_H 0xFD #define PCA9685_PRESCALE 0xFE +#define PCA9685_PRESCALE_DEF 0x1E /* => default frequency of ~200 Hz */ #define PCA9685_PRESCALE_MIN 0x03 /* => max. frequency of 1526 Hz */ #define PCA9685_PRESCALE_MAX 0xFF /* => min. frequency of 24 Hz */ #define PCA9685_COUNTER_RANGE 4096 -#define PCA9685_DEFAULT_PERIOD 5000000 /* Default period_ns = 1/200 Hz */ #define PCA9685_OSC_CLOCK_MHZ 25 /* Internal oscillator with 25 MHz */ #define PCA9685_NUMREGS 0xFF @@ -74,7 +74,7 @@ struct pca9685 { struct pwm_chip chip; struct regmap *regmap; - int period_ns; + int prescale; #if IS_ENABLED(CONFIG_GPIOLIB) struct mutex lock; struct gpio_chip gpio; @@ -87,6 +87,61 @@ static inline struct pca9685 *to_pca(struct pwm_chip *chip) return container_of(chip, struct pca9685, chip); } +static inline bool is_prescale_valid(int prescale) +{ + return prescale >= PCA9685_PRESCALE_MIN && + prescale <= PCA9685_PRESCALE_MAX; +} + +static void pca9685_pwm_full_off(struct pca9685 *pca, int index) +{ + int reg; + + /* + * Set the full OFF bit to cause the PWM channel to be always off. + * The full OFF bit has precedence over the other register values. + */ + + if (index >= PCA9685_MAXCHAN) + reg = PCA9685_ALL_LED_OFF_H; + else + reg = LED_N_OFF_H(index); + + regmap_write(pca->regmap, reg, LED_FULL); +} + +static void pca9685_pwm_full_on(struct pca9685 *pca, int index) +{ + int reg; + + /* + * Clear the OFF registers (including the full OFF bit) and set + * the full ON bit to cause the PWM channel to be always on. + */ + + if (index >= PCA9685_MAXCHAN) + reg = PCA9685_ALL_LED_OFF_L; + else + reg = LED_N_OFF_L(index); + + regmap_write(pca->regmap, reg, 0); + + if (index >= PCA9685_MAXCHAN) + reg = PCA9685_ALL_LED_OFF_H; + else + reg = LED_N_OFF_H(index); + + regmap_write(pca->regmap, reg, 0); + + if (index >= PCA9685_MAXCHAN) + reg = PCA9685_ALL_LED_ON_H; + else + reg = LED_N_ON_H(index); + + regmap_write(pca->regmap, reg, LED_FULL); +} + + #if IS_ENABLED(CONFIG_GPIOLIB) static bool pca9685_pwm_test_and_set_inuse(struct pca9685 *pca, int pwm_idx) { @@ -141,31 +196,27 @@ static int pca9685_pwm_gpio_get(struct gpio_chip *gpio, unsigned int offset) struct pwm_device *pwm = &pca->chip.pwms[offset]; unsigned int value; - regmap_read(pca->regmap, LED_N_ON_H(pwm->hwpwm), &value); + regmap_read(pca->regmap, LED_N_OFF_H(pwm->hwpwm), &value); - return value & LED_FULL; + return !(value & LED_FULL); } static void pca9685_pwm_gpio_set(struct gpio_chip *gpio, unsigned int offset, int value) { struct pca9685 *pca = gpiochip_get_data(gpio); - struct pwm_device *pwm = &pca->chip.pwms[offset]; - unsigned int on = value ? LED_FULL : 0; - - /* Clear both OFF registers */ - regmap_write(pca->regmap, LED_N_OFF_L(pwm->hwpwm), 0); - regmap_write(pca->regmap, LED_N_OFF_H(pwm->hwpwm), 0); - /* Set the full ON bit */ - regmap_write(pca->regmap, LED_N_ON_H(pwm->hwpwm), on); + if (value) + pca9685_pwm_full_on(pca, offset); + else + pca9685_pwm_full_off(pca, offset); } static void pca9685_pwm_gpio_free(struct gpio_chip *gpio, unsigned int offset) { struct pca9685 *pca = gpiochip_get_data(gpio); - pca9685_pwm_gpio_set(gpio, offset, 0); + pca9685_pwm_full_off(pca, offset); pm_runtime_put(pca->chip.dev); pca9685_pwm_clear_inuse(pca, offset); } @@ -246,36 +297,75 @@ static void pca9685_set_sleep_mode(struct pca9685 *pca, bool enable) } } -static int pca9685_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, - int duty_ns, int period_ns) +static void pca9685_set_prescale(struct pca9685 *pca, int prescale) +{ + /* Put chip into sleep mode */ + pca9685_set_sleep_mode(pca, true); + + /* Change the chip-wide output frequency */ + regmap_write(pca->regmap, PCA9685_PRESCALE, prescale); + + /* Wake the chip up */ + pca9685_set_sleep_mode(pca, false); + + pca->prescale = prescale; +} + +static void pca9685_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm, + struct pwm_state *state) +{ + struct pca9685 *pca = to_pca(chip); + unsigned int val, duty; + int reg; + + /* Calculate (chip-wide) period from cached prescale value */ + state->period = (PCA9685_COUNTER_RANGE * 1000 / PCA9685_OSC_CLOCK_MHZ) * + (pca->prescale + 1); + + /* The (per-channel) polarity is fixed */ + state->polarity = PWM_POLARITY_NORMAL; + + /* Read out current duty cycle and enabled state */ + reg = pwm->hwpwm >= PCA9685_MAXCHAN ? PCA9685_ALL_LED_OFF_H : + LED_N_OFF_H(pwm->hwpwm); + regmap_read(pca->regmap, reg, &val); + duty = (val & 0xf) << 8; + + state->enabled = !(val & LED_FULL); + + reg = pwm->hwpwm >= PCA9685_MAXCHAN ? PCA9685_ALL_LED_OFF_L : + LED_N_OFF_L(pwm->hwpwm); + regmap_read(pca->regmap, reg, &val); + duty |= (val & 0xff); + + if (duty < PCA9685_COUNTER_RANGE) { + duty *= state->period; + state->duty_cycle = duty / (PCA9685_COUNTER_RANGE - 1); + } else + state->duty_cycle = 0; +} + +static int pca9685_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, + const struct pwm_state *state) { struct pca9685 *pca = to_pca(chip); - unsigned long long duty; + unsigned long long duty, prescale; unsigned int reg; - int prescale; - if (period_ns != pca->period_ns) { - prescale = DIV_ROUND_CLOSEST(PCA9685_OSC_CLOCK_MHZ * period_ns, - PCA9685_COUNTER_RANGE * 1000) - 1; + if (state->polarity != PWM_POLARITY_NORMAL) + return -EOPNOTSUPP; - if (prescale >= PCA9685_PRESCALE_MIN && - prescale <= PCA9685_PRESCALE_MAX) { + prescale = DIV_ROUND_CLOSEST_ULL(PCA9685_OSC_CLOCK_MHZ * state->period, + PCA9685_COUNTER_RANGE * 1000) - 1; + if (prescale != pca->prescale) { + if (is_prescale_valid(prescale)) { /* * Putting the chip briefly into SLEEP mode * at this point won't interfere with the * pm_runtime framework, because the pm_runtime * state is guaranteed active here. */ - /* Put chip into sleep mode */ - pca9685_set_sleep_mode(pca, true); - - /* Change the chip-wide output frequency */ - regmap_write(pca->regmap, PCA9685_PRESCALE, prescale); - - /* Wake the chip up */ - pca9685_set_sleep_mode(pca, false); - - pca->period_ns = period_ns; + pca9685_set_prescale(pca, (int)prescale); } else { dev_err(chip->dev, "prescaler not set: period out of bounds!\n"); @@ -283,46 +373,18 @@ static int pca9685_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, } } - if (duty_ns < 1) { - if (pwm->hwpwm >= PCA9685_MAXCHAN) - reg = PCA9685_ALL_LED_OFF_H; - else - reg = LED_N_OFF_H(pwm->hwpwm); - - regmap_write(pca->regmap, reg, LED_FULL); - + if (!state->enabled || state->duty_cycle < 1) { + pca9685_pwm_full_off(pca, pwm->hwpwm); return 0; } - if (duty_ns == period_ns) { - /* Clear both OFF registers */ - if (pwm->hwpwm >= PCA9685_MAXCHAN) - reg = PCA9685_ALL_LED_OFF_L; - else - reg = LED_N_OFF_L(pwm->hwpwm); - - regmap_write(pca->regmap, reg, 0x0); - - if (pwm->hwpwm >= PCA9685_MAXCHAN) - reg = PCA9685_ALL_LED_OFF_H; - else - reg = LED_N_OFF_H(pwm->hwpwm); - - regmap_write(pca->regmap, reg, 0x0); - - /* Set the full ON bit */ - if (pwm->hwpwm >= PCA9685_MAXCHAN) - reg = PCA9685_ALL_LED_ON_H; - else - reg = LED_N_ON_H(pwm->hwpwm); - - regmap_write(pca->regmap, reg, LED_FULL); - + if (state->duty_cycle == state->period) { + pca9685_pwm_full_on(pca, pwm->hwpwm); return 0; } - duty = PCA9685_COUNTER_RANGE * (unsigned long long)duty_ns; - duty = DIV_ROUND_UP_ULL(duty, period_ns); + duty = (PCA9685_COUNTER_RANGE - 1) * state->duty_cycle; + duty = DIV_ROUND_UP_ULL(duty, state->period); if (pwm->hwpwm >= PCA9685_MAXCHAN) reg = PCA9685_ALL_LED_OFF_L; @@ -349,64 +411,6 @@ static int pca9685_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, return 0; } -static int pca9685_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm) -{ - struct pca9685 *pca = to_pca(chip); - unsigned int reg; - - /* - * The PWM subsystem does not support a pre-delay. - * So, set the ON-timeout to 0 - */ - if (pwm->hwpwm >= PCA9685_MAXCHAN) - reg = PCA9685_ALL_LED_ON_L; - else - reg = LED_N_ON_L(pwm->hwpwm); - - regmap_write(pca->regmap, reg, 0); - - if (pwm->hwpwm >= PCA9685_MAXCHAN) - reg = PCA9685_ALL_LED_ON_H; - else - reg = LED_N_ON_H(pwm->hwpwm); - - regmap_write(pca->regmap, reg, 0); - - /* - * Clear the full-off bit. - * It has precedence over the others and must be off. - */ - if (pwm->hwpwm >= PCA9685_MAXCHAN) - reg = PCA9685_ALL_LED_OFF_H; - else - reg = LED_N_OFF_H(pwm->hwpwm); - - regmap_update_bits(pca->regmap, reg, LED_FULL, 0x0); - - return 0; -} - -static void pca9685_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm) -{ - struct pca9685 *pca = to_pca(chip); - unsigned int reg; - - if (pwm->hwpwm >= PCA9685_MAXCHAN) - reg = PCA9685_ALL_LED_OFF_H; - else - reg = LED_N_OFF_H(pwm->hwpwm); - - regmap_write(pca->regmap, reg, LED_FULL); - - /* Clear the LED_OFF counter. */ - if (pwm->hwpwm >= PCA9685_MAXCHAN) - reg = PCA9685_ALL_LED_OFF_L; - else - reg = LED_N_OFF_L(pwm->hwpwm); - - regmap_write(pca->regmap, reg, 0x0); -} - static int pca9685_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm) { struct pca9685 *pca = to_pca(chip); @@ -422,15 +426,14 @@ static void pca9685_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm) { struct pca9685 *pca = to_pca(chip); - pca9685_pwm_disable(chip, pwm); + pca9685_pwm_full_off(pca, pwm->hwpwm); pm_runtime_put(chip->dev); pca9685_pwm_clear_inuse(pca, pwm->hwpwm); } static const struct pwm_ops pca9685_pwm_ops = { - .enable = pca9685_pwm_enable, - .disable = pca9685_pwm_disable, - .config = pca9685_pwm_config, + .get_state = pca9685_pwm_get_state, + .apply = pca9685_pwm_apply, .request = pca9685_pwm_request, .free = pca9685_pwm_free, .owner = THIS_MODULE, @@ -448,7 +451,7 @@ static int pca9685_pwm_probe(struct i2c_client *client, { struct pca9685 *pca; unsigned int reg; - int ret; + int prescale = 0, ret; pca = devm_kzalloc(&client->dev, sizeof(*pca), GFP_KERNEL); if (!pca) @@ -461,10 +464,17 @@ static int pca9685_pwm_probe(struct i2c_client *client, ret); return ret; } - pca->period_ns = PCA9685_DEFAULT_PERIOD; i2c_set_clientdata(client, pca); + regmap_read(pca->regmap, PCA9685_PRESCALE, &prescale); + if (is_prescale_valid(prescale)) + pca->prescale = prescale; + else { + /* If invalid, use HW default prescale value */ + pca9685_set_prescale(pca, PCA9685_PRESCALE_DEF); + } + regmap_read(pca->regmap, PCA9685_MODE2, ®); if (device_property_read_bool(&client->dev, "invert")) @@ -505,14 +515,20 @@ static int pca9685_pwm_probe(struct i2c_client *client, return ret; } - /* The chip comes out of power-up in the active state */ - pm_runtime_set_active(&client->dev); - /* - * Enable will put the chip into suspend, which is what we - * want as all outputs are disabled at this point - */ + /* Set runtime PM status according to chip sleep state */ + if (reg & MODE1_SLEEP) + pm_runtime_set_suspended(&client->dev); + else + pm_runtime_set_active(&client->dev); + + /* If active, enable puts chip into suspend until first use */ pm_runtime_enable(&client->dev); + if (!IS_ENABLED(CONFIG_PM)) { + /* Wake the chip up on non-PM environments */ + pca9685_set_sleep_mode(pca, false); + } + return 0; } @@ -524,7 +540,14 @@ static int pca9685_pwm_remove(struct i2c_client *client) ret = pwmchip_remove(&pca->chip); if (ret) return ret; + pm_runtime_disable(&client->dev); + + if (!IS_ENABLED(CONFIG_PM)) { + /* Put chip in sleep state on non-PM environments */ + pca9685_set_sleep_mode(pca, true); + } + return 0; } From patchwork Mon Nov 23 16:36:21 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Clemens Gruber X-Patchwork-Id: 1404911 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=pqgruber.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=pqgruber.com header.i=@pqgruber.com header.a=rsa-sha256 header.s=mail header.b=ZI0a4FTo; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4Cft923ZrBz9sTv for ; Tue, 24 Nov 2020 03:37:10 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387986AbgKWQg6 (ORCPT ); Mon, 23 Nov 2020 11:36:58 -0500 Received: from mail.pqgruber.com ([52.59.78.55]:41308 "EHLO mail.pqgruber.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732535AbgKWQg5 (ORCPT ); Mon, 23 Nov 2020 11:36:57 -0500 Received: from workstation.tuxnet (213-47-165-233.cable.dynamic.surfer.at [213.47.165.233]) by mail.pqgruber.com (Postfix) with ESMTPSA id 73961C81EEB; Mon, 23 Nov 2020 17:36:55 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pqgruber.com; s=mail; t=1606149415; bh=ZmjI6GuWBxpDH1vN+eqMpXexsA9ttqDbpZixuYg88ts=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ZI0a4FToaZI+GLoDqW5hsySPoKdnifMNSi+62cpwpZt83Gczas/36kuJJ+tKx3PQu dWicetmtkN9cbR4inYwsCkyR91vukZkn/eIbak+cVpm5WTf0hvYGMhqyCp+vshRuDw NjdDYIdDuI4FLGIXWCPtrTRsNGI4A209uYwh6cuk= From: Clemens Gruber To: linux-pwm@vger.kernel.org Cc: Thierry Reding , u.kleine-koenig@pengutronix.de, Lee Jones , linux-kernel@vger.kernel.org, Sven Van Asbroeck , Mika Westerberg , David Jander , Clemens Gruber Subject: [PATCH v2 2/4] pwm: pca9685: Set full OFF bits in probe Date: Mon, 23 Nov 2020 17:36:21 +0100 Message-Id: <20201123163622.166048-2-clemens.gruber@pqgruber.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201123163622.166048-1-clemens.gruber@pqgruber.com> References: <20201123163622.166048-1-clemens.gruber@pqgruber.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org The full OFF bits are set by default in the PCA9685 LEDn_OFF_H registers at POR. LEDn_ON_L/H and LEDn_OFF_L default to 0. The datasheet states that LEDn_OFF and LEDn_ON should never be both set to the same values. This patch removes the clearing of the full OFF bit in the probe function. We still clear the rest of the OFF regs but now we set the full OFF bit to avoid having both OFF and ON registers set to 0 and start up in a safe default state. Signed-off-by: Clemens Gruber --- Changes since v1: - Rebased drivers/pwm/pwm-pca9685.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pwm/pwm-pca9685.c b/drivers/pwm/pwm-pca9685.c index 47a69ee7951f..eaeadfa853cf 100644 --- a/drivers/pwm/pwm-pca9685.c +++ b/drivers/pwm/pwm-pca9685.c @@ -494,9 +494,9 @@ static int pca9685_pwm_probe(struct i2c_client *client, reg &= ~(MODE1_ALLCALL | MODE1_SUB1 | MODE1_SUB2 | MODE1_SUB3); regmap_write(pca->regmap, PCA9685_MODE1, reg); - /* Clear all "full off" bits */ + /* Reset OFF registers to HW default (only full OFF bit is set) */ regmap_write(pca->regmap, PCA9685_ALL_LED_OFF_L, 0); - regmap_write(pca->regmap, PCA9685_ALL_LED_OFF_H, 0); + regmap_write(pca->regmap, PCA9685_ALL_LED_OFF_H, LED_FULL); pca->chip.ops = &pca9685_pwm_ops; /* Add an extra channel for ALL_LED */ From patchwork Mon Nov 23 16:36:22 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Clemens Gruber X-Patchwork-Id: 1404912 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=pqgruber.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=pqgruber.com header.i=@pqgruber.com header.a=rsa-sha256 header.s=mail header.b=w2KhMJOr; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4Cft9h0pBqz9sTv for ; Tue, 24 Nov 2020 03:37:44 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390126AbgKWQhQ (ORCPT ); Mon, 23 Nov 2020 11:37:16 -0500 Received: from mail.pqgruber.com ([52.59.78.55]:41326 "EHLO mail.pqgruber.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729294AbgKWQhQ (ORCPT ); Mon, 23 Nov 2020 11:37:16 -0500 Received: from workstation.tuxnet (213-47-165-233.cable.dynamic.surfer.at [213.47.165.233]) by mail.pqgruber.com (Postfix) with ESMTPSA id C379CC81EEB; Mon, 23 Nov 2020 17:37:13 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pqgruber.com; s=mail; t=1606149434; bh=Kc6Fqrrn44fvOnRrUmkrUS9dVkPwBhPEwVaxBFioCTY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=w2KhMJOry0PmX39LhN+BBMGxyxy9JWzQCMG1v+5XaCfAVIrYZIV0Ty+vD/kJJ+APP 8rtX0g8KBnZiyUd5mrex1WzCeDmMMbWJ3Ku+8QlTq/p5jxSt7HZcv7xprxUf0/vL3H kTn/S4SxAcl7yTudiLbqdDNH3gBqt6BK2fx2x2Fk= From: Clemens Gruber To: linux-pwm@vger.kernel.org Cc: Thierry Reding , u.kleine-koenig@pengutronix.de, Lee Jones , linux-kernel@vger.kernel.org, Sven Van Asbroeck , Mika Westerberg , David Jander , Clemens Gruber Subject: [PATCH v2 3/4] pwm: pca9685: Support staggered output ON times Date: Mon, 23 Nov 2020 17:36:22 +0100 Message-Id: <20201123163622.166048-3-clemens.gruber@pqgruber.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201123163622.166048-1-clemens.gruber@pqgruber.com> References: <20201123163622.166048-1-clemens.gruber@pqgruber.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org The PCA9685 supports staggered LED output ON times to minimize current surges and reduce EMI. When this new option is enabled, the ON times of each channel are delayed by channel number x counter range / 16, which avoids asserting all enabled outputs at the same counter value while still maintaining the configured duty cycle of each output. Signed-off-by: Clemens Gruber --- Changes since v1: - Rebased drivers/pwm/pwm-pca9685.c | 35 ++++++++++++++++++++++++++++++++++- 1 file changed, 34 insertions(+), 1 deletion(-) diff --git a/drivers/pwm/pwm-pca9685.c b/drivers/pwm/pwm-pca9685.c index eaeadfa853cf..c22268b63fcc 100644 --- a/drivers/pwm/pwm-pca9685.c +++ b/drivers/pwm/pwm-pca9685.c @@ -75,6 +75,7 @@ struct pca9685 { struct pwm_chip chip; struct regmap *regmap; int prescale; + bool staggered_outputs; #if IS_ENABLED(CONFIG_GPIOLIB) struct mutex lock; struct gpio_chip gpio; @@ -350,7 +351,7 @@ static int pca9685_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, { struct pca9685 *pca = to_pca(chip); unsigned long long duty, prescale; - unsigned int reg; + unsigned int on, off, reg; if (state->polarity != PWM_POLARITY_NORMAL) return -EOPNOTSUPP; @@ -386,6 +387,32 @@ static int pca9685_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, duty = (PCA9685_COUNTER_RANGE - 1) * state->duty_cycle; duty = DIV_ROUND_UP_ULL(duty, state->period); + if (pca->staggered_outputs) { + if (pwm->hwpwm < PCA9685_MAXCHAN) { + /* + * To reduce EMI, the ON times of each channel are + * spread out evenly within the counter range, while + * still maintaining the configured duty cycle + */ + on = pwm->hwpwm * PCA9685_COUNTER_RANGE / + PCA9685_MAXCHAN; + off = (on + duty) % PCA9685_COUNTER_RANGE; + regmap_write(pca->regmap, LED_N_ON_L(pwm->hwpwm), + on & 0xff); + regmap_write(pca->regmap, LED_N_ON_H(pwm->hwpwm), + (on >> 8) & 0xf); + regmap_write(pca->regmap, LED_N_OFF_L(pwm->hwpwm), + off & 0xff); + regmap_write(pca->regmap, LED_N_OFF_H(pwm->hwpwm), + (off >> 8) & 0xf); + return 0; + } + + /* No staggering possible if "all LEDs" channel is used */ + regmap_write(pca->regmap, PCA9685_ALL_LED_ON_L, 0); + regmap_write(pca->regmap, PCA9685_ALL_LED_ON_H, 0); + } + if (pwm->hwpwm >= PCA9685_MAXCHAN) reg = PCA9685_ALL_LED_OFF_L; else @@ -489,6 +516,9 @@ static int pca9685_pwm_probe(struct i2c_client *client, regmap_write(pca->regmap, PCA9685_MODE2, reg); + pca->staggered_outputs = device_property_read_bool( + &client->dev, "staggered-outputs"); + /* Disable all LED ALLCALL and SUBx addresses to avoid bus collisions */ regmap_read(pca->regmap, PCA9685_MODE1, ®); reg &= ~(MODE1_ALLCALL | MODE1_SUB1 | MODE1_SUB2 | MODE1_SUB3); @@ -497,6 +527,9 @@ static int pca9685_pwm_probe(struct i2c_client *client, /* Reset OFF registers to HW default (only full OFF bit is set) */ regmap_write(pca->regmap, PCA9685_ALL_LED_OFF_L, 0); regmap_write(pca->regmap, PCA9685_ALL_LED_OFF_H, LED_FULL); + /* Reset ON registers to HW default */ + regmap_write(pca->regmap, PCA9685_ALL_LED_ON_L, 0); + regmap_write(pca->regmap, PCA9685_ALL_LED_ON_H, 0); pca->chip.ops = &pca9685_pwm_ops; /* Add an extra channel for ALL_LED */ From patchwork Mon Nov 23 16:39:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Clemens Gruber X-Patchwork-Id: 1404917 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pwm-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=pqgruber.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=pqgruber.com header.i=@pqgruber.com header.a=rsa-sha256 header.s=mail header.b=yd4mO/P0; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4CftDf188dz9sTL for ; Tue, 24 Nov 2020 03:40:18 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389665AbgKWQj4 (ORCPT ); Mon, 23 Nov 2020 11:39:56 -0500 Received: from mail.pqgruber.com ([52.59.78.55]:41392 "EHLO mail.pqgruber.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732512AbgKWQj4 (ORCPT ); Mon, 23 Nov 2020 11:39:56 -0500 Received: from workstation.tuxnet (213-47-165-233.cable.dynamic.surfer.at [213.47.165.233]) by mail.pqgruber.com (Postfix) with ESMTPSA id D7D05C81EEB; Mon, 23 Nov 2020 17:39:53 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=pqgruber.com; s=mail; t=1606149594; bh=vfy6iH8njtY0puGVd8sfT1IejW8lXGG1Yz4/aftKfdA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=yd4mO/P0eQwrYVtlAckUA0Qv+T/iMHADPRNrKoUwB1MCK2eGAYT2yaNIXp5cJf+5f Za/eT8a9zekPdth3j/cVQFwugK1hAYQbQafLjlpyJ0I8a9QVYuB7DrBNngxDtpEJrR BZ+3l7MmVYCC9y1KO8FCdoZ+bVMGmA38swFHOGTk= From: Clemens Gruber To: linux-pwm@vger.kernel.org, devicetree@vger.kernel.org Cc: Rob Herring , Thierry Reding , u.kleine-koenig@pengutronix.de, Lee Jones , linux-kernel@vger.kernel.org, Clemens Gruber Subject: [PATCH v2 4/4] dt-bindings: pwm: pca9685: Add staggered-outputs property Date: Mon, 23 Nov 2020 17:39:20 +0100 Message-Id: <20201123163920.166175-1-clemens.gruber@pqgruber.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201123163622.166048-1-clemens.gruber@pqgruber.com> References: <20201123163622.166048-1-clemens.gruber@pqgruber.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org The pca9685 driver supports a new staggered-outputs property for reduced current surges and EMI. This adds documentation for the new DT property. Signed-off-by: Clemens Gruber --- Documentation/devicetree/bindings/pwm/nxp,pca9685-pwm.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/pwm/nxp,pca9685-pwm.txt b/Documentation/devicetree/bindings/pwm/nxp,pca9685-pwm.txt index f21b55c95738..911bbb65984e 100644 --- a/Documentation/devicetree/bindings/pwm/nxp,pca9685-pwm.txt +++ b/Documentation/devicetree/bindings/pwm/nxp,pca9685-pwm.txt @@ -12,6 +12,8 @@ Optional properties: - invert (bool): boolean to enable inverted logic - open-drain (bool): boolean to configure outputs with open-drain structure; if omitted use totem-pole structure + - staggered-outputs (bool): boolean to enable staggered output ON times to + minimize current surges and EMI Example: