From patchwork Tue Nov 17 02:22:01 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sia Jee Heng X-Patchwork-Id: 1401284 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=intel.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4CZqrp35q6z9sVV for ; Tue, 17 Nov 2020 13:39:06 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726963AbgKQCin (ORCPT ); Mon, 16 Nov 2020 21:38:43 -0500 Received: from mga04.intel.com ([192.55.52.120]:52551 "EHLO mga04.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726789AbgKQCim (ORCPT ); Mon, 16 Nov 2020 21:38:42 -0500 IronPort-SDR: feOsUOkfeHOkEWZInJikVDAs/veNAH6Yr1Dl3q36bTpZwJwUt0w7ky8rtUNQQxxqgdayj5QcxO bB248vHbKYaA== X-IronPort-AV: E=McAfee;i="6000,8403,9807"; a="168274039" X-IronPort-AV: E=Sophos;i="5.77,484,1596524400"; d="scan'208";a="168274039" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Nov 2020 18:38:42 -0800 IronPort-SDR: pPSwdX/YLVLVjcUup1FAlQBvB03MnmDtBYOyZSXpWNiUMYbKVZ/C/NGI0eIqQHvsEy2c9uK75A fo/1iGC2HUxA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.77,484,1596524400"; d="scan'208";a="358706020" Received: from jsia-hp-z620-workstation.png.intel.com ([10.221.118.135]) by fmsmga004.fm.intel.com with ESMTP; 16 Nov 2020 18:38:40 -0800 From: Sia Jee Heng To: vkoul@kernel.org, Eugeniy.Paltsev@synopsys.com, robh+dt@kernel.org Cc: andriy.shevchenko@linux.intel.com, dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v4 01/15] dt-bindings: dma: Add YAML schemas for dw-axi-dmac Date: Tue, 17 Nov 2020 10:22:01 +0800 Message-Id: <20201117022215.2461-2-jee.heng.sia@intel.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20201117022215.2461-1-jee.heng.sia@intel.com> References: <20201117022215.2461-1-jee.heng.sia@intel.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org YAML schemas Device Tree (DT) binding is the new format for DT to replace the old format. Introduce YAML schemas DT binding for dw-axi-dmac and remove the old version. Signed-off-by: Sia Jee Heng --- .../bindings/dma/snps,dw-axi-dmac.txt | 39 ------ .../bindings/dma/snps,dw-axi-dmac.yaml | 126 ++++++++++++++++++ 2 files changed, 126 insertions(+), 39 deletions(-) delete mode 100644 Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.txt create mode 100644 Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml diff --git a/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.txt b/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.txt deleted file mode 100644 index dbe160400adc..000000000000 --- a/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.txt +++ /dev/null @@ -1,39 +0,0 @@ -Synopsys DesignWare AXI DMA Controller - -Required properties: -- compatible: "snps,axi-dma-1.01a" -- reg: Address range of the DMAC registers. This should include - all of the per-channel registers. -- interrupt: Should contain the DMAC interrupt number. -- dma-channels: Number of channels supported by hardware. -- snps,dma-masters: Number of AXI masters supported by the hardware. -- snps,data-width: Maximum AXI data width supported by hardware. - (0 - 8bits, 1 - 16bits, 2 - 32bits, ..., 6 - 512bits) -- snps,priority: Priority of channel. Array size is equal to the number of - dma-channels. Priority value must be programmed within [0:dma-channels-1] - range. (0 - minimum priority) -- snps,block-size: Maximum block size supported by the controller channel. - Array size is equal to the number of dma-channels. - -Optional properties: -- snps,axi-max-burst-len: Restrict master AXI burst length by value specified - in this property. If this property is missing the maximum AXI burst length - supported by DMAC is used. [1:256] - -Example: - -dmac: dma-controller@80000 { - compatible = "snps,axi-dma-1.01a"; - reg = <0x80000 0x400>; - clocks = <&core_clk>, <&cfgr_clk>; - clock-names = "core-clk", "cfgr-clk"; - interrupt-parent = <&intc>; - interrupts = <27>; - - dma-channels = <4>; - snps,dma-masters = <2>; - snps,data-width = <3>; - snps,block-size = <4096 4096 4096 4096>; - snps,priority = <0 1 2 3>; - snps,axi-max-burst-len = <16>; -}; diff --git a/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml b/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml new file mode 100644 index 000000000000..6c2e8e612af5 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml @@ -0,0 +1,126 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/snps,dw-axi-dmac.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Synopsys DesignWare AXI DMA Controller + +maintainers: + - Eugeniy Paltsev + #include + /* example with snps,dw-axi-dmac */ + dmac: dma-controller@80000 { + compatible = "snps,axi-dma-1.01a"; + reg = <0x80000 0x400>; + clocks = <&core_clk>, <&cfgr_clk>; + clock-names = "core-clk", "cfgr-clk"; + interrupt-parent = <&intc>; + interrupts = <27>; + #dma-cells = <1>; + dma-channels = <4>; + snps,dma-masters = <2>; + snps,data-width = <3>; + snps,block-size = <4096 4096 4096 4096>; + snps,priority = <0 1 2 3>; + snps,axi-max-burst-len = <16>; + }; From patchwork Tue Nov 17 02:22:10 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sia Jee Heng X-Patchwork-Id: 1401285 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=intel.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4CZqsj0lYwz9sT6 for ; Tue, 17 Nov 2020 13:39:53 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727310AbgKQCjO (ORCPT ); Mon, 16 Nov 2020 21:39:14 -0500 Received: from mga04.intel.com ([192.55.52.120]:52576 "EHLO mga04.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726588AbgKQCjN (ORCPT ); Mon, 16 Nov 2020 21:39:13 -0500 IronPort-SDR: Qt9v/5aQEBdpW1ZGxV0HSofoA98qmhePJ0+wGTJPSIgkUlTxAxAyzQWRTp/NAkcaLGaS2AEdTf 9zu/lkyTPW+g== X-IronPort-AV: E=McAfee;i="6000,8403,9807"; a="168274087" X-IronPort-AV: E=Sophos;i="5.77,484,1596524400"; d="scan'208";a="168274087" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Nov 2020 18:39:09 -0800 IronPort-SDR: hHc9YKCt/iFsIyNoda4xjUL6hMSwl6SFP2vHWOpnvgmSJOW22UnREo4DMN0qLqbCp9IXXQGD+Y nuZgJ7XNGKYg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.77,484,1596524400"; d="scan'208";a="358706112" Received: from jsia-hp-z620-workstation.png.intel.com ([10.221.118.135]) by fmsmga004.fm.intel.com with ESMTP; 16 Nov 2020 18:39:07 -0800 From: Sia Jee Heng To: vkoul@kernel.org, Eugeniy.Paltsev@synopsys.com, robh+dt@kernel.org Cc: andriy.shevchenko@linux.intel.com, dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v4 10/15] dt-binding: dma: dw-axi-dmac: Add support for Intel KeemBay AxiDMA Date: Tue, 17 Nov 2020 10:22:10 +0800 Message-Id: <20201117022215.2461-11-jee.heng.sia@intel.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20201117022215.2461-1-jee.heng.sia@intel.com> References: <20201117022215.2461-1-jee.heng.sia@intel.com> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add support for Intel KeemBay AxiDMA to the dw-axi-dmac Schemas DT binding. Signed-off-by: Sia Jee Heng --- .../bindings/dma/snps,dw-axi-dmac.yaml | 27 +++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml b/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml index 6c2e8e612af5..9e3ca9083814 100644 --- a/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml +++ b/Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml @@ -8,6 +8,7 @@ title: Synopsys DesignWare AXI DMA Controller maintainers: - Eugeniy Paltsev description: | Synopsys DesignWare AXI DMA Controller DT Binding @@ -16,14 +17,18 @@ properties: compatible: enum: - snps,axi-dma-1.01a + - intel,kmb-axi-dma reg: + minItems: 1 items: - description: Address range of the DMAC registers + - description: Address range of the DMAC APB registers reg-names: items: - const: axidma_ctrl_regs + - const: axidma_apb_regs interrupts: maxItems: 1 @@ -124,3 +129,25 @@ examples: snps,priority = <0 1 2 3>; snps,axi-max-burst-len = <16>; }; + + - | + #include + #include + /* example with intel,kmb-axi-dma */ + #define KEEM_BAY_PSS_AXI_DMA + #define KEEM_BAY_PSS_APB_AXI_DMA + axi_dma: dma@28000000 { + compatible = "intel,kmb-axi-dma"; + reg = <0x28000000 0x1000>, <0x20250000 0x24>; + reg-names = "axidma_ctrl_regs", "axidma_apb_regs"; + interrupts = ; + clock-names = "core-clk", "cfgr-clk"; + clocks = <&scmi_clk KEEM_BAY_PSS_AXI_DMA>, <&scmi_clk KEEM_BAY_PSS_APB_AXI_DMA>; + #dma-cells = <1>; + dma-channels = <8>; + snps,dma-masters = <1>; + snps,data-width = <4>; + snps,priority = <0 0 0 0 0 0 0 0>; + snps,block-size = <1024 1024 1024 1024 1024 1024 1024 1024>; + snps,axi-max-burst-len = <16>; + };