From patchwork Wed Oct 28 08:23:49 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Mark Cave-Ayland X-Patchwork-Id: 1389168 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=ilande.co.uk Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4CLhT61qhzz9sV7 for ; Wed, 28 Oct 2020 19:24:58 +1100 (AEDT) Received: from localhost ([::1]:39630 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kXglM-0002p5-5B for incoming@patchwork.ozlabs.org; Wed, 28 Oct 2020 04:24:56 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:37416) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kXgkz-0002m5-Ut for qemu-devel@nongnu.org; Wed, 28 Oct 2020 04:24:33 -0400 Received: from mail.ilande.co.uk ([2001:41c9:1:41f::167]:51656 helo=mail.default.ilande.uk0.bigv.io) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kXgkx-00044s-2b for qemu-devel@nongnu.org; Wed, 28 Oct 2020 04:24:33 -0400 Received: from host81-158-111-11.range81-158.btcentralplus.com ([81.158.111.11] helo=kentang.home) by mail.default.ilande.uk0.bigv.io with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1kXgl0-0006Q8-Oh; Wed, 28 Oct 2020 08:24:39 +0000 From: Mark Cave-Ayland To: peter.maydell@linaro.org, qemu-devel@nongnu.org Date: Wed, 28 Oct 2020 08:23:49 +0000 Message-Id: <20201028082358.23761-2-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20201028082358.23761-1-mark.cave-ayland@ilande.co.uk> References: <20201028082358.23761-1-mark.cave-ayland@ilande.co.uk> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 81.158.111.11 X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk Subject: [PULL 01/10] sparc32-dma: use object_initialize_child() for espdma and ledma child objects X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on mail.default.ilande.uk0.bigv.io) Received-SPF: pass client-ip=2001:41c9:1:41f::167; envelope-from=mark.cave-ayland@ilande.co.uk; helo=mail.default.ilande.uk0.bigv.io X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Cave-Ayland , =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Store the child objects directly within the sparc32-dma object rather than using link properties. Signed-off-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20200926140216.7368-2-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland --- hw/dma/sparc32_dma.c | 15 +++++++++------ include/hw/sparc/sparc32_dma.h | 4 ++-- 2 files changed, 11 insertions(+), 8 deletions(-) diff --git a/hw/dma/sparc32_dma.c b/hw/dma/sparc32_dma.c index d20a5bc065..b25a212f7a 100644 --- a/hw/dma/sparc32_dma.c +++ b/hw/dma/sparc32_dma.c @@ -379,10 +379,9 @@ static void sparc32_dma_realize(DeviceState *dev, Error **errp) return; } - espdma = qdev_new(TYPE_SPARC32_ESPDMA_DEVICE); + espdma = DEVICE(&s->espdma); object_property_set_link(OBJECT(espdma), "iommu", iommu, &error_abort); - object_property_add_child(OBJECT(s), "espdma", OBJECT(espdma)); - sysbus_realize_and_unref(SYS_BUS_DEVICE(espdma), &error_fatal); + sysbus_realize(SYS_BUS_DEVICE(espdma), &error_fatal); esp = DEVICE(object_resolve_path_component(OBJECT(espdma), "esp")); sbd = SYS_BUS_DEVICE(esp); @@ -394,10 +393,9 @@ static void sparc32_dma_realize(DeviceState *dev, Error **errp) memory_region_add_subregion(&s->dmamem, 0x0, sysbus_mmio_get_region(sbd, 0)); - ledma = qdev_new(TYPE_SPARC32_LEDMA_DEVICE); + ledma = DEVICE(&s->ledma); object_property_set_link(OBJECT(ledma), "iommu", iommu, &error_abort); - object_property_add_child(OBJECT(s), "ledma", OBJECT(ledma)); - sysbus_realize_and_unref(SYS_BUS_DEVICE(ledma), &error_fatal); + sysbus_realize(SYS_BUS_DEVICE(ledma), &error_fatal); lance = DEVICE(object_resolve_path_component(OBJECT(ledma), "lance")); sbd = SYS_BUS_DEVICE(lance); @@ -421,6 +419,11 @@ static void sparc32_dma_init(Object *obj) memory_region_init(&s->dmamem, OBJECT(s), "dma", DMA_SIZE + DMA_ETH_SIZE); sysbus_init_mmio(sbd, &s->dmamem); + + object_initialize_child(obj, "espdma", &s->espdma, + TYPE_SPARC32_ESPDMA_DEVICE); + object_initialize_child(obj, "ledma", &s->ledma, + TYPE_SPARC32_LEDMA_DEVICE); } static void sparc32_dma_class_init(ObjectClass *klass, void *data) diff --git a/include/hw/sparc/sparc32_dma.h b/include/hw/sparc/sparc32_dma.h index e650489414..3348a725f0 100644 --- a/include/hw/sparc/sparc32_dma.h +++ b/include/hw/sparc/sparc32_dma.h @@ -48,8 +48,8 @@ struct SPARC32DMAState { MemoryRegion dmamem; MemoryRegion ledma_alias; - ESPDMADeviceState *espdma; - LEDMADeviceState *ledma; + ESPDMADeviceState espdma; + LEDMADeviceState ledma; }; /* sparc32_dma.c */ From patchwork Wed Oct 28 08:23:50 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Mark Cave-Ayland X-Patchwork-Id: 1389169 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=ilande.co.uk Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4CLhT83v1Xz9sV7 for ; Wed, 28 Oct 2020 19:25:00 +1100 (AEDT) Received: from localhost ([::1]:39786 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kXglO-0002t0-DY for incoming@patchwork.ozlabs.org; Wed, 28 Oct 2020 04:24:58 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:37440) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kXgl2-0002q9-Nr for qemu-devel@nongnu.org; Wed, 28 Oct 2020 04:24:36 -0400 Received: from mail.ilande.co.uk ([2001:41c9:1:41f::167]:51664 helo=mail.default.ilande.uk0.bigv.io) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kXgl1-00047w-3d for qemu-devel@nongnu.org; Wed, 28 Oct 2020 04:24:36 -0400 Received: from host81-158-111-11.range81-158.btcentralplus.com ([81.158.111.11] helo=kentang.home) by mail.default.ilande.uk0.bigv.io with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1kXgl5-0006Q8-WD; Wed, 28 Oct 2020 08:24:43 +0000 From: Mark Cave-Ayland To: peter.maydell@linaro.org, qemu-devel@nongnu.org Date: Wed, 28 Oct 2020 08:23:50 +0000 Message-Id: <20201028082358.23761-3-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20201028082358.23761-1-mark.cave-ayland@ilande.co.uk> References: <20201028082358.23761-1-mark.cave-ayland@ilande.co.uk> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 81.158.111.11 X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk Subject: [PULL 02/10] sparc32-ledma: use object_initialize_child() for lance child object X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on mail.default.ilande.uk0.bigv.io) Received-SPF: pass client-ip=2001:41c9:1:41f::167; envelope-from=mark.cave-ayland@ilande.co.uk; helo=mail.default.ilande.uk0.bigv.io X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Cave-Ayland , =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Store the child object directly within the sparc32-ledma object rather than using link properties. Signed-off-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20200926140216.7368-3-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland --- hw/dma/sparc32_dma.c | 14 ++++++++------ include/hw/sparc/sparc32_dma.h | 2 +- 2 files changed, 9 insertions(+), 7 deletions(-) diff --git a/hw/dma/sparc32_dma.c b/hw/dma/sparc32_dma.c index b25a212f7a..84196afb95 100644 --- a/hw/dma/sparc32_dma.c +++ b/hw/dma/sparc32_dma.c @@ -331,24 +331,26 @@ static const TypeInfo sparc32_espdma_device_info = { static void sparc32_ledma_device_init(Object *obj) { DMADeviceState *s = SPARC32_DMA_DEVICE(obj); + LEDMADeviceState *ls = SPARC32_LEDMA_DEVICE(obj); memory_region_init_io(&s->iomem, OBJECT(s), &dma_mem_ops, s, "ledma-mmio", DMA_SIZE); + + object_initialize_child(obj, "lance", &ls->lance, TYPE_LANCE); } static void sparc32_ledma_device_realize(DeviceState *dev, Error **errp) { - DeviceState *d; + LEDMADeviceState *s = SPARC32_LEDMA_DEVICE(dev); + SysBusPCNetState *lance = SYSBUS_PCNET(&s->lance); NICInfo *nd = &nd_table[0]; /* FIXME use qdev NIC properties instead of nd_table[] */ qemu_check_nic_model(nd, TYPE_LANCE); - d = qdev_new(TYPE_LANCE); - object_property_add_child(OBJECT(dev), "lance", OBJECT(d)); - qdev_set_nic_properties(d, nd); - object_property_set_link(OBJECT(d), "dma", OBJECT(dev), &error_abort); - sysbus_realize_and_unref(SYS_BUS_DEVICE(d), &error_fatal); + qdev_set_nic_properties(DEVICE(lance), nd); + object_property_set_link(OBJECT(lance), "dma", OBJECT(dev), &error_abort); + sysbus_realize(SYS_BUS_DEVICE(lance), &error_fatal); } static void sparc32_ledma_device_class_init(ObjectClass *klass, void *data) diff --git a/include/hw/sparc/sparc32_dma.h b/include/hw/sparc/sparc32_dma.h index 3348a725f0..80d69cbba2 100644 --- a/include/hw/sparc/sparc32_dma.h +++ b/include/hw/sparc/sparc32_dma.h @@ -37,7 +37,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(LEDMADeviceState, SPARC32_LEDMA_DEVICE) struct LEDMADeviceState { DMADeviceState parent_obj; - SysBusPCNetState *lance; + SysBusPCNetState lance; }; #define TYPE_SPARC32_DMA "sparc32-dma" From patchwork Wed Oct 28 08:23:51 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Mark Cave-Ayland X-Patchwork-Id: 1389173 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=ilande.co.uk Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4CLhXT6Wsfz9sV7 for ; Wed, 28 Oct 2020 19:27:53 +1100 (AEDT) Received: from localhost ([::1]:47128 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kXgoB-000614-Se for incoming@patchwork.ozlabs.org; Wed, 28 Oct 2020 04:27:51 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:37462) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kXgl7-00030s-MR for qemu-devel@nongnu.org; Wed, 28 Oct 2020 04:24:41 -0400 Received: from mail.ilande.co.uk ([2001:41c9:1:41f::167]:51670 helo=mail.default.ilande.uk0.bigv.io) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kXgl5-00049K-V5 for qemu-devel@nongnu.org; Wed, 28 Oct 2020 04:24:41 -0400 Received: from host81-158-111-11.range81-158.btcentralplus.com ([81.158.111.11] helo=kentang.home) by mail.default.ilande.uk0.bigv.io with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1kXglA-0006Q8-3z; Wed, 28 Oct 2020 08:24:48 +0000 From: Mark Cave-Ayland To: peter.maydell@linaro.org, qemu-devel@nongnu.org Date: Wed, 28 Oct 2020 08:23:51 +0000 Message-Id: <20201028082358.23761-4-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20201028082358.23761-1-mark.cave-ayland@ilande.co.uk> References: <20201028082358.23761-1-mark.cave-ayland@ilande.co.uk> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 81.158.111.11 X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk Subject: [PULL 03/10] sparc32-espdma: use object_initialize_child() for esp child object X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on mail.default.ilande.uk0.bigv.io) Received-SPF: pass client-ip=2001:41c9:1:41f::167; envelope-from=mark.cave-ayland@ilande.co.uk; helo=mail.default.ilande.uk0.bigv.io X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Cave-Ayland , =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Store the child object directly within the sparc32-espdma object rather than using link properties. Signed-off-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20200926140216.7368-4-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland --- hw/dma/sparc32_dma.c | 17 ++++++++--------- include/hw/sparc/sparc32_dma.h | 2 +- 2 files changed, 9 insertions(+), 10 deletions(-) diff --git a/hw/dma/sparc32_dma.c b/hw/dma/sparc32_dma.c index 84196afb95..2cbe331959 100644 --- a/hw/dma/sparc32_dma.c +++ b/hw/dma/sparc32_dma.c @@ -290,27 +290,26 @@ static const TypeInfo sparc32_dma_device_info = { static void sparc32_espdma_device_init(Object *obj) { DMADeviceState *s = SPARC32_DMA_DEVICE(obj); + ESPDMADeviceState *es = SPARC32_ESPDMA_DEVICE(obj); memory_region_init_io(&s->iomem, OBJECT(s), &dma_mem_ops, s, "espdma-mmio", DMA_SIZE); + + object_initialize_child(obj, "esp", &es->esp, TYPE_ESP); } static void sparc32_espdma_device_realize(DeviceState *dev, Error **errp) { - DeviceState *d; - SysBusESPState *sysbus; - ESPState *esp; - - d = qdev_new(TYPE_ESP); - object_property_add_child(OBJECT(dev), "esp", OBJECT(d)); - sysbus = ESP(d); - esp = &sysbus->esp; + ESPDMADeviceState *es = SPARC32_ESPDMA_DEVICE(dev); + SysBusESPState *sysbus = ESP(&es->esp); + ESPState *esp = &sysbus->esp; + esp->dma_memory_read = espdma_memory_read; esp->dma_memory_write = espdma_memory_write; esp->dma_opaque = SPARC32_DMA_DEVICE(dev); sysbus->it_shift = 2; esp->dma_enabled = 1; - sysbus_realize_and_unref(SYS_BUS_DEVICE(d), &error_fatal); + sysbus_realize(SYS_BUS_DEVICE(sysbus), &error_fatal); } static void sparc32_espdma_device_class_init(ObjectClass *klass, void *data) diff --git a/include/hw/sparc/sparc32_dma.h b/include/hw/sparc/sparc32_dma.h index 80d69cbba2..cde8ec02cb 100644 --- a/include/hw/sparc/sparc32_dma.h +++ b/include/hw/sparc/sparc32_dma.h @@ -28,7 +28,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(ESPDMADeviceState, SPARC32_ESPDMA_DEVICE) struct ESPDMADeviceState { DMADeviceState parent_obj; - SysBusESPState *esp; + SysBusESPState esp; }; #define TYPE_SPARC32_LEDMA_DEVICE "sparc32-ledma" From patchwork Wed Oct 28 08:23:52 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Mark Cave-Ayland X-Patchwork-Id: 1389174 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=ilande.co.uk Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4CLhZ94Sgtz9sVX for ; Wed, 28 Oct 2020 19:29:21 +1100 (AEDT) Received: from localhost ([::1]:54118 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kXgpb-0000TF-J1 for incoming@patchwork.ozlabs.org; Wed, 28 Oct 2020 04:29:19 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:37476) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kXglC-0003CW-IO for qemu-devel@nongnu.org; Wed, 28 Oct 2020 04:24:46 -0400 Received: from mail.ilande.co.uk ([2001:41c9:1:41f::167]:51678 helo=mail.default.ilande.uk0.bigv.io) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kXglA-0004BA-QA for qemu-devel@nongnu.org; Wed, 28 Oct 2020 04:24:46 -0400 Received: from host81-158-111-11.range81-158.btcentralplus.com ([81.158.111.11] helo=kentang.home) by mail.default.ilande.uk0.bigv.io with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1kXglF-0006Q8-18; Wed, 28 Oct 2020 08:24:53 +0000 From: Mark Cave-Ayland To: peter.maydell@linaro.org, qemu-devel@nongnu.org Date: Wed, 28 Oct 2020 08:23:52 +0000 Message-Id: <20201028082358.23761-5-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20201028082358.23761-1-mark.cave-ayland@ilande.co.uk> References: <20201028082358.23761-1-mark.cave-ayland@ilande.co.uk> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 81.158.111.11 X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk Subject: [PULL 04/10] sparc32-ledma: don't reference nd_table directly within the device X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on mail.default.ilande.uk0.bigv.io) Received-SPF: pass client-ip=2001:41c9:1:41f::167; envelope-from=mark.cave-ayland@ilande.co.uk; helo=mail.default.ilande.uk0.bigv.io X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Cave-Ayland , =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Instead use qdev_set_nic_properties() to configure the on-board NIC at the sun4m machine level. Signed-off-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20200926140216.7368-5-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland --- hw/dma/sparc32_dma.c | 5 ----- hw/sparc/sun4m.c | 21 +++++++++++++-------- 2 files changed, 13 insertions(+), 13 deletions(-) diff --git a/hw/dma/sparc32_dma.c b/hw/dma/sparc32_dma.c index 2cbe331959..b643b413c5 100644 --- a/hw/dma/sparc32_dma.c +++ b/hw/dma/sparc32_dma.c @@ -342,12 +342,7 @@ static void sparc32_ledma_device_realize(DeviceState *dev, Error **errp) { LEDMADeviceState *s = SPARC32_LEDMA_DEVICE(dev); SysBusPCNetState *lance = SYSBUS_PCNET(&s->lance); - NICInfo *nd = &nd_table[0]; - /* FIXME use qdev NIC properties instead of nd_table[] */ - qemu_check_nic_model(nd, TYPE_LANCE); - - qdev_set_nic_properties(DEVICE(lance), nd); object_property_set_link(OBJECT(lance), "dma", OBJECT(dev), &error_abort); sysbus_realize(SYS_BUS_DEVICE(lance), &error_fatal); } diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c index 38d1e0fd12..66fecb152a 100644 --- a/hw/sparc/sun4m.c +++ b/hw/sparc/sun4m.c @@ -319,7 +319,7 @@ static void *iommu_init(hwaddr addr, uint32_t version, qemu_irq irq) static void *sparc32_dma_init(hwaddr dma_base, hwaddr esp_base, qemu_irq espdma_irq, - hwaddr le_base, qemu_irq ledma_irq) + hwaddr le_base, qemu_irq ledma_irq, NICInfo *nd) { DeviceState *dma; ESPDMADeviceState *espdma; @@ -328,16 +328,11 @@ static void *sparc32_dma_init(hwaddr dma_base, SysBusPCNetState *lance; dma = qdev_new(TYPE_SPARC32_DMA); - sysbus_realize_and_unref(SYS_BUS_DEVICE(dma), &error_fatal); - sysbus_mmio_map(SYS_BUS_DEVICE(dma), 0, dma_base); - espdma = SPARC32_ESPDMA_DEVICE(object_resolve_path_component( OBJECT(dma), "espdma")); sysbus_connect_irq(SYS_BUS_DEVICE(espdma), 0, espdma_irq); esp = ESP(object_resolve_path_component(OBJECT(espdma), "esp")); - sysbus_mmio_map(SYS_BUS_DEVICE(esp), 0, esp_base); - scsi_bus_legacy_handle_cmdline(&esp->esp.bus); ledma = SPARC32_LEDMA_DEVICE(object_resolve_path_component( OBJECT(dma), "ledma")); @@ -345,6 +340,14 @@ static void *sparc32_dma_init(hwaddr dma_base, lance = SYSBUS_PCNET(object_resolve_path_component( OBJECT(ledma), "lance")); + qdev_set_nic_properties(DEVICE(lance), nd); + + sysbus_realize_and_unref(SYS_BUS_DEVICE(dma), &error_fatal); + sysbus_mmio_map(SYS_BUS_DEVICE(dma), 0, dma_base); + + sysbus_mmio_map(SYS_BUS_DEVICE(esp), 0, esp_base); + scsi_bus_legacy_handle_cmdline(&esp->esp.bus); + sysbus_mmio_map(SYS_BUS_DEVICE(lance), 0, le_base); return dma; @@ -850,6 +853,7 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, unsigned int max_cpus = machine->smp.max_cpus; Object *ram_memdev = object_resolve_path_type(machine->ram_memdev_id, TYPE_MEMORY_BACKEND, NULL); + NICInfo *nd = &nd_table[0]; if (machine->ram_size > hwdef->max_mem) { error_report("Too much memory for this machine: %" PRId64 "," @@ -910,9 +914,10 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, hwdef->iommu_pad_base, hwdef->iommu_pad_len); } + qemu_check_nic_model(nd, TYPE_LANCE); sparc32_dma_init(hwdef->dma_base, hwdef->esp_base, slavio_irq[18], - hwdef->le_base, slavio_irq[16]); + hwdef->le_base, slavio_irq[16], nd); if (graphic_depth != 8 && graphic_depth != 24) { error_report("Unsupported depth: %d", graphic_depth); @@ -1049,7 +1054,7 @@ static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, machine->initrd_filename, machine->ram_size, &initrd_size); - nvram_init(nvram, (uint8_t *)&nd_table[0].macaddr, machine->kernel_cmdline, + nvram_init(nvram, (uint8_t *)&nd->macaddr, machine->kernel_cmdline, machine->boot_order, machine->ram_size, kernel_size, graphic_width, graphic_height, graphic_depth, hwdef->nvram_machine_id, "Sun4m"); From patchwork Wed Oct 28 08:23:53 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Mark Cave-Ayland X-Patchwork-Id: 1389171 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=ilande.co.uk Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4CLhXC4Kblz9sV7 for ; Wed, 28 Oct 2020 19:27:39 +1100 (AEDT) Received: from localhost ([::1]:46860 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kXgnx-0005uW-It for incoming@patchwork.ozlabs.org; Wed, 28 Oct 2020 04:27:37 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:37488) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kXglI-0003QY-PH for qemu-devel@nongnu.org; Wed, 28 Oct 2020 04:24:52 -0400 Received: from mail.ilande.co.uk ([2001:41c9:1:41f::167]:51686 helo=mail.default.ilande.uk0.bigv.io) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kXglH-0004D9-4v for qemu-devel@nongnu.org; Wed, 28 Oct 2020 04:24:52 -0400 Received: from host81-158-111-11.range81-158.btcentralplus.com ([81.158.111.11] helo=kentang.home) by mail.default.ilande.uk0.bigv.io with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1kXglJ-0006Q8-Ud; Wed, 28 Oct 2020 08:24:59 +0000 From: Mark Cave-Ayland To: peter.maydell@linaro.org, qemu-devel@nongnu.org Date: Wed, 28 Oct 2020 08:23:53 +0000 Message-Id: <20201028082358.23761-6-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20201028082358.23761-1-mark.cave-ayland@ilande.co.uk> References: <20201028082358.23761-1-mark.cave-ayland@ilande.co.uk> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 81.158.111.11 X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk Subject: [PULL 05/10] sabre: don't call sysbus_mmio_map() in sabre_realize() X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on mail.default.ilande.uk0.bigv.io) Received-SPF: pass client-ip=2001:41c9:1:41f::167; envelope-from=mark.cave-ayland@ilande.co.uk; helo=mail.default.ilande.uk0.bigv.io X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Cave-Ayland , =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" The device should not map itself but instead should be mapped to sysbus by the sun4u machine. Signed-off-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20200926140216.7368-7-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland --- hw/pci-host/sabre.c | 8 -------- hw/sparc64/sun4u.c | 7 +++++++ 2 files changed, 7 insertions(+), 8 deletions(-) diff --git a/hw/pci-host/sabre.c b/hw/pci-host/sabre.c index 5ac6283623..5394ad5cd0 100644 --- a/hw/pci-host/sabre.c +++ b/hw/pci-host/sabre.c @@ -378,16 +378,8 @@ static void sabre_realize(DeviceState *dev, Error **errp) { SabreState *s = SABRE(dev); PCIHostState *phb = PCI_HOST_BRIDGE(dev); - SysBusDevice *sbd = SYS_BUS_DEVICE(s); PCIDevice *pci_dev; - /* sabre_config */ - sysbus_mmio_map(sbd, 0, s->special_base); - /* PCI configuration space */ - sysbus_mmio_map(sbd, 1, s->special_base + 0x1000000ULL); - /* pci_ioport */ - sysbus_mmio_map(sbd, 2, s->special_base + 0x2000000ULL); - memory_region_init(&s->pci_mmio, OBJECT(s), "pci-mmio", 0x100000000ULL); memory_region_add_subregion(get_system_memory(), s->mem_base, &s->pci_mmio); diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c index 05e659c8a4..2f8fc670cf 100644 --- a/hw/sparc64/sun4u.c +++ b/hw/sparc64/sun4u.c @@ -588,6 +588,13 @@ static void sun4uv_init(MemoryRegion *address_space_mem, &error_abort); sysbus_realize_and_unref(SYS_BUS_DEVICE(sabre), &error_fatal); + /* sabre_config */ + sysbus_mmio_map(SYS_BUS_DEVICE(sabre), 0, PBM_SPECIAL_BASE); + /* PCI configuration space */ + sysbus_mmio_map(SYS_BUS_DEVICE(sabre), 1, PBM_SPECIAL_BASE + 0x1000000ULL); + /* pci_ioport */ + sysbus_mmio_map(SYS_BUS_DEVICE(sabre), 2, PBM_SPECIAL_BASE + 0x2000000ULL); + /* Wire up PCI interrupts to CPU */ for (i = 0; i < IVEC_MAX; i++) { qdev_connect_gpio_out_named(DEVICE(sabre), "ivec-irq", i, From patchwork Wed Oct 28 08:23:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Mark Cave-Ayland X-Patchwork-Id: 1389176 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=ilande.co.uk Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4CLhcC4S3Hz9sVh for ; Wed, 28 Oct 2020 19:31:07 +1100 (AEDT) Received: from localhost ([::1]:59002 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kXgrI-0002Su-MX for incoming@patchwork.ozlabs.org; Wed, 28 Oct 2020 04:31:04 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:37512) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kXglO-0003dX-9F; Wed, 28 Oct 2020 04:24:58 -0400 Received: from mail.ilande.co.uk ([2001:41c9:1:41f::167]:51696 helo=mail.default.ilande.uk0.bigv.io) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kXglM-0004El-7T; Wed, 28 Oct 2020 04:24:57 -0400 Received: from host81-158-111-11.range81-158.btcentralplus.com ([81.158.111.11] helo=kentang.home) by mail.default.ilande.uk0.bigv.io with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1kXglP-0006Q8-BL; Wed, 28 Oct 2020 08:25:04 +0000 From: Mark Cave-Ayland To: peter.maydell@linaro.org, qemu-devel@nongnu.org Date: Wed, 28 Oct 2020 08:23:54 +0000 Message-Id: <20201028082358.23761-7-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20201028082358.23761-1-mark.cave-ayland@ilande.co.uk> References: <20201028082358.23761-1-mark.cave-ayland@ilande.co.uk> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 81.158.111.11 X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk Subject: [PULL 06/10] hw/display/tcx: Allow 64-bit accesses to framebuffer stippler and blitter X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on mail.default.ilande.uk0.bigv.io) Received-SPF: pass client-ip=2001:41c9:1:41f::167; envelope-from=mark.cave-ayland@ilande.co.uk; helo=mail.default.ilande.uk0.bigv.io X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andreas Gustafsson , Mark Cave-Ayland , "Michael S . Tsirkin" , Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= , qemu-stable@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= <1892540@bugs.launchpad.net> Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé <1892540@bugs.launchpad.net> The S24/TCX datasheet is listed as "Unable to locate" on [1]. However the NetBSD revision 1.32 of the driver introduced 64-bit accesses to the stippler and blitter [2]. It is safe to assume these memory regions are 64-bit accessible. QEMU implementation is 32-bit, so fill the 'impl' fields. Michael Lorenz (author of the NetBSD code [2]) provided us with more information in [3]: > IIRC the real hardware *requires* 64bit accesses for stipple and > blitter operations to work. For stipples you write a 64bit word into > STIP space, the address defines where in the framebuffer you want to > draw, the data contain a 32bit bitmask, foreground colour and a ROP. > BLIT space works similarly, the 64bit word contains an offset were to > read pixels from, and how many you want to copy. > > One more thing since there seems to be some confusion - 64bit accesses > on the framebuffer are fine as well. TCX/S24 is *not* an SBus device, > even though its node says it is. > S24 is a card that plugs into a special slot on the SS5 mainboard, > which is shared with an SBus slot and looks a lot like a horizontal > UPA slot. Both S24 and TCX are accessed through the Micro/TurboSPARC's > AFX bus which is 64bit wide and intended for graphics. > Early FFB docs even mentioned connecting to both AFX and UPA, > no idea if that was ever realized in hardware though. [1] http://web.archive.org/web/20111209011516/http://wikis.sun.com/display/FOSSdocs/Home [2] http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/dev/sbus/tcx.c.diff?r1=1.31&r2=1.32 [3] https://www.mail-archive.com/qemu-devel@nongnu.org/msg734928.html Cc: qemu-stable@nongnu.org Reported-by: Andreas Gustafsson Buglink: https://bugs.launchpad.net/bugs/1892540 Fixes: 55d7bfe2293 ("tcx: Implement hardware acceleration") Tested-by: Michael S. Tsirkin Reviewed-by: Richard Henderson Tested-by: Andreas Gustafsson Signed-off-by: Philippe Mathieu-Daudé Message-Id: <20201024205100.3623006-1-f4bug@amsat.org> Signed-off-by: Mark Cave-Ayland --- hw/display/tcx.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/hw/display/tcx.c b/hw/display/tcx.c index c9d5e45cd1..878ecc8c50 100644 --- a/hw/display/tcx.c +++ b/hw/display/tcx.c @@ -549,20 +549,28 @@ static const MemoryRegionOps tcx_stip_ops = { .read = tcx_stip_readl, .write = tcx_stip_writel, .endianness = DEVICE_NATIVE_ENDIAN, - .valid = { + .impl = { .min_access_size = 4, .max_access_size = 4, }, + .valid = { + .min_access_size = 4, + .max_access_size = 8, + }, }; static const MemoryRegionOps tcx_rstip_ops = { .read = tcx_stip_readl, .write = tcx_rstip_writel, .endianness = DEVICE_NATIVE_ENDIAN, - .valid = { + .impl = { .min_access_size = 4, .max_access_size = 4, }, + .valid = { + .min_access_size = 4, + .max_access_size = 8, + }, }; static uint64_t tcx_blit_readl(void *opaque, hwaddr addr, @@ -651,10 +659,14 @@ static const MemoryRegionOps tcx_rblit_ops = { .read = tcx_blit_readl, .write = tcx_rblit_writel, .endianness = DEVICE_NATIVE_ENDIAN, - .valid = { + .impl = { .min_access_size = 4, .max_access_size = 4, }, + .valid = { + .min_access_size = 4, + .max_access_size = 8, + }, }; static void tcx_invalidate_cursor_position(TCXState *s) From patchwork Wed Oct 28 08:23:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Mark Cave-Ayland X-Patchwork-Id: 1389175 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=ilande.co.uk Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4CLhZS1QDwz9sVh for ; Wed, 28 Oct 2020 19:29:36 +1100 (AEDT) Received: from localhost ([::1]:54746 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kXgpq-0000jA-3n for incoming@patchwork.ozlabs.org; Wed, 28 Oct 2020 04:29:34 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:37528) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kXglS-0003nf-Pd; Wed, 28 Oct 2020 04:25:02 -0400 Received: from mail.ilande.co.uk ([2001:41c9:1:41f::167]:51710 helo=mail.default.ilande.uk0.bigv.io) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kXglQ-0004GF-UR; Wed, 28 Oct 2020 04:25:02 -0400 Received: from host81-158-111-11.range81-158.btcentralplus.com ([81.158.111.11] helo=kentang.home) by mail.default.ilande.uk0.bigv.io with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1kXglU-0006Q8-ES; Wed, 28 Oct 2020 08:25:09 +0000 From: Mark Cave-Ayland To: peter.maydell@linaro.org, qemu-devel@nongnu.org Date: Wed, 28 Oct 2020 08:23:55 +0000 Message-Id: <20201028082358.23761-8-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20201028082358.23761-1-mark.cave-ayland@ilande.co.uk> References: <20201028082358.23761-1-mark.cave-ayland@ilande.co.uk> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 81.158.111.11 X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk Subject: [PULL 07/10] sabre: increase number of PCI bus IRQs from 32 to 64 X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on mail.default.ilande.uk0.bigv.io) Received-SPF: pass client-ip=2001:41c9:1:41f::167; envelope-from=mark.cave-ayland@ilande.co.uk; helo=mail.default.ilande.uk0.bigv.io X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Mark Cave-Ayland , qemu-stable@nongnu.org, Harold Gutch Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" The rework of the sabre IRQs in commit 6864fa3897 "sun4u: update PCI topology to include simba PCI bridges" changed the IRQ routing so that both PCI and legacy OBIO IRQs are routed through the sabre PCI host bridge to the CPU. Unfortunately this commit failed to increase the number of PCI bus IRQs accordingly meaning that access to the legacy IRQs OBIO (irqnum >= 0x20) would overflow the PCI bus IRQ array causing strange failures running qemu-system-sparc64 in NetBSD. Cc: qemu-stable@nongnu.org Reported-by: Harold Gutch Fixes: https://bugs.launchpad.net/qemu/+bug/1838658 Fixes: 6864fa3897 ("sun4u: update PCI topology to include simba PCI bridges") Signed-off-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20201011081347.2146-1-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland --- hw/pci-host/sabre.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/pci-host/sabre.c b/hw/pci-host/sabre.c index 5394ad5cd0..edf48ea923 100644 --- a/hw/pci-host/sabre.c +++ b/hw/pci-host/sabre.c @@ -388,7 +388,7 @@ static void sabre_realize(DeviceState *dev, Error **errp) pci_sabre_set_irq, pci_sabre_map_irq, s, &s->pci_mmio, &s->pci_ioport, - 0, 32, TYPE_PCI_BUS); + 0, 0x40, TYPE_PCI_BUS); pci_create_simple(phb->bus, 0, TYPE_SABRE_PCI_DEVICE); From patchwork Wed Oct 28 08:23:56 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Mark Cave-Ayland X-Patchwork-Id: 1389177 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=ilande.co.uk Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4CLhfq1q6Nz9sVX for ; Wed, 28 Oct 2020 19:33:23 +1100 (AEDT) Received: from localhost ([::1]:33484 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kXgtV-0003ll-8g for incoming@patchwork.ozlabs.org; Wed, 28 Oct 2020 04:33:21 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:37560) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kXglX-0003wx-3S for qemu-devel@nongnu.org; Wed, 28 Oct 2020 04:25:07 -0400 Received: from mail.ilande.co.uk ([2001:41c9:1:41f::167]:51718 helo=mail.default.ilande.uk0.bigv.io) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kXglV-0004Hf-9O for qemu-devel@nongnu.org; Wed, 28 Oct 2020 04:25:06 -0400 Received: from host81-158-111-11.range81-158.btcentralplus.com ([81.158.111.11] helo=kentang.home) by mail.default.ilande.uk0.bigv.io with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1kXglZ-0006Q8-Eb; Wed, 28 Oct 2020 08:25:14 +0000 From: Mark Cave-Ayland To: peter.maydell@linaro.org, qemu-devel@nongnu.org Date: Wed, 28 Oct 2020 08:23:56 +0000 Message-Id: <20201028082358.23761-9-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20201028082358.23761-1-mark.cave-ayland@ilande.co.uk> References: <20201028082358.23761-1-mark.cave-ayland@ilande.co.uk> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 81.158.111.11 X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk Subject: [PULL 08/10] hw/pci-host/sabre: Update documentation link X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on mail.default.ilande.uk0.bigv.io) Received-SPF: pass client-ip=2001:41c9:1:41f::167; envelope-from=mark.cave-ayland@ilande.co.uk; helo=mail.default.ilande.uk0.bigv.io X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Cave-Ayland , =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé The current link redirects to https://www.oracle.com/sun/ announcing "Oracle acquired Sun Microsystems in 2010, ..." but does not give hint where to find the datasheet. Use the archived PDF on the Wayback Machine, which works. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Mark Cave-Ayland Message-Id: <20201012170950.3491912-2-f4bug@amsat.org> Signed-off-by: Mark Cave-Ayland --- hw/pci-host/sabre.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/pci-host/sabre.c b/hw/pci-host/sabre.c index edf48ea923..0ee247e28f 100644 --- a/hw/pci-host/sabre.c +++ b/hw/pci-host/sabre.c @@ -44,7 +44,7 @@ /* * Chipset docs: * PBM: "UltraSPARC IIi User's Manual", - * http://www.sun.com/processors/manuals/805-0087.pdf + * https://web.archive.org/web/20030403110020/http://www.sun.com/processors/manuals/805-0087.pdf */ #define PBM_PCI_IMR_MASK 0x7fffffff From patchwork Wed Oct 28 08:23:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Mark Cave-Ayland X-Patchwork-Id: 1389170 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=ilande.co.uk Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4CLhVn4cX7z9sV7 for ; Wed, 28 Oct 2020 19:26:22 +1100 (AEDT) Received: from localhost ([::1]:42890 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kXgmg-0004BF-UM for incoming@patchwork.ozlabs.org; Wed, 28 Oct 2020 04:26:18 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:37572) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kXglc-00047M-4v for qemu-devel@nongnu.org; Wed, 28 Oct 2020 04:25:12 -0400 Received: from mail.ilande.co.uk ([2001:41c9:1:41f::167]:51726 helo=mail.default.ilande.uk0.bigv.io) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kXgla-0004JI-H7 for qemu-devel@nongnu.org; Wed, 28 Oct 2020 04:25:11 -0400 Received: from host81-158-111-11.range81-158.btcentralplus.com ([81.158.111.11] helo=kentang.home) by mail.default.ilande.uk0.bigv.io with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1kXgle-0006Q8-BZ; Wed, 28 Oct 2020 08:25:19 +0000 From: Mark Cave-Ayland To: peter.maydell@linaro.org, qemu-devel@nongnu.org Date: Wed, 28 Oct 2020 08:23:57 +0000 Message-Id: <20201028082358.23761-10-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20201028082358.23761-1-mark.cave-ayland@ilande.co.uk> References: <20201028082358.23761-1-mark.cave-ayland@ilande.co.uk> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 81.158.111.11 X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk Subject: [PULL 09/10] hw/pci-host/sabre: Remove superfluous address range check X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on mail.default.ilande.uk0.bigv.io) Received-SPF: pass client-ip=2001:41c9:1:41f::167; envelope-from=mark.cave-ayland@ilande.co.uk; helo=mail.default.ilande.uk0.bigv.io X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Cave-Ayland , =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé The region is registered as 64KiB in sabre_init(): memory_region_init_io(&s->sabre_config, OBJECT(s), &sabre_config_ops, s, "sabre-config", 0x10000); Remove the superfluous check. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Mark Cave-Ayland Message-Id: <20201012170950.3491912-3-f4bug@amsat.org> Signed-off-by: Mark Cave-Ayland --- hw/pci-host/sabre.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/pci-host/sabre.c b/hw/pci-host/sabre.c index 0ee247e28f..f678a3eefc 100644 --- a/hw/pci-host/sabre.c +++ b/hw/pci-host/sabre.c @@ -120,7 +120,7 @@ static void sabre_config_write(void *opaque, hwaddr addr, trace_sabre_config_write(addr, val); - switch (addr & 0xffff) { + switch (addr) { case 0x30 ... 0x4f: /* DMA error registers */ /* XXX: not implemented yet */ break; @@ -197,7 +197,7 @@ static uint64_t sabre_config_read(void *opaque, SabreState *s = opaque; uint32_t val; - switch (addr & 0xffff) { + switch (addr) { case 0x30 ... 0x4f: /* DMA error registers */ val = 0; /* XXX: not implemented yet */ From patchwork Wed Oct 28 08:23:58 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Mark Cave-Ayland X-Patchwork-Id: 1389178 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=ilande.co.uk Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4CLhh80ZYdz9sVX for ; Wed, 28 Oct 2020 19:34:32 +1100 (AEDT) Received: from localhost ([::1]:35624 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kXguc-0004fH-3u for incoming@patchwork.ozlabs.org; Wed, 28 Oct 2020 04:34:30 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:37642) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kXglk-0004Ms-Ih for qemu-devel@nongnu.org; Wed, 28 Oct 2020 04:25:20 -0400 Received: from mail.ilande.co.uk ([2001:41c9:1:41f::167]:51736 helo=mail.default.ilande.uk0.bigv.io) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kXglg-0004M2-Nk for qemu-devel@nongnu.org; Wed, 28 Oct 2020 04:25:20 -0400 Received: from host81-158-111-11.range81-158.btcentralplus.com ([81.158.111.11] helo=kentang.home) by mail.default.ilande.uk0.bigv.io with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1kXglj-0006Q8-J3; Wed, 28 Oct 2020 08:25:25 +0000 From: Mark Cave-Ayland To: peter.maydell@linaro.org, qemu-devel@nongnu.org Date: Wed, 28 Oct 2020 08:23:58 +0000 Message-Id: <20201028082358.23761-11-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20201028082358.23761-1-mark.cave-ayland@ilande.co.uk> References: <20201028082358.23761-1-mark.cave-ayland@ilande.co.uk> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 81.158.111.11 X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk Subject: [PULL 10/10] hw/pci-host/sabre: Simplify code initializing variable once X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on mail.default.ilande.uk0.bigv.io) Received-SPF: pass client-ip=2001:41c9:1:41f::167; envelope-from=mark.cave-ayland@ilande.co.uk; helo=mail.default.ilande.uk0.bigv.io X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Cave-Ayland , =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé We only need to zero-initialize 'val' once. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Mark Cave-Ayland Message-Id: <20201012170950.3491912-4-f4bug@amsat.org> Signed-off-by: Mark Cave-Ayland --- hw/pci-host/sabre.c | 12 +----------- 1 file changed, 1 insertion(+), 11 deletions(-) diff --git a/hw/pci-host/sabre.c b/hw/pci-host/sabre.c index f678a3eefc..f41a0cc301 100644 --- a/hw/pci-host/sabre.c +++ b/hw/pci-host/sabre.c @@ -195,32 +195,25 @@ static uint64_t sabre_config_read(void *opaque, hwaddr addr, unsigned size) { SabreState *s = opaque; - uint32_t val; + uint32_t val = 0; switch (addr) { case 0x30 ... 0x4f: /* DMA error registers */ - val = 0; /* XXX: not implemented yet */ break; case 0xc00 ... 0xc3f: /* PCI interrupt control */ if (addr & 4) { val = s->pci_irq_map[(addr & 0x3f) >> 3]; - } else { - val = 0; } break; case 0x1000 ... 0x107f: /* OBIO interrupt control */ if (addr & 4) { val = s->obio_irq_map[(addr & 0xff) >> 3]; - } else { - val = 0; } break; case 0x1080 ... 0x108f: /* PCI bus error */ if (addr & 4) { val = s->pci_err_irq_map[(addr & 0xf) >> 3]; - } else { - val = 0; } break; case 0x2000 ... 0x202f: /* PCI control */ @@ -229,8 +222,6 @@ static uint64_t sabre_config_read(void *opaque, case 0xf020 ... 0xf027: /* Reset control */ if (addr & 4) { val = s->reset_control; - } else { - val = 0; } break; case 0x5000 ... 0x51cf: /* PIO/DMA diagnostics */ @@ -239,7 +230,6 @@ static uint64_t sabre_config_read(void *opaque, case 0xf000 ... 0xf01f: /* FFB config, memory control */ /* we don't care */ default: - val = 0; break; } trace_sabre_config_read(addr, val);