From patchwork Mon Oct 26 03:03:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andes X-Patchwork-Id: 1387444 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=andestech.com Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4CKKWq18xQz9sRK for ; Mon, 26 Oct 2020 14:07:34 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id E8D7682465; Mon, 26 Oct 2020 04:07:30 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=andestech.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 4000B8246A; Mon, 26 Oct 2020 04:07:29 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from ATCSQR.andestech.com (atcsqr.andestech.com [60.248.187.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 4E75B8245F for ; Mon, 26 Oct 2020 04:07:24 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=andestech.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=uboot@andestech.com Received: from mail.andestech.com (atcpcs12.andestech.com [10.0.1.220]) by ATCSQR.andestech.com with ESMTP id 09Q2pSvR077260; Mon, 26 Oct 2020 10:51:28 +0800 (GMT-8) (envelope-from uboot@andestech.com) Received: from [127.0.1.1] (10.0.15.117) by ATCPCS12.andestech.com (10.0.1.220) with Microsoft SMTP Server id 14.3.123.3; Mon, 26 Oct 2020 11:07:05 +0800 MIME-Version: 1.0 Subject: Pull request: u-boot-riscv/master 20201026 From: To: , , , Date: Mon, 26 Oct 2020 11:03:00 +0800 Message-ID: X-Originating-IP: [10.0.15.117] X-DNSRBL: X-MAIL: ATCSQR.andestech.com 09Q2pSvR077260 X-Content-Filtered-By: Mailman/MimeDel 2.1.34 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean Hi Tom, Please pull some riscv updates: - No need to check before free in kendryte clk. - Only enable OF_BOARD_FIXUP if U-Boot is configured for S-Mode. - Reduce k210 dts DMA block size - Move timers into drivers/timer - Correct fu540 dts reg size of clint node Thanks Rick https://travis-ci.org/github/rickchen36/u-boot-riscv/builds/738180853 The following changes since commit c99e87f82803500f9811b1e98926d9d25df35b38: Merge branch '2020-10-23-misc-changes' (2020-10-24 10:49:28 -0400) are available in the Git repository at: git@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git for you to fetch changes up to 7257455e7cd8038263a738401cbfe0ee8a2c7ac9: riscv: fu540: dts: Correct reg size of clint node (2020-10-26 10:01:37 +0800) ---------------------------------------------------------------- Heinrich Schuchardt (1): clk: kendryte: no need to check argument of free() Pragnesh Patel (1): riscv: fu540: dts: Correct reg size of clint node Sean Anderson (5): riscv: Only enable OF_BOARD_FIXUP for S-Mode riscv: k210: Reduce DMA block size riscv: Move Andes PLMT driver to drivers/timer timer: Add _TIMER suffix to Andes PLMT Kconfig riscv: Move timer portions of SiFive CLINT to drivers/timer MAINTAINERS | 2 ++ arch/riscv/Kconfig | 9 +-------- arch/riscv/cpu/ax25/Kconfig | 2 +- arch/riscv/dts/fu540-c000-u-boot.dtsi | 2 +- arch/riscv/dts/k210.dtsi | 4 ++-- arch/riscv/lib/Makefile | 1 - arch/riscv/lib/sifive_clint.c | 41 ++--------------------------------------- drivers/clk/kendryte/clk.c | 3 +-- drivers/timer/Kconfig | 7 +++++++ drivers/timer/Makefile | 2 ++ arch/riscv/lib/andes_plmt.c => drivers/timer/andes_plmt_timer.c | 0 drivers/timer/sifive_clint_timer.c | 47 +++++++++++++++++++++++++++++++++++++++++++++++ 12 files changed, 66 insertions(+), 54 deletions(-) rename arch/riscv/lib/andes_plmt.c => drivers/timer/andes_plmt_timer.c (100%) create mode 100644 drivers/timer/sifive_clint_timer.c