From patchwork Wed Oct 7 12:45:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Zyngier X-Patchwork-Id: 1377990 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=default header.b=ImCaVPJt; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4C5vFz72Qbz9sTD for ; Wed, 7 Oct 2020 23:45:59 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728309AbgJGMp6 (ORCPT ); Wed, 7 Oct 2020 08:45:58 -0400 Received: from mail.kernel.org ([198.145.29.99]:58222 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728260AbgJGMp6 (ORCPT ); Wed, 7 Oct 2020 08:45:58 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 5557D207EA; Wed, 7 Oct 2020 12:45:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1602074757; bh=UB31QiXnrOw6XsxPw+aI7bh7lJEn3Dr2D4cHBouTdPk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ImCaVPJtBWyF++jwDRx7PAoLoe7TeLSePbQ93TplhJtVJrHxFJNXAxJBvZLcWIVjK MgJmTkCysb4AZame3tAgbOyZ7aWenRf39Ckg+1SaYuVAHNxJIKB0Nkai1UGXtoX+uF ktnQh3nt7J8vtJ3elTo9iemvCUbhd9IYwiLhzuiU= Received: from 78.163-31-62.static.virginmediabusiness.co.uk ([62.31.163.78] helo=why.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1kQ8pP-000M8V-L0; Wed, 07 Oct 2020 13:45:55 +0100 From: Marc Zyngier To: linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Thierry Reding , Jonathan Hunter , Dmitry Osipenko , Sowjanya Komatineni , Venkat Reddy Talla , Thomas Gleixner , kernel-team@android.com Subject: [PATCH v3 1/4] genirq/irqdomain: Allow partial trimming of irq_data hierarchy Date: Wed, 7 Oct 2020 13:45:41 +0100 Message-Id: <20201007124544.1397322-2-maz@kernel.org> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20201007124544.1397322-1-maz@kernel.org> References: <20201007124544.1397322-1-maz@kernel.org> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 62.31.163.78 X-SA-Exim-Rcpt-To: linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, thierry.reding@gmail.com, jonathanh@nvidia.com, digetx@gmail.com, skomatineni@nvidia.com, vreddytalla@nvidia.com, tglx@linutronix.de, kernel-team@android.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org It appears that some HW is ugly enough that not all the interrupts connected to a particular interrupt controller end up with the same hierarchy depth (some of them are terminated early). This leaves the irqchip hacker with only two choices, both equally bad: - create discrete domain chains, one for each "hierarchy depth", which is very hard to maintain - create fake hierarchy levels for the shallow paths, leading to all kind of problems (what are the safe hwirq values for these fake levels?) Implement the ability to cut short a single interrupt hierarchy from the first level that doesn't have a corresponding irqchip. As this is never a valid option (we have the no_irq_chip chip for the "do nothing" case), the hierarchy can be trimmed from that level. Signed-off-by: Marc Zyngier --- kernel/irq/irqdomain.c | 58 +++++++++++++++++++++++++++++++++++++----- 1 file changed, 52 insertions(+), 6 deletions(-) diff --git a/kernel/irq/irqdomain.c b/kernel/irq/irqdomain.c index 76cd7ebd1178..375eb2b79fe5 100644 --- a/kernel/irq/irqdomain.c +++ b/kernel/irq/irqdomain.c @@ -1136,6 +1136,17 @@ static struct irq_data *irq_domain_insert_irq_data(struct irq_domain *domain, return irq_data; } +static void __irq_domain_free_hierarchy(struct irq_data *irq_data) +{ + struct irq_data *tmp; + + while (irq_data) { + tmp = irq_data; + irq_data = irq_data->parent_data; + kfree(tmp); + } +} + static void irq_domain_free_irq_data(unsigned int virq, unsigned int nr_irqs) { struct irq_data *irq_data, *tmp; @@ -1147,14 +1158,47 @@ static void irq_domain_free_irq_data(unsigned int virq, unsigned int nr_irqs) irq_data->parent_data = NULL; irq_data->domain = NULL; - while (tmp) { - irq_data = tmp; - tmp = tmp->parent_data; - kfree(irq_data); - } + __irq_domain_free_hierarchy(tmp); } } +/** + * irq_domain_trim_hierarchy - Trim the uninitialized part of a irq hierarchy + * @virq: IRQ number to trim where the hierarchy is to be trimmed + * + * Drop the partial irq_data hierarchy from the level where the + * irq_data->chip is NULL. + * + * Its only use is to be able to trim levels of hierarchy that do not + * have any real meaning for this interrupt, and that the driver leaves + * uninitialized in its .alloc() callback. + */ +static void irq_domain_trim_hierarchy(unsigned int virq) +{ + struct irq_data *tail, *irq_data = irq_get_irq_data(virq); + + /* It really needs to be a hierarchy, and not a single entry */ + if (!irq_data->parent_data) + return; + + /* Skip until we find a parent irq_data without a populated chip */ + while (irq_data->parent_data && irq_data->parent_data->chip) + irq_data = irq_data->parent_data; + + /* All levels populated */ + if (!irq_data->parent_data) + return; + + pr_info("IRQ%d: trimming hierarchy from %s\n", + virq, irq_data->parent_data->domain->name); + + /* Sever the inner part of the hierarchy... */ + tail = irq_data->parent_data; + irq_data->parent_data = NULL; + __irq_domain_free_hierarchy(tail); +} + + static int irq_domain_alloc_irq_data(struct irq_domain *domain, unsigned int virq, unsigned int nr_irqs) { @@ -1362,8 +1406,10 @@ int __irq_domain_alloc_irqs(struct irq_domain *domain, int irq_base, mutex_unlock(&irq_domain_mutex); goto out_free_irq_data; } - for (i = 0; i < nr_irqs; i++) + for (i = 0; i < nr_irqs; i++) { + irq_domain_trim_hierarchy(virq + i); irq_domain_insert_irq(virq + i); + } mutex_unlock(&irq_domain_mutex); return virq; From patchwork Wed Oct 7 12:45:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Zyngier X-Patchwork-Id: 1377991 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=default header.b=qk0sfLad; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4C5vG81hZFz9sTq for ; Wed, 7 Oct 2020 23:46:08 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728335AbgJGMqD (ORCPT ); Wed, 7 Oct 2020 08:46:03 -0400 Received: from mail.kernel.org ([198.145.29.99]:58250 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728300AbgJGMp7 (ORCPT ); Wed, 7 Oct 2020 08:45:59 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id E0AAA2083B; Wed, 7 Oct 2020 12:45:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1602074758; bh=y6sw+9UqcCw1K4zL+X8JeaJ21hZxWlVi1L/6R4CeGng=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=qk0sfLadZsDOA91v7ZiGWg7lty/5ofBeS24/YKI5BP7/sxN1omSv7kHWV4DXn9ZB1 Cntrv/u2K89rtSAHfTPzoaPRG3sjTbsfwwR5DtU6jY2PCe7P/lwCrXtBF6PXDcMB7i HYtBcOFly+rohvBNBhWLlwISMlynj6D2QqNLlnOE= Received: from 78.163-31-62.static.virginmediabusiness.co.uk ([62.31.163.78] helo=why.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1kQ8pQ-000M8V-8A; Wed, 07 Oct 2020 13:45:56 +0100 From: Marc Zyngier To: linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Thierry Reding , Jonathan Hunter , Dmitry Osipenko , Sowjanya Komatineni , Venkat Reddy Talla , Thomas Gleixner , kernel-team@android.com Subject: [PATCH v3 2/4] gpio: tegra186: Allow optional irq parent callbacks Date: Wed, 7 Oct 2020 13:45:42 +0100 Message-Id: <20201007124544.1397322-3-maz@kernel.org> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20201007124544.1397322-1-maz@kernel.org> References: <20201007124544.1397322-1-maz@kernel.org> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 62.31.163.78 X-SA-Exim-Rcpt-To: linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, thierry.reding@gmail.com, jonathanh@nvidia.com, digetx@gmail.com, skomatineni@nvidia.com, vreddytalla@nvidia.com, tglx@linutronix.de, kernel-team@android.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Make the tegra186 GPIO driver resistent to variable depth interrupt hierarchy, which we are about to introduce. No functionnal change yet. Signed-off-by: Marc Zyngier --- drivers/gpio/gpio-tegra186.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers/gpio/gpio-tegra186.c b/drivers/gpio/gpio-tegra186.c index 178e9128ded0..9500074b1f1b 100644 --- a/drivers/gpio/gpio-tegra186.c +++ b/drivers/gpio/gpio-tegra186.c @@ -430,7 +430,18 @@ static int tegra186_irq_set_type(struct irq_data *data, unsigned int type) else irq_set_handler_locked(data, handle_edge_irq); - return irq_chip_set_type_parent(data, type); + if (data->parent_data) + return irq_chip_set_type_parent(data, type); + + return 0; +} + +static int tegra186_irq_set_wake(struct irq_data *data, unsigned int on) +{ + if (data->parent_data) + return irq_chip_set_wake_parent(data, on); + + return 0; } static void tegra186_gpio_irq(struct irq_desc *desc) @@ -678,7 +689,7 @@ static int tegra186_gpio_probe(struct platform_device *pdev) gpio->intc.irq_mask = tegra186_irq_mask; gpio->intc.irq_unmask = tegra186_irq_unmask; gpio->intc.irq_set_type = tegra186_irq_set_type; - gpio->intc.irq_set_wake = irq_chip_set_wake_parent; + gpio->intc.irq_set_wake = tegra186_irq_set_wake; irq = &gpio->gpio.irq; irq->chip = &gpio->intc; From patchwork Wed Oct 7 12:45:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Zyngier X-Patchwork-Id: 1377993 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=default header.b=t3fGeAIb; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4C5vGH497Zz9sTR for ; Wed, 7 Oct 2020 23:46:15 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728350AbgJGMqI (ORCPT ); Wed, 7 Oct 2020 08:46:08 -0400 Received: from mail.kernel.org ([198.145.29.99]:58294 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728320AbgJGMp7 (ORCPT ); Wed, 7 Oct 2020 08:45:59 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 7D1112080A; Wed, 7 Oct 2020 12:45:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1602074758; bh=TNw0xhLAmuLxi/z2k28H4w4A4c5/Nmqw8znZJEz8AkA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=t3fGeAIb3VbFeJuvTeZAe7GaAWh24Ii9Fm6DJiHD38zIwko2TyuELqmX941euuVgx f6/MhB26wzGxeSZ5T+qHiy4fARHLh6c8R7YhlzZuR/4kr+IGU36NllGC5dn/Q517Kg zHsemVg+AzYofk0dL8LxfWHVsWB4HaE8tKSuxr/8= Received: from 78.163-31-62.static.virginmediabusiness.co.uk ([62.31.163.78] helo=why.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1kQ8pQ-000M8V-Rv; Wed, 07 Oct 2020 13:45:56 +0100 From: Marc Zyngier To: linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Thierry Reding , Jonathan Hunter , Dmitry Osipenko , Sowjanya Komatineni , Venkat Reddy Talla , Thomas Gleixner , kernel-team@android.com Subject: [PATCH v3 3/4] soc/tegra: pmc: Allow optional irq parent callbacks Date: Wed, 7 Oct 2020 13:45:43 +0100 Message-Id: <20201007124544.1397322-4-maz@kernel.org> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20201007124544.1397322-1-maz@kernel.org> References: <20201007124544.1397322-1-maz@kernel.org> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 62.31.163.78 X-SA-Exim-Rcpt-To: linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, thierry.reding@gmail.com, jonathanh@nvidia.com, digetx@gmail.com, skomatineni@nvidia.com, vreddytalla@nvidia.com, tglx@linutronix.de, kernel-team@android.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Make the PMC driver resistent to variable depth interrupt hierarchy, which we are about to introduce. Signed-off-by: Marc Zyngier --- drivers/soc/tegra/pmc.c | 36 ++++++++++++++++++++++++++++++++---- 1 file changed, 32 insertions(+), 4 deletions(-) diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c index d332e5d9abac..b39536c68f45 100644 --- a/drivers/soc/tegra/pmc.c +++ b/drivers/soc/tegra/pmc.c @@ -2184,6 +2184,34 @@ static int tegra186_pmc_irq_set_type(struct irq_data *data, unsigned int type) return 0; } +static void tegra_irq_mask_parent(struct irq_data *data) +{ + if (data->parent_data) + irq_chip_mask_parent(data); +} + +static void tegra_irq_unmask_parent(struct irq_data *data) +{ + if (data->parent_data) + irq_chip_unmask_parent(data); +} + +static void tegra_irq_eoi_parent(struct irq_data *data) +{ + if (data->parent_data) + irq_chip_eoi_parent(data); +} + +static int tegra_irq_set_affinity_parent(struct irq_data *data, + const struct cpumask *dest, + bool force) +{ + if (data->parent_data) + return irq_chip_set_affinity_parent(data, dest, force); + + return -EINVAL; +} + static int tegra_pmc_irq_init(struct tegra_pmc *pmc) { struct irq_domain *parent = NULL; @@ -2199,10 +2227,10 @@ static int tegra_pmc_irq_init(struct tegra_pmc *pmc) return 0; pmc->irq.name = dev_name(pmc->dev); - pmc->irq.irq_mask = irq_chip_mask_parent; - pmc->irq.irq_unmask = irq_chip_unmask_parent; - pmc->irq.irq_eoi = irq_chip_eoi_parent; - pmc->irq.irq_set_affinity = irq_chip_set_affinity_parent; + pmc->irq.irq_mask = tegra_irq_mask_parent; + pmc->irq.irq_unmask = tegra_irq_unmask_parent; + pmc->irq.irq_eoi = tegra_irq_eoi_parent; + pmc->irq.irq_set_affinity = tegra_irq_set_affinity_parent; pmc->irq.irq_set_type = pmc->soc->irq_set_type; pmc->irq.irq_set_wake = pmc->soc->irq_set_wake; From patchwork Wed Oct 7 12:45:44 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Zyngier X-Patchwork-Id: 1377992 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=kernel.org Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=default header.b=08BMunOa; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4C5vG91ZxGz9sTt for ; Wed, 7 Oct 2020 23:46:09 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728348AbgJGMqI (ORCPT ); Wed, 7 Oct 2020 08:46:08 -0400 Received: from mail.kernel.org ([198.145.29.99]:58250 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728328AbgJGMqA (ORCPT ); Wed, 7 Oct 2020 08:46:00 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id CC6F4207EA; Wed, 7 Oct 2020 12:45:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1602074760; bh=w/Fh1rsBc/qZz8z9gwOnv8+zC9kARhbA//ALVN8Zi6o=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=08BMunOamWWwu70r4+o6lAAqjBoADtvHh+fgKvH3sFdy4Od90EaTZnuUeJN3avC9B B9Ryftu8qvQtfYo2buhZFaK1osqy33/oaGH/KzVEh/BVto7wriMbQp59PoMB6rSuhc OE0oIQK/L46zG3aTteAdZ4/FScMuFuPKM8hWvRrY= Received: from 78.163-31-62.static.virginmediabusiness.co.uk ([62.31.163.78] helo=why.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1kQ8pR-000M8V-Ev; Wed, 07 Oct 2020 13:45:58 +0100 From: Marc Zyngier To: linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Thierry Reding , Jonathan Hunter , Dmitry Osipenko , Sowjanya Komatineni , Venkat Reddy Talla , Thomas Gleixner , kernel-team@android.com Subject: [PATCH v3 4/4] soc/tegra: pmc: Don't create fake interrupt hierarchy levels Date: Wed, 7 Oct 2020 13:45:44 +0100 Message-Id: <20201007124544.1397322-5-maz@kernel.org> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20201007124544.1397322-1-maz@kernel.org> References: <20201007124544.1397322-1-maz@kernel.org> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 62.31.163.78 X-SA-Exim-Rcpt-To: linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, thierry.reding@gmail.com, jonathanh@nvidia.com, digetx@gmail.com, skomatineni@nvidia.com, vreddytalla@nvidia.com, tglx@linutronix.de, kernel-team@android.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org The Tegra PMC driver does ungodly things with the interrupt hierarchy, repeatedly corrupting it by pulling hwirq numbers out of thin air, overriding existing IRQ mappings and changing the handling flow of unsuspecting users. All of this is done in the name of preserving the interrupt hierarchy even when these levels do not exist in the HW. Together with the use of proper IRQs for IPIs, this leads to an unbootable system as the rescheduling IPI gets repeatedly repurposed for random drivers... Instead, let's simply not initialize the levels that do not make sense for the HW, and let the core code remove them from the hierarchy. Signed-off-by: Marc Zyngier --- drivers/soc/tegra/pmc.c | 50 ----------------------------------------- 1 file changed, 50 deletions(-) diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra/pmc.c index b39536c68f45..2395c84ef83a 100644 --- a/drivers/soc/tegra/pmc.c +++ b/drivers/soc/tegra/pmc.c @@ -1989,46 +1989,10 @@ static int tegra_pmc_irq_alloc(struct irq_domain *domain, unsigned int virq, err = irq_domain_set_hwirq_and_chip(domain, virq, event->id, &pmc->irq, pmc); - - /* - * GPIOs don't have an equivalent interrupt in the - * parent controller (GIC). However some code, such - * as the one in irq_get_irqchip_state(), require a - * valid IRQ chip to be set. Make sure that's the - * case by passing NULL here, which will install a - * dummy IRQ chip for the interrupt in the parent - * domain. - */ - if (domain->parent) - irq_domain_set_hwirq_and_chip(domain->parent, - virq, 0, NULL, - NULL); - break; } } - /* - * For interrupts that don't have associated wake events, assign a - * dummy hardware IRQ number. This is used in the ->irq_set_type() - * and ->irq_set_wake() callbacks to return early for these IRQs. - */ - if (i == soc->num_wake_events) { - err = irq_domain_set_hwirq_and_chip(domain, virq, ULONG_MAX, - &pmc->irq, pmc); - - /* - * Interrupts without a wake event don't have a corresponding - * interrupt in the parent controller (GIC). Pass NULL for the - * chip here, which causes a dummy IRQ chip to be installed - * for the interrupt in the parent domain, to make this - * explicit. - */ - if (domain->parent) - irq_domain_set_hwirq_and_chip(domain->parent, virq, 0, - NULL, NULL); - } - return err; } @@ -2043,9 +2007,6 @@ static int tegra210_pmc_irq_set_wake(struct irq_data *data, unsigned int on) unsigned int offset, bit; u32 value; - if (data->hwirq == ULONG_MAX) - return 0; - offset = data->hwirq / 32; bit = data->hwirq % 32; @@ -2080,9 +2041,6 @@ static int tegra210_pmc_irq_set_type(struct irq_data *data, unsigned int type) unsigned int offset, bit; u32 value; - if (data->hwirq == ULONG_MAX) - return 0; - offset = data->hwirq / 32; bit = data->hwirq % 32; @@ -2123,10 +2081,6 @@ static int tegra186_pmc_irq_set_wake(struct irq_data *data, unsigned int on) unsigned int offset, bit; u32 value; - /* nothing to do if there's no associated wake event */ - if (WARN_ON(data->hwirq == ULONG_MAX)) - return 0; - offset = data->hwirq / 32; bit = data->hwirq % 32; @@ -2154,10 +2108,6 @@ static int tegra186_pmc_irq_set_type(struct irq_data *data, unsigned int type) struct tegra_pmc *pmc = irq_data_get_irq_chip_data(data); u32 value; - /* nothing to do if there's no associated wake event */ - if (data->hwirq == ULONG_MAX) - return 0; - value = readl(pmc->wake + WAKE_AOWAKE_CNTRL(data->hwirq)); switch (type) {