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Wed, 7 Oct 2020 12:08:54 +0000 (GMT) Received: from [192.168.0.63] (unknown [9.199.48.78]) by b06wcsmtp001.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 7 Oct 2020 12:08:54 +0000 (GMT) From: Mahesh Salgaonkar To: skiboot list Date: Wed, 07 Oct 2020 17:38:53 +0530 Message-ID: <160207253385.2097386.16314913870437323219.stgit@jupiter> In-Reply-To: <160207247879.2097386.9393389763183654717.stgit@jupiter> References: <160207247879.2097386.9393389763183654717.stgit@jupiter> User-Agent: StGit/0.21 MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235, 18.0.687 definitions=2020-10-07_08:2020-10-06, 2020-10-07 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 phishscore=0 mlxlogscore=999 clxscore=1015 mlxscore=0 malwarescore=0 priorityscore=1501 bulkscore=0 lowpriorityscore=0 adultscore=0 spamscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2006250000 definitions=main-2010070079 Subject: [Skiboot] [PATCH v2 01/10] opal/errorlog: Allow generation of Serviceable attention events X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Vasant Hegde Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" From: Mahesh Salgaonkar Add support to mark error log event as Serviceable/Customer attention events. Signed-off-by: Mahesh Salgaonkar --- core/errorlog.c | 5 +++++ core/pel.c | 3 +++ include/errorlog.h | 2 ++ include/pel.h | 1 + 4 files changed, 11 insertions(+) diff --git a/core/errorlog.c b/core/errorlog.c index f64ac3f23..2f7bcce19 100644 --- a/core/errorlog.c +++ b/core/errorlog.c @@ -73,6 +73,11 @@ struct errorlog *opal_elog_create(struct opal_err_info *e_info, uint32_t tag) return buf; } +void log_mark_serviceable(struct errorlog *buf) +{ + buf->service_req = true; +} + /* Add a new user data section to an existing error log */ void log_add_section(struct errorlog *buf, uint32_t tag) { diff --git a/core/pel.c b/core/pel.c index ec13e5590..4b2656346 100644 --- a/core/pel.c +++ b/core/pel.c @@ -160,6 +160,9 @@ static void create_user_header_section(struct errorlog *elog_data, else usrhdr->action_flags = cpu_to_be16(ERRL_ACTION_NONE); + if (elog_data->service_req) + usrhdr->action_flags |= ERRL_ACTION_SERVICE; + *pel_offset += USER_HEADER_SECTION_SIZE; } diff --git a/include/errorlog.h b/include/errorlog.h index a443d3681..74fe8b1fd 100644 --- a/include/errorlog.h +++ b/include/errorlog.h @@ -124,6 +124,7 @@ struct errorlog { uint32_t plid; uint32_t log_size; uint64_t elog_timeout; + bool service_req; char user_data_dump[OPAL_LOG_MAX_DUMP]; struct list_node link; @@ -350,6 +351,7 @@ void log_append_data(struct errorlog *buf, unsigned char *data, uint16_t size); void log_append_msg(struct errorlog *buf, const char *fmt, ...) __attribute__ ((format (printf, 2, 3))); void log_commit(struct errorlog *elog); +void log_mark_serviceable(struct errorlog *buf); /* Called by the backend after an error has been logged by the * backend. If the error could not be logged successfully success is diff --git a/include/pel.h b/include/pel.h index a0df7cc3c..252d27e2e 100644 --- a/include/pel.h +++ b/include/pel.h @@ -38,6 +38,7 @@ /* Error log reporting action */ #define ERRL_ACTION_REPORT 0x2000 +#define ERRL_ACTION_SERVICE 0x8000 #define ERRL_ACTION_NONE 0x0000 enum elogSectionId { From patchwork Wed Oct 7 12:09:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mahesh J Salgaonkar X-Patchwork-Id: 1377976 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4C5tT46kxkz9sSG for ; Wed, 7 Oct 2020 23:10:32 +1100 (AEDT) Authentication-Results: ozlabs.org; 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Wed, 7 Oct 2020 12:09:02 GMT Received: from b06wcsmtp001.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 49050A4060; Wed, 7 Oct 2020 12:09:02 +0000 (GMT) Received: from b06wcsmtp001.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 86AC7A405B; Wed, 7 Oct 2020 12:09:01 +0000 (GMT) Received: from [192.168.0.63] (unknown [9.199.48.78]) by b06wcsmtp001.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 7 Oct 2020 12:09:01 +0000 (GMT) From: Mahesh Salgaonkar To: skiboot list Date: Wed, 07 Oct 2020 17:39:00 +0530 Message-ID: <160207254069.2097386.236192108675837764.stgit@jupiter> In-Reply-To: <160207247879.2097386.9393389763183654717.stgit@jupiter> References: <160207247879.2097386.9393389763183654717.stgit@jupiter> User-Agent: StGit/0.21 MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235, 18.0.687 definitions=2020-10-07_08:2020-10-06, 2020-10-07 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 clxscore=1015 adultscore=0 mlxscore=0 spamscore=0 phishscore=0 priorityscore=1501 suspectscore=0 bulkscore=0 mlxlogscore=999 malwarescore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2006250000 definitions=main-2010070079 Subject: [Skiboot] [PATCH v2 02/10] pel: replace opal_* prefixes with pel_* for pel definitions. X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Vasant Hegde Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" All the structures defined in pel.h is as per the PEL (Platform Error Log) format and it is used for generating PEL error logs for FSP/BMC. However all definitions start with prefix opal_* giving a impression that these are defined by OPAL. This patch fixes this by replacing opal_* prefixes with pel_*. No functionality change. Signed-off-by: Mahesh Salgaonkar --- core/pel.c | 86 +++++++++++++++++++++++++++++---------------------------- include/pel.h | 84 ++++++++++++++++++++++++++++---------------------------- 2 files changed, 85 insertions(+), 85 deletions(-) diff --git a/core/pel.c b/core/pel.c index 4b2656346..3a200238e 100644 --- a/core/pel.c +++ b/core/pel.c @@ -18,24 +18,24 @@ static void create_mtms_section(struct errorlog *elog_data, { const struct dt_property *p; - struct opal_mtms_section *mtms = (struct opal_mtms_section *) + struct pel_mtms_section *mtms = (struct pel_mtms_section *) (pel_buffer + *pel_offset); mtms->v6header.id = cpu_to_be16(ELOG_SID_MACHINE_TYPE); mtms->v6header.length = cpu_to_be16(MTMS_SECTION_SIZE); - mtms->v6header.version = OPAL_EXT_HRD_VER; + mtms->v6header.version = PEL_EXT_HRD_VER; mtms->v6header.subtype = 0; mtms->v6header.component_id = cpu_to_be16(elog_data->component_id); memset(mtms->model, 0x00, sizeof(mtms->model)); - memcpy(mtms->model, dt_prop_get(dt_root, "model"), OPAL_SYS_MODEL_LEN); + memcpy(mtms->model, dt_prop_get(dt_root, "model"), PEL_SYS_MODEL_LEN); memset(mtms->serial_no, 0x00, sizeof(mtms->serial_no)); p = dt_find_property(dt_root, "system-id"); if (p) - memcpy(mtms->serial_no, p->prop, OPAL_SYS_SERIAL_LEN); + memcpy(mtms->serial_no, p->prop, PEL_SYS_SERIAL_LEN); else - memset(mtms->serial_no, 0, OPAL_SYS_SERIAL_LEN); + memset(mtms->serial_no, 0, PEL_SYS_SERIAL_LEN); *pel_offset += MTMS_SECTION_SIZE; } @@ -49,42 +49,42 @@ static void create_extended_header_section(struct errorlog *elog_data, uint64_t extd_time; uint32_t extd_date; - struct opal_extended_header_section *extdhdr = - (struct opal_extended_header_section *) + struct pel_extended_header_section *extdhdr = + (struct pel_extended_header_section *) (pel_buffer + *pel_offset); extdhdr->v6header.id = cpu_to_be16(ELOG_SID_EXTENDED_HEADER); extdhdr->v6header.length = cpu_to_be16(EXTENDED_HEADER_SECTION_SIZE); - extdhdr->v6header.version = OPAL_EXT_HRD_VER; + extdhdr->v6header.version = PEL_EXT_HRD_VER; extdhdr->v6header.subtype = 0; extdhdr->v6header.component_id = cpu_to_be16(elog_data->component_id); memset(extdhdr->model, 0x00, sizeof(extdhdr->model)); opalmodel = dt_prop_get(dt_root, "model"); - memcpy(extdhdr->model, opalmodel, OPAL_SYS_MODEL_LEN); + memcpy(extdhdr->model, opalmodel, PEL_SYS_MODEL_LEN); memset(extdhdr->serial_no, 0x00, sizeof(extdhdr->serial_no)); p = dt_find_property(dt_root, "system-id"); if (p) - memcpy(extdhdr->serial_no, p->prop, OPAL_SYS_SERIAL_LEN); + memcpy(extdhdr->serial_no, p->prop, PEL_SYS_SERIAL_LEN); else - memset(extdhdr->serial_no, 0, OPAL_SYS_SERIAL_LEN); + memset(extdhdr->serial_no, 0, PEL_SYS_SERIAL_LEN); - memset(extdhdr->opal_release_version, 0x00, - sizeof(extdhdr->opal_release_version)); - memset(extdhdr->opal_subsys_version, 0x00, - sizeof(extdhdr->opal_subsys_version)); + memset(extdhdr->pel_release_version, 0x00, + sizeof(extdhdr->pel_release_version)); + memset(extdhdr->pel_subsys_version, 0x00, + sizeof(extdhdr->pel_subsys_version)); rtc_cache_get_datetime(&extd_date, &extd_time); extdhdr->extended_header_date = cpu_to_be32(extd_date); extdhdr->extended_header_time = cpu_to_be32(extd_time >> 32); - extdhdr->opal_symid_len = 0; + extdhdr->pel_symid_len = 0; *pel_offset += EXTENDED_HEADER_SECTION_SIZE; } /* set src type */ -static void settype(struct opal_src_section *src, uint8_t src_type) +static void settype(struct pel_src_section *src, uint8_t src_type) { char type[4]; snprintf(type, sizeof(type), "%02X", src_type); @@ -92,7 +92,7 @@ static void settype(struct opal_src_section *src, uint8_t src_type) } /* set SRC subsystem type */ -static void setsubsys(struct opal_src_section *src, uint8_t src_subsys) +static void setsubsys(struct pel_src_section *src, uint8_t src_subsys) { char subsys[4]; snprintf(subsys, sizeof(subsys), "%02X", src_subsys); @@ -100,7 +100,7 @@ static void setsubsys(struct opal_src_section *src, uint8_t src_subsys) } /* Ser reason code of SRC */ -static void setrefcode(struct opal_src_section *src, uint16_t src_refcode) +static void setrefcode(struct pel_src_section *src, uint16_t src_refcode) { char refcode[8]; snprintf(refcode, sizeof(refcode), "%04X", src_refcode); @@ -111,24 +111,24 @@ static void setrefcode(struct opal_src_section *src, uint16_t src_refcode) static void create_src_section(struct errorlog *elog_data, char *pel_buffer, int *pel_offset) { - struct opal_src_section *src = (struct opal_src_section *) + struct pel_src_section *src = (struct pel_src_section *) (pel_buffer + *pel_offset); src->v6header.id = cpu_to_be16(ELOG_SID_PRIMARY_SRC); src->v6header.length = cpu_to_be16(SRC_SECTION_SIZE); - src->v6header.version = OPAL_ELOG_VERSION; - src->v6header.subtype = OPAL_ELOG_SST; + src->v6header.version = PEL_ELOG_VERSION; + src->v6header.subtype = PEL_ELOG_SST; src->v6header.component_id = cpu_to_be16(elog_data->component_id); - src->version = OPAL_SRC_SEC_VER; + src->version = PEL_SRC_SEC_VER; src->flags = 0; - src->wordcount = OPAL_SRC_MAX_WORD_COUNT; + src->wordcount = PEL_SRC_MAX_WORD_COUNT; src->srclength = cpu_to_be16(SRC_LENGTH); settype(src, OPAL_SRC_TYPE_ERROR); setsubsys(src, OPAL_FAILING_SUBSYSTEM); setrefcode(src, elog_data->reason_code); memset(src->hexwords, 0 , (8 * 4)); - src->hexwords[0] = cpu_to_be32(OPAL_SRC_FORMAT); + src->hexwords[0] = cpu_to_be32(PEL_OPAL_SRC_FORMAT); src->hexwords[4] = cpu_to_be32(elog_data->additional_info[0]); src->hexwords[5] = cpu_to_be32(elog_data->additional_info[1]); src->hexwords[6] = cpu_to_be32(elog_data->additional_info[2]); @@ -140,14 +140,14 @@ static void create_src_section(struct errorlog *elog_data, static void create_user_header_section(struct errorlog *elog_data, char *pel_buffer, int *pel_offset) { - struct opal_user_header_section *usrhdr = - (struct opal_user_header_section *) + struct pel_user_header_section *usrhdr = + (struct pel_user_header_section *) (pel_buffer + *pel_offset); usrhdr->v6header.id = cpu_to_be16(ELOG_SID_USER_HEADER); usrhdr->v6header.length = cpu_to_be16(USER_HEADER_SECTION_SIZE); - usrhdr->v6header.version = OPAL_ELOG_VERSION; - usrhdr->v6header.subtype = OPAL_ELOG_SST; + usrhdr->v6header.version = PEL_ELOG_VERSION; + usrhdr->v6header.subtype = PEL_ELOG_SST; usrhdr->v6header.component_id = cpu_to_be16(elog_data->component_id); usrhdr->subsystem_id = elog_data->subsystem_id; @@ -172,14 +172,14 @@ static void create_private_header_section(struct errorlog *elog_data, { uint64_t ctime; uint32_t cdate; - struct opal_private_header_section *privhdr = - (struct opal_private_header_section *) + struct pel_private_header_section *privhdr = + (struct pel_private_header_section *) pel_buffer; privhdr->v6header.id = cpu_to_be16(ELOG_SID_PRIVATE_HEADER); privhdr->v6header.length = cpu_to_be16(PRIVATE_HEADER_SECTION_SIZE); - privhdr->v6header.version = OPAL_ELOG_VERSION; - privhdr->v6header.subtype = OPAL_ELOG_SST; + privhdr->v6header.version = PEL_ELOG_VERSION; + privhdr->v6header.subtype = PEL_ELOG_SST; privhdr->v6header.component_id = cpu_to_be16(elog_data->component_id); privhdr->plid = cpu_to_be32(elog_data->plid); @@ -192,9 +192,9 @@ static void create_private_header_section(struct errorlog *elog_data, privhdr->creator_subid_lo = 0x00; if (elog_data->elog_origin == ORG_SAPPHIRE) - privhdr->creator_id = OPAL_CID_SAPPHIRE; + privhdr->creator_id = PEL_CID_SAPPHIRE; else - privhdr->creator_id = OPAL_CID_POWERNV; + privhdr->creator_id = PEL_CID_POWERNV; privhdr->log_entry_id = cpu_to_be32(elog_data->plid); /*entry id is updated by FSP*/ @@ -206,23 +206,23 @@ static void create_user_defined_section(struct errorlog *elog_data, { char *dump = (char *)pel_buffer + *pel_offset; char *opal_buf = (char *)elog_data->user_data_dump; - struct opal_user_section *usrhdr; + struct pel_user_section *usrhdr; struct elog_user_data_section *opal_usr_data; - struct opal_private_header_section *privhdr = - (struct opal_private_header_section *)pel_buffer; + struct pel_private_header_section *privhdr = + (struct pel_private_header_section *)pel_buffer; int i; for (i = 0; i < elog_data->user_section_count; i++) { - usrhdr = (struct opal_user_section *)dump; + usrhdr = (struct pel_user_section *)dump; opal_usr_data = (struct elog_user_data_section *)opal_buf; usrhdr->v6header.id = cpu_to_be16(ELOG_SID_USER_DEFINED); usrhdr->v6header.length = cpu_to_be16( - sizeof(struct opal_v6_header) + + sizeof(struct pel_v6_header) + be16_to_cpu(opal_usr_data->size)); - usrhdr->v6header.version = OPAL_ELOG_VERSION; - usrhdr->v6header.subtype = OPAL_ELOG_SST; + usrhdr->v6header.version = PEL_ELOG_VERSION; + usrhdr->v6header.subtype = PEL_ELOG_SST; usrhdr->v6header.component_id = cpu_to_be16(elog_data->component_id); memcpy(usrhdr->dump, opal_buf, be16_to_cpu(opal_usr_data->size)); @@ -245,7 +245,7 @@ static size_t pel_user_section_size(struct errorlog *elog_data) opal_usr_data = (struct elog_user_data_section *)opal_buf; s = be16_to_cpu(opal_usr_data->size); - total += sizeof(struct opal_v6_header) + s; + total += sizeof(struct pel_v6_header) + s; opal_buf += s; } diff --git a/include/pel.h b/include/pel.h index 252d27e2e..fdc30366a 100644 --- a/include/pel.h +++ b/include/pel.h @@ -14,27 +14,27 @@ #define SRC_SECTION_SIZE 80 #define SRC_SUBSECTION_SIZE 4 #define SRC_LENGTH 72 -#define OPAL_MAX_SRC_BYTES 32 +#define PEL_MAX_SRC_BYTES 32 #define EXTENDED_HEADER_SECTION_SIZE 76 #define MTMS_SECTION_SIZE 28 #define IO_EVENT_SECTION_SIZE 16 -#define OPAL_ELOG_VERSION 1 -#define OPAL_ELOG_SST 0 -#define OPAL_SRC_MAX_WORD_COUNT 8 +#define PEL_ELOG_VERSION 1 +#define PEL_ELOG_SST 0 +#define PEL_SRC_MAX_WORD_COUNT 8 -#define OPAL_SRC_FORMAT 0x80 -#define OPAL_FAILING_SUBSYSTEM 0x82 +#define PEL_OPAL_SRC_FORMAT 0x80 +#define OPAL_FAILING_SUBSYSTEM 0x82 -#define OPAL_SYS_MODEL_LEN 8 -#define OPAL_SYS_SERIAL_LEN 12 -#define OPAL_VER_LEN 16 -#define OPAL_SYMPID_LEN 80 -#define OPAL_RC_NONE 0 +#define PEL_SYS_MODEL_LEN 8 +#define PEL_SYS_SERIAL_LEN 12 +#define PEL_VER_LEN 16 +#define PEL_SYMPID_LEN 80 +#define PEL_RC_NONE 0 -#define OPAL_IO_MAX_RPC_DATA 216 -#define OPAL_SRC_SEC_VER 0x02 -#define OPAL_EXT_HRD_VER 0x01 +#define PEL_IO_MAX_RPC_DATA 216 +#define PEL_SRC_SEC_VER 0x02 +#define PEL_EXT_HRD_VER 0x01 /* Error log reporting action */ #define ERRL_ACTION_REPORT 0x2000 @@ -61,7 +61,7 @@ enum elogSectionId { }; -struct opal_v6_header { +struct pel_v6_header { __be16 id; /* section id */ __be16 length; /* section length */ uint8_t version; /* section version */ @@ -72,8 +72,8 @@ struct opal_v6_header { /* opal_srctype */ #define OPAL_SRC_TYPE_ERROR 0xBB -#define OPAL_CID_SAPPHIRE 'K' /* creator ID for sapphire log */ -#define OPAL_CID_POWERNV 'P' /* creator ID for powernv log */ +#define PEL_CID_SAPPHIRE 'K' /* creator ID for sapphire log */ +#define PEL_CID_POWERNV 'P' /* creator ID for powernv log */ /* Origin of error, elog_origin */ #define ORG_SAPPHIRE 1 @@ -82,10 +82,10 @@ struct opal_v6_header { /* MAX time for error log commit */ #define ERRORLOG_TIMEOUT_INTERVAL 180 -/*struct opal_private head section_ */ -struct opal_private_header_section { +/*struct pel_private head section_ */ +struct pel_private_header_section { - struct opal_v6_header v6header; + struct pel_v6_header v6header; __be32 create_date; __be32 create_time; __be32 commit_date; @@ -101,10 +101,10 @@ struct opal_private_header_section { __be32 log_entry_id; /* Unique log entry id */ } __packed; -/* opal user header section */ -struct opal_user_header_section { +/* pel user header section */ +struct pel_user_header_section { - struct opal_v6_header v6header; + struct pel_v6_header v6header; uint8_t subsystem_id; /* subsystem id */ uint8_t event_scope; @@ -117,43 +117,43 @@ struct opal_user_header_section { __be32 reserved_2; } __packed; -struct opal_src_section { - struct opal_v6_header v6header; +struct pel_src_section { + struct pel_v6_header v6header; uint8_t version; uint8_t flags; uint8_t reserved_0; uint8_t wordcount; __be16 reserved_1; __be16 srclength; - __be32 hexwords[OPAL_SRC_MAX_WORD_COUNT]; - char srcstring[OPAL_MAX_SRC_BYTES]; + __be32 hexwords[PEL_SRC_MAX_WORD_COUNT]; + char srcstring[PEL_MAX_SRC_BYTES]; } __packed; -struct opal_extended_header_section { - struct opal_v6_header v6header; - char model[OPAL_SYS_MODEL_LEN]; - char serial_no[OPAL_SYS_SERIAL_LEN]; - char opal_release_version[OPAL_VER_LEN]; - char opal_subsys_version[OPAL_VER_LEN]; +struct pel_extended_header_section { + struct pel_v6_header v6header; + char model[PEL_SYS_MODEL_LEN]; + char serial_no[PEL_SYS_SERIAL_LEN]; + char pel_release_version[PEL_VER_LEN]; + char pel_subsys_version[PEL_VER_LEN]; __be16 reserved_0; __be32 extended_header_date; __be32 extended_header_time; __be16 reserved_1; uint8_t reserved_2; - uint8_t opal_symid_len; - char opalsymid[OPAL_SYMPID_LEN]; + uint8_t pel_symid_len; + char opalsymid[PEL_SYMPID_LEN]; } __packed; -/* opal MTMS section */ -struct opal_mtms_section { - struct opal_v6_header v6header; - char model[OPAL_SYS_MODEL_LEN]; - char serial_no[OPAL_SYS_SERIAL_LEN]; +/* pel MTMS section */ +struct pel_mtms_section { + struct pel_v6_header v6header; + char model[PEL_SYS_MODEL_LEN]; + char serial_no[PEL_SYS_SERIAL_LEN]; } __packed; /* User defined section */ -struct opal_user_section { - struct opal_v6_header v6header; +struct pel_user_section { + struct pel_v6_header v6header; char dump[1]; } __packed; From patchwork Wed Oct 7 12:09:07 2020 Content-Type: text/plain; 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Wed, 7 Oct 2020 12:09:08 +0000 (GMT) Received: from [192.168.0.63] (unknown [9.199.48.78]) by d06av22.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 7 Oct 2020 12:09:08 +0000 (GMT) From: Mahesh Salgaonkar To: skiboot list Date: Wed, 07 Oct 2020 17:39:07 +0530 Message-ID: <160207254747.2097386.5086237208543320593.stgit@jupiter> In-Reply-To: <160207247879.2097386.9393389763183654717.stgit@jupiter> References: <160207247879.2097386.9393389763183654717.stgit@jupiter> User-Agent: StGit/0.21 MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235, 18.0.687 definitions=2020-10-07_08:2020-10-06, 2020-10-07 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 clxscore=1015 impostorscore=0 mlxscore=0 mlxlogscore=999 adultscore=0 lowpriorityscore=0 priorityscore=1501 bulkscore=0 spamscore=0 malwarescore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2006250000 definitions=main-2010070079 Subject: [Skiboot] [PATCH v2 03/10] opal/errorlog: Add support to include callout section in error log. X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Vasant Hegde Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" From: Mahesh Salgaonkar Allow inclusion of HW callout to eSEL being generated. This will help OPAL to generate errorlog with fru callout section that includes location code, part number and serial number of a faulty hardware that may need replacement. Signed-off-by: Mahesh Salgaonkar --- Change in v2: - Avoid use of bitfields in opal_fru_callout structure. --- core/errorlog.c | 49 +++++++++++++++++ core/pel.c | 152 ++++++++++++++++++++++++++++++++++++++++++++++++++++ include/errorlog.h | 17 ++++++ include/pel.h | 71 ++++++++++++++++++++++++ 4 files changed, 287 insertions(+), 2 deletions(-) diff --git a/core/errorlog.c b/core/errorlog.c index 2f7bcce19..0ea248b39 100644 --- a/core/errorlog.c +++ b/core/errorlog.c @@ -105,6 +105,55 @@ void log_add_section(struct errorlog *buf, uint32_t tag) buf->user_section_count++; } +void log_add_callout_section(struct errorlog *buf, const char *loc_code, + const char *part_no, const char *serial_no) +{ + int index; + struct elog_fru_callout *fru; + + if (!buf) { + prerror("ELOG: Cannot add callout section. " + "Buffer is invalid\n"); + return; + } + index = buf->num_fru_callout; + fru = &buf->fru_callout[index]; + + if (buf->num_fru_callout >= PEL_MAX_FRU_CALL_OUTS) { + prerror("ELOG: Cannot add callout section. " + "Maximum limit reached\n"); + return; + } + + if (!loc_code) { + prerror("ELOG: Cannot add callout section. " + "location code is not specified\n"); + return; + } + + /* Location codes -- at most 80 chars with null termination */ + if (strlen(loc_code) >= LOC_CODE_SIZE) { + prerror("ELOG: Invalid Size of location code.\n"); + return; + } + + buf->num_fru_callout++; + memset(fru->loc_code, 0, LOC_CODE_SIZE); + strcpy(fru->loc_code, loc_code); + + /* + * Part number contains a null-terminated ASCII character string. + * 7 ASCII character part number + */ + if (part_no) { + memcpy(fru->part_no, part_no, PEL_FRU_PART_LEN); + fru->part_no[7] = '\0'; + } + + if (serial_no) + memcpy(fru->serial_no, serial_no, PEL_FRU_SERIAL_LEN); +} + void opal_elog_complete(struct errorlog *buf, bool success) { if (!success) diff --git a/core/pel.c b/core/pel.c index 3a200238e..1be1ab990 100644 --- a/core/pel.c +++ b/core/pel.c @@ -107,10 +107,112 @@ static void setrefcode(struct pel_src_section *src, uint16_t src_refcode) memcpy(src->srcstring+4, refcode, 4); } +static int create_fru_identity(struct elog_fru_callout *elog_fru, + char *pel_buffer, int pel_offset) +{ + int data_len = 0; + struct pel_fru_identity *identity; + + identity = (struct pel_fru_identity *)(pel_buffer + pel_offset); + + if (!strlen(elog_fru->part_no) && !strlen(elog_fru->serial_no)) + return 0; + + identity->id = PEL_FRU_IDENT_ID; + identity->flags = PEL_FRU_IDENT_FLAG_NORMAL; + + if (strlen(elog_fru->part_no)) { + identity->flags |= PEL_FRU_IDENT_FLAG_PART; + memset(identity->fru_data, 0, PEL_FRU_PART_LEN); + memcpy(identity->fru_data, elog_fru->part_no, + PEL_FRU_PART_LEN); + data_len = PEL_FRU_PART_LEN; + } + + if (strlen(elog_fru->serial_no)) { + identity->flags |= PEL_FRU_IDENT_FLAG_SERIAL; + memset(identity->fru_data + data_len, 0, PEL_FRU_SERIAL_LEN); + memcpy(identity->fru_data + data_len, elog_fru->serial_no, + PEL_FRU_SERIAL_LEN); + data_len += PEL_FRU_SERIAL_LEN; + } + identity->length = FRU_IDENTITY_HEADER_SIZE + data_len; + + return identity->length; +} + +/* + * The FRU Call-out section is added as additional/optional sub section. + * Each additional sub section starts with sub section header followed by + * data. The sub section header contains section id, flags and size of the + * sub section including header size. A variable number of FRU Call-outs are + * possible up to the maximum of 10. Each FRU Callout structure starts on a + * word boundary. + */ +static int create_fru_callout_section(struct errorlog *elog_data, + char *pel_buffer, int pel_offset) +{ + int len; + struct pel_fru_callout_section *fru; + struct pel_fru_callout *fru_callout; + int i, fru_count; + + fru = (struct pel_fru_callout_section *)(pel_buffer + pel_offset); + fru->header.id = PEL_SRC_SUB_SECTION_ID; + fru->header.flags = 0; + /* + * Initialize SRC sub section size with sub section header size. + * SRC sub section size is expressed in # of words (4 byte fields) + * SRC sub section size will be updated for each FRU call out. + */ + fru->header.length += SRC_SUBSECTION_HEADER_SIZE / 4; + pel_offset += SRC_SUBSECTION_HEADER_SIZE; + fru_callout = (struct pel_fru_callout *)(pel_buffer + pel_offset); + + /* Add FRU Call-outs */ + fru_count = MIN(PEL_MAX_FRU_CALL_OUTS, elog_data->num_fru_callout); + for (i = 0; i < fru_count; i++) { + struct elog_fru_callout *elog_fru = &elog_data->fru_callout[i]; + + /* Set FRU callout type */ + fru_callout->type_flags |= PEL_FRU_TYPE_NORMAL; + fru_callout->priority = PEL_FRU_PRIO_MEDIUM; + /* Size of loc-code including NULL terminator. */ + len = strlen(elog_fru->loc_code) + 1; + + /* Length of Location Code field - must be a multiple of 4. */ + len = ALIGN_UP(len, 4); + memcpy(fru_callout->loc_code, elog_fru->loc_code, len); + fru_callout->loc_code_len = len; + fru_callout->length = FRU_CALLOUT_SECTION_SIZE + + fru_callout->loc_code_len; + + pel_offset += fru_callout->length; + len = create_fru_identity(elog_fru, pel_buffer, pel_offset); + if (len) { + /* Set FRU callout flag */ + fru_callout->type_flags |= + PEL_FRU_FLAG_IDENTITY_INCLUDED; + } + fru_callout->length += len; + pel_offset += len; + + /* + * SRC sub section size is expressed in # of words + * (4 byte fields) + */ + fru->header.length += fru_callout->length / 4; + fru_callout = + (struct pel_fru_callout *)(pel_buffer + pel_offset); + } + return fru->header.length * 4; +} + /* Create SRC section of OPAL log */ static void create_src_section(struct errorlog *elog_data, char *pel_buffer, int *pel_offset) { + int len; struct pel_src_section *src = (struct pel_src_section *) (pel_buffer + *pel_offset); @@ -134,6 +236,16 @@ static void create_src_section(struct errorlog *elog_data, src->hexwords[6] = cpu_to_be32(elog_data->additional_info[2]); src->hexwords[7] = cpu_to_be32(elog_data->additional_info[3]); *pel_offset += SRC_SECTION_SIZE; + + if (!elog_data->num_fru_callout) + return; + + /* Fill up src sub section header */ + len = create_fru_callout_section(elog_data, pel_buffer, *pel_offset); + src->srclength += len; + src->v6header.length += len; + src->flags |= PEL_SRC_FLAG_SUB_SECTION_PRESENT; + *pel_offset += len; } /* Create user header section */ @@ -252,9 +364,47 @@ static size_t pel_user_section_size(struct errorlog *elog_data) return total; } +static size_t pel_fru_callout_section_size(struct errorlog *elog_data) +{ + int i, fru_count; + size_t total = 0; + + if (!elog_data->num_fru_callout) + return 0; + + total += SRC_SUBSECTION_HEADER_SIZE; + fru_count = MIN(PEL_MAX_FRU_CALL_OUTS, elog_data->num_fru_callout); + for (i = 0; i < fru_count; i++) { + size_t len; + + total += FRU_CALLOUT_SECTION_SIZE; + /* Size of loc-code including NULL terminator. */ + len = strlen(elog_data->fru_callout[i].loc_code) + 1; + len = ALIGN_UP(len, 4); + total += len; + + /* Calculate size for FRU identity if present */ + if (!strlen(elog_data->fru_callout[i].part_no) + && !strlen(elog_data->fru_callout[i].serial_no)) + continue; + + if (strlen(elog_data->fru_callout[i].part_no)) + total += PEL_FRU_PART_LEN; + + if (strlen(elog_data->fru_callout[i].serial_no)) + total += PEL_FRU_SERIAL_LEN; + + total += FRU_IDENTITY_HEADER_SIZE; + } + return total; +} + size_t pel_size(struct errorlog *elog_data) { - return PEL_MIN_SIZE + pel_user_section_size(elog_data); + size_t len; + + len = PEL_MIN_SIZE + pel_user_section_size(elog_data); + return len + pel_fru_callout_section_size(elog_data); } /* Converts an OPAL errorlog into a PEL formatted log */ diff --git a/include/errorlog.h b/include/errorlog.h index 74fe8b1fd..a9c3250e8 100644 --- a/include/errorlog.h +++ b/include/errorlog.h @@ -89,6 +89,12 @@ /* Max user dump size is 14K */ #define OPAL_LOG_MAX_DUMP 14336 +#define PEL_FRU_PART_LEN 8 +#define PEL_FRU_SERIAL_LEN 12 + +/* Maximum possible FRU Call-outs in PEL errorlog */ +#define PEL_MAX_FRU_CALL_OUTS 10 + /* Origin of error, elog_origin */ #define ORG_SAPPHIRE 1 #define ORG_POWERNV 2 @@ -101,6 +107,13 @@ struct elog_user_data_section { char data_dump[1]; } __packed; + +struct elog_fru_callout { + char loc_code[LOC_CODE_SIZE]; + char part_no[PEL_FRU_PART_LEN]; + char serial_no[PEL_FRU_SERIAL_LEN]; +}; + /* * All the information regarding an error/event to be reported * needs to populate this structure using pre-defined interfaces @@ -125,6 +138,8 @@ struct errorlog { uint32_t log_size; uint64_t elog_timeout; bool service_req; + uint16_t num_fru_callout; + struct elog_fru_callout fru_callout[PEL_MAX_FRU_CALL_OUTS]; char user_data_dump[OPAL_LOG_MAX_DUMP]; struct list_node link; @@ -347,6 +362,8 @@ uint32_t log_simple_error(struct opal_err_info *e_info, struct errorlog *opal_elog_create(struct opal_err_info *e_info, uint32_t tag) __warn_unused_result; void log_add_section(struct errorlog *buf, uint32_t tag); +void log_add_callout_section(struct errorlog *buf, const char *loc_code, + const char *part_no, const char *serial_no); void log_append_data(struct errorlog *buf, unsigned char *data, uint16_t size); void log_append_msg(struct errorlog *buf, const char *fmt, ...) __attribute__ ((format (printf, 2, 3))); diff --git a/include/pel.h b/include/pel.h index fdc30366a..968bf2779 100644 --- a/include/pel.h +++ b/include/pel.h @@ -12,12 +12,14 @@ #define PRIVATE_HEADER_SECTION_SIZE 48 #define USER_HEADER_SECTION_SIZE 24 #define SRC_SECTION_SIZE 80 -#define SRC_SUBSECTION_SIZE 4 +#define SRC_SUBSECTION_HEADER_SIZE 4 #define SRC_LENGTH 72 #define PEL_MAX_SRC_BYTES 32 #define EXTENDED_HEADER_SECTION_SIZE 76 #define MTMS_SECTION_SIZE 28 #define IO_EVENT_SECTION_SIZE 16 +#define FRU_CALLOUT_SECTION_SIZE 4 +#define FRU_IDENTITY_HEADER_SIZE 4 #define PEL_ELOG_VERSION 1 #define PEL_ELOG_SST 0 @@ -36,6 +38,8 @@ #define PEL_SRC_SEC_VER 0x02 #define PEL_EXT_HRD_VER 0x01 +#define PEL_SRC_FLAG_SUB_SECTION_PRESENT 0x01 + /* Error log reporting action */ #define ERRL_ACTION_REPORT 0x2000 #define ERRL_ACTION_SERVICE 0x8000 @@ -71,6 +75,37 @@ struct pel_v6_header { /* opal_srctype */ #define OPAL_SRC_TYPE_ERROR 0xBB +/* pel SRC subsection id */ +#define PEL_SRC_SUB_SECTION_ID 0xC0 + +/* FRU callout Type */ +#define PEL_FRU_TYPE_NORMAL 0x20 +/* FRU callout flags */ +#define PEL_FRU_FLAG_IDENTITY_INCLUDED 0x08 +#define PEL_FRU_FLAG_MRU_INCLUDED 0x04 +/* FRU callout priority */ +#define PEL_FRU_PRIO_HIGH 'H' +#define PEL_FRU_PRIO_MEDIUM 'M' +#define PEL_FRU_PRIO_MEDIUM_GROUP_A 'A' +#define PEL_FRU_PRIO_MEDIUM_GROUP_B 'B' +#define PEL_FRU_PRIO_MEDIUM_GROUP_C 'C' +#define PEL_FRU_PRIO_LOW 'L' + +/* FRU identity srtucture id */ +#define PEL_FRU_IDENT_ID 0x4944 /* ID */ +/* FRU identity flags bits 0-3 */ +#define PEL_FRU_IDENT_FLAG_NORMAL 0x10 /* "normal" hardware FRU */ +#define PEL_FRU_IDENT_FLAG_CODE 0x20 /* code FRU */ +#define PEL_FRU_IDENT_FLAG_CONFIG 0x30 /* configuration error */ +#define PEL_FRU_IDENT_FLAG_MAINT 0x40 /* Maintenance Procedure req */ +#define PEL_FRU_IDENT_FLAG_EXT 0x90 /* External FRU */ +#define PEL_FRU_IDENT_FLAG_EXT_CODE 0xa0 /* External code FRU */ +#define PEL_FRU_IDENT_FLAG_TOOL 0xb0 /* Tool FRU */ +#define PEL_FRU_IDENT_FLAG_SYMBOL 0xc0 /* Symbolic FRU */ +/* FRU identity flags bits 4-7 */ +#define PEL_FRU_IDENT_FLAG_PART 0x08 /* FRU Part Number supplied */ +#define PEL_FRU_IDENT_FLAG_CCIN 0x04 /* CCIN supplied */ +#define PEL_FRU_IDENT_FLAG_SERIAL 0x01 /* FRU serial number supplied */ #define PEL_CID_SAPPHIRE 'K' /* creator ID for sapphire log */ #define PEL_CID_POWERNV 'P' /* creator ID for powernv log */ @@ -129,6 +164,40 @@ struct pel_src_section { char srcstring[PEL_MAX_SRC_BYTES]; } __packed; +struct pel_src_sub_section { + uint8_t id; /* SRC sub section id */ + uint8_t flags; + uint16_t length; /* in # of words (4 byte fields) */ +}; + +struct pel_fru_callout_section { + struct pel_src_sub_section header; +}; + +struct pel_fru_callout { + uint8_t length; /* in bytes */ + /* First 4 bits are FRU callout type */ + /* Second 4 bits are the FRU callout flags */ + uint8_t type_flags; + uint8_t flags:4; + uint8_t priority; + uint8_t loc_code_len; + char loc_code[0]; +}; + +struct pel_fru_identity { + uint16_t id; + uint8_t length; + uint8_t flags; + /* + * Depending on flags[4-7] bits fru_data will contain: + * part number 8 bytes (7 ASCII character + 1 null-terminator) + * CCIN number 4 bytes (not a null-terminated string) + * FRU serial number 12 bytes (not a null-terminated string) + */ + char fru_data[0]; +}; + struct pel_extended_header_section { struct pel_v6_header v6header; char model[PEL_SYS_MODEL_LEN]; From patchwork Wed Oct 7 12:09:14 2020 Content-Type: text/plain; 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Wed, 7 Oct 2020 12:09:14 +0000 (GMT) From: Mahesh Salgaonkar To: skiboot list Date: Wed, 07 Oct 2020 17:39:14 +0530 Message-ID: <160207255420.2097386.2824537182922235039.stgit@jupiter> In-Reply-To: <160207247879.2097386.9393389763183654717.stgit@jupiter> References: <160207247879.2097386.9393389763183654717.stgit@jupiter> User-Agent: StGit/0.21 MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235, 18.0.687 definitions=2020-10-07_08:2020-10-06, 2020-10-07 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 clxscore=1015 impostorscore=0 mlxscore=0 mlxlogscore=999 adultscore=0 lowpriorityscore=0 priorityscore=1501 bulkscore=0 spamscore=0 malwarescore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2006250000 definitions=main-2010070079 Subject: [Skiboot] [PATCH v2 04/10] opal: Get chip part-number and serial-number. X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Vasant Hegde Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" From: Mahesh Salgaonkar Get chip part-number and serial-number and store it under proc_chip for quick reference while sending error log that needs proc chip FRU details. Signed-off-by: Mahesh Salgaonkar --- Change in v2: - Use dt_prop_get_def(). --- core/chip.c | 4 ++++ include/chip.h | 28 ++++++++++++++++++++++++++++ 2 files changed, 32 insertions(+) diff --git a/core/chip.c b/core/chip.c index f1269d3f9..d1ee59d58 100644 --- a/core/chip.c +++ b/core/chip.c @@ -113,6 +113,10 @@ static void init_chip(struct dt_node *dn) if (lc) chip->loc_code = strdup(lc); + /* Update part number and serial number for this chip */ + chip->part_no = dt_prop_get_def(dn, "part-number", NULL); + chip->serial_no = dt_prop_get_def(dn, "serial-number", NULL); + prlog(PR_INFO, "CHIP: Initialised chip %d from %s\n", id, dn->name); chips[id] = chip; } diff --git a/include/chip.h b/include/chip.h index 4deb96182..53b4a41b7 100644 --- a/include/chip.h +++ b/include/chip.h @@ -220,6 +220,10 @@ struct proc_chip { /* location code of this chip */ const uint8_t *loc_code; + /* part-number and serial number for this chip */ + const uint8_t *part_no; + const uint8_t *serial_no; + /* Used by hw/sbe-p9.c */ struct p9_sbe *sbe; @@ -276,5 +280,29 @@ static inline const char *chip_loc_code(uint32_t chip_id) return chip->loc_code; } +/* helper to get part number of a chip */ +static inline const char *chip_part_number(uint32_t chip_id) +{ + struct proc_chip *chip; + + chip = get_chip(chip_id); + if (!chip) + return NULL; + + return chip->part_no; +} + +/* helper to get serial number of a chip */ +static inline const char *chip_serial_number(uint32_t chip_id) +{ + struct proc_chip *chip; + + chip = get_chip(chip_id); + if (!chip) + return NULL; + + return chip->serial_no; +} + #endif /* __CHIP_H */ From patchwork Wed Oct 7 12:09:21 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mahesh J Salgaonkar X-Patchwork-Id: 1377980 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4C5tW01HZXz9sSG for ; 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Wed, 7 Oct 2020 12:09:23 GMT Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id D8C364C04E; Wed, 7 Oct 2020 12:09:22 +0000 (GMT) Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 470964C059; Wed, 7 Oct 2020 12:09:22 +0000 (GMT) Received: from [192.168.0.63] (unknown [9.199.48.78]) by d06av22.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 7 Oct 2020 12:09:22 +0000 (GMT) From: Mahesh Salgaonkar To: skiboot list Date: Wed, 07 Oct 2020 17:39:21 +0530 Message-ID: <160207256072.2097386.8459143697191737194.stgit@jupiter> In-Reply-To: <160207247879.2097386.9393389763183654717.stgit@jupiter> References: <160207247879.2097386.9393389763183654717.stgit@jupiter> User-Agent: StGit/0.21 MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235, 18.0.687 definitions=2020-10-07_08:2020-10-06, 2020-10-07 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 suspectscore=0 clxscore=1015 mlxscore=0 impostorscore=0 phishscore=0 adultscore=0 bulkscore=0 mlxlogscore=999 spamscore=0 priorityscore=1501 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2006250000 definitions=main-2010070079 Subject: [Skiboot] [PATCH v2 05/10] opal: Get backplane (io base) part-number and serial-number. X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Vasant Hegde Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Get backplane (io base) part-number and serial-number and store it under phb structure for quick reference while sending error log that needs backplane FRU details. Signed-off-by: Mahesh Salgaonkar --- hdata/iohub.c | 43 ++++++++++++++++++++++++++++++++++++++++++ hdata/test/p8-840-spira.dts | 2 ++ hdata/test/p81-811.spira.dts | 2 ++ hw/phb4.c | 6 ++++++ include/pci.h | 2 ++ 5 files changed, 55 insertions(+) diff --git a/hdata/iohub.c b/hdata/iohub.c index fa3afbf7a..c751823a7 100644 --- a/hdata/iohub.c +++ b/hdata/iohub.c @@ -54,6 +54,46 @@ static bool io_get_lx_info(const void *kwvpd, unsigned int kwvpd_sz, return true; } +/* Discard trailing spaces and populate device tree */ +static void io_dt_add_string_prop(struct dt_node *node, const char *name, + const char *val, int vlen) +{ + char *prop = zalloc(vlen + 1); + int i; + + if (!prop) + return; + + memcpy(prop, val, vlen); + for (i = vlen - 1; i >= 0; i--) { + if (prop[i] != 0x20) { + prop[i + 1] = '\0'; + break; + } + } + + if (i >= 0 && !dt_find_property(node, name)) + dt_add_property_string(node, name, prop); +} + +static void io_get_fru_info(const void *kwvpd, unsigned int kwvpd_sz, + struct dt_node *hn) +{ + const void *kw; + uint8_t sz; + char buf[12]; + + memset(buf, 0, 12); + /* Serial Number */ + kw = vpd_find(kwvpd, kwvpd_sz, "VINI", "SN", &sz); + if (kw) + io_dt_add_string_prop(hn, "ibm,io-base-serial-number", kw, sz); + + /* Part Number */ + kw = vpd_find(kwvpd, kwvpd_sz, "VINI", "PN", &sz); + if (kw) + io_dt_add_string_prop(hn, "ibm,io-base-part-number", kw, sz); +} static void io_get_loc_code(const void *sp_iohubs, struct dt_node *hn, const char *prop_name) { @@ -336,6 +376,9 @@ static void io_add_p8_cec_vpd(const struct HDIF_common_hdr *sp_iohubs) /* Grab LX load info */ io_get_lx_info(kwvpd, kwvpd_sz, 0, dt_root); + + /* Grab part-number and serial-number of io base (backplane) */ + io_get_fru_info(kwvpd, kwvpd_sz, dt_root); } /* diff --git a/hdata/test/p8-840-spira.dts b/hdata/test/p8-840-spira.dts index 625935d30..f461df2f5 100644 --- a/hdata/test/p8-840-spira.dts +++ b/hdata/test/p8-840-spira.dts @@ -12,6 +12,8 @@ nest-frequency = <0x0 0x77359400>; vendor = "IBM"; ibm,io-base-loc-code = "U78C9.001.WZS0CWX-P1"; + ibm,io-base-part-number = "00E4241"; + ibm,io-base-serial-number = "YL30UF55N006"; ibm,vpd-lx-info = <0x0 0x31000401 0x300043>; model = "8286-41A"; system-id = "TU00163"; diff --git a/hdata/test/p81-811.spira.dts b/hdata/test/p81-811.spira.dts index ed7bd5deb..800ad800c 100644 --- a/hdata/test/p81-811.spira.dts +++ b/hdata/test/p81-811.spira.dts @@ -13,6 +13,8 @@ nest-frequency = <0x0 0x77359400>; vendor = "IBM"; ibm,io-base-loc-code = "U78CB.001.WZS00AL-P1"; + ibm,io-base-part-number = "00E3997"; + ibm,io-base-serial-number = "YL10UF42L013"; ibm,vpd-lx-info = <0x0 0x31000401 0x300042>; model = "8247-22L"; system-id = "1010C8A"; diff --git a/hw/phb4.c b/hw/phb4.c index 17a233f39..79bfdbf9a 100644 --- a/hw/phb4.c +++ b/hw/phb4.c @@ -5780,6 +5780,12 @@ static void phb4_create(struct dt_node *np) if (!p->phb.base_loc_code) PHBDBG(p, "Base location code not found !\n"); + /* Find base io backplane part/serial number from root node */ + p->phb.base_part_no = dt_prop_get_def(dt_root, + "ibm,io-base-part-number", NULL); + p->phb.base_serial_no = dt_prop_get_def(dt_root, + "ibm,io-base-serial-number", NULL); + /* * Grab CEC IO VPD load info from the root of the device-tree, * on P8 there's a single such VPD for the whole machine diff --git a/include/pci.h b/include/pci.h index eb23a6d9b..0b7a1f8a6 100644 --- a/include/pci.h +++ b/include/pci.h @@ -379,6 +379,8 @@ struct phb { /* Base location code used to generate the children one */ const char *base_loc_code; + const char *base_part_no; + const char *base_serial_no; /* Additional data the platform might need to attach */ void *platform_data; From patchwork Wed Oct 7 12:09:28 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mahesh J Salgaonkar X-Patchwork-Id: 1377981 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4C5tWN228Vz9sSG for ; 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Wed, 7 Oct 2020 12:09:29 GMT Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 7A730A4059; Wed, 7 Oct 2020 12:09:29 +0000 (GMT) Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id D51A4A4051; Wed, 7 Oct 2020 12:09:28 +0000 (GMT) Received: from [192.168.0.63] (unknown [9.199.48.78]) by d06av23.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 7 Oct 2020 12:09:28 +0000 (GMT) From: Mahesh Salgaonkar To: skiboot list Date: Wed, 07 Oct 2020 17:39:28 +0530 Message-ID: <160207256805.2097386.5051694589375511182.stgit@jupiter> In-Reply-To: <160207247879.2097386.9393389763183654717.stgit@jupiter> References: <160207247879.2097386.9393389763183654717.stgit@jupiter> User-Agent: StGit/0.21 MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235, 18.0.687 definitions=2020-10-07_08:2020-10-06, 2020-10-07 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 bulkscore=0 mlxlogscore=999 impostorscore=0 phishscore=0 malwarescore=0 priorityscore=1501 lowpriorityscore=0 spamscore=0 mlxscore=0 adultscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2006250000 definitions=main-2010070079 Subject: [Skiboot] [PATCH v2 06/10] opal/eeh: Send an error callout on EEH error. X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Vasant Hegde Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" On EEH error send out an error log (eSEL) with hardware callout. To avoid generating multiple events for same error, use a bit flag in generic PHB structure. Whenever an EEH freeze/fence is detected, a SEND error log bit is set. The error log includes FRU details and PHB diag data. This patch addresses full PHB fences events. Subsequent patches will address single PE and Multi-PE freeze/fences. As part of FRU details it will include slot location of RootPort, io base location code and processor chip fru details as below: | Callout Section | | | | Additional Sections : Disabled | | Callout Count : 3 | | | | Normal Hardware FRU | | Priority : Medium Priority | | Location Code : U78D2.001.RCH0060-P1-C2 | | | | Normal Hardware FRU | | Priority : Medium Priority | | Location Code : U78D2.001.RCH0060-P1 | | Part Number : 01EK968 | | Serial Number : Y230UF6C103M | | | | Normal Hardware FRU | | Priority : Medium Priority | | Location Code : U78D2.001.RCH0060-P1-C48 | | Part Number : 02CY253 | | Serial Number : YA1934460542 | | | Signed-off-by: Mahesh Salgaonkar --- Change in v2: - Introduce new elog type OPAL_RC_PCI_PHB_FREEZE. --- core/pci-opal.c | 70 ++++++++++++++++++++++++++++++++++++++++++++++++++++ hw/phb3.c | 3 ++ hw/phb4.c | 4 +++ include/errorlog.h | 2 + include/pci.h | 3 ++ 5 files changed, 82 insertions(+) diff --git a/core/pci-opal.c b/core/pci-opal.c index aa375c6aa..b0cb50069 100644 --- a/core/pci-opal.c +++ b/core/pci-opal.c @@ -13,6 +13,12 @@ #include #include #include +#include +#include + +DEFINE_LOG_ENTRY(OPAL_RC_PCI_PHB_FREEZE, OPAL_INPUT_OUTPUT_ERR_EVT, + OPAL_PCI, OPAL_IO_DEVICES, OPAL_UNRECOVERABLE_ERR_GENERAL, + OPAL_NA); #define OPAL_PCICFG_ACCESS_READ(op, cb, type) \ static int64_t opal_pci_config_##op(uint64_t phb_id, \ @@ -58,6 +64,66 @@ OPAL_PCICFG_ACCESS_WRITE(write_byte, write8, uint8_t) OPAL_PCICFG_ACCESS_WRITE(write_half_word, write16, uint16_t) OPAL_PCICFG_ACCESS_WRITE(write_word, write32, uint32_t) +/* Generate and send an error log/eSEL */ +static void send_eeh_serviceable_event(struct phb *phb, struct errorlog *buf, + void *diag_buffer) +{ + const char *loc, *part, *serial; + uint32_t chip_id, len; + struct OpalIoPhbErrorCommon *common; + + log_mark_serviceable(buf); + + /* Add FRU callout for PHB base (backplane) */ + loc = phb->base_loc_code; + part = phb->base_part_no; + serial = phb->base_serial_no; + log_add_callout_section(buf, loc, part, serial); + + /* Add FRU callout of associated chip id */ + chip_id = dt_get_chip_id(phb->dt_node); + loc = chip_loc_code(chip_id); + part = chip_part_number(chip_id); + serial = chip_serial_number(chip_id); + log_add_callout_section(buf, loc, part, serial); + + if (!diag_buffer) + goto skip_to_commit; + + /* Insert the phb diag data. */ + common = diag_buffer; + len = be32_to_cpu(common->len); + + log_add_section(buf, OPAL_ELOG_SEC_DIAG); + log_append_data(buf, diag_buffer, len); + +skip_to_commit: + log_commit(buf); +} + +static void send_phb_freeze_event(struct phb *phb, void *diag_buffer) +{ + struct errorlog *buf; + struct pci_device *pd; + const char *loc = NULL; + + buf = opal_elog_create(&e_info(OPAL_RC_PCI_PHB_FREEZE), 0); + if (!buf) { + prerror("Unable to send EEH error log (eSEL)\n"); + return; + } + + log_append_msg(buf, "PHB#%x Freeze/Fence detected!\n", phb->opal_id); + + /* Add slot location info of RootPort */ + pd = list_entry(phb->devices.n.next, struct pci_device, link); + loc = dt_prop_get_def(pd->dn, "ibm,slot-location-code", NULL); + log_add_callout_section(buf, loc, NULL, NULL); + + send_eeh_serviceable_event(phb, buf, diag_buffer); + phb->flags &= ~PCI_EEH_ERR_LOG_SEND; +} + static int64_t opal_pci_config_read_half_word_be(uint64_t phb_id, uint64_t bus_dev_func, uint64_t offset, @@ -1000,6 +1066,10 @@ static int64_t opal_pci_get_phb_diag_data2(uint64_t phb_id, return OPAL_UNSUPPORTED; phb_lock(phb); rc = phb->ops->get_diag_data2(phb, diag_buffer, diag_buffer_len); + + /* Send an error log if required */ + if (phb->flags & PCI_EEH_ERR_LOG_SEND) + send_phb_freeze_event(phb, diag_buffer); phb_unlock(phb); return rc; diff --git a/hw/phb3.c b/hw/phb3.c index 8af6b6164..5465b62ae 100644 --- a/hw/phb3.c +++ b/hw/phb3.c @@ -68,6 +68,9 @@ static bool phb3_fenced(struct phb3 *p) if (nfir & PPC_BIT(16)) { p->flags |= PHB3_AIB_FENCED; + /* Mark flag to send an error log */ + p->phb.flags |= PCI_EEH_ERR_LOG_SEND; + phb3_eeh_dump_regs(p, NULL); return true; } diff --git a/hw/phb4.c b/hw/phb4.c index 79bfdbf9a..cd50361fc 100644 --- a/hw/phb4.c +++ b/hw/phb4.c @@ -2554,6 +2554,9 @@ static bool phb4_fenced(struct phb4 *p) /* Mark ourselves fenced */ p->flags |= PHB4_AIB_FENCED; + /* Mark flag to send an error log */ + p->phb.flags |= PCI_EEH_ERR_LOG_SEND; + PHBERR(p, "PHB Freeze/Fence detected !\n"); phb4_dump_pec_err_regs(p); @@ -3448,6 +3451,7 @@ static int64_t phb4_creset(struct pci_slot *slot) p->flags &= ~PHB4_AIB_FENCED; p->flags &= ~PHB4_CAPP_RECOVERY; p->flags &= ~PHB4_CFG_USE_ASB; + phb4_init_hw(p); pci_slot_set_state(slot, PHB4_SLOT_CRESET_FRESET); diff --git a/include/errorlog.h b/include/errorlog.h index a9c3250e8..9bd200903 100644 --- a/include/errorlog.h +++ b/include/errorlog.h @@ -287,6 +287,7 @@ enum opal_reasoncode { OPAL_RC_PCI_ADD_SLOT = OPAL_SRC_COMPONENT_PCI | 0x11, OPAL_RC_PCI_SCAN = OPAL_SRC_COMPONENT_PCI | 0x12, OPAL_RC_PCI_RESET_PHB = OPAL_SRC_COMPONENT_PCI | 0x10, + OPAL_RC_PCI_PHB_FREEZE = OPAL_SRC_COMPONENT_PCI | 0x13, /* ATTN */ OPAL_RC_ATTN = OPAL_SRC_COMPONENT_ATTN | 0x10, /* MEM_ERR */ @@ -341,6 +342,7 @@ enum opal_reasoncode { }; #define OPAL_ELOG_SEC_DESC 0x44455343 +#define OPAL_ELOG_SEC_DIAG 0x44494147 /* For EEH diag data */ #define DEFINE_LOG_ENTRY(reason, type, id, subsys, \ severity, subtype) static struct opal_err_info err_##reason = \ diff --git a/include/pci.h b/include/pci.h index 0b7a1f8a6..b2a9af3e8 100644 --- a/include/pci.h +++ b/include/pci.h @@ -384,6 +384,9 @@ struct phb { /* Additional data the platform might need to attach */ void *platform_data; + + uint32_t flags; +#define PCI_EEH_ERR_LOG_SEND 0x1 }; static inline void phb_lock(struct phb *phb) From patchwork Wed Oct 7 12:09:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mahesh J Salgaonkar X-Patchwork-Id: 1377982 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4C5tX073DNz9sTD for ; Wed, 7 Oct 2020 23:13:04 +1100 (AEDT) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=linux.ibm.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256 header.s=pp1 header.b=AuxmoZoR; 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Wed, 7 Oct 2020 12:09:36 GMT Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 1E97AA4051; Wed, 7 Oct 2020 12:09:36 +0000 (GMT) Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 7913DA404D; Wed, 7 Oct 2020 12:09:35 +0000 (GMT) Received: from [192.168.0.63] (unknown [9.199.48.78]) by d06av23.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 7 Oct 2020 12:09:35 +0000 (GMT) From: Mahesh Salgaonkar To: skiboot list Date: Wed, 07 Oct 2020 17:39:34 +0530 Message-ID: <160207257468.2097386.7843577456831385111.stgit@jupiter> In-Reply-To: <160207247879.2097386.9393389763183654717.stgit@jupiter> References: <160207247879.2097386.9393389763183654717.stgit@jupiter> User-Agent: StGit/0.21 MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235, 18.0.687 definitions=2020-10-07_08:2020-10-06, 2020-10-07 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 lowpriorityscore=0 suspectscore=0 bulkscore=0 phishscore=0 spamscore=0 impostorscore=0 adultscore=0 mlxscore=0 mlxlogscore=999 clxscore=1015 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2006250000 definitions=main-2010070083 Subject: [Skiboot] [PATCH v2 07/10] opal/eeh: Send an error callout for EEH errors on PEs. X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Vasant Hegde Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Send error log events for single PE and Multi-PE freeze/fences. Generate error log once per PE error. This patch adds a hook in freeze_status/next_error opal call to capture single/Multi PE errors and send errorlog per affected PE. Add a bimap for maximum supported PE number and use it to report errorlog once per PE. Signed-off-by: Mahesh Salgaonkar --- core/pci-opal.c | 28 ++++++++++++++++++++++++++++ core/pci.c | 11 +++++++++++ include/pci.h | 4 ++++ 3 files changed, 43 insertions(+) diff --git a/core/pci-opal.c b/core/pci-opal.c index b0cb50069..333682a0b 100644 --- a/core/pci-opal.c +++ b/core/pci-opal.c @@ -124,6 +124,26 @@ static void send_phb_freeze_event(struct phb *phb, void *diag_buffer) phb->flags &= ~PCI_EEH_ERR_LOG_SEND; } +static void send_phb_pe_freeze_event(struct phb *phb, uint64_t pe_number) +{ + struct errorlog *buf; + + buf = opal_elog_create(&e_info(OPAL_RC_PCI_PHB_FREEZE), 0); + if (!buf) { + prerror("Unable to send EEH error log (eSEL)\n"); + return; + } + + log_append_msg(buf, "PHB#%x PE#%lld Freeze/Fence detected!\n", + phb->opal_id, pe_number); + + /* TODO: Get PHB status data */ + /* TODO: Add location info of slot with forzen PEs */ + + send_eeh_serviceable_event(phb, buf, NULL); + bitmap_set_bit(*phb->pe_freeze_reported, pe_number); +} + static int64_t opal_pci_config_read_half_word_be(uint64_t phb_id, uint64_t bus_dev_func, uint64_t offset, @@ -206,6 +226,10 @@ static int64_t opal_pci_eeh_freeze_status(uint64_t phb_id, uint64_t pe_number, rc = phb->ops->eeh_freeze_status(phb, pe_number, freeze_state, &pci_error_type, NULL); *__pci_error_type = cpu_to_be16(pci_error_type); + + if (*freeze_state && + !bitmap_tst_bit(*phb->pe_freeze_reported, pe_number)) + send_phb_pe_freeze_event(phb, pe_number); phb_unlock(phb); return rc; @@ -1098,6 +1122,10 @@ static int64_t opal_pci_next_error(uint64_t phb_id, __be64 *__first_frozen_pe, opal_pci_eeh_clear_evt(phb_id); rc = phb->ops->next_error(phb, &first_frozen_pe, &pci_error_type, &severity); + if ((first_frozen_pe != (uint64_t)-1) && + !bitmap_tst_bit(*phb->pe_freeze_reported, first_frozen_pe)) + send_phb_pe_freeze_event(phb, first_frozen_pe); + phb_unlock(phb); *__first_frozen_pe = cpu_to_be64(first_frozen_pe); diff --git a/core/pci.c b/core/pci.c index e195ecbf4..ba3f294ae 100644 --- a/core/pci.c +++ b/core/pci.c @@ -1054,6 +1054,17 @@ int64_t pci_register_phb(struct phb *phb, int opal_id) phb->filter_map = zalloc(BITMAP_BYTES(0x10000)); assert(phb->filter_map); + /* + * Allocate a bitmap to track PE errors that are already reported. + * + * TODO: PHB registration takes place way before it queries the + * capabilities hence phb4->max_num_pes is not known yet. Hence use 512 + * as maximum suppored PEs while allcating bitmap. Need to find a way + * to detect it at registration time. + */ + phb->pe_freeze_reported = zalloc(BITMAP_BYTES(MAX_NUM_PES)); + assert(phb->pe_freeze_reported); + return OPAL_SUCCESS; } diff --git a/include/pci.h b/include/pci.h index b2a9af3e8..d8f712e72 100644 --- a/include/pci.h +++ b/include/pci.h @@ -31,6 +31,9 @@ PCI_BUS_NUM(_bdfn), \ PCI_DEV(_bdfn), PCI_FUNC(_bdfn), ## a) +/* Maximum number of supported PEs */ +#define MAX_NUM_PES 512 + struct pci_device; struct pci_cfg_reg_filter; @@ -373,6 +376,7 @@ struct phb { struct pci_lsi_state lstate; uint32_t mps; bitmap_t *filter_map; + bitmap_t *pe_freeze_reported; /* PCI-X only slot info, for PCI-E this is in the RC bridge */ struct pci_slot *slot; From patchwork Wed Oct 7 12:09:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mahesh J Salgaonkar X-Patchwork-Id: 1377983 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4C5tXS3Ntyz9sTD for ; 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Wed, 7 Oct 2020 12:09:42 GMT Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id B51F64C05E; Wed, 7 Oct 2020 12:09:42 +0000 (GMT) Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 1CF544C040; Wed, 7 Oct 2020 12:09:42 +0000 (GMT) Received: from [192.168.0.63] (unknown [9.199.48.78]) by d06av22.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 7 Oct 2020 12:09:41 +0000 (GMT) From: Mahesh Salgaonkar To: skiboot list Date: Wed, 07 Oct 2020 17:39:41 +0530 Message-ID: <160207258130.2097386.7392819145419047545.stgit@jupiter> In-Reply-To: <160207247879.2097386.9393389763183654717.stgit@jupiter> References: <160207247879.2097386.9393389763183654717.stgit@jupiter> User-Agent: StGit/0.21 MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235, 18.0.687 definitions=2020-10-07_08:2020-10-06, 2020-10-07 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 lowpriorityscore=0 suspectscore=2 bulkscore=0 phishscore=0 spamscore=0 impostorscore=0 adultscore=0 mlxscore=0 mlxlogscore=999 clxscore=1015 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2006250000 definitions=main-2010070083 Subject: [Skiboot] [PATCH v2 08/10] opal/eeh: Add PHB diag data in error log for PE errors. X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Vasant Hegde Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Gather PHB status (diag data) for corresponding frozen PE and add it to errorlog. Since we qeury the PHB status during freeze_status/next_error opal call, we can't use get_diag_data2() which clears the errors. Instead introduce a new phb_ops which will collect only PHB status required to add it in errorlog. This will make sure linux also gets proper diag data when it calls get_diag_data2(). Signed-off-by: Mahesh Salgaonkar --- core/pci-opal.c | 21 +++++++++++++++++++-- hw/phb3.c | 25 +++++++++++++++++++++---- hw/phb4.c | 24 ++++++++++++++++++++---- include/pci.h | 2 ++ 4 files changed, 62 insertions(+), 10 deletions(-) diff --git a/core/pci-opal.c b/core/pci-opal.c index 333682a0b..34de05ddf 100644 --- a/core/pci-opal.c +++ b/core/pci-opal.c @@ -127,6 +127,9 @@ static void send_phb_freeze_event(struct phb *phb, void *diag_buffer) static void send_phb_pe_freeze_event(struct phb *phb, uint64_t pe_number) { struct errorlog *buf; + void *diag_buffer; + uint32_t len; + int rc; buf = opal_elog_create(&e_info(OPAL_RC_PCI_PHB_FREEZE), 0); if (!buf) { @@ -137,11 +140,25 @@ static void send_phb_pe_freeze_event(struct phb *phb, uint64_t pe_number) log_append_msg(buf, "PHB#%x PE#%lld Freeze/Fence detected!\n", phb->opal_id, pe_number); - /* TODO: Get PHB status data */ + /* Get PHB status data */ + len = dt_prop_get_u32(phb->dt_node, "ibm,phb-diag-data-size"); + diag_buffer = zalloc(len); + if (diag_buffer) { + rc = phb->ops->get_phb_status(phb, diag_buffer, len); + if (rc != OPAL_SUCCESS) { + prerror("Failed to gather phb diag data\n"); + free(diag_buffer); + diag_buffer = NULL; + } + } else + prerror("Failed to allocate size for phb diag data\n"); + /* TODO: Add location info of slot with forzen PEs */ - send_eeh_serviceable_event(phb, buf, NULL); + send_eeh_serviceable_event(phb, buf, diag_buffer); bitmap_set_bit(*phb->pe_freeze_reported, pe_number); + if (diag_buffer) + free(diag_buffer); } static int64_t opal_pci_config_read_half_word_be(uint64_t phb_id, diff --git a/hw/phb3.c b/hw/phb3.c index 5465b62ae..1bd753bae 100644 --- a/hw/phb3.c +++ b/hw/phb3.c @@ -3457,13 +3457,13 @@ static int64_t phb3_err_inject(struct phb *phb, uint64_t pe_number, return handler(p, pe_number, addr, mask, is_write); } -static int64_t phb3_get_diag_data(struct phb *phb, +/* Get phb diag data only. Do not clear the phb pending errors. */ +static int64_t phb3_get_phb_status(struct phb *phb, void *diag_buffer, uint64_t diag_buffer_len) { struct phb3 *p = phb_to_phb3(phb); struct OpalIoPhb3ErrorData *data = diag_buffer; - bool fenced; if (diag_buffer_len < sizeof(struct OpalIoPhb3ErrorData)) return OPAL_PARAMETER; @@ -3474,10 +3474,26 @@ static int64_t phb3_get_diag_data(struct phb *phb, * Dummy check for fence so that phb3_read_phb_status knows * whether to use ASB or AIB */ - fenced = phb3_fenced(p); + phb3_fenced(p); phb3_read_phb_status(p, data); - if (!fenced) + return OPAL_SUCCESS; +} + +/* Get phb diag data and clear the phb pending errors. */ +static int64_t phb3_get_diag_data(struct phb *phb, + void *diag_buffer, + uint64_t diag_buffer_len) +{ + int64_t rc; + struct phb3 *p = phb_to_phb3(phb); + struct OpalIoPhb3ErrorData *data = diag_buffer; + + rc = phb3_get_phb_status(phb, diag_buffer, diag_buffer_len); + if (!rc) + return rc; + + if (!(p->flags & PHB3_AIB_FENCED)) phb3_eeh_dump_regs(p, data); /* @@ -3873,6 +3889,7 @@ static const struct phb_ops phb3_ops = { .next_error = phb3_eeh_next_error, .err_inject = phb3_err_inject, .get_diag_data2 = phb3_get_diag_data, + .get_phb_status = phb3_get_phb_status, .set_capi_mode = phb3_set_capi_mode, .set_capp_recovery = phb3_set_capp_recovery, }; diff --git a/hw/phb4.c b/hw/phb4.c index cd50361fc..a088a640e 100644 --- a/hw/phb4.c +++ b/hw/phb4.c @@ -4091,11 +4091,11 @@ static int64_t phb4_err_inject(struct phb *phb, uint64_t pe_number, return handler(p, pe_number, addr, mask, is_write); } -static int64_t phb4_get_diag_data(struct phb *phb, +/* Get phb diag data only. Do not clear the phb pending errors. */ +static int64_t phb4_get_phb_status(struct phb *phb, void *diag_buffer, uint64_t diag_buffer_len) { - bool fenced; struct phb4 *p = phb_to_phb4(phb); struct OpalIoPhb4ErrorData *data = diag_buffer; @@ -4108,10 +4108,25 @@ static int64_t phb4_get_diag_data(struct phb *phb, * Dummy check for fence so that phb4_read_phb_status knows * whether to use ASB or AIB */ - fenced = phb4_fenced(p); + phb4_fenced(p); phb4_read_phb_status(p, data); - if (!fenced) + return OPAL_SUCCESS; +} + +/* Get phb diag data and clear the phb pending errors. */ +static int64_t phb4_get_diag_data(struct phb *phb, + void *diag_buffer, + uint64_t diag_buffer_len) +{ + int64_t rc; + struct phb4 *p = phb_to_phb4(phb); + + rc = phb4_get_phb_status(phb, diag_buffer, diag_buffer_len); + if (!rc) + return rc; + + if (!(p->flags & PHB4_AIB_FENCED)) phb4_eeh_dump_regs(p); /* @@ -4938,6 +4953,7 @@ static const struct phb_ops phb4_ops = { .next_error = phb4_eeh_next_error, .err_inject = phb4_err_inject, .get_diag_data2 = phb4_get_diag_data, + .get_phb_status = phb4_get_phb_status, .tce_kill = phb4_tce_kill, .set_capi_mode = phb4_set_capi_mode, .set_p2p = phb4_set_p2p, diff --git a/include/pci.h b/include/pci.h index d8f712e72..8da57a954 100644 --- a/include/pci.h +++ b/include/pci.h @@ -254,6 +254,8 @@ struct phb_ops { uint64_t mask); int64_t (*get_diag_data2)(struct phb *phb, void *diag_buffer, uint64_t diag_buffer_len); + int64_t (*get_phb_status)(struct phb *phb, void *diag_buffer, + uint64_t diag_buffer_len); int64_t (*next_error)(struct phb *phb, uint64_t *first_frozen_pe, uint16_t *pci_error_type, uint16_t *severity); From patchwork Wed Oct 7 12:09:47 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mahesh J Salgaonkar X-Patchwork-Id: 1377984 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4C5tY15c40z9sSG for ; Wed, 7 Oct 2020 23:13:57 +1100 (AEDT) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=linux.ibm.com Authentication-Results: ozlabs.org; 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Wed, 7 Oct 2020 12:09:49 GMT Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 4ECF042045; Wed, 7 Oct 2020 12:09:49 +0000 (GMT) Received: from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id AC52E42042; Wed, 7 Oct 2020 12:09:48 +0000 (GMT) Received: from [192.168.0.63] (unknown [9.199.48.78]) by d06av24.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 7 Oct 2020 12:09:48 +0000 (GMT) From: Mahesh Salgaonkar To: skiboot list Date: Wed, 07 Oct 2020 17:39:47 +0530 Message-ID: <160207258792.2097386.5488556517605058368.stgit@jupiter> In-Reply-To: <160207247879.2097386.9393389763183654717.stgit@jupiter> References: <160207247879.2097386.9393389763183654717.stgit@jupiter> User-Agent: StGit/0.21 MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235, 18.0.687 definitions=2020-10-07_08:2020-10-06, 2020-10-07 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 clxscore=1015 impostorscore=0 mlxscore=0 mlxlogscore=999 adultscore=0 lowpriorityscore=0 priorityscore=1501 bulkscore=0 spamscore=0 malwarescore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2006250000 definitions=main-2010070079 Subject: [Skiboot] [PATCH v2 09/10] opal/eeh: Add slot location info for frozen PEs. X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Vasant Hegde Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Locate and add slot location information (FRU details) for corresponding frozen PE number in error log. Signed-off-by: Mahesh Salgaonkar --- core/pci-opal.c | 45 ++++++++++++++++++++++++++++++++++++++++++++- hw/phb3.c | 8 ++++++++ hw/phb4.c | 7 +++++++ include/pci.h | 1 + 4 files changed, 60 insertions(+), 1 deletion(-) diff --git a/core/pci-opal.c b/core/pci-opal.c index 34de05ddf..cf0a9ee4b 100644 --- a/core/pci-opal.c +++ b/core/pci-opal.c @@ -124,6 +124,48 @@ static void send_phb_freeze_event(struct phb *phb, void *diag_buffer) phb->flags &= ~PCI_EEH_ERR_LOG_SEND; } +/* Find the first pci device which macthes pe nummber */ +static struct pci_device *pe_to_pci_device(struct list_head *list, + uint64_t pe_num) +{ + struct pci_device *pd, *pd1; + + /* Return the first device that matches pe number */ + list_for_each(list, pd, link) { + if (pe_num == pd->phb->ops->get_pe_number(pd->phb, pd->bdfn)) + return pd; + + pd1 = pe_to_pci_device(&pd->children, pe_num); + if (pd1) + return pd1; + } + return NULL; +} + +static void phb_add_pe_slot_loc_info(struct phb *phb, uint64_t pe_number, + struct errorlog *buf) +{ + struct pci_device *pd; + const char *loc = NULL; + + pd = pe_to_pci_device(&phb->devices, pe_number); + if (!pd) + return; + + /* Get the slot location code from parent PCI bridge device */ + if (pd->primary_bus != 0) + pd = pd->parent; + + /* Keep seraching parent node until we find ibm,slot-location-code */ + while (pd) { + loc = dt_prop_get_def(pd->dn, "ibm,slot-location-code", NULL); + if (loc) + break; + pd = pd->parent; + } + log_add_callout_section(buf, loc, NULL, NULL); +} + static void send_phb_pe_freeze_event(struct phb *phb, uint64_t pe_number) { struct errorlog *buf; @@ -153,7 +195,8 @@ static void send_phb_pe_freeze_event(struct phb *phb, uint64_t pe_number) } else prerror("Failed to allocate size for phb diag data\n"); - /* TODO: Add location info of slot with forzen PEs */ + /* Add location info of slot with forzen PEs */ + phb_add_pe_slot_loc_info(phb, pe_number, buf); send_eeh_serviceable_event(phb, buf, diag_buffer); bitmap_set_bit(*phb->pe_freeze_reported, pe_number); diff --git a/hw/phb3.c b/hw/phb3.c index 1bd753bae..67930c6c5 100644 --- a/hw/phb3.c +++ b/hw/phb3.c @@ -344,6 +344,13 @@ static int64_t phb3_get_reserved_pe_number(struct phb *phb __unused) return PHB3_RESERVED_PE_NUM; } +static int64_t phb3_get_pe_number(struct phb *phb, uint16_t bdfn) +{ + struct phb3 *p = phb_to_phb3(phb); + + return be16_to_cpu(p->rte_cache[bdfn]); +} + static inline void phb3_enable_ecrc(struct phb *phb, bool enable) { struct phb3 *p = phb_to_phb3(phb); @@ -3867,6 +3874,7 @@ static const struct phb_ops phb3_ops = { .cfg_write16 = phb3_pcicfg_write16, .cfg_write32 = phb3_pcicfg_write32, .get_reserved_pe_number = phb3_get_reserved_pe_number, + .get_pe_number = phb3_get_pe_number, .device_init = phb3_device_init, .device_remove = phb3_device_remove, .ioda_reset = phb3_ioda_reset, diff --git a/hw/phb4.c b/hw/phb4.c index a088a640e..1d6dad20b 100644 --- a/hw/phb4.c +++ b/hw/phb4.c @@ -608,6 +608,12 @@ static int64_t phb4_get_reserved_pe_number(struct phb *phb) return PHB4_RESERVED_PE_NUM(p); } +static int64_t phb4_get_pe_number(struct phb *phb, uint16_t bdfn) +{ + struct phb4 *p = phb_to_phb4(phb); + + return be16_to_cpu(p->tbl_rtt[bdfn]); +} static void phb4_root_port_init(struct phb *phb, struct pci_device *dev, int ecap, int aercap) @@ -4930,6 +4936,7 @@ static const struct phb_ops phb4_ops = { .cfg_write16 = phb4_pcicfg_write16, .cfg_write32 = phb4_pcicfg_write32, .get_reserved_pe_number = phb4_get_reserved_pe_number, + .get_pe_number = phb4_get_pe_number, .device_init = phb4_device_init, .device_remove = NULL, .ioda_reset = phb4_ioda_reset, diff --git a/include/pci.h b/include/pci.h index 8da57a954..9f7b3089b 100644 --- a/include/pci.h +++ b/include/pci.h @@ -222,6 +222,7 @@ struct phb_ops { uint32_t offset, uint32_t data); int64_t (*get_reserved_pe_number)(struct phb *phb); + int64_t (*get_pe_number)(struct phb *phb, uint16_t bdfn); /* * Device init method is called after a device has been detected From patchwork Wed Oct 7 12:09:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mahesh J Salgaonkar X-Patchwork-Id: 1377985 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4C5tYZ1Z1rz9sTD for ; Wed, 7 Oct 2020 23:14:26 +1100 (AEDT) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=linux.ibm.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; 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Wed, 7 Oct 2020 12:09:56 GMT Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id DFCBBA4051; Wed, 7 Oct 2020 12:09:55 +0000 (GMT) Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 4783BA404D; Wed, 7 Oct 2020 12:09:55 +0000 (GMT) Received: from [192.168.0.63] (unknown [9.199.48.78]) by d06av23.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 7 Oct 2020 12:09:55 +0000 (GMT) From: Mahesh Salgaonkar To: skiboot list Date: Wed, 07 Oct 2020 17:39:54 +0530 Message-ID: <160207259450.2097386.8481830435250442056.stgit@jupiter> In-Reply-To: <160207247879.2097386.9393389763183654717.stgit@jupiter> References: <160207247879.2097386.9393389763183654717.stgit@jupiter> User-Agent: StGit/0.21 MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235, 18.0.687 definitions=2020-10-07_08:2020-10-06, 2020-10-07 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 clxscore=1015 lowpriorityscore=0 bulkscore=0 spamscore=0 mlxlogscore=999 suspectscore=2 phishscore=0 impostorscore=0 malwarescore=0 priorityscore=1501 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2006250000 definitions=main-2010070079 Subject: [Skiboot] [PATCH v2 10/10] run-pel: Add additional tests with FRU callout section. X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Vasant Hegde Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Signed-off-by: Mahesh Salgaonkar --- core/test/run-pel.c | 48 ++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/core/test/run-pel.c b/core/test/run-pel.c index 812c8996c..2d04592dc 100644 --- a/core/test/run-pel.c +++ b/core/test/run-pel.c @@ -58,6 +58,7 @@ int main(void) struct opal_err_info *opal_err_info = &err_TEST_ERROR; char *buffer; struct elog_user_data_section *tmp; + int i; dt_root = dt_new_root(""); dt_add_property_string(dt_root, "model", "run-pel-unittest"); @@ -113,6 +114,53 @@ int main(void) assert(size == create_pel_log(elog, pel_buf, size)); + /* Add single FRU callout with location code only. */ + i = elog->num_fru_callout++; + strcpy(elog->fru_callout[0].loc_code, "Hello World!"); + + size = pel_size(elog); + pel_buf = realloc(pel_buf, size); + assert(pel_buf); + + assert(size == create_pel_log(elog, pel_buf, size)); + + /* Add additional FRU callout with loc-code and part-no. */ + i = elog->num_fru_callout++; + strcpy(elog->fru_callout[i].loc_code, "Hello World2!"); + strcpy(elog->fru_callout[i].part_no, "PARTNO"); + + size = pel_size(elog); + pel_buf = realloc(pel_buf, size); + assert(pel_buf); + + assert(size == create_pel_log(elog, pel_buf, size)); + + /* Add additional FRU callout with loc-code, part-no and serial no. */ + i = elog->num_fru_callout++; + strcpy(elog->fru_callout[i].loc_code, "Hello World2!"); + strcpy(elog->fru_callout[i].part_no, "PARTNO"); + strcpy(elog->fru_callout[i].serial_no, "SERIALNO"); + + size = pel_size(elog); + pel_buf = realloc(pel_buf, size); + assert(pel_buf); + + assert(size == create_pel_log(elog, pel_buf, size)); + + /* Add maximum of 10 FRU callouts */ + for (i = elog->num_fru_callout; i < PEL_MAX_FRU_CALL_OUTS; i++) { + elog->num_fru_callout++; + strcpy(elog->fru_callout[i].loc_code, "Hello World2!"); + strcpy(elog->fru_callout[i].part_no, "PARTNO"); + strcpy(elog->fru_callout[i].serial_no, "SERIALNO"); + } + + size = pel_size(elog); + pel_buf = realloc(pel_buf, size); + assert(pel_buf); + + assert(size == create_pel_log(elog, pel_buf, size)); + free(pel_buf); free(elog);