From patchwork Sat Sep 26 08:07:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolin Chen X-Patchwork-Id: 1371716 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=MNClZS+5; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4Bz1jY6wyCz9sSJ for ; Sat, 26 Sep 2020 18:12:33 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729178AbgIZIMc (ORCPT ); Sat, 26 Sep 2020 04:12:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48758 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725208AbgIZIMa (ORCPT ); Sat, 26 Sep 2020 04:12:30 -0400 Received: from mail-pj1-x1041.google.com (mail-pj1-x1041.google.com [IPv6:2607:f8b0:4864:20::1041]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 66F43C0613CE; Sat, 26 Sep 2020 01:12:30 -0700 (PDT) Received: by mail-pj1-x1041.google.com with SMTP id b17so674307pji.1; Sat, 26 Sep 2020 01:12:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=VVVAr+184BtvhzMD2Murp/xUE/D9g6IJfB0eGMqFFJo=; b=MNClZS+5VS7Fi2JhH3w96/QGLwQcMIqywqi1LZAlT7HAi2Ju30laqpwGxe+F7gf6yO KouvmZ12cKgduFowL2xaO6G61KDcj88T8oXykfBXIDrPkmhSfAroXYZUzTh/dQP1R8VQ c+92n7rD6XgF1rP6g+oSg+IS68DIF+2hg0CYO/rZdnoX8bknL/B5uIyU0C3YhrEhjyae 1urWNWsLcwBp1Xii9L7mTsjabjAYD/hGTPdTkdRsV/EQPwdAHoW290yIU9FYqRsykgoB LUt00uDR2vknXuRVarJEY4AfsgNMDG+ogE2pTqSya20ftzfQiRiOzVunh595DzBzSDLo J2eA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=VVVAr+184BtvhzMD2Murp/xUE/D9g6IJfB0eGMqFFJo=; b=qLGdkrAgulgxQFHmEfeBf3ZoOTbyPl4iq+moJoc6q9knsgnbe+of37ij4pE4Y+Wblg Fqq1dS/7G7UGxyd1IMhDfQ4ajVE2LzFp6b3FFzCNPe2gvbHKFj7u7SNbiUwUBdKzJnTC AM3y39EfBylpqlep/a9Uo39t21LT1whNrHkdNHKDhmcB/4B3cWHkVXOcVZshoL+a2HBl Qe9zHBkiiS97+1npwLu6A/pC6unMGSJ9Eg0wHe5k1JTGStU2peQr3Zpok6lC+AWU8N4w seQILT8vtppMhAKBAB1Q0qhr6jmyRnkEuAUj38P7OqOmTWM4Hv64JMITMfPs4kMiNLIk R1cw== X-Gm-Message-State: AOAM532l/7cXrt7ewniE5KxEI+zh2tF7Cr3LnYmaL4dkhKH6cVSUm52i sgW/7XIvgmqcZz+Bl+6LTt0= X-Google-Smtp-Source: ABdhPJzFEpRxK4TIMy7eeSxXQ5/Eg30XdZ30+RRKKAZ5PSoWLT+DA9tbqMm51WQggzz5mT65ofrDsQ== X-Received: by 2002:a17:902:7b93:b029:d2:172:7d9e with SMTP id w19-20020a1709027b93b02900d201727d9emr3074529pll.83.1601107949943; Sat, 26 Sep 2020 01:12:29 -0700 (PDT) Received: from Asurada-Nvidia.nvidia.com (thunderhill.nvidia.com. [216.228.112.22]) by smtp.gmail.com with ESMTPSA id i1sm4833497pfk.21.2020.09.26.01.12.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 26 Sep 2020 01:12:29 -0700 (PDT) From: Nicolin Chen To: thierry.reding@gmail.com, joro@8bytes.org, krzk@kernel.org Cc: vdumpa@nvidia.com, jonathanh@nvidia.com, linux-tegra@vger.kernel.org, iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/5] iommu/tegra-smmu: Unwrap tegra_smmu_group_get Date: Sat, 26 Sep 2020 01:07:15 -0700 Message-Id: <20200926080719.6822-2-nicoleotsuka@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200926080719.6822-1-nicoleotsuka@gmail.com> References: <20200926080719.6822-1-nicoleotsuka@gmail.com> Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org The tegra_smmu_group_get was added to group devices in different SWGROUPs and it'd return a NULL group pointer upon a mismatch at tegra_smmu_find_group(), so for most of clients/devices, it very likely would mismatch and need a fallback generic_device_group(). But now tegra_smmu_group_get handles devices in same SWGROUP too, which means that it would allocate a group for every new SWGROUP or would directly return an existing one upon matching a SWGROUP, i.e. any device will go through this function. So possibility of having a NULL group pointer in device_group() is upon failure of either devm_kzalloc() or iommu_group_alloc(). In either case, calling generic_device_group() no longer makes a sense. Especially for devm_kzalloc() failing case, it'd cause a problem if it fails at devm_kzalloc() yet succeeds at a fallback generic_device_group(), because it does not create a group->list for other devices to match. This patch simply unwraps the function to clean it up. Signed-off-by: Nicolin Chen --- drivers/iommu/tegra-smmu.c | 19 ++++--------------- 1 file changed, 4 insertions(+), 15 deletions(-) diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra-smmu.c index 0becdbfea306..6335285dc373 100644 --- a/drivers/iommu/tegra-smmu.c +++ b/drivers/iommu/tegra-smmu.c @@ -903,11 +903,13 @@ static void tegra_smmu_group_release(void *iommu_data) mutex_unlock(&smmu->lock); } -static struct iommu_group *tegra_smmu_group_get(struct tegra_smmu *smmu, - unsigned int swgroup) +static struct iommu_group *tegra_smmu_device_group(struct device *dev) { + struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev); + struct tegra_smmu *smmu = dev_iommu_priv_get(dev); const struct tegra_smmu_group_soc *soc; struct tegra_smmu_group *group; + int swgroup = fwspec->ids[0]; struct iommu_group *grp; /* Find group_soc associating with swgroup */ @@ -950,19 +952,6 @@ static struct iommu_group *tegra_smmu_group_get(struct tegra_smmu *smmu, return group->group; } -static struct iommu_group *tegra_smmu_device_group(struct device *dev) -{ - struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev); - struct tegra_smmu *smmu = dev_iommu_priv_get(dev); - struct iommu_group *group; - - group = tegra_smmu_group_get(smmu, fwspec->ids[0]); - if (!group) - group = generic_device_group(dev); - - return group; -} - static int tegra_smmu_of_xlate(struct device *dev, struct of_phandle_args *args) { From patchwork Sat Sep 26 08:07:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolin Chen X-Patchwork-Id: 1371715 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=hmkUGQOx; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4Bz1jY2txDz9sSG for ; Sat, 26 Sep 2020 18:12:33 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729123AbgIZIMc (ORCPT ); Sat, 26 Sep 2020 04:12:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48760 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729096AbgIZIMb (ORCPT ); Sat, 26 Sep 2020 04:12:31 -0400 Received: from mail-pj1-x1043.google.com (mail-pj1-x1043.google.com [IPv6:2607:f8b0:4864:20::1043]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 412E8C0613D3; Sat, 26 Sep 2020 01:12:31 -0700 (PDT) Received: by mail-pj1-x1043.google.com with SMTP id t7so676432pjd.3; Sat, 26 Sep 2020 01:12:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=cQy5r4UWby+Vec3bHtXW3n4G3fBT+msNMsjI9PpDyho=; b=hmkUGQOxgKIIyd8RLw/iYtrNnngZVsFSDi3UNm49yNZvc9/e5SaLtgUORdlPu/tUrW WPVYP1/4TVOB3PvNL4ogHylbdwdIOrd/b99aYyaU8j+G5J/m+8L4Vi2AECD1elfyRnIV W+1bnmZNKiiLDkw6XWqRy16clWzv64ECP1J11No6VVt6XHEjlWTt8ChdqgFfn94U6VHI AzkNPal30me6t9+ZI1I6G/8VltIivzMCd2k/W859yV82tLJJslA5prJ6oglFzgPVvNFG yoKE+ruxqH54BTOKR6ZZFBcxNVs53OWovo8wstDioYEKZTRf4Mso9ZujbHQiCBVwnV+j HXvg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=cQy5r4UWby+Vec3bHtXW3n4G3fBT+msNMsjI9PpDyho=; b=MgJl+mDaAT4kMQhMDZdihjYG0Nk8ZjbTRHz09+IaXkQ8HZF1Ra10OoWlW4EJKsMd2v /hmALmQbHACtwYRPftZLqQgJPfw5vQebIjNieADbIE5QnuHQym+oFaHfOKtzueUcHlx+ 5YciA06REztzfepu+mWDOuEGkGHrHPWh02Nr51oDuJoYLWxQCJ/SNeWqsIoGRhQlKHeb 4eAdezTHf1M56JzBlhKMg+s8vP/L4dAlygQ/93mYlZgaQpU3sAFMw8ufXjPlkF7DuM1c JnSDQPkh9hLidWjkAhL92khO9ZNq8FHptSKg0d5iuprIMxiTIiR0iaKVuHe6YihGfbex eGwQ== X-Gm-Message-State: AOAM533asN+zycCYqcPVcQUP7y3ShMDgGeTiJYeoCVjPTmzQX+UJSjTA tW3+H/47w79GDngRvJHwH1c= X-Google-Smtp-Source: ABdhPJzPsRm9Rhazt7BinH4NVa9O18uaL9DvZqntqAKhVGdEb1LQI9AysWQn9R25hWM3cMtqpMTQVw== X-Received: by 2002:a17:902:b7c4:b029:d2:173:34ba with SMTP id v4-20020a170902b7c4b02900d2017334bamr3029562plz.57.1601107950759; Sat, 26 Sep 2020 01:12:30 -0700 (PDT) Received: from Asurada-Nvidia.nvidia.com (thunderhill.nvidia.com. [216.228.112.22]) by smtp.gmail.com with ESMTPSA id i1sm4833497pfk.21.2020.09.26.01.12.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 26 Sep 2020 01:12:30 -0700 (PDT) From: Nicolin Chen To: thierry.reding@gmail.com, joro@8bytes.org, krzk@kernel.org Cc: vdumpa@nvidia.com, jonathanh@nvidia.com, linux-tegra@vger.kernel.org, iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/5] iommu/tegra-smmu: Expend mutex protection range Date: Sat, 26 Sep 2020 01:07:16 -0700 Message-Id: <20200926080719.6822-3-nicoleotsuka@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200926080719.6822-1-nicoleotsuka@gmail.com> References: <20200926080719.6822-1-nicoleotsuka@gmail.com> Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org This is used to protect potential race condition at use_count. since probes of client drivers, calling attach_dev(), may run concurrently. Signed-off-by: Nicolin Chen --- drivers/iommu/tegra-smmu.c | 34 +++++++++++++++++++++------------- 1 file changed, 21 insertions(+), 13 deletions(-) diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra-smmu.c index 6335285dc373..b10e02073610 100644 --- a/drivers/iommu/tegra-smmu.c +++ b/drivers/iommu/tegra-smmu.c @@ -256,26 +256,19 @@ static int tegra_smmu_alloc_asid(struct tegra_smmu *smmu, unsigned int *idp) { unsigned long id; - mutex_lock(&smmu->lock); - id = find_first_zero_bit(smmu->asids, smmu->soc->num_asids); - if (id >= smmu->soc->num_asids) { - mutex_unlock(&smmu->lock); + if (id >= smmu->soc->num_asids) return -ENOSPC; - } set_bit(id, smmu->asids); *idp = id; - mutex_unlock(&smmu->lock); return 0; } static void tegra_smmu_free_asid(struct tegra_smmu *smmu, unsigned int id) { - mutex_lock(&smmu->lock); clear_bit(id, smmu->asids); - mutex_unlock(&smmu->lock); } static bool tegra_smmu_capable(enum iommu_cap cap) @@ -420,17 +413,21 @@ static int tegra_smmu_as_prepare(struct tegra_smmu *smmu, struct tegra_smmu_as *as) { u32 value; - int err; + int err = 0; + + mutex_lock(&smmu->lock); if (as->use_count > 0) { as->use_count++; - return 0; + goto err_unlock; } as->pd_dma = dma_map_page(smmu->dev, as->pd, 0, SMMU_SIZE_PD, DMA_TO_DEVICE); - if (dma_mapping_error(smmu->dev, as->pd_dma)) - return -ENOMEM; + if (dma_mapping_error(smmu->dev, as->pd_dma)) { + err = -ENOMEM; + goto err_unlock; + } /* We can't handle 64-bit DMA addresses */ if (!smmu_dma_addr_valid(smmu, as->pd_dma)) { @@ -453,24 +450,35 @@ static int tegra_smmu_as_prepare(struct tegra_smmu *smmu, as->smmu = smmu; as->use_count++; + mutex_unlock(&smmu->lock); + return 0; err_unmap: dma_unmap_page(smmu->dev, as->pd_dma, SMMU_SIZE_PD, DMA_TO_DEVICE); +err_unlock: + mutex_unlock(&smmu->lock); + return err; } static void tegra_smmu_as_unprepare(struct tegra_smmu *smmu, struct tegra_smmu_as *as) { - if (--as->use_count > 0) + mutex_lock(&smmu->lock); + + if (--as->use_count > 0) { + mutex_unlock(&smmu->lock); return; + } tegra_smmu_free_asid(smmu, as->id); dma_unmap_page(smmu->dev, as->pd_dma, SMMU_SIZE_PD, DMA_TO_DEVICE); as->smmu = NULL; + + mutex_unlock(&smmu->lock); } static int tegra_smmu_attach_dev(struct iommu_domain *domain, From patchwork Sat Sep 26 08:07:17 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolin Chen X-Patchwork-Id: 1371719 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=FdQNx36G; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4Bz1jr6vpnz9sTN for ; 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[216.228.112.22]) by smtp.gmail.com with ESMTPSA id i1sm4833497pfk.21.2020.09.26.01.12.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 26 Sep 2020 01:12:31 -0700 (PDT) From: Nicolin Chen To: thierry.reding@gmail.com, joro@8bytes.org, krzk@kernel.org Cc: vdumpa@nvidia.com, jonathanh@nvidia.com, linux-tegra@vger.kernel.org, iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/5] iommu/tegra-smmu: Use iommu_fwspec in .probe_/.attach_device() Date: Sat, 26 Sep 2020 01:07:17 -0700 Message-Id: <20200926080719.6822-4-nicoleotsuka@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200926080719.6822-1-nicoleotsuka@gmail.com> References: <20200926080719.6822-1-nicoleotsuka@gmail.com> Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org The tegra_smmu_probe_device() function searches in DT for the iommu phandler to get "smmu" pointer. This works for most of SMMU clients that exist in the DTB. But a PCI device will not be added to iommu, since it doesn't have a DT node. Fortunately, for a client with a DT node, tegra_smmu_probe_device() calls tegra_smmu_of_xlate() via tegra_smmu_configure(), while for a PCI device, of_pci_iommu_init() in the IOMMU core calls .of_xlate() as well, even before running tegra_smmu_probe_device(). And in both cases, tegra_smmu_of_xlate() prepares a valid iommu_fwspec pointer that allows us to get the mc->smmu pointer via dev_get_drvdata() by calling driver_find_device_by_fwnode(). So this patch uses iommu_fwspec in .probe_device() and related code for a client that does not exist in the DTB, especially a PCI one. Signed-off-by: Nicolin Chen --- drivers/iommu/tegra-smmu.c | 89 +++++++++++++++++++++++--------------- drivers/memory/tegra/mc.c | 2 +- include/soc/tegra/mc.h | 2 + 3 files changed, 56 insertions(+), 37 deletions(-) diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra-smmu.c index b10e02073610..97a7185b4578 100644 --- a/drivers/iommu/tegra-smmu.c +++ b/drivers/iommu/tegra-smmu.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include @@ -61,6 +62,8 @@ struct tegra_smmu_as { u32 attr; }; +static const struct iommu_ops tegra_smmu_ops; + static struct tegra_smmu_as *to_smmu_as(struct iommu_domain *dom) { return container_of(dom, struct tegra_smmu_as, domain); @@ -484,60 +487,49 @@ static void tegra_smmu_as_unprepare(struct tegra_smmu *smmu, static int tegra_smmu_attach_dev(struct iommu_domain *domain, struct device *dev) { + struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev); struct tegra_smmu *smmu = dev_iommu_priv_get(dev); struct tegra_smmu_as *as = to_smmu_as(domain); - struct device_node *np = dev->of_node; - struct of_phandle_args args; - unsigned int index = 0; - int err = 0; - - while (!of_parse_phandle_with_args(np, "iommus", "#iommu-cells", index, - &args)) { - unsigned int swgroup = args.args[0]; - - if (args.np != smmu->dev->of_node) { - of_node_put(args.np); - continue; - } + int index, err = 0; - of_node_put(args.np); + if (!fwspec || fwspec->ops != &tegra_smmu_ops) + return -ENOENT; + for (index = 0; index < fwspec->num_ids; index++) { err = tegra_smmu_as_prepare(smmu, as); - if (err < 0) - return err; + if (err) + goto err_disable; - tegra_smmu_enable(smmu, swgroup, as->id); - index++; + tegra_smmu_enable(smmu, fwspec->ids[index], as->id); } if (index == 0) return -ENODEV; return 0; + +err_disable: + for (index--; index >= 0; index--) { + tegra_smmu_disable(smmu, fwspec->ids[index], as->id); + tegra_smmu_as_unprepare(smmu, as); + } + + return err; } static void tegra_smmu_detach_dev(struct iommu_domain *domain, struct device *dev) { + struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev); struct tegra_smmu_as *as = to_smmu_as(domain); - struct device_node *np = dev->of_node; struct tegra_smmu *smmu = as->smmu; - struct of_phandle_args args; unsigned int index = 0; - while (!of_parse_phandle_with_args(np, "iommus", "#iommu-cells", index, - &args)) { - unsigned int swgroup = args.args[0]; - - if (args.np != smmu->dev->of_node) { - of_node_put(args.np); - continue; - } - - of_node_put(args.np); + if (!fwspec || fwspec->ops != &tegra_smmu_ops) + return; - tegra_smmu_disable(smmu, swgroup, as->id); + for (index = 0; index < fwspec->num_ids; index++) { + tegra_smmu_disable(smmu, fwspec->ids[index], as->id); tegra_smmu_as_unprepare(smmu, as); - index++; } } @@ -845,10 +837,25 @@ static int tegra_smmu_configure(struct tegra_smmu *smmu, struct device *dev, return 0; } +static struct tegra_smmu *tegra_smmu_get_by_fwnode(struct fwnode_handle *fwnode) +{ + struct device *dev = driver_find_device_by_fwnode(&tegra_mc_driver.driver, fwnode); + struct tegra_mc *mc; + + if (!dev) + return NULL; + + put_device(dev); + mc = dev_get_drvdata(dev); + + return mc->smmu; +} + static struct iommu_device *tegra_smmu_probe_device(struct device *dev) { struct device_node *np = dev->of_node; struct tegra_smmu *smmu = NULL; + struct iommu_fwspec *fwspec; struct of_phandle_args args; unsigned int index = 0; int err; @@ -868,8 +875,6 @@ static struct iommu_device *tegra_smmu_probe_device(struct device *dev) * supported by the Linux kernel, so abort after the * first match. */ - dev_iommu_priv_set(dev, smmu); - break; } @@ -877,8 +882,20 @@ static struct iommu_device *tegra_smmu_probe_device(struct device *dev) index++; } - if (!smmu) - return ERR_PTR(-ENODEV); + /* Any device should be able to get smmu pointer using fwspec */ + if (!smmu) { + fwspec = dev_iommu_fwspec_get(dev); + if (!fwspec || fwspec->ops != &tegra_smmu_ops) + return ERR_PTR(-ENODEV); + + smmu = tegra_smmu_get_by_fwnode(fwspec->iommu_fwnode); + } + + /* NULL smmu pointer means that SMMU driver is not probed yet */ + if (unlikely(!smmu)) + return ERR_PTR(-EPROBE_DEFER); + + dev_iommu_priv_set(dev, smmu); return &smmu->iommu; } diff --git a/drivers/memory/tegra/mc.c b/drivers/memory/tegra/mc.c index ec8403557ed4..4e23fd8d8433 100644 --- a/drivers/memory/tegra/mc.c +++ b/drivers/memory/tegra/mc.c @@ -735,7 +735,7 @@ static const struct dev_pm_ops tegra_mc_pm_ops = { .resume = tegra_mc_resume, }; -static struct platform_driver tegra_mc_driver = { +struct platform_driver tegra_mc_driver = { .driver = { .name = "tegra-mc", .of_match_table = tegra_mc_of_match, diff --git a/include/soc/tegra/mc.h b/include/soc/tegra/mc.h index 1238e35653d1..49a4cf64c4b9 100644 --- a/include/soc/tegra/mc.h +++ b/include/soc/tegra/mc.h @@ -184,4 +184,6 @@ struct tegra_mc { int tegra_mc_write_emem_configuration(struct tegra_mc *mc, unsigned long rate); unsigned int tegra_mc_get_emem_device_count(struct tegra_mc *mc); +extern struct platform_driver tegra_mc_driver; + #endif /* __SOC_TEGRA_MC_H__ */ From patchwork Sat Sep 26 08:07:18 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolin Chen X-Patchwork-Id: 1371717 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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[216.228.112.22]) by smtp.gmail.com with ESMTPSA id i1sm4833497pfk.21.2020.09.26.01.12.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 26 Sep 2020 01:12:32 -0700 (PDT) From: Nicolin Chen To: thierry.reding@gmail.com, joro@8bytes.org, krzk@kernel.org Cc: vdumpa@nvidia.com, jonathanh@nvidia.com, linux-tegra@vger.kernel.org, iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org Subject: [PATCH 4/5] iommu/tegra-smmu: Add PCI support Date: Sat, 26 Sep 2020 01:07:18 -0700 Message-Id: <20200926080719.6822-5-nicoleotsuka@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200926080719.6822-1-nicoleotsuka@gmail.com> References: <20200926080719.6822-1-nicoleotsuka@gmail.com> Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org This patch simply adds support for PCI devices. Signed-off-by: Nicolin Chen --- drivers/iommu/tegra-smmu.c | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra-smmu.c index 97a7185b4578..9dbc5d7183cc 100644 --- a/drivers/iommu/tegra-smmu.c +++ b/drivers/iommu/tegra-smmu.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include @@ -935,6 +936,7 @@ static struct iommu_group *tegra_smmu_device_group(struct device *dev) const struct tegra_smmu_group_soc *soc; struct tegra_smmu_group *group; int swgroup = fwspec->ids[0]; + bool pci = dev_is_pci(dev); struct iommu_group *grp; /* Find group_soc associating with swgroup */ @@ -961,7 +963,7 @@ static struct iommu_group *tegra_smmu_device_group(struct device *dev) group->smmu = smmu; group->soc = soc; - group->group = iommu_group_alloc(); + group->group = pci ? pci_device_group(dev) : iommu_group_alloc(); if (IS_ERR(group->group)) { devm_kfree(smmu->dev, group); mutex_unlock(&smmu->lock); @@ -1180,6 +1182,19 @@ struct tegra_smmu *tegra_smmu_probe(struct device *dev, return ERR_PTR(err); } +#ifdef CONFIG_PCI + if (!iommu_present(&pci_bus_type)) { + pci_request_acs(); + err = bus_set_iommu(&pci_bus_type, &tegra_smmu_ops); + if (err < 0) { + bus_set_iommu(&platform_bus_type, NULL); + iommu_device_unregister(&smmu->iommu); + iommu_device_sysfs_remove(&smmu->iommu); + return ERR_PTR(err); + } + } +#endif + if (IS_ENABLED(CONFIG_DEBUG_FS)) tegra_smmu_debugfs_init(smmu); From patchwork Sat Sep 26 08:07:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicolin Chen X-Patchwork-Id: 1371718 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=E9gN1ml5; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4Bz1jp1SzHz9sTN for ; Sat, 26 Sep 2020 18:12:46 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726311AbgIZIMh (ORCPT ); Sat, 26 Sep 2020 04:12:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48772 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729263AbgIZIMe (ORCPT ); Sat, 26 Sep 2020 04:12:34 -0400 Received: from mail-pg1-x541.google.com (mail-pg1-x541.google.com [IPv6:2607:f8b0:4864:20::541]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DDB27C0613CE; Sat, 26 Sep 2020 01:12:33 -0700 (PDT) Received: by mail-pg1-x541.google.com with SMTP id 5so4370715pgf.5; Sat, 26 Sep 2020 01:12:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=hn15A+vsHfLhY3Qf2WKiES6GK2r9N1/EPLi1y9sGZ+o=; b=E9gN1ml5289yy634xD3SxLIOwpcQ28fm+5OJf0GUVpnRghCObspVzuiA4bxNrVSUIk A4PFZp75Q8+OOTW/RcXdduTpvYmbKz1GlgpApbx1wllz4sBoBna4b02v8bCYpjamsiEz rLpcovobdTgXmG4XIWKHOeNEsK56O1BoPBuuE4pmFkAFy8t/7F+5Elt6cbU7dHiZ5IRn tpPVKnHoHC4KdSrb725ADTki2VliPGQvom6u4sW4SxERnhc3t6rZ1TyH0+C+IPdfxyVO M0C1OQbZBBX2b4iImXCYmkiLGd49zuj5QHZMh4sKDs/q/96Uszso3HvKVD+d2WPjoCNP tgHw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=hn15A+vsHfLhY3Qf2WKiES6GK2r9N1/EPLi1y9sGZ+o=; b=OPvY4SAEc/BWEmQhmjmQQ/JYYs0wNc4bzzj3xM5WcnHN1flsrXO9WMWsf/QbB5WACf 8+eYMDXMngbk/dhEGRoFUCW1m8nG2xNW+WoSL0tMBqmFXblpFES/0lT3SBXh2C8NZTEC KD9IbziwDWcSu4gT7eyRlq44gqDnyNKbF7fIlqZnHJmUFpQIWwyesa5WROHq9T1nVO4M 37FUXzwE0vq/mvk/WglfFt7nShryBV9YBDyhKnex4kfLspMjOIQP7jjFoDhKvogTvzw5 1Ixkwy13ePQSQGLAvVKp5FVI1VMLjkNm2gBMTUi+FJuvIcoMtbynOGVtoY35ECpNqAe5 71mA== X-Gm-Message-State: AOAM531hA08byonEjQ1EB2D0fNn/9x7CNaFpJEyhm9PCdoa1OxQljyog Df6Np8mdG2295YNg4sB8X3tm6ay4DZE= X-Google-Smtp-Source: ABdhPJyH63/udFsunnlEF9CWjc0nbDNTUFXv6823ctOsZ47ZbwEKBQn1Iy/guE1oUd/7sUJUDxLhLw== X-Received: by 2002:a63:1604:: with SMTP id w4mr2057718pgl.148.1601107953334; Sat, 26 Sep 2020 01:12:33 -0700 (PDT) Received: from Asurada-Nvidia.nvidia.com (thunderhill.nvidia.com. [216.228.112.22]) by smtp.gmail.com with ESMTPSA id i1sm4833497pfk.21.2020.09.26.01.12.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 26 Sep 2020 01:12:32 -0700 (PDT) From: Nicolin Chen To: thierry.reding@gmail.com, joro@8bytes.org, krzk@kernel.org Cc: vdumpa@nvidia.com, jonathanh@nvidia.com, linux-tegra@vger.kernel.org, iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org Subject: [PATCH 5/5] iommu/tegra-smmu: Add pagetable mappings to debugfs Date: Sat, 26 Sep 2020 01:07:19 -0700 Message-Id: <20200926080719.6822-6-nicoleotsuka@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200926080719.6822-1-nicoleotsuka@gmail.com> References: <20200926080719.6822-1-nicoleotsuka@gmail.com> Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org This patch dumps all active mapping entries from pagetable to a debugfs directory named "mappings". Ataching an example: SWGROUP: hc ASID: 0 reg: 0x250 PTB_ASID: 0xe00bb880 as->pd_dma: 0xbb880000 { [1023] 0xf00bb882 (1) { PDE ATTR PHYS IOVA #1023 0x5 0x159f5d000 0xfffff000 } } Total PDE count: 1 Total PTE count: 1 Signed-off-by: Nicolin Chen --- drivers/iommu/tegra-smmu.c | 130 +++++++++++++++++++++++++++++++++++-- 1 file changed, 125 insertions(+), 5 deletions(-) diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra-smmu.c index 9dbc5d7183cc..53160d1ca086 100644 --- a/drivers/iommu/tegra-smmu.c +++ b/drivers/iommu/tegra-smmu.c @@ -20,6 +20,11 @@ #include #include +struct tegra_smmu_group_debug { + const struct tegra_smmu_swgroup *group; + void *priv; +}; + struct tegra_smmu_group { struct list_head list; struct tegra_smmu *smmu; @@ -48,6 +53,8 @@ struct tegra_smmu { struct dentry *debugfs; struct iommu_device iommu; /* IOMMU Core code handle */ + + struct tegra_smmu_group_debug *group_debug; }; struct tegra_smmu_as { @@ -155,6 +162,9 @@ static inline u32 smmu_readl(struct tegra_smmu *smmu, unsigned long offset) #define SMMU_PDE_ATTR (SMMU_PDE_READABLE | SMMU_PDE_WRITABLE | \ SMMU_PDE_NONSECURE) +#define SMMU_PTE_ATTR (SMMU_PTE_READABLE | SMMU_PTE_WRITABLE | \ + SMMU_PTE_NONSECURE) +#define SMMU_PTE_ATTR_SHIFT (29) static unsigned int iova_pd_index(unsigned long iova) { @@ -337,7 +347,7 @@ static void tegra_smmu_domain_free(struct iommu_domain *domain) } static const struct tegra_smmu_swgroup * -tegra_smmu_find_swgroup(struct tegra_smmu *smmu, unsigned int swgroup) +tegra_smmu_find_swgroup(struct tegra_smmu *smmu, unsigned int swgroup, int *index) { const struct tegra_smmu_swgroup *group = NULL; unsigned int i; @@ -345,6 +355,8 @@ tegra_smmu_find_swgroup(struct tegra_smmu *smmu, unsigned int swgroup) for (i = 0; i < smmu->soc->num_swgroups; i++) { if (smmu->soc->swgroups[i].swgroup == swgroup) { group = &smmu->soc->swgroups[i]; + if (index) + *index = i; break; } } @@ -353,19 +365,22 @@ tegra_smmu_find_swgroup(struct tegra_smmu *smmu, unsigned int swgroup) } static void tegra_smmu_enable(struct tegra_smmu *smmu, unsigned int swgroup, - unsigned int asid) + struct tegra_smmu_as *as) { const struct tegra_smmu_swgroup *group; + unsigned int asid = as->id; unsigned int i; u32 value; - group = tegra_smmu_find_swgroup(smmu, swgroup); + group = tegra_smmu_find_swgroup(smmu, swgroup, &i); if (group) { value = smmu_readl(smmu, group->reg); value &= ~SMMU_ASID_MASK; value |= SMMU_ASID_VALUE(asid); value |= SMMU_ASID_ENABLE; smmu_writel(smmu, value, group->reg); + if (smmu->group_debug) + smmu->group_debug[i].priv = as; } else { pr_warn("%s group from swgroup %u not found\n", __func__, swgroup); @@ -392,13 +407,15 @@ static void tegra_smmu_disable(struct tegra_smmu *smmu, unsigned int swgroup, unsigned int i; u32 value; - group = tegra_smmu_find_swgroup(smmu, swgroup); + group = tegra_smmu_find_swgroup(smmu, swgroup, &i); if (group) { value = smmu_readl(smmu, group->reg); value &= ~SMMU_ASID_MASK; value |= SMMU_ASID_VALUE(asid); value &= ~SMMU_ASID_ENABLE; smmu_writel(smmu, value, group->reg); + if (smmu->group_debug) + smmu->group_debug[i].priv = NULL; } for (i = 0; i < smmu->soc->num_clients; i++) { @@ -501,7 +518,7 @@ static int tegra_smmu_attach_dev(struct iommu_domain *domain, if (err) goto err_disable; - tegra_smmu_enable(smmu, fwspec->ids[index], as->id); + tegra_smmu_enable(smmu, fwspec->ids[index], as); } if (index == 0) @@ -1078,8 +1095,96 @@ static int tegra_smmu_clients_show(struct seq_file *s, void *data) DEFINE_SHOW_ATTRIBUTE(tegra_smmu_clients); +static int tegra_smmu_mappings_show(struct seq_file *s, void *data) +{ + struct tegra_smmu_group_debug *group_debug = s->private; + const struct tegra_smmu_swgroup *group; + struct tegra_smmu_as *as; + struct tegra_smmu *smmu; + int pd_index, pt_index; + u64 pte_count = 0; + u32 pde_count = 0; + u32 val, ptb_reg; + u32 *pd; + + if (!group_debug || !group_debug->priv || !group_debug->group) + return 0; + + group = group_debug->group; + as = group_debug->priv; + smmu = as->smmu; + + val = smmu_readl(smmu, group->reg) & SMMU_ASID_ENABLE; + if (!val) + return 0; + + pd = page_address(as->pd); + if (!pd) + return 0; + + seq_printf(s, "\nSWGROUP: %s\nASID: %d\nreg: 0x%x\n", group->name, + as->id, group->reg); + + mutex_lock(&smmu->lock); + smmu_writel(smmu, as->id & 0x7f, SMMU_PTB_ASID); + ptb_reg = smmu_readl(smmu, SMMU_PTB_DATA); + mutex_unlock(&smmu->lock); + + seq_printf(s, "PTB_ASID: 0x%x\nas->pd_dma: 0x%llx\n", ptb_reg, as->pd_dma); + seq_puts(s, "{\n"); + + for (pd_index = 0; pd_index < SMMU_NUM_PDE; pd_index++) { + struct page *pt; + u32 *addr; + + if (!as->count[pd_index] || !pd[pd_index]) + continue; + + pde_count++; + pte_count += as->count[pd_index]; + seq_printf(s, "\t[%d] 0x%x (%d)\n", + pd_index, pd[pd_index], as->count[pd_index]); + pt = as->pts[pd_index]; + addr = page_address(pt); + + seq_puts(s, "\t{\n"); + seq_printf(s, "\t\t%-5s %-4s %12s %12s\n", "PDE", "ATTR", "PHYS", "IOVA"); + for (pt_index = 0; pt_index < SMMU_NUM_PTE; pt_index++) { + u64 iova; + + if (!addr[pt_index]) + continue; + + iova = ((dma_addr_t)pd_index & (SMMU_NUM_PDE - 1)) << SMMU_PDE_SHIFT; + iova |= ((dma_addr_t)pt_index & (SMMU_NUM_PTE - 1)) << SMMU_PTE_SHIFT; + + seq_printf(s, "\t\t#%-4d 0x%-4x 0x%-12llx 0x%-12llx\n", + pt_index, addr[pt_index] >> SMMU_PTE_ATTR_SHIFT, + SMMU_PFN_PHYS(addr[pt_index] & ~SMMU_PTE_ATTR), iova); + } + seq_puts(s, "\t}\n"); + } + seq_puts(s, "}\n"); + seq_printf(s, "Total PDE count: %d\n", pde_count); + seq_printf(s, "Total PTE count: %lld\n", pte_count); + + return 0; +} + +DEFINE_SHOW_ATTRIBUTE(tegra_smmu_mappings); + static void tegra_smmu_debugfs_init(struct tegra_smmu *smmu) { + const struct tegra_smmu_soc *soc = smmu->soc; + struct tegra_smmu_group_debug *group_debug; + struct device *dev = smmu->dev; + struct dentry *d; + int i; + + group_debug = devm_kzalloc(dev, sizeof(*group_debug) * soc->num_swgroups, GFP_KERNEL); + if (!group_debug) + return; + smmu->debugfs = debugfs_create_dir("smmu", NULL); if (!smmu->debugfs) return; @@ -1088,6 +1193,21 @@ static void tegra_smmu_debugfs_init(struct tegra_smmu *smmu) &tegra_smmu_swgroups_fops); debugfs_create_file("clients", S_IRUGO, smmu->debugfs, smmu, &tegra_smmu_clients_fops); + d = debugfs_create_dir("mappings", smmu->debugfs); + + for (i = 0; i < soc->num_swgroups; i++) { + const struct tegra_smmu_swgroup *group = &soc->swgroups[i]; + + if (!group->name) + continue; + + group_debug[i].group = group; + + debugfs_create_file(group->name, 0444, d, &group_debug[i], + &tegra_smmu_mappings_fops); + } + + smmu->group_debug = group_debug; } static void tegra_smmu_debugfs_exit(struct tegra_smmu *smmu)