From patchwork Tue Aug 25 12:34:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Sandiford X-Patchwork-Id: 1351062 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=arm.com Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4BbT2J1c2mz9sTX for ; Tue, 25 Aug 2020 22:34:14 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id F38F83851C11; Tue, 25 Aug 2020 12:34:11 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id 326FD3857C7D for ; Tue, 25 Aug 2020 12:34:09 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 326FD3857C7D Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=richard.sandiford@arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C969F1FB for ; Tue, 25 Aug 2020 05:34:08 -0700 (PDT) Received: from localhost (e121540-lin.manchester.arm.com [10.32.98.126]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 70DAE3F66B for ; Tue, 25 Aug 2020 05:34:08 -0700 (PDT) From: Richard Sandiford To: gcc-patches@gcc.gnu.org Mail-Followup-To: gcc-patches@gcc.gnu.org, richard.sandiford@arm.com Subject: [pushed] aarch64: Update the mangling of single SVE vectors and predicates Date: Tue, 25 Aug 2020 13:34:06 +0100 Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/26.3 (gnu/linux) MIME-Version: 1.0 X-Spam-Status: No, score=-12.6 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" GCC was implementing an old mangling scheme for single SVE vectors and predicates (based on the Advanced SIMD one). The final definition instead put them in the vendor built-in namespace via the "u" prefix. Tested on aarch64-linux-gnu, aarch64-elf and aarch64_be-elf. Pushed to trunk so far, will backport to GCC 10 soon. (Will also add a release note.) Richard gcc/ * config/aarch64/aarch64-sve-builtins.cc (DEF_SVE_TYPE): Add a leading "u" to each mangled name. gcc/testsuite/ * g++.target/aarch64/sve/acle/general-c++/mangle_1.C: Add a leading "u" to the mangling of each SVE vector and predicate type. * g++.target/aarch64/sve/acle/general-c++/mangle_2.C: Likewise. * g++.target/aarch64/sve/acle/general-c++/mangle_3.C: Likewise. * g++.target/aarch64/sve/acle/general-c++/mangle_5.C: Likewise. --- gcc/config/aarch64/aarch64-sve-builtins.cc | 2 +- .../aarch64/sve/acle/general-c++/mangle_1.C | 26 +++++++++---------- .../aarch64/sve/acle/general-c++/mangle_2.C | 26 +++++++++---------- .../aarch64/sve/acle/general-c++/mangle_3.C | 4 +-- .../aarch64/sve/acle/general-c++/mangle_5.C | 4 +-- 5 files changed, 31 insertions(+), 31 deletions(-) diff --git a/gcc/config/aarch64/aarch64-sve-builtins.cc b/gcc/config/aarch64/aarch64-sve-builtins.cc index c49fcebcd43..3150659bee9 100644 --- a/gcc/config/aarch64/aarch64-sve-builtins.cc +++ b/gcc/config/aarch64/aarch64-sve-builtins.cc @@ -101,7 +101,7 @@ struct registered_function_hasher : nofree_ptr_hash /* Information about each single-predicate or single-vector type. */ static CONSTEXPR const vector_type_info vector_types[] = { #define DEF_SVE_TYPE(ACLE_NAME, NCHARS, ABI_NAME, SCALAR_TYPE) \ - { #ACLE_NAME, #ABI_NAME, #NCHARS #ABI_NAME }, + { #ACLE_NAME, #ABI_NAME, "u" #NCHARS #ABI_NAME }, #include "aarch64-sve-builtins.def" }; diff --git a/gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/mangle_1.C b/gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/mangle_1.C index 1a171248585..36dab3c9b71 100644 --- a/gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/mangle_1.C +++ b/gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/mangle_1.C @@ -16,16 +16,16 @@ void f11(svfloat32_t) {} void f12(svfloat64_t) {} void f13(svbfloat16_t) {} -/* { dg-final { scan-assembler "_Z2f110__SVBool_t:" } } */ -/* { dg-final { scan-assembler "_Z2f210__SVInt8_t:" } } */ -/* { dg-final { scan-assembler "_Z2f311__SVInt16_t:" } } */ -/* { dg-final { scan-assembler "_Z2f411__SVInt32_t:" } } */ -/* { dg-final { scan-assembler "_Z2f511__SVInt64_t:" } } */ -/* { dg-final { scan-assembler "_Z2f611__SVUint8_t:" } } */ -/* { dg-final { scan-assembler "_Z2f712__SVUint16_t:" } } */ -/* { dg-final { scan-assembler "_Z2f812__SVUint32_t:" } } */ -/* { dg-final { scan-assembler "_Z2f912__SVUint64_t:" } } */ -/* { dg-final { scan-assembler "_Z3f1013__SVFloat16_t:" } } */ -/* { dg-final { scan-assembler "_Z3f1113__SVFloat32_t:" } } */ -/* { dg-final { scan-assembler "_Z3f1213__SVFloat64_t:" } } */ -/* { dg-final { scan-assembler "_Z3f1314__SVBfloat16_t:" } } */ +/* { dg-final { scan-assembler "_Z2f1u10__SVBool_t:" } } */ +/* { dg-final { scan-assembler "_Z2f2u10__SVInt8_t:" } } */ +/* { dg-final { scan-assembler "_Z2f3u11__SVInt16_t:" } } */ +/* { dg-final { scan-assembler "_Z2f4u11__SVInt32_t:" } } */ +/* { dg-final { scan-assembler "_Z2f5u11__SVInt64_t:" } } */ +/* { dg-final { scan-assembler "_Z2f6u11__SVUint8_t:" } } */ +/* { dg-final { scan-assembler "_Z2f7u12__SVUint16_t:" } } */ +/* { dg-final { scan-assembler "_Z2f8u12__SVUint32_t:" } } */ +/* { dg-final { scan-assembler "_Z2f9u12__SVUint64_t:" } } */ +/* { dg-final { scan-assembler "_Z3f10u13__SVFloat16_t:" } } */ +/* { dg-final { scan-assembler "_Z3f11u13__SVFloat32_t:" } } */ +/* { dg-final { scan-assembler "_Z3f12u13__SVFloat64_t:" } } */ +/* { dg-final { scan-assembler "_Z3f13u14__SVBfloat16_t:" } } */ diff --git a/gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/mangle_2.C b/gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/mangle_2.C index 6792b8a3133..ad4aaee291f 100644 --- a/gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/mangle_2.C +++ b/gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/mangle_2.C @@ -14,16 +14,16 @@ void f11(__SVFloat32_t) {} void f12(__SVFloat64_t) {} void f13(__SVBfloat16_t) {} -/* { dg-final { scan-assembler "_Z2f110__SVBool_t:" } } */ -/* { dg-final { scan-assembler "_Z2f210__SVInt8_t:" } } */ -/* { dg-final { scan-assembler "_Z2f311__SVInt16_t:" } } */ -/* { dg-final { scan-assembler "_Z2f411__SVInt32_t:" } } */ -/* { dg-final { scan-assembler "_Z2f511__SVInt64_t:" } } */ -/* { dg-final { scan-assembler "_Z2f611__SVUint8_t:" } } */ -/* { dg-final { scan-assembler "_Z2f712__SVUint16_t:" } } */ -/* { dg-final { scan-assembler "_Z2f812__SVUint32_t:" } } */ -/* { dg-final { scan-assembler "_Z2f912__SVUint64_t:" } } */ -/* { dg-final { scan-assembler "_Z3f1013__SVFloat16_t:" } } */ -/* { dg-final { scan-assembler "_Z3f1113__SVFloat32_t:" } } */ -/* { dg-final { scan-assembler "_Z3f1213__SVFloat64_t:" } } */ -/* { dg-final { scan-assembler "_Z3f1314__SVBfloat16_t:" } } */ +/* { dg-final { scan-assembler "_Z2f1u10__SVBool_t:" } } */ +/* { dg-final { scan-assembler "_Z2f2u10__SVInt8_t:" } } */ +/* { dg-final { scan-assembler "_Z2f3u11__SVInt16_t:" } } */ +/* { dg-final { scan-assembler "_Z2f4u11__SVInt32_t:" } } */ +/* { dg-final { scan-assembler "_Z2f5u11__SVInt64_t:" } } */ +/* { dg-final { scan-assembler "_Z2f6u11__SVUint8_t:" } } */ +/* { dg-final { scan-assembler "_Z2f7u12__SVUint16_t:" } } */ +/* { dg-final { scan-assembler "_Z2f8u12__SVUint32_t:" } } */ +/* { dg-final { scan-assembler "_Z2f9u12__SVUint64_t:" } } */ +/* { dg-final { scan-assembler "_Z3f10u13__SVFloat16_t:" } } */ +/* { dg-final { scan-assembler "_Z3f11u13__SVFloat32_t:" } } */ +/* { dg-final { scan-assembler "_Z3f12u13__SVFloat64_t:" } } */ +/* { dg-final { scan-assembler "_Z3f13u14__SVBfloat16_t:" } } */ diff --git a/gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/mangle_3.C b/gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/mangle_3.C index 8f64f7c2ee2..7aaafeb71eb 100644 --- a/gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/mangle_3.C +++ b/gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/mangle_3.C @@ -13,6 +13,6 @@ void f2(t2) {} void f3(t3) {} void f4(t1 &a, t2 &b, t3 &c) { a = b = c; } -/* { dg-final { scan-assembler "_Z2f110__SVInt8_t:" } } */ -/* { dg-final { scan-assembler "_Z2f210__SVInt8_t:" } } */ +/* { dg-final { scan-assembler "_Z2f1u10__SVInt8_t:" } } */ +/* { dg-final { scan-assembler "_Z2f2u10__SVInt8_t:" } } */ /* { dg-final { scan-assembler "_Z2f3Dv32_a:" } } */ diff --git a/gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/mangle_5.C b/gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/mangle_5.C index 47c1160d65a..1504cc12f41 100644 --- a/gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/mangle_5.C +++ b/gcc/testsuite/g++.target/aarch64/sve/acle/general-c++/mangle_5.C @@ -4,5 +4,5 @@ typedef volatile foo bar; foo f (foo x) { return x; } bar g (bar x) { return x; } -/* { dg-final { scan-assembler {_Z1f10__SVInt8_t:\n} } } */ -/* { dg-final { scan-assembler {_Z1g10__SVInt8_t:\n} } } */ +/* { dg-final { scan-assembler {_Z1fu10__SVInt8_t:\n} } } */ +/* { dg-final { scan-assembler {_Z1gu10__SVInt8_t:\n} } } */