From patchwork Tue Aug 4 19:40:44 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kelley, Sean V" X-Patchwork-Id: 1341000 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=intel.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4BLlW83Frpz9sTj for ; Wed, 5 Aug 2020 05:41:40 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728693AbgHDTlj (ORCPT ); Tue, 4 Aug 2020 15:41:39 -0400 Received: from mga18.intel.com ([134.134.136.126]:29261 "EHLO mga18.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728045AbgHDTlE (ORCPT ); Tue, 4 Aug 2020 15:41:04 -0400 IronPort-SDR: iWOw+dNoMUMQGZS8UzErNg0cbEoLo3ThZqOO34UH5ubWwUH76P/eArjtMwwLWxc8QVpqOS0x2M 6cXsj+evZXOw== X-IronPort-AV: E=McAfee;i="6000,8403,9703"; a="139991089" X-IronPort-AV: E=Sophos;i="5.75,434,1589266800"; d="scan'208";a="139991089" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Aug 2020 12:41:04 -0700 IronPort-SDR: 0o+Z6doTjfr4NKPokwycz/HNBv3/ux+4RTqavSWoDWgGHwItObTrBxcy1FJ/SRslSqQWvaHfdN DMymbwFDMsNw== X-IronPort-AV: E=Sophos;i="5.75,434,1589266800"; d="scan'208";a="467199220" Received: from viveksh1-mobl.amr.corp.intel.com (HELO arch-ashland-svkelley.intel.com) ([10.255.83.117]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Aug 2020 12:41:04 -0700 From: Sean V Kelley To: bhelgaas@google.com, Jonathan.Cameron@huawei.com, rjw@rjwysocki.net, ashok.raj@intel.com, tony.luck@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Qiuxu Zhuo Subject: [PATCH V2 1/9] pci_ids: Add class code and extended capability for RCEC Date: Tue, 4 Aug 2020 12:40:44 -0700 Message-Id: <20200804194052.193272-2-sean.v.kelley@intel.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200804194052.193272-1-sean.v.kelley@intel.com> References: <20200804194052.193272-1-sean.v.kelley@intel.com> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Qiuxu Zhuo A PCIe Root Complex Event Collector(RCEC) has the base class 0x08, sub-class 0x07, and programming interface 0x00. Add the class code 0x0807 to identify RCEC devices and add the defines for the RCEC Endpoint Association Extended Capability. See PCI Express Base Specification, version 5.0-1, section "1.3.4 Root Complex Event Collector" and section "7.9.10 Root Complex Event Collector Endpoint Association Extended Capability" Signed-off-by: Qiuxu Zhuo Reviewed-by: Jonathan Cameron --- include/linux/pci_ids.h | 1 + include/uapi/linux/pci_regs.h | 7 +++++++ 2 files changed, 8 insertions(+) diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index 5c709a1450b1..bc6d1a4ca02d 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -81,6 +81,7 @@ #define PCI_CLASS_SYSTEM_RTC 0x0803 #define PCI_CLASS_SYSTEM_PCI_HOTPLUG 0x0804 #define PCI_CLASS_SYSTEM_SDHCI 0x0805 +#define PCI_CLASS_SYSTEM_RCEC 0x0807 #define PCI_CLASS_SYSTEM_OTHER 0x0880 #define PCI_BASE_CLASS_INPUT 0x09 diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h index f9701410d3b5..f335f65f65d6 100644 --- a/include/uapi/linux/pci_regs.h +++ b/include/uapi/linux/pci_regs.h @@ -828,6 +828,13 @@ #define PCI_PWR_CAP_BUDGET(x) ((x) & 1) /* Included in system budget */ #define PCI_EXT_CAP_PWR_SIZEOF 16 +/* Root Complex Event Collector Endpoint Association */ +#define PCI_RCEC_RCIEP_BITMAP 4 /* Associated Bitmap for RCiEPs */ +#define PCI_RCEC_BUSN 8 /* RCEC Associated Bus Numbers */ +#define PCI_RCEC_BUSN_REG_VER 0x02 /* Least capability version that BUSN present */ +#define PCI_RCEC_BUSN_NEXT(x) (((x) >> 8) & 0xff) +#define PCI_RCEC_BUSN_LAST(x) (((x) >> 16) & 0xff) + /* Vendor-Specific (VSEC, PCI_EXT_CAP_ID_VNDR) */ #define PCI_VNDR_HEADER 4 /* Vendor-Specific Header */ #define PCI_VNDR_HEADER_ID(x) ((x) & 0xffff) From patchwork Tue Aug 4 19:40:45 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kelley, Sean V" X-Patchwork-Id: 1340997 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=intel.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4BLlW65K5Jz9sTj for ; Wed, 5 Aug 2020 05:41:38 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728244AbgHDTlH (ORCPT ); Tue, 4 Aug 2020 15:41:07 -0400 Received: from mga18.intel.com ([134.134.136.126]:29261 "EHLO mga18.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728184AbgHDTlG (ORCPT ); Tue, 4 Aug 2020 15:41:06 -0400 IronPort-SDR: xKwuZZT5ew76HI8ztKtjKyxdllxz9ACfTwI/lAyU6w5O2nq8KBnLmn+NN+Q3BTlF13FQizPEYN KZkOXLgzYRuA== X-IronPort-AV: E=McAfee;i="6000,8403,9703"; a="139991093" X-IronPort-AV: E=Sophos;i="5.75,434,1589266800"; d="scan'208";a="139991093" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Aug 2020 12:41:05 -0700 IronPort-SDR: uWxkq0mQn7iPLMM7bR39htIKoCVIv38Zn81itKyGKU6I73lZ/zIg8sWxBJFEjOa7M4vuARbPxd WslAfl0HM9nQ== X-IronPort-AV: E=Sophos;i="5.75,434,1589266800"; d="scan'208";a="467199225" Received: from viveksh1-mobl.amr.corp.intel.com (HELO arch-ashland-svkelley.intel.com) ([10.255.83.117]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Aug 2020 12:41:05 -0700 From: Sean V Kelley To: bhelgaas@google.com, Jonathan.Cameron@huawei.com, rjw@rjwysocki.net, ashok.raj@intel.com, tony.luck@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Qiuxu Zhuo , Sean V Kelley Subject: [PATCH V2 2/9] PCI: Extend Root Port Driver to support RCEC Date: Tue, 4 Aug 2020 12:40:45 -0700 Message-Id: <20200804194052.193272-3-sean.v.kelley@intel.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200804194052.193272-1-sean.v.kelley@intel.com> References: <20200804194052.193272-1-sean.v.kelley@intel.com> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Qiuxu Zhuo If a Root Complex Integrated Endpoint (RCiEP) is implemented, errors may optionally be sent to a corresponding Root Complex Event Collector (RCEC). Each RCiEP must be associated with no more than one RCEC. Interface errors are reported to the OS by RCECs. For an RCEC (technically not a Bridge), error messages "received" from associated RCiEPs must be enabled for "transmission" in order to cause a System Error via the Root Control register or (when the Advanced Error Reporting Capability is present) reporting via the Root Error Command register and logging in the Root Error Status register and Error Source Identification register. Given the commonality with Root Ports and the need to also support AER and PME services for RCECs, extend the Root Port driver to support RCEC devices through the addition of the RCEC Class ID to the driver structure. Co-developed-by: Sean V Kelley Signed-off-by: Qiuxu Zhuo Signed-off-by: Sean V Kelley Reviewed-by: Jonathan Cameron --- drivers/pci/pcie/portdrv_core.c | 8 ++++---- drivers/pci/pcie/portdrv_pci.c | 5 ++++- 2 files changed, 8 insertions(+), 5 deletions(-) diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c index 50a9522ab07d..5d4a400094fc 100644 --- a/drivers/pci/pcie/portdrv_core.c +++ b/drivers/pci/pcie/portdrv_core.c @@ -234,11 +234,11 @@ static int get_port_device_capability(struct pci_dev *dev) #endif /* - * Root ports are capable of generating PME too. Root Complex - * Event Collectors can also generate PMEs, but we don't handle - * those yet. + * Root ports and Root Complex Event Collectors are capable + * of generating PME too. */ - if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT && + if ((pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT || + pci_pcie_type(dev) == PCI_EXP_TYPE_RC_EC) && (pcie_ports_native || host->native_pme)) { services |= PCIE_PORT_SERVICE_PME; diff --git a/drivers/pci/pcie/portdrv_pci.c b/drivers/pci/pcie/portdrv_pci.c index 3a3ce40ae1ab..4d880679b9b1 100644 --- a/drivers/pci/pcie/portdrv_pci.c +++ b/drivers/pci/pcie/portdrv_pci.c @@ -106,7 +106,8 @@ static int pcie_portdrv_probe(struct pci_dev *dev, if (!pci_is_pcie(dev) || ((pci_pcie_type(dev) != PCI_EXP_TYPE_ROOT_PORT) && (pci_pcie_type(dev) != PCI_EXP_TYPE_UPSTREAM) && - (pci_pcie_type(dev) != PCI_EXP_TYPE_DOWNSTREAM))) + (pci_pcie_type(dev) != PCI_EXP_TYPE_DOWNSTREAM) && + (pci_pcie_type(dev) != PCI_EXP_TYPE_RC_EC))) return -ENODEV; status = pcie_port_device_register(dev); @@ -195,6 +196,8 @@ static const struct pci_device_id port_pci_ids[] = { { PCI_DEVICE_CLASS(((PCI_CLASS_BRIDGE_PCI << 8) | 0x00), ~0) }, /* subtractive decode PCI-to-PCI bridge, class type is 060401h */ { PCI_DEVICE_CLASS(((PCI_CLASS_BRIDGE_PCI << 8) | 0x01), ~0) }, + /* handle any Root Complex Event Collector */ + { PCI_DEVICE_CLASS(((PCI_CLASS_SYSTEM_RCEC << 8) | 0x00), ~0) }, { }, }; From patchwork Tue Aug 4 19:40:46 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kelley, Sean V" X-Patchwork-Id: 1340995 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=intel.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4BLlW52s8hz9sTj for ; Wed, 5 Aug 2020 05:41:37 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728371AbgHDTlK (ORCPT ); Tue, 4 Aug 2020 15:41:10 -0400 Received: from mga18.intel.com ([134.134.136.126]:29261 "EHLO mga18.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728270AbgHDTlH (ORCPT ); Tue, 4 Aug 2020 15:41:07 -0400 IronPort-SDR: y/KTXzLmttNAz3ogHcO7pGL8zLaFDjyzJqjQakWadhhTt+tgk98S0cnRzfTb7rgIGAqanoCXd6 sSPyogW3C/GQ== X-IronPort-AV: E=McAfee;i="6000,8403,9703"; a="139991100" X-IronPort-AV: E=Sophos;i="5.75,434,1589266800"; d="scan'208";a="139991100" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Aug 2020 12:41:07 -0700 IronPort-SDR: s2P1ls1ValU185pYYZ5NlKXOyc7Fi0qp+U9ywdFlaUOpv/mMdNhalzhgyg2zuEEX4/VLtbZkl7 ZLpQy2nnbByg== X-IronPort-AV: E=Sophos;i="5.75,434,1589266800"; d="scan'208";a="467199230" Received: from viveksh1-mobl.amr.corp.intel.com (HELO arch-ashland-svkelley.intel.com) ([10.255.83.117]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Aug 2020 12:41:06 -0700 From: Sean V Kelley To: bhelgaas@google.com, Jonathan.Cameron@huawei.com, rjw@rjwysocki.net, ashok.raj@intel.com, tony.luck@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Qiuxu Zhuo , Sean V Kelley Subject: [PATCH V2 3/9] PCI/portdrv: Add pcie_walk_rcec() to walk RCiEPs associated with RCEC Date: Tue, 4 Aug 2020 12:40:46 -0700 Message-Id: <20200804194052.193272-4-sean.v.kelley@intel.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200804194052.193272-1-sean.v.kelley@intel.com> References: <20200804194052.193272-1-sean.v.kelley@intel.com> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Qiuxu Zhuo When an RCEC device signals error(s) to a CPU core, the CPU core needs to walk all the RCiEPs associated with that RCEC to check errors. So add the function pcie_walk_rcec() to walk all RCiEPs associated with the RCEC device. Co-developed-by: Sean V Kelley Signed-off-by: Qiuxu Zhuo Signed-off-by: Sean V Kelley Reviewed-by: Jonathan Cameron --- drivers/pci/pcie/portdrv.h | 2 + drivers/pci/pcie/portdrv_core.c | 82 +++++++++++++++++++++++++++++++++ 2 files changed, 84 insertions(+) diff --git a/drivers/pci/pcie/portdrv.h b/drivers/pci/pcie/portdrv.h index af7cf237432a..c11d5ecbad76 100644 --- a/drivers/pci/pcie/portdrv.h +++ b/drivers/pci/pcie/portdrv.h @@ -116,6 +116,8 @@ void pcie_port_service_unregister(struct pcie_port_service_driver *new); extern struct bus_type pcie_port_bus_type; int pcie_port_device_register(struct pci_dev *dev); +void pcie_walk_rcec(struct pci_dev *rcec, int (*cb)(struct pci_dev *, void *), + void *userdata); #ifdef CONFIG_PM int pcie_port_device_suspend(struct device *dev); int pcie_port_device_resume_noirq(struct device *dev); diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c index 5d4a400094fc..daa2dfa83a0b 100644 --- a/drivers/pci/pcie/portdrv_core.c +++ b/drivers/pci/pcie/portdrv_core.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include "../pci.h" @@ -365,6 +366,87 @@ int pcie_port_device_register(struct pci_dev *dev) return status; } +static int pcie_walk_rciep_devfn(struct pci_bus *pbus, int (*cb)(struct pci_dev *, void *), + void *userdata, unsigned long bitmap) +{ + unsigned int dev, fn; + struct pci_dev *pdev; + int retval; + + for_each_set_bit(dev, &bitmap, 32) { + for (fn = 0; fn < 8; fn++) { + pdev = pci_get_slot(pbus, PCI_DEVFN(dev, fn)); + + if (!pdev || pci_pcie_type(pdev) != PCI_EXP_TYPE_RC_END) + continue; + + retval = cb(pdev, userdata); + if (retval) + return retval; + } + } + + return 0; +} + +/** + * pcie_walk_rcec - Walk RCiEP devices associating with RCEC and call callback. + * @rcec RCEC whose RCiEP devices should be walked. + * @cb Callback to be called for each RCiEP device found. + * @userdata Arbitrary pointer to be passed to callback. + * + * Walk the given RCEC. Call the provided callback on each RCiEP device found. + * + * We check the return of @cb each time. If it returns anything + * other than 0, we break out. + */ +void pcie_walk_rcec(struct pci_dev *rcec, int (*cb)(struct pci_dev *, void *), + void *userdata) +{ + u32 pos, bitmap, hdr, busn; + u8 ver, nextbusn, lastbusn; + struct pci_bus *pbus; + unsigned int bnr; + + pos = pci_find_ext_capability(rcec, PCI_EXT_CAP_ID_RCEC); + if (!pos) + return; + + pbus = pci_find_bus(pci_domain_nr(rcec->bus), rcec->bus->number); + if (!pbus) + return; + + pci_read_config_dword(rcec, pos + PCI_RCEC_RCIEP_BITMAP, &bitmap); + + /* Find RCiEP devices on the same bus as the RCEC */ + if (pcie_walk_rciep_devfn(pbus, cb, userdata, (unsigned long)bitmap)) + return; + + /* Check whether RCEC BUSN register is present */ + pci_read_config_dword(rcec, pos, &hdr); + ver = PCI_EXT_CAP_VER(hdr); + if (ver < PCI_RCEC_BUSN_REG_VER) + return; + + pci_read_config_dword(rcec, pos + PCI_RCEC_BUSN, &busn); + nextbusn = PCI_RCEC_BUSN_NEXT(busn); + lastbusn = PCI_RCEC_BUSN_LAST(busn); + + /* All RCiEP devices are on the same bus as the RCEC */ + if (nextbusn == 0xff && lastbusn == 0x00) + return; + + for (bnr = nextbusn; bnr <= lastbusn; bnr++) { + pbus = pci_find_bus(pci_domain_nr(rcec->bus), bnr); + if (!pbus) + continue; + + /* Find RCiEP devices on the given bus */ + if (pcie_walk_rciep_devfn(pbus, cb, userdata, 0xffffffff)) + return; + } +} + #ifdef CONFIG_PM typedef int (*pcie_pm_callback_t)(struct pcie_device *); From patchwork Tue Aug 4 19:40:47 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kelley, Sean V" X-Patchwork-Id: 1340996 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=intel.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4BLlW60QbNz9sTH for ; Wed, 5 Aug 2020 05:41:38 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728365AbgHDTlJ (ORCPT ); Tue, 4 Aug 2020 15:41:09 -0400 Received: from mga18.intel.com ([134.134.136.126]:29261 "EHLO mga18.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728184AbgHDTlI (ORCPT ); Tue, 4 Aug 2020 15:41:08 -0400 IronPort-SDR: Gcc9GLpDGOyDASF6Kpb5Pa2nSwdv+XMhtVd9qe5Hxj6HgepePglHMFUpglXvlVeBnzC+bQuD5C G7GnB2vXw4yA== X-IronPort-AV: E=McAfee;i="6000,8403,9703"; a="139991104" X-IronPort-AV: E=Sophos;i="5.75,434,1589266800"; d="scan'208";a="139991104" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Aug 2020 12:41:08 -0700 IronPort-SDR: AwHcOi2SsEq77wjlXmt1h6pQNH0KB0dZ0Y7fyPD+KIt7DktLHj+OctFCHqvrp0efMlBxb2zOpg hcHhsldpskJQ== X-IronPort-AV: E=Sophos;i="5.75,434,1589266800"; d="scan'208";a="467199237" Received: from viveksh1-mobl.amr.corp.intel.com (HELO arch-ashland-svkelley.intel.com) ([10.255.83.117]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Aug 2020 12:41:07 -0700 From: Sean V Kelley To: bhelgaas@google.com, Jonathan.Cameron@huawei.com, rjw@rjwysocki.net, ashok.raj@intel.com, tony.luck@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Sean V Kelley Subject: [PATCH V2 4/9] PCI/AER: Extend AER error handling to RCECs Date: Tue, 4 Aug 2020 12:40:47 -0700 Message-Id: <20200804194052.193272-5-sean.v.kelley@intel.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200804194052.193272-1-sean.v.kelley@intel.com> References: <20200804194052.193272-1-sean.v.kelley@intel.com> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Jonathan Cameron Currently the kernel does not handle AER errors for Root Complex integrated End Points (RCiEPs)[0]. These devices sit on a root bus within the Root Complex (RC). AER handling is performed by a Root Complex Event Collector (RCEC) [1] which is a effectively a type of RCiEP on the same root bus. For an RCEC (technically not a Bridge), error messages "received" from associated RCiEPs must be enabled for "transmission" in order to cause a System Error via the Root Control register or (when the Advanced Error Reporting Capability is present) reporting via the Root Error Command register and logging in the Root Error Status register and Error Source Identification register. In addition to the defined OS level handling of the reset flow for the associated RCiEPs of an RCEC, it is possible to also have a firmware first model. In that case there is no need to take any actions on the RCEC because the firmware is responsible for them. This is true where APEI [2] is used to report the AER errors via a GHES[v2] HEST entry [3] and relevant AER CPER record [4] and Firmware First handling is in use. We effectively end up with two different types of discovery for purposes of handling AER errors: 1) Normal bus walk - we pass the downstream port above a bus to which the device is attached and it walks everything below that point. 2) An RCiEP with no visible association with an RCEC as there is no need to walk devices. In that case, the flow is to just call the callbacks for the actual device. A new walk function, similar to pci_bus_walk is provided that takes a pci_dev instead of a bus. If that dev corresponds to a downstream port it will walk the subordinate bus of that downstream port. If the dev does not then it will call the function on that device alone. [0] ACPI PCI Express Base Specification 5.0-1 1.3.2.3 Root Complex Integrated Endpoint Rules. [1] ACPI PCI Express Base Specification 5.0-1 6.2 Error Signalling and Logging [2] ACPI Specification 6.3 Chapter 18 ACPI Platform Error Interface (APEI) [3] ACPI Specification 6.3 18.2.3.7 Generic Hardware Error Source [4] UEFI Specification 2.8, N.2.7 PCI Express Error Section Signed-off-by: Jonathan Cameron Signed-off-by: Sean V Kelley --- drivers/pci/pcie/err.c | 59 +++++++++++++++++++++++++++++++++--------- 1 file changed, 47 insertions(+), 12 deletions(-) diff --git a/drivers/pci/pcie/err.c b/drivers/pci/pcie/err.c index c543f419d8f9..682302dfb55b 100644 --- a/drivers/pci/pcie/err.c +++ b/drivers/pci/pcie/err.c @@ -146,38 +146,69 @@ static int report_resume(struct pci_dev *dev, void *data) return 0; } +/** + * pci_walk_dev_affected - walk devices potentially AER affected + * @dev device which may be an RCEC with associated RCiEPs, + * an RCiEP associated with an RCEC, or a Port. + * @cb callback to be called for each device found + * @userdata arbitrary pointer to be passed to callback. + * + * If the device provided is a port, walk the subordinate bus, + * including any bridged devices on buses under this bus. + * Call the provided callback on each device found. + * + * If the device provided has no subordinate bus, call the provided + * callback on the device itself. + */ +static void pci_walk_dev_affected(struct pci_dev *dev, int (*cb)(struct pci_dev *, void *), + void *userdata) +{ + if (dev->subordinate) { + pci_walk_bus(dev->subordinate, cb, userdata); + } else { + cb(dev, userdata); + } +} + pci_ers_result_t pcie_do_recovery(struct pci_dev *dev, pci_channel_state_t state, pci_ers_result_t (*reset_link)(struct pci_dev *pdev)) { pci_ers_result_t status = PCI_ERS_RESULT_CAN_RECOVER; - struct pci_bus *bus; /* * Error recovery runs on all subordinates of the first downstream port. * If the downstream port detected the error, it is cleared at the end. + * For RCiEPs we should reset just the RCiEP itself. */ if (!(pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT || - pci_pcie_type(dev) == PCI_EXP_TYPE_DOWNSTREAM)) + pci_pcie_type(dev) == PCI_EXP_TYPE_DOWNSTREAM || + pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END || + pci_pcie_type(dev) == PCI_EXP_TYPE_RC_EC)) dev = dev->bus->self; - bus = dev->subordinate; pci_dbg(dev, "broadcast error_detected message\n"); if (state == pci_channel_io_frozen) { - pci_walk_bus(bus, report_frozen_detected, &status); + pci_walk_dev_affected(dev, report_frozen_detected, &status); + if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END) { + pci_warn(dev, "link reset not possible for RCiEP\n"); + status = PCI_ERS_RESULT_NONE; + goto failed; + } + status = reset_link(dev); if (status != PCI_ERS_RESULT_RECOVERED) { pci_warn(dev, "link reset failed\n"); goto failed; } } else { - pci_walk_bus(bus, report_normal_detected, &status); + pci_walk_dev_affected(dev, report_normal_detected, &status); } if (status == PCI_ERS_RESULT_CAN_RECOVER) { status = PCI_ERS_RESULT_RECOVERED; pci_dbg(dev, "broadcast mmio_enabled message\n"); - pci_walk_bus(bus, report_mmio_enabled, &status); + pci_walk_dev_affected(dev, report_mmio_enabled, &status); } if (status == PCI_ERS_RESULT_NEED_RESET) { @@ -188,18 +219,22 @@ pci_ers_result_t pcie_do_recovery(struct pci_dev *dev, */ status = PCI_ERS_RESULT_RECOVERED; pci_dbg(dev, "broadcast slot_reset message\n"); - pci_walk_bus(bus, report_slot_reset, &status); + pci_walk_dev_affected(dev, report_slot_reset, &status); } if (status != PCI_ERS_RESULT_RECOVERED) goto failed; pci_dbg(dev, "broadcast resume message\n"); - pci_walk_bus(bus, report_resume, &status); - - if (pcie_aer_is_native(dev)) - pcie_clear_device_status(dev); - pci_aer_clear_nonfatal_status(dev); + pci_walk_dev_affected(dev, report_resume, &status); + + if ((pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT || + pci_pcie_type(dev) == PCI_EXP_TYPE_DOWNSTREAM || + pci_pcie_type(dev) == PCI_EXP_TYPE_RC_EC)) { + if (pcie_aer_is_native(dev)) + pcie_clear_device_status(dev); + pci_aer_clear_nonfatal_status(dev); + } pci_info(dev, "device recovery successful\n"); return status; From patchwork Tue Aug 4 19:40:48 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kelley, Sean V" X-Patchwork-Id: 1340998 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=intel.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4BLlW72T8Qz9sTH for ; Wed, 5 Aug 2020 05:41:39 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728330AbgHDTlJ (ORCPT ); Tue, 4 Aug 2020 15:41:09 -0400 Received: from mga18.intel.com ([134.134.136.126]:29269 "EHLO mga18.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728321AbgHDTlJ (ORCPT ); Tue, 4 Aug 2020 15:41:09 -0400 IronPort-SDR: D9TTt4KNr6n2/G0cywzi7CdCD8ZEuXWD3MsNviYswpKJaeaWC43on0iPIQb58JrpJVyfvySEUe lpRhwzbz5DRg== X-IronPort-AV: E=McAfee;i="6000,8403,9703"; a="139991107" X-IronPort-AV: E=Sophos;i="5.75,434,1589266800"; d="scan'208";a="139991107" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Aug 2020 12:41:08 -0700 IronPort-SDR: U8cdfqDRyyNHBM/S7HlqnmOlcelXTk74oCd7roRReSyNriJAKXI/ZUGBFDN9stwMwIV6kZhGRH mIhbM910KgVg== X-IronPort-AV: E=Sophos;i="5.75,434,1589266800"; d="scan'208";a="467199244" Received: from viveksh1-mobl.amr.corp.intel.com (HELO arch-ashland-svkelley.intel.com) ([10.255.83.117]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Aug 2020 12:41:08 -0700 From: Sean V Kelley To: bhelgaas@google.com, Jonathan.Cameron@huawei.com, rjw@rjwysocki.net, ashok.raj@intel.com, tony.luck@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Qiuxu Zhuo Subject: [PATCH V2 5/9] PCI/AER: Apply function level reset to RCiEP on fatal error Date: Tue, 4 Aug 2020 12:40:48 -0700 Message-Id: <20200804194052.193272-6-sean.v.kelley@intel.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200804194052.193272-1-sean.v.kelley@intel.com> References: <20200804194052.193272-1-sean.v.kelley@intel.com> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Qiuxu Zhuo Attempt to do function level reset for an RCiEP associated with an RCEC device on fatal error. Signed-off-by: Qiuxu Zhuo --- drivers/pci/pcie/err.c | 31 ++++++++++++++++++++++--------- 1 file changed, 22 insertions(+), 9 deletions(-) diff --git a/drivers/pci/pcie/err.c b/drivers/pci/pcie/err.c index 682302dfb55b..4812aa678eff 100644 --- a/drivers/pci/pcie/err.c +++ b/drivers/pci/pcie/err.c @@ -170,6 +170,17 @@ static void pci_walk_dev_affected(struct pci_dev *dev, int (*cb)(struct pci_dev } } +static enum pci_ers_result flr_on_rciep(struct pci_dev *dev) +{ + if (!pcie_has_flr(dev)) + return PCI_ERS_RESULT_NONE; + + if (pcie_flr(dev)) + return PCI_ERS_RESULT_DISCONNECT; + + return PCI_ERS_RESULT_RECOVERED; +} + pci_ers_result_t pcie_do_recovery(struct pci_dev *dev, pci_channel_state_t state, pci_ers_result_t (*reset_link)(struct pci_dev *pdev)) @@ -191,15 +202,17 @@ pci_ers_result_t pcie_do_recovery(struct pci_dev *dev, if (state == pci_channel_io_frozen) { pci_walk_dev_affected(dev, report_frozen_detected, &status); if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END) { - pci_warn(dev, "link reset not possible for RCiEP\n"); - status = PCI_ERS_RESULT_NONE; - goto failed; - } - - status = reset_link(dev); - if (status != PCI_ERS_RESULT_RECOVERED) { - pci_warn(dev, "link reset failed\n"); - goto failed; + status = flr_on_rciep(dev); + if (status != PCI_ERS_RESULT_RECOVERED) { + pci_warn(dev, "function level reset failed\n"); + goto failed; + } + } else { + status = reset_link(dev); + if (status != PCI_ERS_RESULT_RECOVERED) { + pci_warn(dev, "link reset failed\n"); + goto failed; + } } } else { pci_walk_dev_affected(dev, report_normal_detected, &status); From patchwork Tue Aug 4 19:40:49 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kelley, Sean V" X-Patchwork-Id: 1340991 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=intel.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4BLlVw5vQhz9sTH for ; Wed, 5 Aug 2020 05:41:28 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728526AbgHDTlO (ORCPT ); Tue, 4 Aug 2020 15:41:14 -0400 Received: from mga18.intel.com ([134.134.136.126]:29273 "EHLO mga18.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728409AbgHDTlL (ORCPT ); Tue, 4 Aug 2020 15:41:11 -0400 IronPort-SDR: gSJ9uhVGs1EGwbbldooy2vwSXP8rlCPQPbnQxiplZLAKYA5OTj1Tft2CppNgc/5pgvswNX4I4B FFjgU67kw5Aw== X-IronPort-AV: E=McAfee;i="6000,8403,9703"; a="139991112" X-IronPort-AV: E=Sophos;i="5.75,434,1589266800"; d="scan'208";a="139991112" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Aug 2020 12:41:10 -0700 IronPort-SDR: bQNNIpu6Uc1hJHn/WQypAhs7qz1dtAZYNzVxyBoE3v2PDy9vHyak0hKSHCUJRZx5r1UyC3bmhO GBJtkhmNe3og== X-IronPort-AV: E=Sophos;i="5.75,434,1589266800"; d="scan'208";a="467199267" Received: from viveksh1-mobl.amr.corp.intel.com (HELO arch-ashland-svkelley.intel.com) ([10.255.83.117]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Aug 2020 12:41:09 -0700 From: Sean V Kelley To: bhelgaas@google.com, Jonathan.Cameron@huawei.com, rjw@rjwysocki.net, ashok.raj@intel.com, tony.luck@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Qiuxu Zhuo , Sean V Kelley Subject: [PATCH V2 6/9] PCI: Add 'rcec' field to pci_dev for associated RCiEPs Date: Tue, 4 Aug 2020 12:40:49 -0700 Message-Id: <20200804194052.193272-7-sean.v.kelley@intel.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200804194052.193272-1-sean.v.kelley@intel.com> References: <20200804194052.193272-1-sean.v.kelley@intel.com> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Qiuxu Zhuo When attempting error recovery for an RCiEP associated with an RCEC device, there needs to be a way to update the Root Error Status, the Uncorrectable Error Status and the Uncorrectable Error Severity of the parent RCEC. So add the 'rcec' field to the pci_dev structure and provide a hook for the Root Port Driver to associate RCiEPs with their respective parent RCEC. Co-developed-by: Sean V Kelley Signed-off-by: Qiuxu Zhuo Signed-off-by: Sean V Kelley --- drivers/pci/pcie/aer.c | 9 +++++---- drivers/pci/pcie/err.c | 12 ++++++++++++ drivers/pci/pcie/portdrv_pci.c | 15 +++++++++++++++ include/linux/pci.h | 3 +++ 4 files changed, 35 insertions(+), 4 deletions(-) diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c index 87283cda3990..f658607e8e00 100644 --- a/drivers/pci/pcie/aer.c +++ b/drivers/pci/pcie/aer.c @@ -1358,17 +1358,18 @@ static int aer_probe(struct pcie_device *dev) static pci_ers_result_t aer_root_reset(struct pci_dev *dev) { int aer = dev->aer_cap; + int rc = 0; u32 reg32; - int rc; - /* Disable Root's interrupt in response to error messages */ pci_read_config_dword(dev, aer + PCI_ERR_ROOT_COMMAND, ®32); reg32 &= ~ROOT_PORT_INTR_ON_MESG_MASK; pci_write_config_dword(dev, aer + PCI_ERR_ROOT_COMMAND, reg32); - rc = pci_bus_error_reset(dev); - pci_info(dev, "Root Port link has been reset\n"); + if (pci_pcie_type(dev) != PCI_EXP_TYPE_RC_EC) { + rc = pci_bus_error_reset(dev); + pci_info(dev, "Root Port link has been reset\n"); + } /* Clear Root Error Status */ pci_read_config_dword(dev, aer + PCI_ERR_ROOT_STATUS, ®32); diff --git a/drivers/pci/pcie/err.c b/drivers/pci/pcie/err.c index 4812aa678eff..43f1c55c76db 100644 --- a/drivers/pci/pcie/err.c +++ b/drivers/pci/pcie/err.c @@ -203,6 +203,12 @@ pci_ers_result_t pcie_do_recovery(struct pci_dev *dev, pci_walk_dev_affected(dev, report_frozen_detected, &status); if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END) { status = flr_on_rciep(dev); + /* + * The callback only clears the Root Error Status + * of the RCEC (see aer.c). + */ + if (pcie_aer_is_native(dev) && dev->rcec) + reset_link(dev->rcec); if (status != PCI_ERS_RESULT_RECOVERED) { pci_warn(dev, "function level reset failed\n"); goto failed; @@ -247,7 +253,13 @@ pci_ers_result_t pcie_do_recovery(struct pci_dev *dev, if (pcie_aer_is_native(dev)) pcie_clear_device_status(dev); pci_aer_clear_nonfatal_status(dev); + } else if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END) { + if (pcie_aer_is_native(dev) && dev->rcec) + pcie_clear_device_status(dev->rcec); + if (dev->rcec) + pci_aer_clear_nonfatal_status(dev->rcec); } + pci_info(dev, "device recovery successful\n"); return status; diff --git a/drivers/pci/pcie/portdrv_pci.c b/drivers/pci/pcie/portdrv_pci.c index 4d880679b9b1..dff5c9e13412 100644 --- a/drivers/pci/pcie/portdrv_pci.c +++ b/drivers/pci/pcie/portdrv_pci.c @@ -90,6 +90,18 @@ static const struct dev_pm_ops pcie_portdrv_pm_ops = { #define PCIE_PORTDRV_PM_OPS NULL #endif /* !PM */ +static int pcie_hook_rcec(struct pci_dev *pdev, void *data) +{ + struct pci_dev *rcec = (struct pci_dev *)data; + + pdev->rcec = rcec; + pci_dbg(rcec, "RCiEP(under an RCEC) %04x:%02x:%02x.%d\n", + pci_domain_nr(pdev->bus), pdev->bus->number, + PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn)); + + return 0; +} + /* * pcie_portdrv_probe - Probe PCI-Express port devices * @dev: PCI-Express port device being probed @@ -110,6 +122,9 @@ static int pcie_portdrv_probe(struct pci_dev *dev, (pci_pcie_type(dev) != PCI_EXP_TYPE_RC_EC))) return -ENODEV; + if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_EC) + pcie_walk_rcec(dev, pcie_hook_rcec, dev); + status = pcie_port_device_register(dev); if (status) return status; diff --git a/include/linux/pci.h b/include/linux/pci.h index ee49469bd2b5..d5f7dbbf5e2f 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -326,6 +326,9 @@ struct pci_dev { #ifdef CONFIG_PCIEAER u16 aer_cap; /* AER capability offset */ struct aer_stats *aer_stats; /* AER stats for this device */ +#endif +#ifdef CONFIG_PCIEPORTBUS + struct pci_dev *rcec; /* Associated RCEC device */ #endif u8 pcie_cap; /* PCIe capability offset */ u8 msi_cap; /* MSI capability offset */ From patchwork Tue Aug 4 19:40:50 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kelley, Sean V" X-Patchwork-Id: 1340992 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=intel.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4BLlVx3Dw5z9sTj for ; Wed, 5 Aug 2020 05:41:29 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728502AbgHDTlO (ORCPT ); Tue, 4 Aug 2020 15:41:14 -0400 Received: from mga18.intel.com ([134.134.136.126]:29281 "EHLO mga18.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728460AbgHDTlM (ORCPT ); Tue, 4 Aug 2020 15:41:12 -0400 IronPort-SDR: SLdJExEymn02C2Yatf5QlRXJtAcP77J1JQ0AN+wlurpDFnCJpZbaF1b7sSTSv7WEKe7ORX2UvF AAh2RpPhuSog== X-IronPort-AV: E=McAfee;i="6000,8403,9703"; a="139991118" X-IronPort-AV: E=Sophos;i="5.75,434,1589266800"; d="scan'208";a="139991118" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Aug 2020 12:41:10 -0700 IronPort-SDR: TFMduqvLfvBKMfmDJNF5IZ9c4xNOjK4yJYoL9JMVI9gliuI4oPoXtYgjbTJg3Ij/WujYxdV34p CxBKK5psPudg== X-IronPort-AV: E=Sophos;i="5.75,434,1589266800"; d="scan'208";a="467199272" Received: from viveksh1-mobl.amr.corp.intel.com (HELO arch-ashland-svkelley.intel.com) ([10.255.83.117]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Aug 2020 12:41:10 -0700 From: Sean V Kelley To: bhelgaas@google.com, Jonathan.Cameron@huawei.com, rjw@rjwysocki.net, ashok.raj@intel.com, tony.luck@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Sean V Kelley , Qiuxu Zhuo Subject: [PATCH V2 7/9] PCI/AER: Add RCEC AER handling Date: Tue, 4 Aug 2020 12:40:50 -0700 Message-Id: <20200804194052.193272-8-sean.v.kelley@intel.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200804194052.193272-1-sean.v.kelley@intel.com> References: <20200804194052.193272-1-sean.v.kelley@intel.com> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org The Root Complex Event Collectors(RCEC) appear as peers to Root Ports and also have the AER capability. So add RCEC support to the current AER service driver and attach the AER service driver to the RCEC device. Co-developed-by: Qiuxu Zhuo Signed-off-by: Sean V Kelley Signed-off-by: Qiuxu Zhuo Reviewed-by: Jonathan Cameron --- drivers/pci/pcie/aer.c | 27 ++++++++++++++++++++------- 1 file changed, 20 insertions(+), 7 deletions(-) diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c index f658607e8e00..55ee9518368f 100644 --- a/drivers/pci/pcie/aer.c +++ b/drivers/pci/pcie/aer.c @@ -300,7 +300,7 @@ int pci_aer_raw_clear_status(struct pci_dev *dev) return -EIO; port_type = pci_pcie_type(dev); - if (port_type == PCI_EXP_TYPE_ROOT_PORT) { + if (port_type == PCI_EXP_TYPE_ROOT_PORT || port_type == PCI_EXP_TYPE_RC_EC) { pci_read_config_dword(dev, aer + PCI_ERR_ROOT_STATUS, &status); pci_write_config_dword(dev, aer + PCI_ERR_ROOT_STATUS, status); } @@ -595,7 +595,8 @@ static umode_t aer_stats_attrs_are_visible(struct kobject *kobj, if ((a == &dev_attr_aer_rootport_total_err_cor.attr || a == &dev_attr_aer_rootport_total_err_fatal.attr || a == &dev_attr_aer_rootport_total_err_nonfatal.attr) && - pci_pcie_type(pdev) != PCI_EXP_TYPE_ROOT_PORT) + ((pci_pcie_type(pdev) != PCI_EXP_TYPE_ROOT_PORT) && + (pci_pcie_type(pdev) != PCI_EXP_TYPE_RC_EC))) return 0; return a->mode; @@ -916,7 +917,10 @@ static bool find_source_device(struct pci_dev *parent, if (result) return true; - pci_walk_bus(parent->subordinate, find_device_iter, e_info); + if (pci_pcie_type(parent) == PCI_EXP_TYPE_RC_EC) + pcie_walk_rcec(parent, find_device_iter, e_info); + else + pci_walk_bus(parent->subordinate, find_device_iter, e_info); if (!e_info->error_dev_num) { pci_info(parent, "can't find device of ID%04x\n", e_info->id); @@ -1053,6 +1057,7 @@ int aer_get_device_error_info(struct pci_dev *dev, struct aer_err_info *info) if (!(info->status & ~info->mask)) return 0; } else if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT || + pci_pcie_type(dev) == PCI_EXP_TYPE_RC_EC || pci_pcie_type(dev) == PCI_EXP_TYPE_DOWNSTREAM || info->severity == AER_NONFATAL) { @@ -1205,6 +1210,7 @@ static int set_device_error_reporting(struct pci_dev *dev, void *data) int type = pci_pcie_type(dev); if ((type == PCI_EXP_TYPE_ROOT_PORT) || + (type == PCI_EXP_TYPE_RC_EC) || (type == PCI_EXP_TYPE_UPSTREAM) || (type == PCI_EXP_TYPE_DOWNSTREAM)) { if (enable) @@ -1229,9 +1235,11 @@ static void set_downstream_devices_error_reporting(struct pci_dev *dev, { set_device_error_reporting(dev, &enable); - if (!dev->subordinate) - return; - pci_walk_bus(dev->subordinate, set_device_error_reporting, &enable); + if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_EC) + pcie_walk_rcec(dev, set_device_error_reporting, &enable); + else if (dev->subordinate) + pci_walk_bus(dev->subordinate, set_device_error_reporting, &enable); + } /** @@ -1329,6 +1337,11 @@ static int aer_probe(struct pcie_device *dev) struct device *device = &dev->device; struct pci_dev *port = dev->port; + /* Limit to Root Ports or Root Complex Event Collectors */ + if ((pci_pcie_type(port) != PCI_EXP_TYPE_RC_EC) && + (pci_pcie_type(port) != PCI_EXP_TYPE_ROOT_PORT)) + return -ENODEV; + rpc = devm_kzalloc(device, sizeof(struct aer_rpc), GFP_KERNEL); if (!rpc) return -ENOMEM; @@ -1385,7 +1398,7 @@ static pci_ers_result_t aer_root_reset(struct pci_dev *dev) static struct pcie_port_service_driver aerdriver = { .name = "aer", - .port_type = PCI_EXP_TYPE_ROOT_PORT, + .port_type = PCIE_ANY_PORT, .service = PCIE_PORT_SERVICE_AER, .probe = aer_probe, From patchwork Tue Aug 4 19:40:51 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kelley, Sean V" X-Patchwork-Id: 1340994 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=intel.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4BLlW34dM5z9sTH for ; Wed, 5 Aug 2020 05:41:35 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728624AbgHDTl3 (ORCPT ); Tue, 4 Aug 2020 15:41:29 -0400 Received: from mga18.intel.com ([134.134.136.126]:29273 "EHLO mga18.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728462AbgHDTlN (ORCPT ); Tue, 4 Aug 2020 15:41:13 -0400 IronPort-SDR: 6LAbpK2NEiPAelWxbtC/inVuSTjCHWKX7BQggLv1tUZJiPnMIByGc5AH8cIQf1HnEa8c+WR4jB 6uKflVhy8hRQ== X-IronPort-AV: E=McAfee;i="6000,8403,9703"; a="139991130" X-IronPort-AV: E=Sophos;i="5.75,434,1589266800"; d="scan'208";a="139991130" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Aug 2020 12:41:11 -0700 IronPort-SDR: LgLHdeAYYWkofiImhXp9dVHytvDJBva3dmil3eBuoDI02FYPqLmta18nJU1F6EXwCD0gFND5G3 slyyLXn7BDdw== X-IronPort-AV: E=Sophos;i="5.75,434,1589266800"; d="scan'208";a="467199278" Received: from viveksh1-mobl.amr.corp.intel.com (HELO arch-ashland-svkelley.intel.com) ([10.255.83.117]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Aug 2020 12:41:11 -0700 From: Sean V Kelley To: bhelgaas@google.com, Jonathan.Cameron@huawei.com, rjw@rjwysocki.net, ashok.raj@intel.com, tony.luck@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Sean V Kelley , Qiuxu Zhuo Subject: [PATCH V2 8/9] PCI/PME: Add RCEC PME handling Date: Tue, 4 Aug 2020 12:40:51 -0700 Message-Id: <20200804194052.193272-9-sean.v.kelley@intel.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200804194052.193272-1-sean.v.kelley@intel.com> References: <20200804194052.193272-1-sean.v.kelley@intel.com> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org The Root Complex Event Collectors(RCEC) appear as peers of Root Ports and also have the PME capability. So add RCEC support to the current PME service driver and attach the PME service driver to the RCEC device. Co-developed-by: Qiuxu Zhuo Signed-off-by: Sean V Kelley Signed-off-by: Qiuxu Zhuo Reviewed-by: Jonathan Cameron --- drivers/pci/pcie/pme.c | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/drivers/pci/pcie/pme.c b/drivers/pci/pcie/pme.c index 6a32970bb731..87799166c96a 100644 --- a/drivers/pci/pcie/pme.c +++ b/drivers/pci/pcie/pme.c @@ -310,7 +310,10 @@ static int pcie_pme_can_wakeup(struct pci_dev *dev, void *ign) static void pcie_pme_mark_devices(struct pci_dev *port) { pcie_pme_can_wakeup(port, NULL); - if (port->subordinate) + + if (pci_pcie_type(port) == PCI_EXP_TYPE_RC_EC) + pcie_walk_rcec(port, pcie_pme_can_wakeup, NULL); + else if (port->subordinate) pci_walk_bus(port->subordinate, pcie_pme_can_wakeup, NULL); } @@ -320,10 +323,15 @@ static void pcie_pme_mark_devices(struct pci_dev *port) */ static int pcie_pme_probe(struct pcie_device *srv) { - struct pci_dev *port; + struct pci_dev *port = srv->port; struct pcie_pme_service_data *data; int ret; + /* Limit to Root Ports or Root Complex Event Collectors */ + if ((pci_pcie_type(port) != PCI_EXP_TYPE_RC_EC) && + (pci_pcie_type(port) != PCI_EXP_TYPE_ROOT_PORT)) + return -ENODEV; + data = kzalloc(sizeof(*data), GFP_KERNEL); if (!data) return -ENOMEM; @@ -333,7 +341,6 @@ static int pcie_pme_probe(struct pcie_device *srv) data->srv = srv; set_service_data(srv, data); - port = srv->port; pcie_pme_interrupt_enable(port, false); pcie_clear_root_pme_status(port); @@ -445,7 +452,7 @@ static void pcie_pme_remove(struct pcie_device *srv) static struct pcie_port_service_driver pcie_pme_driver = { .name = "pcie_pme", - .port_type = PCI_EXP_TYPE_ROOT_PORT, + .port_type = PCIE_ANY_PORT, .service = PCIE_PORT_SERVICE_PME, .probe = pcie_pme_probe, From patchwork Tue Aug 4 19:40:52 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Kelley, Sean V" X-Patchwork-Id: 1340993 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=intel.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4BLlVy2M8Cz9sTp for ; Wed, 5 Aug 2020 05:41:30 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728442AbgHDTl3 (ORCPT ); Tue, 4 Aug 2020 15:41:29 -0400 Received: from mga18.intel.com ([134.134.136.126]:29288 "EHLO mga18.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728473AbgHDTlN (ORCPT ); Tue, 4 Aug 2020 15:41:13 -0400 IronPort-SDR: tuFWOyiSHzbYeLvx3QRqYZ4LFGhV1KmGO1Yr7hiTTIDLagQ6Ywo/o0WBvm2WqFQ+Ol7HFB+GzW UhHapdmCEx/Q== X-IronPort-AV: E=McAfee;i="6000,8403,9703"; a="139991141" X-IronPort-AV: E=Sophos;i="5.75,434,1589266800"; d="scan'208";a="139991141" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Aug 2020 12:41:13 -0700 IronPort-SDR: 1Ub9LQoTP5pwzztET/j/TpyqCXVHlcGcKqa7wYZLrpmOJpCquVNla1U5paw+rWOjtzxSrFaTJ+ lBZl1wwg61xQ== X-IronPort-AV: E=Sophos;i="5.75,434,1589266800"; d="scan'208";a="467199286" Received: from viveksh1-mobl.amr.corp.intel.com (HELO arch-ashland-svkelley.intel.com) ([10.255.83.117]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Aug 2020 12:41:12 -0700 From: Sean V Kelley To: bhelgaas@google.com, Jonathan.Cameron@huawei.com, rjw@rjwysocki.net, ashok.raj@intel.com, tony.luck@intel.com, sathyanarayanan.kuppuswamy@linux.intel.com Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Qiuxu Zhuo , Sean V Kelley Subject: [PATCH V2 9/9] PCI/AER: Add RCEC AER error injection support Date: Tue, 4 Aug 2020 12:40:52 -0700 Message-Id: <20200804194052.193272-10-sean.v.kelley@intel.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200804194052.193272-1-sean.v.kelley@intel.com> References: <20200804194052.193272-1-sean.v.kelley@intel.com> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Qiuxu Zhuo The Root Complex Event Collectors(RCEC) appear as peers to Root Ports and also have the AER capability. So add RCEC support to the current AER error injection driver. Co-developed-by: Sean V Kelley Signed-off-by: Qiuxu Zhuo Signed-off-by: Sean V Kelley --- drivers/pci/pcie/aer_inject.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/pci/pcie/aer_inject.c b/drivers/pci/pcie/aer_inject.c index c2cbf425afc5..2077dc826fdf 100644 --- a/drivers/pci/pcie/aer_inject.c +++ b/drivers/pci/pcie/aer_inject.c @@ -333,8 +333,11 @@ static int aer_inject(struct aer_error_inj *einj) if (!dev) return -ENODEV; rpdev = pcie_find_root_port(dev); + /* If Root port not found, try to find an RCEC */ + if (!rpdev) + rpdev = dev->rcec; if (!rpdev) { - pci_err(dev, "Root port not found\n"); + pci_err(dev, "Root port or RCEC not found\n"); ret = -ENODEV; goto out_put; }