From patchwork Mon Dec 18 06:46:41 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greentime Hu X-Patchwork-Id: 849844 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="T8AXK9Tz"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3z0XQr2NfFz9sBW for ; Mon, 18 Dec 2017 18:16:52 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932662AbdLRHOF (ORCPT ); Mon, 18 Dec 2017 02:14:05 -0500 Received: from mail-pl0-f67.google.com ([209.85.160.67]:39179 "EHLO mail-pl0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932261AbdLRHOC (ORCPT ); Mon, 18 Dec 2017 02:14:02 -0500 Received: by mail-pl0-f67.google.com with SMTP id bi12so4322248plb.6; Sun, 17 Dec 2017 23:14:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=cYqyGnWnTw15b6t9JGPbEFRJtXXk7DlDNIfuqQsYZp0=; b=T8AXK9TzI2riZ0tzXJ2g28Ul4DcrnVg4T5XoaJtv0ENe8Y2rmU8q5uuy8uJAEGrYXz EQ/ZiZkIGPdfBZyP+ULI/4KUUC6EyP2LMnfTyRohZppr5GOKc1RIWALlBpA+i322VB26 ofgCeyHVlu7RnhHWy66nARVd9wHmtXrI0OBauFkKPr3xMJqaXGWJaOAhI0vbRgfJegvq gsVXOspQpLrZux2vhffLP3H7Xq3qlRC/+bkdmimIBUk35Tfy1L51t/rxtkiO/Ft7RlWl kcFex3LJ6HoG4eBEOIQooBCJuCkPCh7+BNdnFmMoi9Uc4EypRWrMxO5XKYUPeSi21s7p a3nw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=cYqyGnWnTw15b6t9JGPbEFRJtXXk7DlDNIfuqQsYZp0=; b=W57rM4SgnZ5nB1TzCLVMwUwFopuH46gfZVA0QVwIk/sDV+eO+b/jOySaya1Bfuigvd s/2dd4sye7afdzOj0gVD3GTc20IBNp76zEIV0FL1KgB5QPVV1Qd+SVgsp+epmK7xP16F 2Krd8XOty4Qcq9lpRtOCDcU7LSMf3QG6Kr2dmradSiRjRtJzFwR4zEksDsCDcSxHEvBN iz1M56qDmbfXJu4uyp8YnxFozabJkKEfqkxB/E/8hEBMikwyl7qe2N3LCh+q205y0aiT 8MqxFK3nzq/WCSRrQCbgBVwqv5rrESXryylOjTxM8npGBjj4kwMdmdu4Q0OxK8MaYDBM JCQA== X-Gm-Message-State: AKGB3mL2ic0zUkDteJMi9KEfF4ZkNI6Sa84/0KcE/qg3xIo6Y0ihM+/j RZ9UZNhWAzSjkpxcJam5uZ8= X-Google-Smtp-Source: ACJfBouAUwzPi1ysKp88SBmIZWXO6CFT/kJoS7/EdSjbA0xBzBo4+dfOBhAL9/uh0Y9XzaPHLWyMug== X-Received: by 10.84.233.207 with SMTP id m15mr21130853pln.424.1513581241352; Sun, 17 Dec 2017 23:14:01 -0800 (PST) Received: from app09.andestech.com ([118.163.51.199]) by smtp.gmail.com with ESMTPSA id q24sm24013551pfk.168.2017.12.17.23.13.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 17 Dec 2017 23:14:00 -0800 (PST) From: Greentime Hu To: greentime@andestech.com, linux-kernel@vger.kernel.org, arnd@arndb.de, linux-arch@vger.kernel.org, tglx@linutronix.de, jason@lakedaemon.net, marc.zyngier@arm.com, robh+dt@kernel.org, netdev@vger.kernel.org, deanbo422@gmail.com, devicetree@vger.kernel.org, viro@zeniv.linux.org.uk, dhowells@redhat.com, will.deacon@arm.com, daniel.lezcano@linaro.org, linux-serial@vger.kernel.org, geert.uytterhoeven@gmail.com, linus.walleij@linaro.org, mark.rutland@arm.com, greg@kroah.com, ren_guo@c-sky.com, pombredanne@nexb.com Cc: green.hu@gmail.com, Vincent Chen , Rick Chen , Zong Li Subject: [PATCH v4 29/36] dt-bindings: nds32 CPU Bindings Date: Mon, 18 Dec 2017 14:46:41 +0800 Message-Id: <4d249ac85d1f71e60051b2f00e572f3b9fc3280b.1513577007.git.green.hu@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: References: In-Reply-To: References: Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Greentime Hu This patch adds nds32 CPU binding documents. Signed-off-by: Vincent Chen Signed-off-by: Rick Chen Signed-off-by: Zong Li Signed-off-by: Greentime Hu Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/nds32/cpus.txt | 37 ++++++++++++++++++++++ 1 file changed, 37 insertions(+) create mode 100644 Documentation/devicetree/bindings/nds32/cpus.txt diff --git a/Documentation/devicetree/bindings/nds32/cpus.txt b/Documentation/devicetree/bindings/nds32/cpus.txt new file mode 100644 index 0000000..9a52937 --- /dev/null +++ b/Documentation/devicetree/bindings/nds32/cpus.txt @@ -0,0 +1,37 @@ +* Andestech Processor Binding + +This binding specifies what properties must be available in the device tree +representation of a Andestech Processor Core, which is the root node in the +tree. + +Required properties: + + - compatible: + Usage: required + Value type: + Definition: should be one of: + "andestech,n13" + "andestech,n15" + "andestech,d15" + "andestech,n10" + "andestech,d10" + "andestech,nds32v3" + - device_type + Usage: required + Value type: + Definition: must be "cpu" + - reg: Contains CPU index. + - clock-frequency: Contains the clock frequency for CPU, in Hz. + +* Examples + +/ { + cpus { + cpu@0 { + device_type = "cpu"; + compatible = "andestech,n13", "andestech,nds32v3"; + reg = <0x0>; + clock-frequency = <60000000> + }; + }; +}; From patchwork Mon Dec 18 06:46:42 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greentime Hu X-Patchwork-Id: 849843 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="q6y55aQc"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3z0XQk5N3Lz9s82 for ; Mon, 18 Dec 2017 18:16:46 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757813AbdLRHQ0 (ORCPT ); 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Sun, 17 Dec 2017 23:14:04 -0800 (PST) From: Greentime Hu To: greentime@andestech.com, linux-kernel@vger.kernel.org, arnd@arndb.de, linux-arch@vger.kernel.org, tglx@linutronix.de, jason@lakedaemon.net, marc.zyngier@arm.com, robh+dt@kernel.org, netdev@vger.kernel.org, deanbo422@gmail.com, devicetree@vger.kernel.org, viro@zeniv.linux.org.uk, dhowells@redhat.com, will.deacon@arm.com, daniel.lezcano@linaro.org, linux-serial@vger.kernel.org, geert.uytterhoeven@gmail.com, linus.walleij@linaro.org, mark.rutland@arm.com, greg@kroah.com, ren_guo@c-sky.com, pombredanne@nexb.com Cc: green.hu@gmail.com Subject: [PATCH v4 30/36] dt-bindings: nds32 SoC Bindings Date: Mon, 18 Dec 2017 14:46:42 +0800 Message-Id: X-Mailer: git-send-email 1.7.9.5 In-Reply-To: References: In-Reply-To: References: Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Greentime Hu This patch adds nds32 SoC(AE3XX and AG101P) binding documents. Signed-off-by: Greentime Hu Reviewed-by: Rob Herring --- .../devicetree/bindings/nds32/andestech-boards | 40 ++++++++++++++++++++ 1 file changed, 40 insertions(+) create mode 100644 Documentation/devicetree/bindings/nds32/andestech-boards diff --git a/Documentation/devicetree/bindings/nds32/andestech-boards b/Documentation/devicetree/bindings/nds32/andestech-boards new file mode 100644 index 0000000..f5d7569 --- /dev/null +++ b/Documentation/devicetree/bindings/nds32/andestech-boards @@ -0,0 +1,40 @@ +Andestech(nds32) AE3XX Platform +----------------------------------------------------------------------------- +The AE3XX prototype demonstrates the AE3XX example platform on the FPGA. It +is composed of one Andestech(nds32) processor and AE3XX. + +Required properties (in root node): +- compatible = "andestech,ae3xx"; + +Example: +/dts-v1/; +/ { + compatible = "andestech,ae3xx"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; +}; + +Andestech(nds32) AG101P Platform +----------------------------------------------------------------------------- +AG101P is a generic SoC Platform IP that works with any of Andestech(nds32) +processors to provide a cost-effective and high performance solution for +majority of embedded systems in variety of application domains. Users may +simply attach their IP on one of the system buses together with certain glue +logics to complete a SoC solution for a specific application. With +comprehensive simulation and design environments, users may evaluate the +system performance of their applications and track bugs of their designs +efficiently. The optional hardware development platform further provides real +system environment for early prototyping and software/hardware co-development. + +Required properties (in root node): + compatible = "andestech,ag101p"; + +Example: +/dts-v1/; +/ { + compatible = "andestech,ag101p"; + #address-cells = <1>; + #size-cells = <1>; + interrupt-parent = <&intc>; +}; From patchwork Mon Dec 18 06:46:43 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greentime Hu X-Patchwork-Id: 849841 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="RIGLTEBn"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3z0XQF3J5jz9sDB for ; Mon, 18 Dec 2017 18:16:21 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932734AbdLRHOO (ORCPT ); Mon, 18 Dec 2017 02:14:14 -0500 Received: from mail-pg0-f66.google.com ([74.125.83.66]:43352 "EHLO mail-pg0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932261AbdLRHOK (ORCPT ); Mon, 18 Dec 2017 02:14:10 -0500 Received: by mail-pg0-f66.google.com with SMTP id b18so8824954pgv.10; Sun, 17 Dec 2017 23:14:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=HvBAPjbWZ8JmSn8SURBW2WMAtF10xbzgtHNFes3E+kk=; b=RIGLTEBnOVee5Qj1IKKU8tQYy75nnCpSWozYlHPXZu5Q3Q0Y5z4A41aWgx1xFf7fVI yuZoTRWW66C8iXOpPrQWcgFVUcxuNhYAB0BuMnb25Yi7AJ0A9za4qMBbdQd/DD0QhNME SDJrtLyUBMNcLj84+aKkAOKmXBkcnu8NP31oZwfiFis/QGbA4QnTsGI+dgIGz77YOH7n iOj/KPRmhO3Of2uHNRZrO4oR+jNeSN7i5o4FlVDQHEMMVwqu0Dq/tiuH5w+VciG4v3nG EGvTBBAlAp6l+6FUCzTNUXC2DcBC+cmDBsBESKTj2ii9miKCgYx/Jb4YXUlfrEeTI+S2 tVog== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=HvBAPjbWZ8JmSn8SURBW2WMAtF10xbzgtHNFes3E+kk=; b=GlPR77F/WAiAdYDOOcpRSR6pWwTK4IuSSGSk2mDDkTei9ZeikOUT7nbNxoAoe/2AN2 uHEL9h63KaGzkwarSAsDVrbxRb2EWm5oNeM7ZnoWXPB4Fh5vaJ1VdWSwB42ZHLwlW2bL tILIOua64IGrOQTDpJbL3GWYQqbHvYaq4BmRsPEsNovDAvcRiKN8hrHeTsN5aecyxcwl a/77H5T/CYamh/EfVx15Fd+JNPTZdH4eOAHb6KiCWdVAhTSRGiNXlTktlFN+xv+8UYfP UZ6eaG3aw531NjNCXgXFbpKChlREayCzz6cEDp22/HhIIdoJsCm7axcwmhc8ZIyy38uU KL8g== X-Gm-Message-State: AKGB3mKLczRI73Pg4Gf/1At/mPvYGIvXAOuFwATjofMj2JAl8jwWwJcO dBpp/xZcRUgJFttlJtwWDEw= X-Google-Smtp-Source: ACJfBosJk8VOg+3LQq8SpIXWKQAimVQAdyUlLjxrIDaAVDgiAMxFhc6nxkXXrpwxtsuvszOe3sgoSA== X-Received: by 10.99.122.29 with SMTP id v29mr2463260pgc.394.1513581249594; Sun, 17 Dec 2017 23:14:09 -0800 (PST) Received: from app09.andestech.com ([118.163.51.199]) by smtp.gmail.com with ESMTPSA id q24sm24013551pfk.168.2017.12.17.23.14.05 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 17 Dec 2017 23:14:08 -0800 (PST) From: Greentime Hu To: greentime@andestech.com, linux-kernel@vger.kernel.org, arnd@arndb.de, linux-arch@vger.kernel.org, tglx@linutronix.de, jason@lakedaemon.net, marc.zyngier@arm.com, robh+dt@kernel.org, netdev@vger.kernel.org, deanbo422@gmail.com, devicetree@vger.kernel.org, viro@zeniv.linux.org.uk, dhowells@redhat.com, will.deacon@arm.com, daniel.lezcano@linaro.org, linux-serial@vger.kernel.org, geert.uytterhoeven@gmail.com, linus.walleij@linaro.org, mark.rutland@arm.com, greg@kroah.com, ren_guo@c-sky.com, pombredanne@nexb.com Cc: green.hu@gmail.com, Rick Chen Subject: [PATCH v4 31/36] dt-bindings: interrupt-controller: Andestech Internal Vector Interrupt Controller Date: Mon, 18 Dec 2017 14:46:43 +0800 Message-Id: <0f05df8d1287ceaae7aed0caf9613e238a5c1358.1513577007.git.green.hu@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: References: In-Reply-To: References: Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Greentime Hu This patch adds an irqchip driver document for the Andestech Internal Vector Interrupt Controller. Signed-off-by: Rick Chen Signed-off-by: Greentime Hu Reviewed-by: Rob Herring --- .../interrupt-controller/andestech,ativic32.txt | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt diff --git a/Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt b/Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt new file mode 100644 index 0000000..f4b4193 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt @@ -0,0 +1,19 @@ +* Andestech Internal Vector Interrupt Controller + +The Internal Vector Interrupt Controller (IVIC) is a basic interrupt controller +suitable for a simpler SoC platform not requiring a more sophisticated and +bigger External Vector Interrupt Controller. + + +Main node required properties: + +- compatible : should at least contain "andestech,ativic32". +- interrupt-controller : Identifies the node as an interrupt controller +- #interrupt-cells: 1 cells and refer to interrupt-controller/interrupts + +Examples: + intc: interrupt-controller { + compatible = "andestech,ativic32"; + #interrupt-cells = <1>; + interrupt-controller; + }; From patchwork Mon Dec 18 06:46:48 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Greentime Hu X-Patchwork-Id: 849834 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="cThv5pK1"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3z0XNf3HnNz9t2M for ; Mon, 18 Dec 2017 18:14:58 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932745AbdLRHOj (ORCPT ); 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Sun, 17 Dec 2017 23:14:29 -0800 (PST) From: Greentime Hu To: greentime@andestech.com, linux-kernel@vger.kernel.org, arnd@arndb.de, linux-arch@vger.kernel.org, tglx@linutronix.de, jason@lakedaemon.net, marc.zyngier@arm.com, robh+dt@kernel.org, netdev@vger.kernel.org, deanbo422@gmail.com, devicetree@vger.kernel.org, viro@zeniv.linux.org.uk, dhowells@redhat.com, will.deacon@arm.com, daniel.lezcano@linaro.org, linux-serial@vger.kernel.org, geert.uytterhoeven@gmail.com, linus.walleij@linaro.org, mark.rutland@arm.com, greg@kroah.com, ren_guo@c-sky.com, pombredanne@nexb.com Cc: Rick Chen , green.hu@gmail.com Subject: [PATCH v4 36/36] dt-bindings: timer: Add andestech atcpit100 timer binding doc Date: Mon, 18 Dec 2017 14:46:48 +0800 Message-Id: X-Mailer: git-send-email 1.7.9.5 In-Reply-To: References: In-Reply-To: References: Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Rick Chen Add a document to describe Andestech atcpit100 timer and binding information. Signed-off-by: Rick Chen Signed-off-by: Greentime Hu Acked-by: Rob Herring --- .../bindings/timer/andestech,atcpit100-timer.txt | 33 ++++++++++++++++++++ 1 file changed, 33 insertions(+) create mode 100644 Documentation/devicetree/bindings/timer/andestech,atcpit100-timer.txt diff --git a/Documentation/devicetree/bindings/timer/andestech,atcpit100-timer.txt b/Documentation/devicetree/bindings/timer/andestech,atcpit100-timer.txt new file mode 100644 index 0000000..4c9ea59 --- /dev/null +++ b/Documentation/devicetree/bindings/timer/andestech,atcpit100-timer.txt @@ -0,0 +1,33 @@ +Andestech ATCPIT100 timer +------------------------------------------------------------------ +ATCPIT100 is a generic IP block from Andes Technology, embedded in +Andestech AE3XX platforms and other designs. + +This timer is a set of compact multi-function timers, which can be +used as pulse width modulators (PWM) as well as simple timers. + +It supports up to 4 PIT channels. Each PIT channel is a +multi-function timer and provide the following usage scenarios: +One 32-bit timer +Two 16-bit timers +Four 8-bit timers +One 16-bit PWM +One 16-bit timer and one 8-bit PWM +Two 8-bit timer and one 8-bit PWM + +Required properties: +- compatible : Should be "andestech,atcpit100" +- reg : Address and length of the register set +- interrupts : Reference to the timer interrupt +- clocks : a clock to provide the tick rate for "andestech,atcpit100" +- clock-names : should be "PCLK" for the peripheral clock source. + +Examples: + +timer0: timer@f0400000 { + compatible = "andestech,atcpit100"; + reg = <0xf0400000 0x1000>; + interrupts = <2>; + clocks = <&apb>; + clock-names = "PCLK"; +};