From patchwork Fri Jul 17 01:52:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jianqun Xu X-Patchwork-Id: 1330674 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=rock-chips.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4B7Djz3cHyz9sR4 for ; Fri, 17 Jul 2020 11:56:07 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726204AbgGQB4E (ORCPT ); Thu, 16 Jul 2020 21:56:04 -0400 Received: from lucky1.263xmail.com ([211.157.147.132]:37790 "EHLO lucky1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726233AbgGQB4D (ORCPT ); Thu, 16 Jul 2020 21:56:03 -0400 Received: from localhost (unknown [192.168.167.69]) by lucky1.263xmail.com (Postfix) with ESMTP id 7396BEC3AB; Fri, 17 Jul 2020 09:52:47 +0800 (CST) X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-ADDR-CHECKED4: 1 X-ANTISPAM-LEVEL: 2 X-ABS-CHECKED: 0 Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.263.net (postfix) whith ESMTP id P18496T139713866360576S1594950764823899_; Fri, 17 Jul 2020 09:52:46 +0800 (CST) X-IP-DOMAINF: 1 X-UNIQUE-TAG: <472f7c30acc06362d3fcfdbc3e8dc8ce> X-RL-SENDER: jay.xu@rock-chips.com X-SENDER: xjq@rock-chips.com X-LOGIN-NAME: jay.xu@rock-chips.com X-FST-TO: heiko@sntech.de X-SENDER-IP: 58.22.7.114 X-ATTACHMENT-NUM: 0 X-DNS-TYPE: 0 X-System-Flag: 0 From: Jianqun Xu To: heiko@sntech.de, linus.walleij@linaro.org Cc: linux-gpio@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kever.yang@rock-chips.com, david.wu@rock-chips.com, Jianqun Xu Subject: [PATCH 06/13] pinctrl: rockchip: do codingstyle Date: Fri, 17 Jul 2020 09:52:43 +0800 Message-Id: <20200717015243.14149-1-jay.xu@rock-chips.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200717014908.13914-1-jay.xu@rock-chips.com> References: <20200717014908.13914-1-jay.xu@rock-chips.com> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add RK3399 definitions to separate from other SoCs. Signed-off-by: Jianqun Xu --- drivers/pinctrl/pinctrl-rockchip.c | 19 +++++++++++-------- 1 file changed, 11 insertions(+), 8 deletions(-) diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c index 1be4627f3877..71335ed003b3 100644 --- a/drivers/pinctrl/pinctrl-rockchip.c +++ b/drivers/pinctrl/pinctrl-rockchip.c @@ -2050,6 +2050,9 @@ static void rk3368_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank, #define RK3399_PULL_GRF_OFFSET 0xe040 #define RK3399_PULL_PMU_OFFSET 0x40 #define RK3399_DRV_3BITS_PER_PIN 3 +#define RK3399_PULL_BITS_PER_PIN 2 +#define RK3399_PULL_PINS_PER_REG 8 +#define RK3399_PULL_BANK_STRIDE 16 static void rk3399_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank, int pin_num, struct regmap **regmap, @@ -2062,22 +2065,22 @@ static void rk3399_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank, *regmap = info->regmap_pmu; *reg = RK3399_PULL_PMU_OFFSET; - *reg += bank->bank_num * RK3188_PULL_BANK_STRIDE; + *reg += bank->bank_num * RK3399_PULL_BANK_STRIDE; - *reg += ((pin_num / RK3188_PULL_PINS_PER_REG) * 4); - *bit = pin_num % RK3188_PULL_PINS_PER_REG; - *bit *= RK3188_PULL_BITS_PER_PIN; + *reg += ((pin_num / RK3399_PULL_PINS_PER_REG) * 4); + *bit = pin_num % RK3399_PULL_PINS_PER_REG; + *bit *= RK3399_PULL_BITS_PER_PIN; } else { *regmap = info->regmap_base; *reg = RK3399_PULL_GRF_OFFSET; /* correct the offset, as we're starting with the 3rd bank */ *reg -= 0x20; - *reg += bank->bank_num * RK3188_PULL_BANK_STRIDE; - *reg += ((pin_num / RK3188_PULL_PINS_PER_REG) * 4); + *reg += bank->bank_num * RK3399_PULL_BANK_STRIDE; + *reg += ((pin_num / RK3399_PULL_PINS_PER_REG) * 4); - *bit = (pin_num % RK3188_PULL_PINS_PER_REG); - *bit *= RK3188_PULL_BITS_PER_PIN; + *bit = (pin_num % RK3399_PULL_PINS_PER_REG); + *bit *= RK3399_PULL_BITS_PER_PIN; } }