From patchwork Thu Jul 9 08:01:56 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 1325810 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=bootlin.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4B2TDB0VKMz9sRR for ; Thu, 9 Jul 2020 18:02:18 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726220AbgGIICI (ORCPT ); Thu, 9 Jul 2020 04:02:08 -0400 Received: from relay4-d.mail.gandi.net ([217.70.183.196]:38441 "EHLO relay4-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726118AbgGIICH (ORCPT ); Thu, 9 Jul 2020 04:02:07 -0400 X-Originating-IP: 91.224.148.103 Received: from localhost.localdomain (unknown [91.224.148.103]) (Authenticated sender: miquel.raynal@bootlin.com) by relay4-d.mail.gandi.net (Postfix) with ESMTPSA id 49183E0008; Thu, 9 Jul 2020 08:02:00 +0000 (UTC) From: Miquel Raynal To: Boris Brezillon , linux-i3c@lists.infradead.org Cc: Thomas Petazzoni , Rob Herring , , , Conor Culhane , Rajeev Huralikoppi , Miquel Raynal Subject: [PATCH 1/4] dt-bindings: Add vendor prefix for Silvaco Date: Thu, 9 Jul 2020 10:01:56 +0200 Message-Id: <20200709080159.2178-1-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Silvaco, Inc. is an EDA provider of software tools used for process and device development and for analog/mixed-signal, power IC and memory design [1]. [1] https://www.silvaco.com/company/profile/profile.html Signed-off-by: Miquel Raynal --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 9aeab66be85f..5933966db783 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -1004,6 +1004,8 @@ patternProperties: description: Shenzhen Sunchip Technology Co., Ltd "^SUNW,.*": description: Sun Microsystems, Inc + "^svc,.*": + description: Silvaco, Inc. "^swir,.*": description: Sierra Wireless "^syna,.*": From patchwork Thu Jul 9 08:01:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 1325811 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=bootlin.com Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 4B2TDn36Czz9sRR for ; Thu, 9 Jul 2020 18:02:49 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726262AbgGIICr (ORCPT ); Thu, 9 Jul 2020 04:02:47 -0400 Received: from relay4-d.mail.gandi.net ([217.70.183.196]:50387 "EHLO relay4-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726124AbgGIICJ (ORCPT ); Thu, 9 Jul 2020 04:02:09 -0400 X-Originating-IP: 91.224.148.103 Received: from localhost.localdomain (unknown [91.224.148.103]) (Authenticated sender: miquel.raynal@bootlin.com) by relay4-d.mail.gandi.net (Postfix) with ESMTPSA id 09394E0003; Thu, 9 Jul 2020 08:02:04 +0000 (UTC) From: Miquel Raynal To: Boris Brezillon , linux-i3c@lists.infradead.org Cc: Thomas Petazzoni , Rob Herring , , , Conor Culhane , Rajeev Huralikoppi , Miquel Raynal Subject: [PATCH 2/4] dt-bindings: i3c: Describe Silvaco master binding Date: Thu, 9 Jul 2020 10:01:57 +0200 Message-Id: <20200709080159.2178-2-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200709080159.2178-1-miquel.raynal@bootlin.com> References: <20200709080159.2178-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Silvaco provide a dual-role I3C master. Description is rather simple: it needs a register mapping, three clocks and an interrupt. Signed-off-by: Miquel Raynal --- .../bindings/i3c/svc,i3c-master.yaml | 59 +++++++++++++++++++ 1 file changed, 59 insertions(+) create mode 100644 Documentation/devicetree/bindings/i3c/svc,i3c-master.yaml diff --git a/Documentation/devicetree/bindings/i3c/svc,i3c-master.yaml b/Documentation/devicetree/bindings/i3c/svc,i3c-master.yaml new file mode 100644 index 000000000000..11e670c6b76f --- /dev/null +++ b/Documentation/devicetree/bindings/i3c/svc,i3c-master.yaml @@ -0,0 +1,59 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/i3c/svc,i3c-master.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Silvaco I3C master + +maintainers: + - Conor Culhane + +properties: + compatible: + const: svc,i3c-master + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clock-names: + description: | + There are three clocks: + pclk: System clock + fast_clk: Fast clock (for the bus) + slow_clk: Slow clock (for other events) + + items: + - const: pclk + - const: fast_clk + - const: slow_clk + + clocks: + minItems: 3 + maxItems: 3 + + resets: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - clock-names + - clocks + +examples: + - | + i3c-master@a0000000 { + compatible = "svc,i3c-master"; + clocks = <&zynqmp_clk 71>, <&fclk>, <&sclk>; + clock-names = "pclk", "fast_clk", "slow_clk"; + interrupt-parent = <&gic>; + interrupts = <0 89 4>; + reg = <0x0 0xa0000000 0x0 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + };