From patchwork Thu Jul 2 09:37:17 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miles Chen X-Patchwork-Id: 1321210 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=mediatek.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=mediatek.com header.i=@mediatek.com header.a=rsa-sha256 header.s=dk header.b=jCpd8f9K; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 49yCgb6QRQz9sTT for ; Thu, 2 Jul 2020 19:37:47 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728192AbgGBJh3 (ORCPT ); Thu, 2 Jul 2020 05:37:29 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:57567 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726805AbgGBJh2 (ORCPT ); Thu, 2 Jul 2020 05:37:28 -0400 X-UUID: d9cb19290049469cb5a4d6253553cdb7-20200702 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:Message-ID:Date:Subject:CC:To:From; bh=cHL3FGvns2Vq3Q+lzPqG/tPY0T/sEGYmRDbEd2Ph2NU=; b=jCpd8f9KSqHTHBz+nHWc0cEaktfjIHJ/vfaVobp8cBqsurxP5NwPVPqYcUuU512nS88J2UZ+rKM9OZWWvq16OCH9+I/REqwl74Fou8RFMT6V+VKNVxhl64owiXokMF6MlnPJc4QVPjbRzahoVZedCDltdwCEB8k24WKUpSaNfug=; X-UUID: d9cb19290049469cb5a4d6253553cdb7-20200702 Received: from mtkcas07.mediatek.inc [(172.21.101.84)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 1698284110; Thu, 02 Jul 2020 17:37:24 +0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs06n2.mediatek.inc (172.21.101.130) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 2 Jul 2020 17:37:22 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 2 Jul 2020 17:37:20 +0800 From: Miles Chen To: Joerg Roedel , Rob Herring , Matthias Brugger CC: , , , , , , Yong Wu , Chao Hao , Yingjoe Chen , Miles Chen Subject: [PATCH 1/4] dt-bindings: mediatek: add mediatek,infracfg phandle Date: Thu, 2 Jul 2020 17:37:17 +0800 Message-ID: <20200702093721.6063-1-miles.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 X-TM-SNTS-SMTP: 888036A33ECD69FCAC32F294B9ADA91343BDD3CA9220D418C65C109C141F4D452000:8 X-MTK: N Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add a description for mediatek,infracfg. We can check if 4GB mode is enable by reading it instead of checking the unexported symbol "max_pfn". This is a step towards building mtk_iommu as a kernel module. Cc: Yong Wu Signed-off-by: Miles Chen --- Documentation/devicetree/bindings/iommu/mediatek,iommu.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt b/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt index ce59a505f5a4..a7881deabcca 100644 --- a/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt +++ b/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt @@ -74,6 +74,8 @@ Required properties: - mediatek,larbs : List of phandle to the local arbiters in the current Socs. Refer to bindings/memory-controllers/mediatek,smi-larb.txt. It must sort according to the local arbiter index, like larb0, larb1, larb2... +- mediatek,infracfg: a phandle to infracfg. It is used to confirm if 4GB mode is set. + It is an optional property, add it when the SoC have 4g mode. - iommu-cells : must be 1. This is the mtk_m4u_id according to the HW. Specifies the mtk_m4u_id as defined in dt-binding/memory/mt2701-larb-port.h for mt2701, mt7623