From patchwork Wed Jul 1 13:48:53 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurent Pinchart X-Patchwork-Id: 1320478 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org (client-ip=23.128.96.18; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=ideasonboard.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ideasonboard.com header.i=@ideasonboard.com header.a=rsa-sha256 header.s=mail header.b=VliOYdrX; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by ozlabs.org (Postfix) with ESMTP id 49xjHy5JhMz9sTV for ; Wed, 1 Jul 2020 23:49:02 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730680AbgGANtC (ORCPT ); Wed, 1 Jul 2020 09:49:02 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44970 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730408AbgGANtC (ORCPT ); Wed, 1 Jul 2020 09:49:02 -0400 Received: from perceval.ideasonboard.com (perceval.ideasonboard.com [IPv6:2001:4b98:dc2:55:216:3eff:fef7:d647]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B685CC08C5C1; Wed, 1 Jul 2020 06:49:01 -0700 (PDT) Received: from pendragon.bb.dnainternet.fi (81-175-216-236.bb.dnainternet.fi [81.175.216.236]) by perceval.ideasonboard.com (Postfix) with ESMTPSA id 0D3A7556; Wed, 1 Jul 2020 15:48:59 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ideasonboard.com; s=mail; t=1593611340; bh=S8TQ71TulTFVrL2Q9zX8NQ+PuGr/u92GnJGOwJrQiwI=; h=From:To:Cc:Subject:Date:From; b=VliOYdrXr2sKPCqJSh4YoJzsM8dwmiUS8vf/kCrxHAg3hromhADuzZVpsyniQ1Amm 9XOcQGi0KI3Nw8nnYMH0MHJ/cFaYC4SIEnT0z3il6xRVVIRY+ewHUMqZjIgEJqFfNx JFTHrl6RXUWGdNIcSZIZv5yTQmQGnOx7n1i5b9DM= From: Laurent Pinchart To: devicetree@vger.kernel.org Cc: Kishon Vijay Abraham I , Vinod Koul , Anurag Kumar Vulisha , linux-kernel@vger.kernel.org, Rob Herring Subject: [PATCH] dt-bindings: phy: zynqmp-psgtr: Fix example's numbers of cells in reg Date: Wed, 1 Jul 2020 16:48:53 +0300 Message-Id: <20200701134853.30656-1-laurent.pinchart@ideasonboard.com> X-Mailer: git-send-email 2.27.0 MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The DT examples are by default compiled in a parent that has #address-cells and #size-cells both set to 1. Fix the example accordingly, even if it doesn't match the actual hardware, as this is the recommended practice for DT bindings examples. Fixes: cea0f76a483d ("dt-bindings: phy: Add DT bindings for Xilinx ZynqMP PSGTR PHY") Signed-off-by: Laurent Pinchart --- Documentation/devicetree/bindings/phy/xlnx,zynqmp-psgtr.yaml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/phy/xlnx,zynqmp-psgtr.yaml b/Documentation/devicetree/bindings/phy/xlnx,zynqmp-psgtr.yaml index 09e3cde7ebca..04d5654efb38 100644 --- a/Documentation/devicetree/bindings/phy/xlnx,zynqmp-psgtr.yaml +++ b/Documentation/devicetree/bindings/phy/xlnx,zynqmp-psgtr.yaml @@ -94,8 +94,8 @@ examples: - | phy: phy@fd400000 { compatible = "xlnx,zynqmp-psgtr-v1.1"; - reg = <0x0 0xfd400000 0x0 0x40000>, - <0x0 0xfd3d0000 0x0 0x1000>; + reg = <0xfd400000 0x40000>, + <0xfd3d0000 0x1000>; reg-names = "serdes", "siou"; clocks = <&refclks 3>, <&refclks 2>, <&refclks 0>; clock-names = "ref1", "ref2", "ref3";