From patchwork Wed Jun 24 09:16:23 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?C=C3=A9dric_Le_Goater?= X-Patchwork-Id: 1315992 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49sJ3K6FZtz9sRR for ; Wed, 24 Jun 2020 19:37:49 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=kaod.org Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 49sJ3K5WWNzDqfd for ; Wed, 24 Jun 2020 19:37:49 +1000 (AEST) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=kaod.org (client-ip=46.105.56.76; helo=6.mo179.mail-out.ovh.net; envelope-from=clg@kaod.org; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=kaod.org Received: from 6.mo179.mail-out.ovh.net (6.mo179.mail-out.ovh.net [46.105.56.76]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 49sJ0r340hzDqhF for ; Wed, 24 Jun 2020 19:35:39 +1000 (AEST) Received: from player731.ha.ovh.net (unknown [10.110.115.111]) by mo179.mail-out.ovh.net (Postfix) with ESMTP id E736916DD42 for ; Wed, 24 Jun 2020 11:16:33 +0200 (CEST) Received: from kaod.org (lfbn-tou-1-921-245.w86-210.abo.wanadoo.fr [86.210.152.245]) (Authenticated sender: clg@kaod.org) by player731.ha.ovh.net (Postfix) with ESMTPSA id E489F137D809F; Wed, 24 Jun 2020 09:16:29 +0000 (UTC) Authentication-Results: garm.ovh; auth=pass (GARM-97G0021111429c-5ead-484f-8a2e-d39bf5e33955,E10FFB909967CDEE565F5962A97A61CD472B7760) smtp.auth=clg@kaod.org From: =?utf-8?q?C=C3=A9dric_Le_Goater?= To: skiboot@lists.ozlabs.org Date: Wed, 24 Jun 2020 11:16:23 +0200 Message-Id: <20200624091625.324632-2-clg@kaod.org> X-Mailer: git-send-email 2.25.4 In-Reply-To: <20200624091625.324632-1-clg@kaod.org> References: <20200624091625.324632-1-clg@kaod.org> MIME-Version: 1.0 X-Ovh-Tracer-Id: 1869275320776494041 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrgeduhedrudekjedgtdeiucetufdoteggodetrfdotffvucfrrhhofhhilhgvmecuqfggjfdpvefjgfevmfevgfenuceurghilhhouhhtmecuhedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmnecujfgurhephffvufffkffojghfgggtgfesthekredtredtjeenucfhrhhomhepveorughrihgtucfnvgcuifhorghtvghruceotghlgheskhgrohgurdhorhhgqeenucggtffrrghtthgvrhhnpefgieetvdefudeghedvveejudeihfeiteffjeetjeeukefhgffgvedugedugedugfenucfkpheptddrtddrtddrtddpkeeirddvuddtrdduhedvrddvgeehnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmohguvgepshhmthhpqdhouhhtpdhhvghlohepphhlrgihvghrjeefuddrhhgrrdhovhhhrdhnvghtpdhinhgvtheptddrtddrtddrtddpmhgrihhlfhhrohhmpegtlhhgsehkrghougdrohhrghdprhgtphhtthhopehskhhisghoohhtsehlihhsthhsrdhoiihlrggsshdrohhrgh Subject: [Skiboot] [PATCH 1/3] xive/p9: use PAGE_SIZE X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Signed-off-by: Cédric Le Goater --- hw/xive.c | 38 +++++++++++++++++++------------------- 1 file changed, 19 insertions(+), 19 deletions(-) diff --git a/hw/xive.c b/hw/xive.c index 22fadf2dfd56..657b7e798957 100644 --- a/hw/xive.c +++ b/hw/xive.c @@ -168,7 +168,7 @@ * * TODO: adjust the VC BAR range for END ESBs on this value */ -#define EQ_PER_PAGE (0x10000 / sizeof(struct xive_eq)) +#define EQ_PER_PAGE (PAGE_SIZE / sizeof(struct xive_eq)) #define XIVE_EQ_ORDER 20 /* 1M ENDs */ #define XIVE_EQ_COUNT (1ul << XIVE_EQ_ORDER) @@ -203,7 +203,7 @@ * * TODO: adjust the PC BAR range */ -#define VP_PER_PAGE (0x10000 / sizeof(struct xive_vp)) +#define VP_PER_PAGE (PAGE_SIZE / sizeof(struct xive_vp)) #define NVT_SHIFT 19 /* in sync with EQ_W6_NVT_INDEX */ @@ -907,7 +907,7 @@ static uint32_t xive_alloc_eq_set(struct xive *x, bool alloc_indirect) if (alloc_indirect) { /* Allocate/provision indirect page during boot only */ xive_vdbg(x, "Indirect empty, provisioning from local pool\n"); - page = local_alloc(x->chip_id, 0x10000, 0x10000); + page = local_alloc(x->chip_id, PAGE_SIZE, PAGE_SIZE); if (!page) { xive_dbg(x, "provisioning failed !\n"); return XIVE_ALLOC_NO_MEM; @@ -921,7 +921,7 @@ static uint32_t xive_alloc_eq_set(struct xive *x, bool alloc_indirect) return XIVE_ALLOC_NO_IND; } } - memset(page, 0, 0x10000); + memset(page, 0, PAGE_SIZE); x->eq_ind_base[ind_idx] = cpu_to_be64(vsd_flags | (((uint64_t)page) & VSD_ADDRESS_MASK)); /* Any cache scrub needed ? */ @@ -965,7 +965,7 @@ static bool xive_provision_vp_ind(struct xive *x, uint32_t vp_idx, uint32_t orde return false; /* Install the page */ - memset(page, 0, 0x10000); + memset(page, 0, PAGE_SIZE); vsd = ((uint64_t)page) & VSD_ADDRESS_MASK; vsd |= SETFIELD(VSD_TSIZE, 0ull, 4); vsd |= SETFIELD(VSD_MODE, 0ull, VSD_MODE_EXCLUSIVE); @@ -1399,7 +1399,7 @@ static bool xive_set_local_tables(struct xive *x) /* Setup quue overflows */ for (i = 0; i < VC_QUEUE_OVF_COUNT; i++) { - u64 addr = ((uint64_t)x->q_ovf) + i * 0x10000; + u64 addr = ((uint64_t)x->q_ovf) + i * PAGE_SIZE; u64 cfg, sreg, sregx; if (!xive_set_vsd(x, VST_TSEL_IRQ, i, base | @@ -1660,8 +1660,8 @@ static bool xive_prealloc_tables(struct xive *x) xive_dbg(x, "IVT at %p size 0x%lx\n", x->ivt_base, IVT_SIZE); /* Indirect EQ table. Limited to one top page. */ - al = ALIGN_UP(XIVE_EQ_TABLE_SIZE, 0x10000); - if (al > 0x10000) { + al = ALIGN_UP(XIVE_EQ_TABLE_SIZE, PAGE_SIZE); + if (al > PAGE_SIZE) { xive_err(x, "EQ indirect table is too big !\n"); return false; } @@ -1675,8 +1675,8 @@ static bool xive_prealloc_tables(struct xive *x) x->eq_ind_count = XIVE_EQ_TABLE_SIZE / XIVE_VSD_SIZE; /* Indirect VP table. Limited to one top page. */ - al = ALIGN_UP(XIVE_VP_TABLE_SIZE, 0x10000); - if (al > 0x10000) { + al = ALIGN_UP(XIVE_VP_TABLE_SIZE, PAGE_SIZE); + if (al > PAGE_SIZE) { xive_err(x, "VP indirect table is too big !\n"); return false; } @@ -1704,13 +1704,13 @@ static bool xive_prealloc_tables(struct xive *x) u64 vsd; /* Indirect entries have a VSD format */ - page = local_alloc(x->chip_id, 0x10000, 0x10000); + page = local_alloc(x->chip_id, PAGE_SIZE, PAGE_SIZE); if (!page) { xive_err(x, "Failed to allocate VP page\n"); return false; } - xive_dbg(x, "VP%d at %p size 0x%x\n", i, page, 0x10000); - memset(page, 0, 0x10000); + xive_dbg(x, "VP%d at %p size 0x%x\n", i, page, PAGE_SIZE); + memset(page, 0, PAGE_SIZE); vsd = ((uint64_t)page) & VSD_ADDRESS_MASK; vsd |= SETFIELD(VSD_TSIZE, 0ull, 4); @@ -1720,7 +1720,7 @@ static bool xive_prealloc_tables(struct xive *x) } /* Allocate the queue overflow pages */ - x->q_ovf = local_alloc(x->chip_id, VC_QUEUE_OVF_COUNT * 0x10000, 0x10000); + x->q_ovf = local_alloc(x->chip_id, VC_QUEUE_OVF_COUNT * PAGE_SIZE, PAGE_SIZE); if (!x->q_ovf) { xive_err(x, "Failed to allocate queue overflow\n"); return false; @@ -1734,7 +1734,7 @@ static void xive_add_provisioning_properties(void) uint32_t i, count; dt_add_property_cells(xive_dt_node, - "ibm,xive-provision-page-size", 0x10000); + "ibm,xive-provision-page-size", PAGE_SIZE); count = 1 << xive_chips_alloc_bits; for (i = 0; i < count; i++) @@ -2719,7 +2719,7 @@ static void xive_ipi_eoi(struct xive *x, uint32_t idx) * This allows us to then do a re-trigger if Q was set rather * than synthetizing an interrupt in software */ - eoi_val = in_8(mm + 0x10000 + XIVE_ESB_SET_PQ_00); + eoi_val = in_8(mm + PAGE_SIZE + XIVE_ESB_SET_PQ_00); if (eoi_val & 1) { out_8(mm + XIVE_ESB_STORE_TRIGGER, 0); } @@ -2934,10 +2934,10 @@ static void xive_init_cpu_emulation(struct xive_cpu_state *xs, xs->eqbuf = xive_get_eq_buf(xs->vp_blk, xs->eq_idx + XIVE_EMULATION_PRIO); assert(xs->eqbuf); - memset(xs->eqbuf, 0, 0x10000); + memset(xs->eqbuf, 0, PAGE_SIZE); xs->eqptr = 0; - xs->eqmsk = (0x10000/4) - 1; + xs->eqmsk = (PAGE_SIZE/4) - 1; xs->eqgen = 0; x = xive_from_vc_blk(xs->eq_blk); assert(x); @@ -3047,7 +3047,7 @@ static void xive_provision_cpu(struct xive_cpu_state *xs, struct cpu_thread *c) /* Provision one of the queues. Allocate the memory on the * chip where the CPU resides */ - p = local_alloc(c->chip_id, 0x10000, 0x10000); + p = local_alloc(c->chip_id, PAGE_SIZE, PAGE_SIZE); if (!p) { xive_err(x, "Failed to allocate EQ backing store\n"); assert(false); From patchwork Wed Jun 24 09:16:24 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?C=C3=A9dric_Le_Goater?= X-Patchwork-Id: 1316039 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49sKLn1K4wz9sQt for ; Wed, 24 Jun 2020 20:36:17 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=kaod.org Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 49sKLn0bS6zDqdp for ; Wed, 24 Jun 2020 20:36:17 +1000 (AEST) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=kaod.org (client-ip=188.165.43.98; helo=14.mo3.mail-out.ovh.net; envelope-from=clg@kaod.org; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=kaod.org Received: from 14.mo3.mail-out.ovh.net (14.mo3.mail-out.ovh.net [188.165.43.98]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 49sKLb0QHwzDqZj for ; Wed, 24 Jun 2020 20:36:05 +1000 (AEST) Received: from player731.ha.ovh.net (unknown [10.108.54.156]) by mo3.mail-out.ovh.net (Postfix) with ESMTP id 2D4B8257F13 for ; Wed, 24 Jun 2020 11:16:38 +0200 (CEST) Received: from kaod.org (lfbn-tou-1-921-245.w86-210.abo.wanadoo.fr [86.210.152.245]) (Authenticated sender: clg@kaod.org) by player731.ha.ovh.net (Postfix) with ESMTPSA id A7061137D80C9; Wed, 24 Jun 2020 09:16:33 +0000 (UTC) Authentication-Results: garm.ovh; auth=pass (GARM-97G002bef7e8ae-963b-427b-a831-f71470126f43,E10FFB909967CDEE565F5962A97A61CD472B7760) smtp.auth=clg@kaod.org From: =?utf-8?q?C=C3=A9dric_Le_Goater?= To: skiboot@lists.ozlabs.org Date: Wed, 24 Jun 2020 11:16:24 +0200 Message-Id: <20200624091625.324632-3-clg@kaod.org> X-Mailer: git-send-email 2.25.4 In-Reply-To: <20200624091625.324632-1-clg@kaod.org> References: <20200624091625.324632-1-clg@kaod.org> MIME-Version: 1.0 X-Ovh-Tracer-Id: 1870682698455223257 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrgeduhedrudekjedgtdeiucetufdoteggodetrfdotffvucfrrhhofhhilhgvmecuqfggjfdpvefjgfevmfevgfenuceurghilhhouhhtmecuhedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmnecujfgurhephffvufffkffojghfgggtgfesthekredtredtjeenucfhrhhomhepveorughrihgtucfnvgcuifhorghtvghruceotghlgheskhgrohgurdhorhhgqeenucggtffrrghtthgvrhhnpefgieetvdefudeghedvveejudeihfeiteffjeetjeeukefhgffgvedugedugedugfenucfkpheptddrtddrtddrtddpkeeirddvuddtrdduhedvrddvgeehnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmohguvgepshhmthhpqdhouhhtpdhhvghlohepphhlrgihvghrjeefuddrhhgrrdhovhhhrdhnvghtpdhinhgvtheptddrtddrtddrtddpmhgrihhlfhhrohhmpegtlhhgsehkrghougdrohhrghdprhgtphhtthhopehskhhisghoohhtsehlihhsthhsrdhoiihlrggsshdrohhrgh Subject: [Skiboot] [PATCH 2/3] xive/p9: Introduce XIVE_ESB_SIZE X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Replace 0x20000 with a clear define. Signed-off-by: Cédric Le Goater --- hw/xive.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/hw/xive.c b/hw/xive.c index 657b7e798957..845321ed59ff 100644 --- a/hw/xive.c +++ b/hw/xive.c @@ -157,6 +157,7 @@ /* Use 64K for everything by default */ #define XIVE_ESB_SHIFT (16 + 1) /* trigger + mgmt pages */ +#define XIVE_ESB_SIZE (1ul << XIVE_ESB_SHIFT) /* 2 pages */ /* Max number of EQs. We allocate an indirect table big enough so * that when fully populated we can have that many EQs. @@ -1101,7 +1102,7 @@ static void xive_scrub_workaround_eq(struct xive *x, uint32_t block __unused, ui /* EQ variant of the workaround described in __xive_cache_scrub(), * a simple non-side effect load from ESn will do */ - mmio = x->eq_mmio + idx * 0x20000; + mmio = x->eq_mmio + idx * XIVE_ESB_SIZE; /* Ensure the above has returned before we do anything else * the XIVE store queue is completely empty @@ -1939,7 +1940,7 @@ void *xive_get_trigger_port(uint32_t girq) girq >= x->int_ipi_top) return NULL; - return x->esb_mmio + idx * 0x20000; + return x->esb_mmio + idx * XIVE_ESB_SIZE; } } @@ -2710,7 +2711,7 @@ static void xive_ipi_init(struct xive *x, struct cpu_thread *cpu) static void xive_ipi_eoi(struct xive *x, uint32_t idx) { - uint8_t *mm = x->esb_mmio + idx * 0x20000; + uint8_t *mm = x->esb_mmio + idx * XIVE_ESB_SIZE; uint8_t eoi_val; /* For EOI, we use the special MMIO that does a clear of both @@ -2727,7 +2728,7 @@ static void xive_ipi_eoi(struct xive *x, uint32_t idx) static void xive_ipi_trigger(struct xive *x, uint32_t idx) { - uint8_t *mm = x->esb_mmio + idx * 0x20000; + uint8_t *mm = x->esb_mmio + idx * XIVE_ESB_SIZE; xive_vdbg(x, "Trigger IPI 0x%x\n", idx); @@ -2941,7 +2942,7 @@ static void xive_init_cpu_emulation(struct xive_cpu_state *xs, xs->eqgen = 0; x = xive_from_vc_blk(xs->eq_blk); assert(x); - xs->eqmmio = x->eq_mmio + (xs->eq_idx + XIVE_EMULATION_PRIO) * 0x20000; + xs->eqmmio = x->eq_mmio + (xs->eq_idx + XIVE_EMULATION_PRIO) * XIVE_ESB_SIZE; } static void xive_init_cpu_exploitation(struct xive_cpu_state *xs) @@ -3813,7 +3814,7 @@ static int64_t opal_xive_get_queue_info(uint64_t vp, uint32_t prio, } if (out_qeoi_page) { *out_qeoi_page = - cpu_to_be64((uint64_t)x->eq_mmio + idx * 0x20000); + cpu_to_be64((uint64_t)x->eq_mmio + idx * XIVE_ESB_SIZE); } if (out_qflags) { *out_qflags = 0; @@ -5004,7 +5005,7 @@ static int64_t __opal_xive_dump_emu(struct xive_cpu_state *xs, uint32_t pir) xs->eqbuf[(xs->eqptr + 2) & xs->eqmsk], xs->eqbuf[(xs->eqptr + 3) & xs->eqmsk]); - mm = xs->xive->esb_mmio + GIRQ_TO_IDX(xs->ipi_irq) * 0x20000; + mm = xs->xive->esb_mmio + GIRQ_TO_IDX(xs->ipi_irq) * XIVE_ESB_SIZE; pq = in_8(mm + 0x10800); if (xive_get_irq_targetting(xs->ipi_irq, &ipi_target, NULL, NULL)) prlog(PR_INFO, "CPU[%04x]: IPI #%08x PQ=%x target=%08x\n", From patchwork Wed Jun 24 09:16:25 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?C=C3=A9dric_Le_Goater?= X-Patchwork-Id: 1315991 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49sJ303Ngfz9sRR for ; Wed, 24 Jun 2020 19:37:32 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=kaod.org Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 49sJ300pxfzDqkc for ; Wed, 24 Jun 2020 19:37:32 +1000 (AEST) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=kaod.org (client-ip=46.105.50.107; helo=6.mo69.mail-out.ovh.net; envelope-from=clg@kaod.org; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=kaod.org Received: from 6.mo69.mail-out.ovh.net (6.mo69.mail-out.ovh.net [46.105.50.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 49sJ0P3GbwzDqfZ for ; Wed, 24 Jun 2020 19:35:15 +1000 (AEST) Received: from player731.ha.ovh.net (unknown [10.108.42.196]) by mo69.mail-out.ovh.net (Postfix) with ESMTP id A420F93637 for ; Wed, 24 Jun 2020 11:16:42 +0200 (CEST) Received: from kaod.org (lfbn-tou-1-921-245.w86-210.abo.wanadoo.fr [86.210.152.245]) (Authenticated sender: clg@kaod.org) by player731.ha.ovh.net (Postfix) with ESMTPSA id BB647137D8149; Wed, 24 Jun 2020 09:16:38 +0000 (UTC) Authentication-Results: garm.ovh; auth=pass (GARM-97G00297448709-1198-41fd-a05c-69ef890d03a7,E10FFB909967CDEE565F5962A97A61CD472B7760) smtp.auth=clg@kaod.org From: =?utf-8?q?C=C3=A9dric_Le_Goater?= To: skiboot@lists.ozlabs.org Date: Wed, 24 Jun 2020 11:16:25 +0200 Message-Id: <20200624091625.324632-4-clg@kaod.org> X-Mailer: git-send-email 2.25.4 In-Reply-To: <20200624091625.324632-1-clg@kaod.org> References: <20200624091625.324632-1-clg@kaod.org> MIME-Version: 1.0 X-Ovh-Tracer-Id: 1871808596666387417 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrgeduhedrudekjedgtdeiucetufdoteggodetrfdotffvucfrrhhofhhilhgvmecuqfggjfdpvefjgfevmfevgfenuceurghilhhouhhtmecuhedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmnecujfgurhephffvufffkffojghfgggtgfesthekredtredtjeenucfhrhhomhepveorughrihgtucfnvgcuifhorghtvghruceotghlgheskhgrohgurdhorhhgqeenucggtffrrghtthgvrhhnpefgieetvdefudeghedvveejudeihfeiteffjeetjeeukefhgffgvedugedugedugfenucfkpheptddrtddrtddrtddpkeeirddvuddtrdduhedvrddvgeehnecuvehluhhsthgvrhfuihiivgeptdenucfrrghrrghmpehmohguvgepshhmthhpqdhouhhtpdhhvghlohepphhlrgihvghrjeefuddrhhgrrdhovhhhrdhnvghtpdhinhgvtheptddrtddrtddrtddpmhgrihhlfhhrohhmpegtlhhgsehkrghougdrohhrghdprhgtphhtthhopehskhhisghoohhtsehlihhsthhsrdhoiihlrggsshdrohhrgh Subject: [Skiboot] [PATCH 3/3] xive/P9: Use NUM_INT_PRIORITIES in xive_reset() X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Signed-off-by: Cédric Le Goater --- hw/xive.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/xive.c b/hw/xive.c index 845321ed59ff..2c8ffb9ceb02 100644 --- a/hw/xive.c +++ b/hw/xive.c @@ -4444,7 +4444,7 @@ static void xive_reset_one(struct xive *x) if (i == 0) continue; eq_firmware = false; - for (j = 0; j < 8; j++) { + for (j = 0; j < NUM_INT_PRIORITIES; j++) { uint32_t idx = (i << 3) | j; eq = xive_get_eq(x, idx);