From patchwork Mon Jun 22 00:44:53 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amitay Isaacs X-Patchwork-Id: 1314027 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49qrKs2lCrz9sRh for ; Mon, 22 Jun 2020 10:45:21 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=ozlabs.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=OgxetIvv; dkim-atps=neutral Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 49qrKr5ZvNzDqbc for ; Mon, 22 Jun 2020 10:45:20 +1000 (AEST) X-Original-To: pdbg@lists.ozlabs.org Delivered-To: pdbg@lists.ozlabs.org Received: from ozlabs.org (bilbo.ozlabs.org [IPv6:2401:3900:2:1::2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 49qrKg2p6WzDqbW for ; Mon, 22 Jun 2020 10:45:11 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=ozlabs.org Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=OgxetIvv; dkim-atps=neutral Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 49qrKf62z8z9sRh; Mon, 22 Jun 2020 10:45:10 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ozlabs.org; s=201707; t=1592786711; bh=kPZk4xv+cGxAHpRpyBeD5AZ0hcyz92w56eZqExbnZRA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OgxetIvv/L50l4t+OAaMc5HD6eaIENg0Y2X6fzqSm42fftfXhwGSS8rBEQbm2dmUA VNYT7qNgCTAIsOPvvzM9u1OnDECmgxZ5AVXPsvOcCM0KyeC7orWfOxK2456q0xFtj8 TJgeDMM1KI6iEyDKgGuVQtzYtAJoCuGRLu0Q5lBqqF3/q5TRY2/TbCCSzcg99S+QJt frU0MVIraHHV6zZbzBbJczsqHFPS1nz2nQhrDfdHybomTKeUYyC2ER+I+ZjGiSFEyk JdW84W770iEDK73OrT+LE/bflQE8Ss0sL4wQVeomtskHqV/HStt11zwR/RwUcgJdJ+ EOBKPWK2jZ4CQ== From: Amitay Isaacs To: pdbg@lists.ozlabs.org Date: Mon, 22 Jun 2020 10:44:53 +1000 Message-Id: <20200622004501.12889-2-amitay@ozlabs.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200622004501.12889-1-amitay@ozlabs.org> References: <20200622004501.12889-1-amitay@ozlabs.org> MIME-Version: 1.0 Subject: [Pdbg] [PATCH 1/9] libpdbg: Make thread procedures consistent X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Amitay Isaacs Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" All thread procedures should use struct thread as the first argument instead of struct pdbg_target. Signed-off-by: Amitay Isaacs --- libpdbg/chip.c | 79 ++++++++++++++++++++++++++++++++---------------- libpdbg/chip.h | 5 ++- libpdbg/hwunit.h | 6 ++-- libpdbg/p8chip.c | 13 +++----- libpdbg/p9chip.c | 8 ++--- src/pdbgproxy.c | 2 +- 6 files changed, 69 insertions(+), 44 deletions(-) diff --git a/libpdbg/chip.c b/libpdbg/chip.c index 86e91bd..f9f184b 100644 --- a/libpdbg/chip.c +++ b/libpdbg/chip.c @@ -274,18 +274,14 @@ int thread_sreset_all(void) * data. Note that only registers r0 and r1 are saved and restored so * opcode sequences must preserve other registers. */ -int ram_instructions(struct pdbg_target *thread_target, uint64_t *opcodes, +int ram_instructions(struct thread *thread, uint64_t *opcodes, uint64_t *results, int len, unsigned int lpar) { uint64_t opcode = 0, r0 = 0, r1 = 0, scratch = 0; int i; int exception = 0; - struct thread *thread; bool did_setup = false; - assert(!strcmp(thread_target->class, "thread")); - thread = target_to_thread(thread_target); - if (!thread->ram_is_setup) { CHECK_ERR(thread->ram_setup(thread)); did_setup = true; @@ -339,31 +335,40 @@ int ram_instructions(struct pdbg_target *thread_target, uint64_t *opcodes, /* * Get gpr value. Chip must be stopped. */ -int thread_getgpr(struct pdbg_target *thread, int gpr, uint64_t *value) +int thread_getgpr(struct pdbg_target *target, int gpr, uint64_t *value) { + struct thread *thread; uint64_t opcodes[] = {mtspr(277, gpr)}; uint64_t results[] = {0}; + assert(pdbg_target_is_class(target, "thread")); + thread = target_to_thread(target); CHECK_ERR(ram_instructions(thread, opcodes, results, ARRAY_SIZE(opcodes), 0)); *value = results[0]; return 0; } -int thread_putgpr(struct pdbg_target *thread, int gpr, uint64_t value) +int thread_putgpr(struct pdbg_target *target, int gpr, uint64_t value) { + struct thread *thread; uint64_t opcodes[] = {mfspr(gpr, 277)}; uint64_t results[] = {value}; + assert(pdbg_target_is_class(target, "thread")); + thread = target_to_thread(target); CHECK_ERR(ram_instructions(thread, opcodes, results, ARRAY_SIZE(opcodes), 0)); return 0; } -int thread_getnia(struct pdbg_target *thread, uint64_t *value) +int thread_getnia(struct pdbg_target *target, uint64_t *value) { + struct thread *thread; uint64_t opcodes[] = {mfnia(0), mtspr(277, 0)}; uint64_t results[] = {0, 0}; + assert(pdbg_target_is_class(target, "thread")); + thread = target_to_thread(target); CHECK_ERR(ram_instructions(thread, opcodes, results, ARRAY_SIZE(opcodes), 0)); *value = results[1]; return 0; @@ -376,8 +381,9 @@ int thread_getnia(struct pdbg_target *thread, uint64_t *value) * This is a hack and should be made much cleaner once we have target * specific putspr commands. */ -int thread_putnia(struct pdbg_target *thread, uint64_t value) +int thread_putnia(struct pdbg_target *target, uint64_t value) { + struct thread *thread; uint64_t opcodes[] = { mfspr(1, 8), /* mflr r1 */ mfspr(0, 277), /* value -> r0 */ mtspr(8, 0), /* mtlr r0 */ @@ -385,42 +391,53 @@ int thread_putnia(struct pdbg_target *thread, uint64_t value) mtspr(8, 1), }; /* mtlr r1 */ uint64_t results[] = {0, value, 0, 0, 0}; + assert(pdbg_target_is_class(target, "thread")); + thread = target_to_thread(target); CHECK_ERR(ram_instructions(thread, opcodes, results, ARRAY_SIZE(opcodes), 0)); return 0; } -int thread_getspr(struct pdbg_target *thread, int spr, uint64_t *value) +int thread_getspr(struct pdbg_target *target, int spr, uint64_t *value) { + struct thread *thread; uint64_t opcodes[] = {mfspr(0, spr), mtspr(277, 0)}; uint64_t results[] = {0, 0}; + assert(pdbg_target_is_class(target, "thread")); + thread = target_to_thread(target); CHECK_ERR(ram_instructions(thread, opcodes, results, ARRAY_SIZE(opcodes), 0)); *value = results[1]; return 0; } -int thread_putspr(struct pdbg_target *thread, int spr, uint64_t value) +int thread_putspr(struct pdbg_target *target, int spr, uint64_t value) { + struct thread *thread; uint64_t opcodes[] = {mfspr(0, 277), mtspr(spr, 0)}; uint64_t results[] = {value, 0}; + assert(pdbg_target_is_class(target, "thread")); + thread = target_to_thread(target); CHECK_ERR(ram_instructions(thread, opcodes, results, ARRAY_SIZE(opcodes), 0)); return 0; } -int thread_getmsr(struct pdbg_target *thread, uint64_t *value) +int thread_getmsr(struct pdbg_target *target, uint64_t *value) { + struct thread *thread; uint64_t opcodes[] = {mfmsr(0), mtspr(277, 0)}; uint64_t results[] = {0, 0}; + assert(pdbg_target_is_class(target, "thread")); + thread = target_to_thread(target); CHECK_ERR(ram_instructions(thread, opcodes, results, ARRAY_SIZE(opcodes), 0)); *value = results[1]; return 0; } -int thread_getcr(struct pdbg_target *thread, uint32_t *value) +int thread_getcr(struct pdbg_target *target, uint32_t *value) { - + struct thread *thread; uint64_t opcodes[] = {mfocrf(0, 0), mtspr(277, 0), mfocrf(0, 1), mtspr(277, 0), mfocrf(0, 2), mtspr(277, 0), mfocrf(0, 3), mtspr(277, 0), mfocrf(0, 4), mtspr(277, 0), mfocrf(0, 5), mtspr(277, 0), @@ -429,6 +446,8 @@ int thread_getcr(struct pdbg_target *thread, uint32_t *value) uint32_t cr_field, cr = 0; int i; + assert(pdbg_target_is_class(target, "thread")); + thread = target_to_thread(target); CHECK_ERR(ram_instructions(thread, opcodes, results, ARRAY_SIZE(opcodes), 0)); for (i = 1; i < 16; i += 2) { cr_field = results[i]; @@ -440,58 +459,66 @@ int thread_getcr(struct pdbg_target *thread, uint32_t *value) return 0; } -int thread_putcr(struct pdbg_target *thread, uint32_t value) +int thread_putcr(struct pdbg_target *target, uint32_t value) { + struct thread *thread; uint64_t opcodes[] = {mfspr(0, 277), mtocrf(0, 0), mtocrf(1, 0), mtocrf(2, 0), mtocrf(3, 0), mtocrf(4, 0), mtocrf(5, 0), mtocrf(6, 0), mtocrf(7, 0)}; uint64_t results[] = {value}; + assert(pdbg_target_is_class(target, "thread")); + thread = target_to_thread(target); CHECK_ERR(ram_instructions(thread, opcodes, results, ARRAY_SIZE(opcodes), 0)); return 0; } -int thread_putmsr(struct pdbg_target *thread, uint64_t value) +int thread_putmsr(struct pdbg_target *target, uint64_t value) { + struct thread *thread; uint64_t opcodes[] = {mfspr(0, 277), mtmsr(0)}; uint64_t results[] = {value, 0}; + assert(pdbg_target_is_class(target, "thread")); + thread = target_to_thread(target); CHECK_ERR(ram_instructions(thread, opcodes, results, ARRAY_SIZE(opcodes), 0)); return 0; } -int thread_getmem(struct pdbg_target *thread, uint64_t addr, uint64_t *value) +int thread_getmem(struct pdbg_target *target, uint64_t addr, uint64_t *value) { + struct thread *thread; uint64_t opcodes[] = {mfspr(0, 277), mfspr(1, 277), ld(0, 0, 1), mtspr(277, 0)}; uint64_t results[] = {0xdeaddeaddeaddead, addr, 0, 0}; + assert(pdbg_target_is_class(target, "thread")); + thread = target_to_thread(target); CHECK_ERR(ram_instructions(thread, opcodes, results, ARRAY_SIZE(opcodes), 0)); *value = results[3]; return 0; } -int thread_getxer(struct pdbg_target *thread_target, uint64_t *value) +int thread_getxer(struct pdbg_target *target, uint64_t *value) { - struct thread *thread; - assert(!strcmp(thread_target->class, "thread")); - thread = target_to_thread(thread_target); + assert(pdbg_target_is_class(target, "thread")); + thread = target_to_thread(target); - CHECK_ERR(thread->ram_getxer(thread_target, value)); + CHECK_ERR(thread->ram_getxer(thread, value)); return 0; } -int thread_putxer(struct pdbg_target *thread_target, uint64_t value) +int thread_putxer(struct pdbg_target *target, uint64_t value) { struct thread *thread; - assert(!strcmp(thread_target->class, "thread")); - thread = target_to_thread(thread_target); + assert(pdbg_target_is_class(target, "thread")); + thread = target_to_thread(target); - CHECK_ERR(thread->ram_putxer(thread_target, value)); + CHECK_ERR(thread->ram_putxer(thread, value)); return 0; } diff --git a/libpdbg/chip.h b/libpdbg/chip.h index 52f3486..b3342b8 100644 --- a/libpdbg/chip.h +++ b/libpdbg/chip.h @@ -16,9 +16,12 @@ #ifndef __LIBPDBG_CHIP_H #define __LIBPDBG_CHIP_H +#include "libpdbg.h" +#include "hwunit.h" + uint64_t mfspr(uint64_t reg, uint64_t spr) __attribute__ ((visibility("hidden"))); uint64_t mtspr(uint64_t spr, uint64_t reg) __attribute__ ((visibility("hidden"))); -int ram_instructions(struct pdbg_target *thread_target, uint64_t *opcodes, +int ram_instructions(struct thread *thread, uint64_t *opcodes, uint64_t *results, int len, unsigned int lpar) __attribute__ ((visibility("hidden"))); #endif diff --git a/libpdbg/hwunit.h b/libpdbg/hwunit.h index e3a8426..7fe83a6 100644 --- a/libpdbg/hwunit.h +++ b/libpdbg/hwunit.h @@ -140,9 +140,9 @@ struct thread { int (*ram_setup)(struct thread *); int (*ram_instruction)(struct thread *, uint64_t opcode, uint64_t *scratch); int (*ram_destroy)(struct thread *); - int (*ram_getxer)(struct pdbg_target *, uint64_t *value); - int (*ram_putxer)(struct pdbg_target *, uint64_t value); - int (*enable_attn)(struct pdbg_target *); + int (*ram_getxer)(struct thread *, uint64_t *value); + int (*ram_putxer)(struct thread *, uint64_t value); + int (*enable_attn)(struct thread *); }; #define target_to_thread(x) container_of(x, struct thread, target) diff --git a/libpdbg/p8chip.c b/libpdbg/p8chip.c index 484d77c..4a2061a 100644 --- a/libpdbg/p8chip.c +++ b/libpdbg/p8chip.c @@ -477,7 +477,7 @@ static int p8_ram_destroy(struct thread *thread) return 0; } -static int p8_ram_getxer(struct pdbg_target *thread, uint64_t *value) +static int p8_ram_getxer(struct thread *thread, uint64_t *value) { uint64_t opcodes[] = {mfxerf(0, 0), mtspr(277, 0), mfxerf(0, 1), mtspr(277, 0), mfxerf(0, 2), mtspr(277, 0), @@ -496,7 +496,7 @@ static int p8_ram_getxer(struct pdbg_target *thread, uint64_t *value) return 0; } -static int p8_ram_putxer(struct pdbg_target *thread, uint64_t value) +static int p8_ram_putxer(struct thread *thread, uint64_t value) { uint64_t fields[] = {value, value, value, value, 0}; uint64_t opcodes[] = {mfspr(0, 277), mtxerf(0, 0), mtxerf(0, 1), mtxerf(0, 2), mtxerf(0, 3)}; @@ -618,17 +618,12 @@ static int p8_put_hid0(struct pdbg_target *chip, uint64_t value) return 0; } -static int p8_enable_attn(struct pdbg_target *target) +static int p8_enable_attn(struct thread *thread) { struct pdbg_target *core; uint64_t hid0; - core = pdbg_target_parent("core", target); - if (core == NULL) - { - PR_ERROR("CORE NOT FOUND\n"); - return 1; - } + core = pdbg_target_require_parent("core", &thread->target); /* Need to enable the attn instruction in HID0 */ if (p8_get_hid0(core, &hid0)) { diff --git a/libpdbg/p9chip.c b/libpdbg/p9chip.c index 6222dc3..811bca6 100644 --- a/libpdbg/p9chip.c +++ b/libpdbg/p9chip.c @@ -404,16 +404,16 @@ static int p9_ram_destroy(struct thread *thread) return 0; } -static int p9_ram_getxer(struct pdbg_target *thread, uint64_t *value) +static int p9_ram_getxer(struct thread *thread, uint64_t *value) { - CHECK_ERR(thread_getspr(thread, 1, value)); + CHECK_ERR(thread_getspr(&thread->target, 1, value)); return 0; } -static int p9_ram_putxer(struct pdbg_target *thread, uint64_t value) +static int p9_ram_putxer(struct thread *thread, uint64_t value) { - CHECK_ERR(thread_putspr(thread, 1, value)); + CHECK_ERR(thread_putspr(&thread->target, 1, value)); return 0; diff --git a/src/pdbgproxy.c b/src/pdbgproxy.c index ee99cfb..bb7c7b3 100644 --- a/src/pdbgproxy.c +++ b/src/pdbgproxy.c @@ -285,7 +285,7 @@ static void put_mem(uint64_t *stack, void *priv) data = attn_opcode; /* Need to enable the attn instruction in HID0 */ - if (thread->enable_attn(thread_target)) + if (thread->enable_attn(thread)) goto out; } else stack[2] = __builtin_bswap64(stack[2]) >> 32; From patchwork Mon Jun 22 00:44:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amitay Isaacs X-Patchwork-Id: 1314031 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49qrL90FXqz9sRR for ; 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dkim=pass (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=AEuoNfoG; dkim-atps=neutral Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 49qrKg2XdCz9sSS; Mon, 22 Jun 2020 10:45:11 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ozlabs.org; s=201707; t=1592786711; bh=oY4AihgsfmtaQ0vNQhnQ4cXPcRneXm4Gx8mOD/z/kN4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=AEuoNfoGqKn2xGtGbRX5eRvRIfdo0eQ3HPC2jNICHr786QU+K+keUJEIEq3oJhwyA ub8BYtSu420n/WByoJRL0KvihEXTxppucE5xjwrWH0IZj1k3pOsULMXfB9VGIaRJyb g5RZZfoHvUW5lqWSstwpwPJQN53D7VtT1RFqoTdiZMQdeVyRo9q6FBNECm+KO68LrB qE2gQQvFnM5nsLd2Ujk6U8BKJ2cp1ksod3oD+0zQYuHXSBX3B9vlVQihy8KRjBNRPS xXk4dBDRWXvlaOcbFkA2VEN5HvcTQ7vvo8jKGbGkEv0MW8sNIkrHHiUFf22/9i038V nyKSYzxa2PuAw== From: Amitay Isaacs To: pdbg@lists.ozlabs.org Date: Mon, 22 Jun 2020 10:44:54 +1000 Message-Id: <20200622004501.12889-3-amitay@ozlabs.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200622004501.12889-1-amitay@ozlabs.org> References: <20200622004501.12889-1-amitay@ozlabs.org> MIME-Version: 1.0 Subject: [Pdbg] [PATCH 2/9] libpdbg: Avoid direct access of class in pdbg_target X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Amitay Isaacs Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Amitay Isaacs --- libpdbg/chip.c | 114 ++++++++++++++++++++++++------------------------- 1 file changed, 57 insertions(+), 57 deletions(-) diff --git a/libpdbg/chip.c b/libpdbg/chip.c index f9f184b..f0dd6bf 100644 --- a/libpdbg/chip.c +++ b/libpdbg/chip.c @@ -110,7 +110,7 @@ struct thread_state thread_status(struct pdbg_target *target) { struct thread *thread; - assert(!strcmp(target->class, "thread")); + assert(pdbg_target_is_class(target, "thread")); thread = target_to_thread(target); return thread->status; } @@ -118,39 +118,39 @@ struct thread_state thread_status(struct pdbg_target *target) /* * Single step the thread count instructions. */ -int thread_step(struct pdbg_target *thread_target, int count) +int thread_step(struct pdbg_target *target, int count) { struct thread *thread; - assert(!strcmp(thread_target->class, "thread")); - thread = target_to_thread(thread_target); + assert(pdbg_target_is_class(target, "thread")); + thread = target_to_thread(target); return thread->step(thread, count); } -int thread_start(struct pdbg_target *thread_target) +int thread_start(struct pdbg_target *target) { struct thread *thread; - assert(!strcmp(thread_target->class, "thread")); - thread = target_to_thread(thread_target); + assert(pdbg_target_is_class(target, "thread")); + thread = target_to_thread(target); return thread->start(thread); } -int thread_stop(struct pdbg_target *thread_target) +int thread_stop(struct pdbg_target *target) { struct thread *thread; - assert(!strcmp(thread_target->class, "thread")); - thread = target_to_thread(thread_target); + assert(pdbg_target_is_class(target, "thread")); + thread = target_to_thread(target); return thread->stop(thread); } -int thread_sreset(struct pdbg_target *thread_target) +int thread_sreset(struct pdbg_target *target) { struct thread *thread; - assert(!strcmp(thread_target->class, "thread")); - thread = target_to_thread(thread_target); + assert(pdbg_target_is_class(target, "thread")); + thread = target_to_thread(target); return thread->sreset(thread); } @@ -526,29 +526,29 @@ int thread_putxer(struct pdbg_target *target, uint64_t value) /* * Read the given ring from the given chiplet. Result must be large enough to hold ring_len bits. */ -int getring(struct pdbg_target *chiplet_target, uint64_t ring_addr, uint64_t ring_len, uint32_t result[]) +int getring(struct pdbg_target *target, uint64_t ring_addr, uint64_t ring_len, uint32_t result[]) { struct chiplet *chiplet; - assert(!strcmp(chiplet_target->class, "chiplet")); - chiplet = target_to_chiplet(chiplet_target); + assert(pdbg_target_is_class(target, "chiplet")); + chiplet = target_to_chiplet(target); return chiplet->getring(chiplet, ring_addr, ring_len, result); } -int thread_getregs(struct pdbg_target *thread, struct thread_regs *regs) +int thread_getregs(struct pdbg_target *target, struct thread_regs *regs) { + struct thread *thread; struct thread_regs _regs; - struct thread *t; uint64_t value = 0; int i; if (!regs) regs = &_regs; - assert(!strcmp(thread->class, "thread")); - t = target_to_thread(thread); + assert(pdbg_target_is_class(target, "thread")); + thread = target_to_thread(target); - CHECK_ERR(t->ram_setup(t)); + CHECK_ERR(thread->ram_setup(thread)); /* * It would be neat to do all the ramming up front, then go through @@ -556,120 +556,120 @@ int thread_getregs(struct pdbg_target *thread, struct thread_regs *regs) * can help to diagnose checkstop issues with ramming to print as * we go. Once it's more robust and tested, maybe. */ - thread_getnia(thread, ®s->nia); + thread_getnia(target, ®s->nia); printf("NIA : 0x%016" PRIx64 "\n", regs->nia); - thread_getspr(thread, 28, ®s->cfar); + thread_getspr(target, 28, ®s->cfar); printf("CFAR : 0x%016" PRIx64 "\n", regs->cfar); - thread_getmsr(thread, ®s->msr); + thread_getmsr(target, ®s->msr); printf("MSR : 0x%016" PRIx64 "\n", regs->msr); - thread_getspr(thread, 8, ®s->lr); + thread_getspr(target, 8, ®s->lr); printf("LR : 0x%016" PRIx64 "\n", regs->lr); - thread_getspr(thread, 9, ®s->ctr); + thread_getspr(target, 9, ®s->ctr); printf("CTR : 0x%016" PRIx64 "\n", regs->ctr); - thread_getspr(thread, 815, ®s->tar); + thread_getspr(target, 815, ®s->tar); printf("TAR : 0x%016" PRIx64 "\n", regs->tar); - thread_getcr(thread, ®s->cr); + thread_getcr(target, ®s->cr); printf("CR : 0x%08" PRIx32 "\n", regs->cr); - thread_getxer(thread, ®s->xer); + thread_getxer(target, ®s->xer); printf("XER : 0x%08" PRIx64 "\n", regs->xer); printf("GPRS :\n"); for (i = 0; i < 32; i++) { - thread_getgpr(thread, i, ®s->gprs[i]); + thread_getgpr(target, i, ®s->gprs[i]); printf(" 0x%016" PRIx64 "", regs->gprs[i]); if (i % 4 == 3) printf("\n"); } - thread_getspr(thread, 318, ®s->lpcr); + thread_getspr(target, 318, ®s->lpcr); printf("LPCR : 0x%016" PRIx64 "\n", regs->lpcr); - thread_getspr(thread, 464, ®s->ptcr); + thread_getspr(target, 464, ®s->ptcr); printf("PTCR : 0x%016" PRIx64 "\n", regs->ptcr); - thread_getspr(thread, 319, ®s->lpidr); + thread_getspr(target, 319, ®s->lpidr); printf("LPIDR : 0x%016" PRIx64 "\n", regs->lpidr); - thread_getspr(thread, 48, ®s->pidr); + thread_getspr(target, 48, ®s->pidr); printf("PIDR : 0x%016" PRIx64 "\n", regs->pidr); - thread_getspr(thread, 190, ®s->hfscr); + thread_getspr(target, 190, ®s->hfscr); printf("HFSCR : 0x%016" PRIx64 "\n", regs->hfscr); - thread_getspr(thread, 306, &value); + thread_getspr(target, 306, &value); regs->hdsisr = value; printf("HDSISR: 0x%08" PRIx32 "\n", regs->hdsisr); - thread_getspr(thread, 307, ®s->hdar); + thread_getspr(target, 307, ®s->hdar); printf("HDAR : 0x%016" PRIx64 "\n", regs->hdar); - thread_getspr(thread, 339, &value); + thread_getspr(target, 339, &value); regs->heir = value; printf("HEIR : 0x%016" PRIx32 "\n", regs->heir); - thread_getspr(thread, 1008, ®s->hid); + thread_getspr(target, 1008, ®s->hid); printf("HID0 : 0x%016" PRIx64 "\n", regs->hid); - thread_getspr(thread, 314, ®s->hsrr0); + thread_getspr(target, 314, ®s->hsrr0); printf("HSRR0 : 0x%016" PRIx64 "\n", regs->hsrr0); - thread_getspr(thread, 315, ®s->hsrr1); + thread_getspr(target, 315, ®s->hsrr1); printf("HSRR1 : 0x%016" PRIx64 "\n", regs->hsrr1); - thread_getspr(thread, 310, ®s->hdec); + thread_getspr(target, 310, ®s->hdec); printf("HDEC : 0x%016" PRIx64 "\n", regs->hdec); - thread_getspr(thread, 304, ®s->hsprg0); + thread_getspr(target, 304, ®s->hsprg0); printf("HSPRG0: 0x%016" PRIx64 "\n", regs->hsprg0); - thread_getspr(thread, 305, ®s->hsprg1); + thread_getspr(target, 305, ®s->hsprg1); printf("HSPRG1: 0x%016" PRIx64 "\n", regs->hsprg1); - thread_getspr(thread, 153, ®s->fscr); + thread_getspr(target, 153, ®s->fscr); printf("FSCR : 0x%016" PRIx64 "\n", regs->fscr); - thread_getspr(thread, 18, &value); + thread_getspr(target, 18, &value); regs->dsisr = value; printf("DSISR : 0x%08" PRIx32 "\n", regs->dsisr); - thread_getspr(thread, 19, ®s->dar); + thread_getspr(target, 19, ®s->dar); printf("DAR : 0x%016" PRIx64 "\n", regs->dar); - thread_getspr(thread, 26, ®s->srr0); + thread_getspr(target, 26, ®s->srr0); printf("SRR0 : 0x%016" PRIx64 "\n", regs->srr0); - thread_getspr(thread, 27, ®s->srr1); + thread_getspr(target, 27, ®s->srr1); printf("SRR1 : 0x%016" PRIx64 "\n", regs->srr1); - thread_getspr(thread, 22, ®s->dec); + thread_getspr(target, 22, ®s->dec); printf("DEC : 0x%016" PRIx64 "\n", regs->dec); - thread_getspr(thread, 268, ®s->tb); + thread_getspr(target, 268, ®s->tb); printf("TB : 0x%016" PRIx64 "\n", regs->tb); - thread_getspr(thread, 272, ®s->sprg0); + thread_getspr(target, 272, ®s->sprg0); printf("SPRG0 : 0x%016" PRIx64 "\n", regs->sprg0); - thread_getspr(thread, 273, ®s->sprg1); + thread_getspr(target, 273, ®s->sprg1); printf("SPRG1 : 0x%016" PRIx64 "\n", regs->sprg1); - thread_getspr(thread, 274, ®s->sprg2); + thread_getspr(target, 274, ®s->sprg2); printf("SPRG2 : 0x%016" PRIx64 "\n", regs->sprg2); - thread_getspr(thread, 275, ®s->sprg3); + thread_getspr(target, 275, ®s->sprg3); printf("SPRG3 : 0x%016" PRIx64 "\n", regs->sprg3); - thread_getspr(thread, 896, ®s->ppr); + thread_getspr(target, 896, ®s->ppr); printf("PPR : 0x%016" PRIx64 "\n", regs->ppr); - CHECK_ERR(t->ram_destroy(t)); + CHECK_ERR(thread->ram_destroy(thread)); return 0; } From patchwork Mon Jun 22 00:44:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amitay Isaacs X-Patchwork-Id: 1314028 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49qrKx0sLgz9sRR for ; Mon, 22 Jun 2020 10:45:25 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=ozlabs.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=Vdx71poP; dkim-atps=neutral Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 49qrKw6xdhzDqbv for ; Mon, 22 Jun 2020 10:45:24 +1000 (AEST) X-Original-To: pdbg@lists.ozlabs.org Delivered-To: pdbg@lists.ozlabs.org Received: from ozlabs.org (bilbo.ozlabs.org [IPv6:2401:3900:2:1::2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 49qrKh05wFzDqbY for ; Mon, 22 Jun 2020 10:45:12 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=ozlabs.org Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=Vdx71poP; dkim-atps=neutral Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 49qrKg5Hnzz9sRN; Mon, 22 Jun 2020 10:45:11 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ozlabs.org; s=201707; t=1592786711; bh=X7q3Ye6fLUTox/dicmjA+AcM+m/Q8YavK+A2itHznUM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Vdx71poPIQB1DiQmvVS2wD/gdqWqMBR8T9apMppNR7qKM5TTKNy8+KL4M4kc5CGLO 7NMLueaqfdWjBl/E/Oc/0OiRty49qqu6/LFGLrJx92gEBWZsZBx5EJNXh9gp1G12I2 +AMYbmwkXGKM5WFMlrfo66yINbLYBGh67F/QfOEhgXdA1BLTaDncWUHnBdVgzWVvo6 4sxBj6a3/PkHdaqOpwVlsHB9OjNT9hVXzZtnn18gCZZfNstvrVZ4dCRJpzyHQTb7Li w/IzDC5HjbjiPEq8gX+O4BoGM5r7G/8THHuh3t6Qny1XGZ8bvOIV+OIYRpG8V3nPVZ rZ1706SHxclkQ== From: Amitay Isaacs To: pdbg@lists.ozlabs.org Date: Mon, 22 Jun 2020 10:44:55 +1000 Message-Id: <20200622004501.12889-4-amitay@ozlabs.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200622004501.12889-1-amitay@ozlabs.org> References: <20200622004501.12889-1-amitay@ozlabs.org> MIME-Version: 1.0 Subject: [Pdbg] [PATCH 3/9] libpdbg: Avoid direct access of class in pdbg_target X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Amitay Isaacs Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Amitay Isaacs --- libpdbg/adu.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/libpdbg/adu.c b/libpdbg/adu.c index fe60118..6600caa 100644 --- a/libpdbg/adu.c +++ b/libpdbg/adu.c @@ -166,7 +166,7 @@ int adu_getmem(struct pdbg_target *adu_target, uint64_t start_addr, { struct mem *adu; - assert(!strcmp(adu_target->class, "mem")); + assert(pdbg_target_is_class(adu_target, "mem")); adu = target_to_mem(adu_target); return adu_read(adu, start_addr, output, size, 8, false); @@ -177,7 +177,7 @@ int adu_getmem_ci(struct pdbg_target *adu_target, uint64_t start_addr, { struct mem *adu; - assert(!strcmp(adu_target->class, "mem")); + assert(pdbg_target_is_class(adu_target, "mem")); adu = target_to_mem(adu_target); return adu_read(adu, start_addr, output, size, 8, true); @@ -188,7 +188,7 @@ int adu_getmem_io(struct pdbg_target *adu_target, uint64_t start_addr, { struct mem *adu; - assert(!strcmp(adu_target->class, "mem")); + assert(pdbg_target_is_class(adu_target, "mem")); adu = target_to_mem(adu_target); /* There is no equivalent for cachable memory as blocksize @@ -201,7 +201,7 @@ int __adu_getmem(struct pdbg_target *adu_target, uint64_t start_addr, { struct mem *adu; - assert(!strcmp(adu_target->class, "mem")); + assert(pdbg_target_is_class(adu_target, "mem")); adu = target_to_mem(adu_target); return adu_read(adu, start_addr, output, size, 8, ci); @@ -250,7 +250,7 @@ int adu_putmem(struct pdbg_target *adu_target, uint64_t start_addr, { struct mem *adu; - assert(!strcmp(adu_target->class, "mem")); + assert(pdbg_target_is_class(adu_target, "mem")); adu = target_to_mem(adu_target); return adu_write(adu, start_addr, input, size, 8, false); @@ -261,7 +261,7 @@ int adu_putmem_ci(struct pdbg_target *adu_target, uint64_t start_addr, { struct mem *adu; - assert(!strcmp(adu_target->class, "mem")); + assert(pdbg_target_is_class(adu_target, "mem")); adu = target_to_mem(adu_target); return adu_write(adu, start_addr, input, size, 8, true); @@ -272,7 +272,7 @@ int adu_putmem_io(struct pdbg_target *adu_target, uint64_t start_addr, { struct mem *adu; - assert(!strcmp(adu_target->class, "mem")); + assert(pdbg_target_is_class(adu_target, "mem")); adu = target_to_mem(adu_target); return adu_write(adu, start_addr, input, size, block_size, true); @@ -283,7 +283,7 @@ int __adu_putmem(struct pdbg_target *adu_target, uint64_t start_addr, { struct mem *adu; - assert(!strcmp(adu_target->class, "mem")); + assert(pdbg_target_is_class(adu_target, "mem")); adu = target_to_mem(adu_target); return adu_write(adu, start_addr, input, size, 8, ci); From patchwork Mon Jun 22 00:44:56 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amitay Isaacs X-Patchwork-Id: 1314026 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49qrKn2Cbcz9sRN for ; Mon, 22 Jun 2020 10:45:17 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=ozlabs.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; 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Mon, 22 Jun 2020 10:45:12 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ozlabs.org; s=201707; t=1592786712; bh=X4Q6uK40Zzmlg7cHxErb7OZfehImUmX5ejTHBw+Dtx8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=xb0aX+3aN/D2M/jnwFFf9QRtp4Vc+ah/yqq8x1Nl9DcUCORnFVrJA4wpHb105ZWTV rztEUWMBmnerHKFyz9BVXJfet5tGtO8yDzzyIJF6b/3luteKxy+c7mybHZzJF70dkX 4u6pfBVVYjvtR6QUGr0PxJNetAKJ4GpTpi87IPJZ86CzqrpJ8ImTEZHQZQKkWDPjXi j3u7Z4VuImp8HgJtuPUpp6TlHPmKwMidbqXr5wy8kHmstdX4+W8h8ku3bQr2HLjZ9H CNvisC1Y8ECl5VOtWDqXbzm0C323AhNZF4Ndcqntg88LvkmJGL+MiwJH6L4qt9/7x7 9Zj7Q8G2P2doA== From: Amitay Isaacs To: pdbg@lists.ozlabs.org Date: Mon, 22 Jun 2020 10:44:56 +1000 Message-Id: <20200622004501.12889-5-amitay@ozlabs.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200622004501.12889-1-amitay@ozlabs.org> References: <20200622004501.12889-1-amitay@ozlabs.org> MIME-Version: 1.0 Subject: [Pdbg] [PATCH 4/9] libpdbg: Add SPR definitions X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Amitay Isaacs Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Amitay Isaacs --- Makefile.am | 1 + libpdbg/sprs.h | 167 +++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 168 insertions(+) create mode 100644 libpdbg/sprs.h diff --git a/Makefile.am b/Makefile.am index bc0174d..f51afb3 100644 --- a/Makefile.am +++ b/Makefile.am @@ -205,6 +205,7 @@ libpdbg_la_SOURCES = \ libpdbg/p9chip.c \ libpdbg/p9_fapi_targets.c \ libpdbg/sbefifo.c \ + libpdbg/sprs.h \ libpdbg/target.c \ libpdbg/target.h diff --git a/libpdbg/sprs.h b/libpdbg/sprs.h new file mode 100644 index 0000000..c8499e1 --- /dev/null +++ b/libpdbg/sprs.h @@ -0,0 +1,167 @@ +/* Copyright 2020 IBM Corp. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + * implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#ifndef __SPRS_H +#define __SPRS_H + +/* From ekb/chips/p9/procedures/hwp/perv/p9_spr_name_map.H */ +#define SPR_XER 1 +#define SPR_DSCR_RU 3 +#define SPR_LR 8 +#define SPR_CTR 9 +#define SPR_UAMR 13 +#define SPR_DSCR 17 +#define SPR_DSISR 18 +#define SPR_DAR 19 +#define SPR_DEC 22 +#define SPR_SDR1 25 +#define SPR_SRR0 26 +#define SPR_SRR1 27 +#define SPR_CFAR 28 +#define SPR_AMR 29 +#define SPR_PIDR 48 +#define SPR_IAMR 61 +#define SPR_TFHAR 128 +#define SPR_TFIAR 129 +#define SPR_TEXASR 130 +#define SPR_TEXASRU 131 +#define SPR_CTRL_RU 136 +#define SPR_TIDR 144 +#define SPR_CTRL 152 +#define SPR_FSCR 153 +#define SPR_UAMOR 157 +#define SPR_GSR 158 +#define SPR_PSPB 159 +#define SPR_DPDES 176 +#define SPR_DAWR0 180 +#define SPR_RPR 186 +#define SPR_CIABR 187 +#define SPR_DAWRX0 188 +#define SPR_HFSCR 190 +#define SPR_VRSAVE 256 +#define SPR_SPRG3_RU 259 +#define SPR_TB 268 +#define SPR_TBU_RU 269 +#define SPR_SPRG0 272 +#define SPR_SPRG1 273 +#define SPR_SPRG2 274 +#define SPR_SPRG3 275 +#define SPR_SPRC 276 +#define SPR_SPRD 277 +#define SPR_CIR 283 +#define SPR_TBL 284 +#define SPR_TBU 285 +#define SPR_TBU40 286 +#define SPR_PVR 287 +#define SPR_HSPRG0 304 +#define SPR_HSPRG1 305 +#define SPR_HDSISR 306 +#define SPR_HDAR 307 +#define SPR_SPURR 308 +#define SPR_PURR 309 +#define SPR_HDEC 310 +#define SPR_HRMOR 313 +#define SPR_HSRR0 314 +#define SPR_HSRR1 315 +#define SPR_TFMR 317 +#define SPR_LPCR 318 +#define SPR_LPIDR 319 +#define SPR_HMER 336 +#define SPR_HMEER 337 +#define SPR_PCR 338 +#define SPR_HEIR 339 +#define SPR_AMOR 349 +#define SPR_TIR 446 +#define SPR_PTCR 464 +#define SPR_USPRG0 496 +#define SPR_USPRG1 497 +#define SPR_UDAR 499 +#define SPR_SEIDR 504 +#define SPR_URMOR 505 +#define SPR_USRR0 506 +#define SPR_USRR1 507 +#define SPR_UEIR 509 +#define SPR_ACMCR 510 +#define SPR_SMFCTRL 511 +#define SPR_SIER_RU 768 +#define SPR_MMCR2_RU 769 +#define SPR_MMCRA_RU 770 +#define SPR_PMC1_RU 771 +#define SPR_PMC2_RU 772 +#define SPR_PMC3_RU 773 +#define SPR_PMC4_RU 774 +#define SPR_PMC5_RU 775 +#define SPR_PMC6_RU 776 +#define SPR_MMCR0_RU 779 +#define SPR_SIAR_RU 780 +#define SPR_SDAR_RU 781 +#define SPR_MMCR1_RU 782 +#define SPR_SIER 784 +#define SPR_MMCR2 785 +#define SPR_MMCRA 786 +#define SPR_PMC1 787 +#define SPR_PMC2 788 +#define SPR_PMC3 789 +#define SPR_PMC4 790 +#define SPR_PMC5 791 +#define SPR_PMC6 792 +#define SPR_MMCR0 795 +#define SPR_SIAR 796 +#define SPR_SDAR 797 +#define SPR_MMCR1 798 +#define SPR_IMC 799 +#define SPR_BESCRS 800 +#define SPR_BESCRSU 801 +#define SPR_BESCRR 802 +#define SPR_BESCRRU 803 +#define SPR_EBBHR 804 +#define SPR_EBBRR 805 +#define SPR_BESCR 806 +#define SPR_LMRR 813 +#define SPR_LMSER 814 +#define SPR_TAR 815 +#define SPR_ASDR 816 +#define SPR_PSSCR_SU 823 +#define SPR_IC 848 +#define SPR_VTB 849 +#define SPR_LDBAR 850 +#define SPR_MMCRC 851 +#define SPR_PMSR 853 +#define SPR_PMMAR 854 +#define SPR_PSSCR 855 +#define SPR_L2QOSR 861 +#define SPR_WORC 863 +#define SPR_TRIG0 880 +#define SPR_TRIG1 881 +#define SPR_TRIG2 882 +#define SPR_PMCR 884 +#define SPR_RWMR 885 +#define SPR_WORT 895 +#define SPR_PPR 896 +#define SPR_PPR32 898 +#define SPR_TSCR 921 +#define SPR_TTR 922 +#define SPR_TRACE 1006 +#define SPR_HID 1008 +#define SPR_PIR 1023 +#define SPR_NIA 2000 +#define SPR_MSR 2001 +#define SPR_CR 2002 +#define SPR_FPSCR 2003 +#define SPR_VSCR 2004 +#define SPR_SLBE 2005 +#define SPR_SLBV 2006 + +#endif /* __SPRS_H */ From patchwork Mon Jun 22 00:44:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amitay Isaacs X-Patchwork-Id: 1314030 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49qrL56zy4z9sRN for ; Mon, 22 Jun 2020 10:45:33 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=ozlabs.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=UnAA1PpX; dkim-atps=neutral Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 49qrL53xzBzDqbf for ; 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Mon, 22 Jun 2020 10:45:12 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ozlabs.org; s=201707; t=1592786712; bh=tYAQVLS/f9RqMNlVjOD0ww5Uk125X3pyR8vqTg8nI2M=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=UnAA1PpXIVZ4oggnWxZhcOoNkCAv7xa12ZV4fAMJZ+T0UpFJVp0tl/RfnaE9tueU3 RFPXQGdZTxTDyNCy/ZAz8ORs/8JbpKiDFOy33QwbnNqT11eVUv8L6r0pLJW6EWZkGi md4UBQMFz+aXABO1eDhZ3zWrgGVLiOTR1ORR0C+vEBTpjmMTInu2QNyMjTbPrmAYoW QIrX7Y5Za5kfAXp3X9wUuHXctcXtYKKN2yHKxr3Dpuj1Fr5LNg2dxX8KCxZUp+cAn7 vD6SvCg66IKH/MktA1XAS60L51ojgwMP9bg1KsYey6oqKgzWZw3cHXHbhOQ4DxSzy7 Z9A7a4GQLQwcw== From: Amitay Isaacs To: pdbg@lists.ozlabs.org Date: Mon, 22 Jun 2020 10:44:57 +1000 Message-Id: <20200622004501.12889-6-amitay@ozlabs.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200622004501.12889-1-amitay@ozlabs.org> References: <20200622004501.12889-1-amitay@ozlabs.org> MIME-Version: 1.0 Subject: [Pdbg] [PATCH 5/9] libpdbg: Use SPR definitions instead of hard-coded values X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Amitay Isaacs Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Amitay Isaacs --- libpdbg/chip.c | 59 ++++++++++++++++++++++++------------------------ libpdbg/p8chip.c | 4 +--- libpdbg/p9chip.c | 5 ++-- 3 files changed, 34 insertions(+), 34 deletions(-) diff --git a/libpdbg/chip.c b/libpdbg/chip.c index f0dd6bf..58eedeb 100644 --- a/libpdbg/chip.c +++ b/libpdbg/chip.c @@ -25,6 +25,7 @@ #include "operations.h" #include "bitutils.h" #include "debug.h" +#include "sprs.h" uint64_t mfspr(uint64_t reg, uint64_t spr) { @@ -559,16 +560,16 @@ int thread_getregs(struct pdbg_target *target, struct thread_regs *regs) thread_getnia(target, ®s->nia); printf("NIA : 0x%016" PRIx64 "\n", regs->nia); - thread_getspr(target, 28, ®s->cfar); + thread_getspr(target, SPR_CFAR, ®s->cfar); printf("CFAR : 0x%016" PRIx64 "\n", regs->cfar); thread_getmsr(target, ®s->msr); printf("MSR : 0x%016" PRIx64 "\n", regs->msr); - thread_getspr(target, 8, ®s->lr); + thread_getspr(target, SPR_LR, ®s->lr); printf("LR : 0x%016" PRIx64 "\n", regs->lr); - thread_getspr(target, 9, ®s->ctr); + thread_getspr(target, SPR_CTR, ®s->ctr); printf("CTR : 0x%016" PRIx64 "\n", regs->ctr); thread_getspr(target, 815, ®s->tar); @@ -588,85 +589,85 @@ int thread_getregs(struct pdbg_target *target, struct thread_regs *regs) printf("\n"); } - thread_getspr(target, 318, ®s->lpcr); + thread_getspr(target, SPR_LPCR, ®s->lpcr); printf("LPCR : 0x%016" PRIx64 "\n", regs->lpcr); - thread_getspr(target, 464, ®s->ptcr); + thread_getspr(target, SPR_PTCR, ®s->ptcr); printf("PTCR : 0x%016" PRIx64 "\n", regs->ptcr); - thread_getspr(target, 319, ®s->lpidr); + thread_getspr(target, SPR_LPIDR, ®s->lpidr); printf("LPIDR : 0x%016" PRIx64 "\n", regs->lpidr); - thread_getspr(target, 48, ®s->pidr); + thread_getspr(target, SPR_PIDR, ®s->pidr); printf("PIDR : 0x%016" PRIx64 "\n", regs->pidr); - thread_getspr(target, 190, ®s->hfscr); + thread_getspr(target, SPR_HFSCR, ®s->hfscr); printf("HFSCR : 0x%016" PRIx64 "\n", regs->hfscr); - thread_getspr(target, 306, &value); + thread_getspr(target, SPR_HDSISR, &value); regs->hdsisr = value; printf("HDSISR: 0x%08" PRIx32 "\n", regs->hdsisr); - thread_getspr(target, 307, ®s->hdar); + thread_getspr(target, SPR_HDAR, ®s->hdar); printf("HDAR : 0x%016" PRIx64 "\n", regs->hdar); - thread_getspr(target, 339, &value); + thread_getspr(target, SPR_HEIR, &value); regs->heir = value; printf("HEIR : 0x%016" PRIx32 "\n", regs->heir); - thread_getspr(target, 1008, ®s->hid); + thread_getspr(target, SPR_HID, ®s->hid); printf("HID0 : 0x%016" PRIx64 "\n", regs->hid); - thread_getspr(target, 314, ®s->hsrr0); + thread_getspr(target, SPR_HSRR0, ®s->hsrr0); printf("HSRR0 : 0x%016" PRIx64 "\n", regs->hsrr0); - thread_getspr(target, 315, ®s->hsrr1); + thread_getspr(target, SPR_HSRR1, ®s->hsrr1); printf("HSRR1 : 0x%016" PRIx64 "\n", regs->hsrr1); - thread_getspr(target, 310, ®s->hdec); + thread_getspr(target, SPR_HDEC, ®s->hdec); printf("HDEC : 0x%016" PRIx64 "\n", regs->hdec); - thread_getspr(target, 304, ®s->hsprg0); + thread_getspr(target, SPR_HSPRG0, ®s->hsprg0); printf("HSPRG0: 0x%016" PRIx64 "\n", regs->hsprg0); - thread_getspr(target, 305, ®s->hsprg1); + thread_getspr(target, SPR_HSPRG1, ®s->hsprg1); printf("HSPRG1: 0x%016" PRIx64 "\n", regs->hsprg1); - thread_getspr(target, 153, ®s->fscr); + thread_getspr(target, SPR_FSCR, ®s->fscr); printf("FSCR : 0x%016" PRIx64 "\n", regs->fscr); - thread_getspr(target, 18, &value); + thread_getspr(target, SPR_DSISR, &value); regs->dsisr = value; printf("DSISR : 0x%08" PRIx32 "\n", regs->dsisr); - thread_getspr(target, 19, ®s->dar); + thread_getspr(target, SPR_DAR, ®s->dar); printf("DAR : 0x%016" PRIx64 "\n", regs->dar); - thread_getspr(target, 26, ®s->srr0); + thread_getspr(target, SPR_SRR0, ®s->srr0); printf("SRR0 : 0x%016" PRIx64 "\n", regs->srr0); - thread_getspr(target, 27, ®s->srr1); + thread_getspr(target, SPR_SRR1, ®s->srr1); printf("SRR1 : 0x%016" PRIx64 "\n", regs->srr1); - thread_getspr(target, 22, ®s->dec); + thread_getspr(target, SPR_DEC, ®s->dec); printf("DEC : 0x%016" PRIx64 "\n", regs->dec); - thread_getspr(target, 268, ®s->tb); + thread_getspr(target, SPR_TB, ®s->tb); printf("TB : 0x%016" PRIx64 "\n", regs->tb); - thread_getspr(target, 272, ®s->sprg0); + thread_getspr(target, SPR_SPRG0, ®s->sprg0); printf("SPRG0 : 0x%016" PRIx64 "\n", regs->sprg0); - thread_getspr(target, 273, ®s->sprg1); + thread_getspr(target, SPR_SPRG1, ®s->sprg1); printf("SPRG1 : 0x%016" PRIx64 "\n", regs->sprg1); - thread_getspr(target, 274, ®s->sprg2); + thread_getspr(target, SPR_SPRG2, ®s->sprg2); printf("SPRG2 : 0x%016" PRIx64 "\n", regs->sprg2); - thread_getspr(target, 275, ®s->sprg3); + thread_getspr(target, SPR_SPRG3, ®s->sprg3); printf("SPRG3 : 0x%016" PRIx64 "\n", regs->sprg3); - thread_getspr(target, 896, ®s->ppr); + thread_getspr(target, SPR_PPR, ®s->ppr); printf("PPR : 0x%016" PRIx64 "\n", regs->ppr); CHECK_ERR(thread->ram_destroy(thread)); diff --git a/libpdbg/p8chip.c b/libpdbg/p8chip.c index 4a2061a..50ab143 100644 --- a/libpdbg/p8chip.c +++ b/libpdbg/p8chip.c @@ -25,6 +25,7 @@ #include "operations.h" #include "bitutils.h" #include "debug.h" +#include "sprs.h" #define RAS_STATUS_TIMEOUT 100 @@ -509,9 +510,6 @@ static int p8_ram_putxer(struct thread *thread, uint64_t value) return 0; } -#define SPR_SRR0 0x01a -#define SPR_SRR1 0x01b - #define HID0_HILE PPC_BIT(19) #define MSR_HV PPC_BIT(3) /* Hypervisor mode */ diff --git a/libpdbg/p9chip.c b/libpdbg/p9chip.c index 811bca6..abd2ab2 100644 --- a/libpdbg/p9chip.c +++ b/libpdbg/p9chip.c @@ -24,6 +24,7 @@ #include "operations.h" #include "bitutils.h" #include "debug.h" +#include "sprs.h" /* * NOTE! @@ -406,14 +407,14 @@ static int p9_ram_destroy(struct thread *thread) static int p9_ram_getxer(struct thread *thread, uint64_t *value) { - CHECK_ERR(thread_getspr(&thread->target, 1, value)); + CHECK_ERR(thread_getspr(&thread->target, SPR_XER, value)); return 0; } static int p9_ram_putxer(struct thread *thread, uint64_t value) { - CHECK_ERR(thread_putspr(&thread->target, 1, value)); + CHECK_ERR(thread_putspr(&thread->target, SPR_XER, value)); return 0; From patchwork Mon Jun 22 00:44:58 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amitay Isaacs X-Patchwork-Id: 1314032 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49qrLG3fdXz9sRh for ; Mon, 22 Jun 2020 10:45:42 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=ozlabs.org Authentication-Results: ozlabs.org; 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dkim-atps=neutral Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 49qrKh59ccz9sRN; Mon, 22 Jun 2020 10:45:12 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ozlabs.org; s=201707; t=1592786712; bh=HzFLMtmWC1nHdZdEDNFs8Hmp6dN0qWUS/JyeLo3Hyqg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=FlISJ1fReQANMJBQrT3ZA85VCzlrqt863Z+jwDNghe70oitPxfh1Ndwc9nANWa2VZ RrvsDOOm14jvO3QrkBY8+rUEhsgnKtYeKFKri+CMV1+u/RDZ25wrGkyPQxE3HRDNb/ LWIUEqX3oqGryGxzrV8Cmy/zfeX/8amtCuDhrP6q/rPPkAAIKLfiPCFyc8jtFawduc ZeF3uUvas9YT+9qFIdlekPfTa6hSZQeISB5NcpvxXod42UKdCoJKv0sX1ZfK0sVicO 5C+H5B5/DjDWzVMON9PATdQtRI6T+Reo1mwBWUZq4BcXxE43zzAoyUSkX8OWx5USmf 71fb47SnKSAAg== From: Amitay Isaacs To: pdbg@lists.ozlabs.org Date: Mon, 22 Jun 2020 10:44:58 +1000 Message-Id: <20200622004501.12889-7-amitay@ozlabs.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200622004501.12889-1-amitay@ozlabs.org> References: <20200622004501.12889-1-amitay@ozlabs.org> MIME-Version: 1.0 Subject: [Pdbg] [PATCH 6/9] libpdbg: Add register access procedures to thread X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Amitay Isaacs Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Amitay Isaacs --- libpdbg/hwunit.h | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/libpdbg/hwunit.h b/libpdbg/hwunit.h index 7fe83a6..fd643b4 100644 --- a/libpdbg/hwunit.h +++ b/libpdbg/hwunit.h @@ -143,6 +143,27 @@ struct thread { int (*ram_getxer)(struct thread *, uint64_t *value); int (*ram_putxer)(struct thread *, uint64_t value); int (*enable_attn)(struct thread *); + + int (*getmem)(struct thread *, uint64_t, uint64_t *); + int (*getregs)(struct thread *, struct thread_regs *regs); + + int (*getgpr)(struct thread *, int, uint64_t *); + int (*putgpr)(struct thread *, int, uint64_t); + + int (*getspr)(struct thread *, int, uint64_t *); + int (*putspr)(struct thread *, int, uint64_t); + + int (*getmsr)(struct thread *, uint64_t *); + int (*putmsr)(struct thread *, uint64_t); + + int (*getnia)(struct thread *, uint64_t *); + int (*putnia)(struct thread *, uint64_t); + + int (*getxer)(struct thread *, uint64_t *); + int (*putxer)(struct thread *, uint64_t); + + int (*getcr)(struct thread *, uint32_t *); + int (*putcr)(struct thread *, uint32_t); }; #define target_to_thread(x) container_of(x, struct thread, target) From patchwork Mon Jun 22 00:44:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amitay Isaacs X-Patchwork-Id: 1314033 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49qrLL0KLXz9sRh for ; Mon, 22 Jun 2020 10:45:46 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=ozlabs.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=F/xF/H0W; dkim-atps=neutral Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 49qrLK6S3jzDqbv for ; Mon, 22 Jun 2020 10:45:45 +1000 (AEST) X-Original-To: pdbg@lists.ozlabs.org Delivered-To: pdbg@lists.ozlabs.org Received: from ozlabs.org (bilbo.ozlabs.org [IPv6:2401:3900:2:1::2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 49qrKj3hWQzDqWf for ; Mon, 22 Jun 2020 10:45:13 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=ozlabs.org Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=F/xF/H0W; dkim-atps=neutral Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 49qrKj1Fh7z9sRR; Mon, 22 Jun 2020 10:45:13 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ozlabs.org; s=201707; t=1592786713; bh=yXX66p3jvENDW022KywLmSG0V7faNr3ijdoCEwEoLFY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=F/xF/H0W/+P6Iw8hLkROLRTE19Gx4ju0LPAMHZhtapAGPhSb96JOex8A6kYOlux1Q c2CnnmqEJn6hIHSx6aGJ4AYiRxJo4DDLZoXAn0MqcL5DWlvcNOkhFJsmqr/zxy1tdG q/ZYFgx0AwP6WqsjGMlNQqdyQXlT1WdZfBWK+acEdWTJa5VUE3LYCCPrblOOrMWE7B 282cWKwZHFloWxqHSAALoVY9v8hNNaigpvAIk/LO/s6GQywN9xUVYQFem06KKD8CRi sRt9ckG28I6t2bJSdAEs/ZqVOSdrDCSoCBp9KfjecG+QJHrbRCkncjgEpnbHf7UBco TkbmrFj8mTGHw== From: Amitay Isaacs To: pdbg@lists.ozlabs.org Date: Mon, 22 Jun 2020 10:44:59 +1000 Message-Id: <20200622004501.12889-8-amitay@ozlabs.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200622004501.12889-1-amitay@ozlabs.org> References: <20200622004501.12889-1-amitay@ozlabs.org> MIME-Version: 1.0 Subject: [Pdbg] [PATCH 7/9] libpdbg: Rearrange thread procedures for register access X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Amitay Isaacs Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" This moves libpdbg thread api to thread.c. Also, the implementation based ramming instructions moves to the specific thread drivers. Signed-off-by: Amitay Isaacs --- Makefile.am | 3 +- libpdbg/chip.c | 318 +++++++-------------------------------------- libpdbg/chip.h | 19 +++ libpdbg/hwunit.h | 2 - libpdbg/p8chip.c | 17 ++- libpdbg/p9chip.c | 21 ++- libpdbg/thread.c | 328 +++++++++++++++++++++++++++++++++++++++++++++++ 7 files changed, 429 insertions(+), 279 deletions(-) create mode 100644 libpdbg/thread.c diff --git a/Makefile.am b/Makefile.am index f51afb3..4247913 100644 --- a/Makefile.am +++ b/Makefile.am @@ -207,7 +207,8 @@ libpdbg_la_SOURCES = \ libpdbg/sbefifo.c \ libpdbg/sprs.h \ libpdbg/target.c \ - libpdbg/target.h + libpdbg/target.h \ + libpdbg/thread.c libpdbg_la_CFLAGS = -Wall -Werror libpdbg_la_LIBADD = libcronus.la libsbefifo.la diff --git a/libpdbg/chip.c b/libpdbg/chip.c index 58eedeb..a5afe5c 100644 --- a/libpdbg/chip.c +++ b/libpdbg/chip.c @@ -26,6 +26,7 @@ #include "bitutils.h" #include "debug.h" #include "sprs.h" +#include "chip.h" uint64_t mfspr(uint64_t reg, uint64_t spr) { @@ -107,166 +108,6 @@ static uint64_t ld(uint64_t rt, uint64_t ds, uint64_t ra) return LD_OPCODE | (rt << 21) | (ra << 16) | (ds << 2); } -struct thread_state thread_status(struct pdbg_target *target) -{ - struct thread *thread; - - assert(pdbg_target_is_class(target, "thread")); - thread = target_to_thread(target); - return thread->status; -} - -/* - * Single step the thread count instructions. - */ -int thread_step(struct pdbg_target *target, int count) -{ - struct thread *thread; - - assert(pdbg_target_is_class(target, "thread")); - thread = target_to_thread(target); - return thread->step(thread, count); -} - -int thread_start(struct pdbg_target *target) -{ - struct thread *thread; - - assert(pdbg_target_is_class(target, "thread")); - thread = target_to_thread(target); - return thread->start(thread); -} - -int thread_stop(struct pdbg_target *target) -{ - struct thread *thread; - - assert(pdbg_target_is_class(target, "thread")); - thread = target_to_thread(target); - return thread->stop(thread); -} - -int thread_sreset(struct pdbg_target *target) -{ - struct thread *thread; - - assert(pdbg_target_is_class(target, "thread")); - thread = target_to_thread(target); - return thread->sreset(thread); -} - -int thread_step_all(void) -{ - struct pdbg_target *target, *thread; - int rc = 0, count = 0; - - pdbg_for_each_class_target("pib", target) { - struct pib *pib = target_to_pib(target); - - if (!pib->thread_step_all) - break; - - rc |= pib->thread_step_all(pib, 1); - count++; - } - - if (count > 0) - return rc; - - pdbg_for_each_class_target("thread", thread) { - if (pdbg_target_status(thread) != PDBG_TARGET_ENABLED) - continue; - - rc |= thread_step(thread, 1); - } - - return rc; -} - -int thread_start_all(void) -{ - struct pdbg_target *target, *thread; - int rc = 0, count = 0; - - pdbg_for_each_class_target("pib", target) { - struct pib *pib = target_to_pib(target); - - if (!pib->thread_start_all) - break; - - rc |= pib->thread_start_all(pib); - count++; - } - - if (count > 0) - return rc; - - pdbg_for_each_class_target("thread", thread) { - if (pdbg_target_status(thread) != PDBG_TARGET_ENABLED) - continue; - - rc |= thread_start(thread); - } - - return rc; -} - -int thread_stop_all(void) -{ - struct pdbg_target *target, *thread; - int rc = 0, count = 0; - - pdbg_for_each_class_target("pib", target) { - struct pib *pib = target_to_pib(target); - - if (!pib->thread_stop_all) - break; - - rc |= pib->thread_stop_all(pib); - count++; - } - - if (count > 0) - return rc; - - pdbg_for_each_class_target("thread", thread) { - if (pdbg_target_status(thread) != PDBG_TARGET_ENABLED) - continue; - - rc |= thread_stop(thread); - } - - return rc; -} - -int thread_sreset_all(void) -{ - struct pdbg_target *target, *thread; - int rc = 0, count = 0; - - pdbg_for_each_class_target("pib", target) { - struct pib *pib = target_to_pib(target); - - if (!pib->thread_sreset_all) - break; - - rc |= pib->thread_sreset_all(pib); - count++; - } - - if (count > 0) - return rc; - - pdbg_for_each_class_target("thread", thread) { - if (pdbg_target_status(thread) != PDBG_TARGET_ENABLED) - continue; - - rc |= thread_sreset(thread); - } - - return rc; -} - /* * RAMs the opcodes in *opcodes and store the results of each opcode * into *results. *results must point to an array the same size as @@ -336,40 +177,30 @@ int ram_instructions(struct thread *thread, uint64_t *opcodes, /* * Get gpr value. Chip must be stopped. */ -int thread_getgpr(struct pdbg_target *target, int gpr, uint64_t *value) +int ram_getgpr(struct thread *thread, int gpr, uint64_t *value) { - struct thread *thread; uint64_t opcodes[] = {mtspr(277, gpr)}; uint64_t results[] = {0}; - assert(pdbg_target_is_class(target, "thread")); - thread = target_to_thread(target); CHECK_ERR(ram_instructions(thread, opcodes, results, ARRAY_SIZE(opcodes), 0)); *value = results[0]; return 0; } -int thread_putgpr(struct pdbg_target *target, int gpr, uint64_t value) +int ram_putgpr(struct thread *thread, int gpr, uint64_t value) { - struct thread *thread; uint64_t opcodes[] = {mfspr(gpr, 277)}; uint64_t results[] = {value}; - assert(pdbg_target_is_class(target, "thread")); - thread = target_to_thread(target); CHECK_ERR(ram_instructions(thread, opcodes, results, ARRAY_SIZE(opcodes), 0)); - return 0; } -int thread_getnia(struct pdbg_target *target, uint64_t *value) +int ram_getnia(struct thread *thread, uint64_t *value) { - struct thread *thread; uint64_t opcodes[] = {mfnia(0), mtspr(277, 0)}; uint64_t results[] = {0, 0}; - assert(pdbg_target_is_class(target, "thread")); - thread = target_to_thread(target); CHECK_ERR(ram_instructions(thread, opcodes, results, ARRAY_SIZE(opcodes), 0)); *value = results[1]; return 0; @@ -382,9 +213,8 @@ int thread_getnia(struct pdbg_target *target, uint64_t *value) * This is a hack and should be made much cleaner once we have target * specific putspr commands. */ -int thread_putnia(struct pdbg_target *target, uint64_t value) +int ram_putnia(struct thread *thread, uint64_t value) { - struct thread *thread; uint64_t opcodes[] = { mfspr(1, 8), /* mflr r1 */ mfspr(0, 277), /* value -> r0 */ mtspr(8, 0), /* mtlr r0 */ @@ -392,53 +222,41 @@ int thread_putnia(struct pdbg_target *target, uint64_t value) mtspr(8, 1), }; /* mtlr r1 */ uint64_t results[] = {0, value, 0, 0, 0}; - assert(pdbg_target_is_class(target, "thread")); - thread = target_to_thread(target); CHECK_ERR(ram_instructions(thread, opcodes, results, ARRAY_SIZE(opcodes), 0)); return 0; } -int thread_getspr(struct pdbg_target *target, int spr, uint64_t *value) +int ram_getspr(struct thread *thread, int spr, uint64_t *value) { - struct thread *thread; uint64_t opcodes[] = {mfspr(0, spr), mtspr(277, 0)}; uint64_t results[] = {0, 0}; - assert(pdbg_target_is_class(target, "thread")); - thread = target_to_thread(target); CHECK_ERR(ram_instructions(thread, opcodes, results, ARRAY_SIZE(opcodes), 0)); *value = results[1]; return 0; } -int thread_putspr(struct pdbg_target *target, int spr, uint64_t value) +int ram_putspr(struct thread *thread, int spr, uint64_t value) { - struct thread *thread; uint64_t opcodes[] = {mfspr(0, 277), mtspr(spr, 0)}; uint64_t results[] = {value, 0}; - assert(pdbg_target_is_class(target, "thread")); - thread = target_to_thread(target); CHECK_ERR(ram_instructions(thread, opcodes, results, ARRAY_SIZE(opcodes), 0)); return 0; } -int thread_getmsr(struct pdbg_target *target, uint64_t *value) +int ram_getmsr(struct thread *thread, uint64_t *value) { - struct thread *thread; uint64_t opcodes[] = {mfmsr(0), mtspr(277, 0)}; uint64_t results[] = {0, 0}; - assert(pdbg_target_is_class(target, "thread")); - thread = target_to_thread(target); CHECK_ERR(ram_instructions(thread, opcodes, results, ARRAY_SIZE(opcodes), 0)); *value = results[1]; return 0; } -int thread_getcr(struct pdbg_target *target, uint32_t *value) +int ram_getcr(struct thread *thread, uint32_t *value) { - struct thread *thread; uint64_t opcodes[] = {mfocrf(0, 0), mtspr(277, 0), mfocrf(0, 1), mtspr(277, 0), mfocrf(0, 2), mtspr(277, 0), mfocrf(0, 3), mtspr(277, 0), mfocrf(0, 4), mtspr(277, 0), mfocrf(0, 5), mtspr(277, 0), @@ -447,8 +265,6 @@ int thread_getcr(struct pdbg_target *target, uint32_t *value) uint32_t cr_field, cr = 0; int i; - assert(pdbg_target_is_class(target, "thread")); - thread = target_to_thread(target); CHECK_ERR(ram_instructions(thread, opcodes, results, ARRAY_SIZE(opcodes), 0)); for (i = 1; i < 16; i += 2) { cr_field = results[i]; @@ -460,70 +276,36 @@ int thread_getcr(struct pdbg_target *target, uint32_t *value) return 0; } -int thread_putcr(struct pdbg_target *target, uint32_t value) +int ram_putcr(struct thread *thread, uint32_t value) { - struct thread *thread; uint64_t opcodes[] = {mfspr(0, 277), mtocrf(0, 0), mtocrf(1, 0), mtocrf(2, 0), mtocrf(3, 0), mtocrf(4, 0), mtocrf(5, 0), mtocrf(6, 0), mtocrf(7, 0)}; uint64_t results[] = {value}; - assert(pdbg_target_is_class(target, "thread")); - thread = target_to_thread(target); CHECK_ERR(ram_instructions(thread, opcodes, results, ARRAY_SIZE(opcodes), 0)); - return 0; } -int thread_putmsr(struct pdbg_target *target, uint64_t value) +int ram_putmsr(struct thread *thread, uint64_t value) { - struct thread *thread; uint64_t opcodes[] = {mfspr(0, 277), mtmsr(0)}; uint64_t results[] = {value, 0}; - assert(pdbg_target_is_class(target, "thread")); - thread = target_to_thread(target); CHECK_ERR(ram_instructions(thread, opcodes, results, ARRAY_SIZE(opcodes), 0)); return 0; } -int thread_getmem(struct pdbg_target *target, uint64_t addr, uint64_t *value) +int ram_getmem(struct thread *thread, uint64_t addr, uint64_t *value) { - struct thread *thread; uint64_t opcodes[] = {mfspr(0, 277), mfspr(1, 277), ld(0, 0, 1), mtspr(277, 0)}; uint64_t results[] = {0xdeaddeaddeaddead, addr, 0, 0}; - assert(pdbg_target_is_class(target, "thread")); - thread = target_to_thread(target); CHECK_ERR(ram_instructions(thread, opcodes, results, ARRAY_SIZE(opcodes), 0)); *value = results[3]; return 0; } -int thread_getxer(struct pdbg_target *target, uint64_t *value) -{ - struct thread *thread; - - assert(pdbg_target_is_class(target, "thread")); - thread = target_to_thread(target); - - CHECK_ERR(thread->ram_getxer(thread, value)); - - return 0; -} - -int thread_putxer(struct pdbg_target *target, uint64_t value) -{ - struct thread *thread; - - assert(pdbg_target_is_class(target, "thread")); - thread = target_to_thread(target); - - CHECK_ERR(thread->ram_putxer(thread, value)); - - return 0; -} - /* * Read the given ring from the given chiplet. Result must be large enough to hold ring_len bits. */ @@ -536,9 +318,8 @@ int getring(struct pdbg_target *target, uint64_t ring_addr, uint64_t ring_len, u return chiplet->getring(chiplet, ring_addr, ring_len, result); } -int thread_getregs(struct pdbg_target *target, struct thread_regs *regs) +int ram_getregs(struct thread *thread, struct thread_regs *regs) { - struct thread *thread; struct thread_regs _regs; uint64_t value = 0; int i; @@ -546,9 +327,6 @@ int thread_getregs(struct pdbg_target *target, struct thread_regs *regs) if (!regs) regs = &_regs; - assert(pdbg_target_is_class(target, "thread")); - thread = target_to_thread(target); - CHECK_ERR(thread->ram_setup(thread)); /* @@ -557,117 +335,117 @@ int thread_getregs(struct pdbg_target *target, struct thread_regs *regs) * can help to diagnose checkstop issues with ramming to print as * we go. Once it's more robust and tested, maybe. */ - thread_getnia(target, ®s->nia); + ram_getnia(thread, ®s->nia); printf("NIA : 0x%016" PRIx64 "\n", regs->nia); - thread_getspr(target, SPR_CFAR, ®s->cfar); + ram_getspr(thread, SPR_CFAR, ®s->cfar); printf("CFAR : 0x%016" PRIx64 "\n", regs->cfar); - thread_getmsr(target, ®s->msr); + ram_getmsr(thread, ®s->msr); printf("MSR : 0x%016" PRIx64 "\n", regs->msr); - thread_getspr(target, SPR_LR, ®s->lr); + ram_getspr(thread, SPR_LR, ®s->lr); printf("LR : 0x%016" PRIx64 "\n", regs->lr); - thread_getspr(target, SPR_CTR, ®s->ctr); + ram_getspr(thread, SPR_CTR, ®s->ctr); printf("CTR : 0x%016" PRIx64 "\n", regs->ctr); - thread_getspr(target, 815, ®s->tar); + ram_getspr(thread, 815, ®s->tar); printf("TAR : 0x%016" PRIx64 "\n", regs->tar); - thread_getcr(target, ®s->cr); + ram_getcr(thread, ®s->cr); printf("CR : 0x%08" PRIx32 "\n", regs->cr); - thread_getxer(target, ®s->xer); + thread->getxer(thread, ®s->xer); printf("XER : 0x%08" PRIx64 "\n", regs->xer); printf("GPRS :\n"); for (i = 0; i < 32; i++) { - thread_getgpr(target, i, ®s->gprs[i]); + ram_getgpr(thread, i, ®s->gprs[i]); printf(" 0x%016" PRIx64 "", regs->gprs[i]); if (i % 4 == 3) printf("\n"); } - thread_getspr(target, SPR_LPCR, ®s->lpcr); + ram_getspr(thread, SPR_LPCR, ®s->lpcr); printf("LPCR : 0x%016" PRIx64 "\n", regs->lpcr); - thread_getspr(target, SPR_PTCR, ®s->ptcr); + ram_getspr(thread, SPR_PTCR, ®s->ptcr); printf("PTCR : 0x%016" PRIx64 "\n", regs->ptcr); - thread_getspr(target, SPR_LPIDR, ®s->lpidr); + ram_getspr(thread, SPR_LPIDR, ®s->lpidr); printf("LPIDR : 0x%016" PRIx64 "\n", regs->lpidr); - thread_getspr(target, SPR_PIDR, ®s->pidr); + ram_getspr(thread, SPR_PIDR, ®s->pidr); printf("PIDR : 0x%016" PRIx64 "\n", regs->pidr); - thread_getspr(target, SPR_HFSCR, ®s->hfscr); + ram_getspr(thread, SPR_HFSCR, ®s->hfscr); printf("HFSCR : 0x%016" PRIx64 "\n", regs->hfscr); - thread_getspr(target, SPR_HDSISR, &value); + ram_getspr(thread, SPR_HDSISR, &value); regs->hdsisr = value; printf("HDSISR: 0x%08" PRIx32 "\n", regs->hdsisr); - thread_getspr(target, SPR_HDAR, ®s->hdar); + ram_getspr(thread, SPR_HDAR, ®s->hdar); printf("HDAR : 0x%016" PRIx64 "\n", regs->hdar); - thread_getspr(target, SPR_HEIR, &value); + ram_getspr(thread, SPR_HEIR, &value); regs->heir = value; printf("HEIR : 0x%016" PRIx32 "\n", regs->heir); - thread_getspr(target, SPR_HID, ®s->hid); + ram_getspr(thread, SPR_HID, ®s->hid); printf("HID0 : 0x%016" PRIx64 "\n", regs->hid); - thread_getspr(target, SPR_HSRR0, ®s->hsrr0); + ram_getspr(thread, SPR_HSRR0, ®s->hsrr0); printf("HSRR0 : 0x%016" PRIx64 "\n", regs->hsrr0); - thread_getspr(target, SPR_HSRR1, ®s->hsrr1); + ram_getspr(thread, SPR_HSRR1, ®s->hsrr1); printf("HSRR1 : 0x%016" PRIx64 "\n", regs->hsrr1); - thread_getspr(target, SPR_HDEC, ®s->hdec); + ram_getspr(thread, SPR_HDEC, ®s->hdec); printf("HDEC : 0x%016" PRIx64 "\n", regs->hdec); - thread_getspr(target, SPR_HSPRG0, ®s->hsprg0); + ram_getspr(thread, SPR_HSPRG0, ®s->hsprg0); printf("HSPRG0: 0x%016" PRIx64 "\n", regs->hsprg0); - thread_getspr(target, SPR_HSPRG1, ®s->hsprg1); + ram_getspr(thread, SPR_HSPRG1, ®s->hsprg1); printf("HSPRG1: 0x%016" PRIx64 "\n", regs->hsprg1); - thread_getspr(target, SPR_FSCR, ®s->fscr); + ram_getspr(thread, SPR_FSCR, ®s->fscr); printf("FSCR : 0x%016" PRIx64 "\n", regs->fscr); - thread_getspr(target, SPR_DSISR, &value); + ram_getspr(thread, SPR_DSISR, &value); regs->dsisr = value; printf("DSISR : 0x%08" PRIx32 "\n", regs->dsisr); - thread_getspr(target, SPR_DAR, ®s->dar); + ram_getspr(thread, SPR_DAR, ®s->dar); printf("DAR : 0x%016" PRIx64 "\n", regs->dar); - thread_getspr(target, SPR_SRR0, ®s->srr0); + ram_getspr(thread, SPR_SRR0, ®s->srr0); printf("SRR0 : 0x%016" PRIx64 "\n", regs->srr0); - thread_getspr(target, SPR_SRR1, ®s->srr1); + ram_getspr(thread, SPR_SRR1, ®s->srr1); printf("SRR1 : 0x%016" PRIx64 "\n", regs->srr1); - thread_getspr(target, SPR_DEC, ®s->dec); + ram_getspr(thread, SPR_DEC, ®s->dec); printf("DEC : 0x%016" PRIx64 "\n", regs->dec); - thread_getspr(target, SPR_TB, ®s->tb); + ram_getspr(thread, SPR_TB, ®s->tb); printf("TB : 0x%016" PRIx64 "\n", regs->tb); - thread_getspr(target, SPR_SPRG0, ®s->sprg0); + ram_getspr(thread, SPR_SPRG0, ®s->sprg0); printf("SPRG0 : 0x%016" PRIx64 "\n", regs->sprg0); - thread_getspr(target, SPR_SPRG1, ®s->sprg1); + ram_getspr(thread, SPR_SPRG1, ®s->sprg1); printf("SPRG1 : 0x%016" PRIx64 "\n", regs->sprg1); - thread_getspr(target, SPR_SPRG2, ®s->sprg2); + ram_getspr(thread, SPR_SPRG2, ®s->sprg2); printf("SPRG2 : 0x%016" PRIx64 "\n", regs->sprg2); - thread_getspr(target, SPR_SPRG3, ®s->sprg3); + ram_getspr(thread, SPR_SPRG3, ®s->sprg3); printf("SPRG3 : 0x%016" PRIx64 "\n", regs->sprg3); - thread_getspr(target, SPR_PPR, ®s->ppr); + ram_getspr(thread, SPR_PPR, ®s->ppr); printf("PPR : 0x%016" PRIx64 "\n", regs->ppr); CHECK_ERR(thread->ram_destroy(thread)); diff --git a/libpdbg/chip.h b/libpdbg/chip.h index b3342b8..6856c64 100644 --- a/libpdbg/chip.h +++ b/libpdbg/chip.h @@ -24,4 +24,23 @@ uint64_t mtspr(uint64_t spr, uint64_t reg) __attribute__ ((visibility("hidden")) int ram_instructions(struct thread *thread, uint64_t *opcodes, uint64_t *results, int len, unsigned int lpar) __attribute__ ((visibility("hidden"))); + +int ram_getmem(struct thread *thread, uint64_t addr, uint64_t *value); +int ram_getregs(struct thread *thread, struct thread_regs *regs); + +int ram_getgpr(struct thread *thread, int gpr, uint64_t *value); +int ram_putgpr(struct thread *thread, int gpr, uint64_t value); + +int ram_getnia(struct thread *thread, uint64_t *value); +int ram_putnia(struct thread *thread, uint64_t value); + +int ram_getspr(struct thread *thread, int spr, uint64_t *value); +int ram_putspr(struct thread *thread, int spr, uint64_t value); + +int ram_getmsr(struct thread *thread, uint64_t *value); +int ram_putmsr(struct thread *thread, uint64_t value); + +int ram_getcr(struct thread *thread, uint32_t *value); +int ram_putcr(struct thread *thread, uint32_t value); + #endif diff --git a/libpdbg/hwunit.h b/libpdbg/hwunit.h index fd643b4..691689f 100644 --- a/libpdbg/hwunit.h +++ b/libpdbg/hwunit.h @@ -140,8 +140,6 @@ struct thread { int (*ram_setup)(struct thread *); int (*ram_instruction)(struct thread *, uint64_t opcode, uint64_t *scratch); int (*ram_destroy)(struct thread *); - int (*ram_getxer)(struct thread *, uint64_t *value); - int (*ram_putxer)(struct thread *, uint64_t value); int (*enable_attn)(struct thread *); int (*getmem)(struct thread *, uint64_t, uint64_t *); diff --git a/libpdbg/p8chip.c b/libpdbg/p8chip.c index 50ab143..4179557 100644 --- a/libpdbg/p8chip.c +++ b/libpdbg/p8chip.c @@ -26,6 +26,7 @@ #include "bitutils.h" #include "debug.h" #include "sprs.h" +#include "chip.h" #define RAS_STATUS_TIMEOUT 100 @@ -655,9 +656,21 @@ static struct thread p8_thread = { .ram_setup = p8_ram_setup, .ram_instruction = p8_ram_instruction, .ram_destroy = p8_ram_destroy, - .ram_getxer = p8_ram_getxer, - .ram_putxer = p8_ram_putxer, .enable_attn = p8_enable_attn, + .getmem = ram_getmem, + .getregs = ram_getregs, + .getgpr = ram_getgpr, + .putgpr = ram_putgpr, + .getspr = ram_getspr, + .putspr = ram_putspr, + .getmsr = ram_getmsr, + .putmsr = ram_putmsr, + .getnia = ram_getnia, + .putnia = ram_putnia, + .getxer = p8_ram_getxer, + .putxer = p8_ram_putxer, + .getcr = ram_getcr, + .putcr = ram_putcr, }; DECLARE_HW_UNIT(p8_thread); diff --git a/libpdbg/p9chip.c b/libpdbg/p9chip.c index abd2ab2..a46d053 100644 --- a/libpdbg/p9chip.c +++ b/libpdbg/p9chip.c @@ -25,6 +25,7 @@ #include "bitutils.h" #include "debug.h" #include "sprs.h" +#include "chip.h" /* * NOTE! @@ -407,14 +408,14 @@ static int p9_ram_destroy(struct thread *thread) static int p9_ram_getxer(struct thread *thread, uint64_t *value) { - CHECK_ERR(thread_getspr(&thread->target, SPR_XER, value)); + CHECK_ERR(ram_getspr(thread, SPR_XER, value)); return 0; } static int p9_ram_putxer(struct thread *thread, uint64_t value) { - CHECK_ERR(thread_putspr(&thread->target, SPR_XER, value)); + CHECK_ERR(ram_putspr(thread, SPR_XER, value)); return 0; @@ -435,8 +436,20 @@ static struct thread p9_thread = { .ram_setup = p9_ram_setup, .ram_instruction = p9_ram_instruction, .ram_destroy = p9_ram_destroy, - .ram_getxer = p9_ram_getxer, - .ram_putxer = p9_ram_putxer, + .getmem = ram_getmem, + .getregs = ram_getregs, + .getgpr = ram_getgpr, + .putgpr = ram_putgpr, + .getspr = ram_getspr, + .putspr = ram_putspr, + .getmsr = ram_getmsr, + .putmsr = ram_putmsr, + .getnia = ram_getnia, + .putnia = ram_putnia, + .getxer = p9_ram_getxer, + .putxer = p9_ram_putxer, + .getcr = ram_getcr, + .putcr = ram_putcr, }; DECLARE_HW_UNIT(p9_thread); diff --git a/libpdbg/thread.c b/libpdbg/thread.c new file mode 100644 index 0000000..193efb2 --- /dev/null +++ b/libpdbg/thread.c @@ -0,0 +1,328 @@ +/* Copyright 2020 IBM Corp. + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or + * implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ +#include + +#include "libpdbg.h" +#include "hwunit.h" +#include "debug.h" + +struct thread_state thread_status(struct pdbg_target *target) +{ + struct thread *thread; + + assert(pdbg_target_is_class(target, "thread")); + thread = target_to_thread(target); + return thread->status; +} + +/* + * Single step the thread count instructions. + */ +int thread_step(struct pdbg_target *target, int count) +{ + struct thread *thread; + + assert(pdbg_target_is_class(target, "thread")); + thread = target_to_thread(target); + return thread->step(thread, count); +} + +int thread_start(struct pdbg_target *target) +{ + struct thread *thread; + + assert(pdbg_target_is_class(target, "thread")); + thread = target_to_thread(target); + return thread->start(thread); +} + +int thread_stop(struct pdbg_target *target) +{ + struct thread *thread; + + assert(pdbg_target_is_class(target, "thread")); + thread = target_to_thread(target); + return thread->stop(thread); +} + +int thread_sreset(struct pdbg_target *target) +{ + struct thread *thread; + + assert(pdbg_target_is_class(target, "thread")); + thread = target_to_thread(target); + return thread->sreset(thread); +} + +int thread_step_all(void) +{ + struct pdbg_target *target, *thread; + int rc = 0, count = 0; + + pdbg_for_each_class_target("pib", target) { + struct pib *pib = target_to_pib(target); + + if (!pib->thread_step_all) + break; + + rc |= pib->thread_step_all(pib, 1); + count++; + } + + if (count > 0) + return rc; + + pdbg_for_each_class_target("thread", thread) { + if (pdbg_target_status(thread) != PDBG_TARGET_ENABLED) + continue; + + rc |= thread_step(thread, 1); + } + + return rc; +} + +int thread_start_all(void) +{ + struct pdbg_target *target, *thread; + int rc = 0, count = 0; + + pdbg_for_each_class_target("pib", target) { + struct pib *pib = target_to_pib(target); + + if (!pib->thread_start_all) + break; + + rc |= pib->thread_start_all(pib); + count++; + } + + if (count > 0) + return rc; + + pdbg_for_each_class_target("thread", thread) { + if (pdbg_target_status(thread) != PDBG_TARGET_ENABLED) + continue; + + rc |= thread_start(thread); + } + + return rc; +} + +int thread_stop_all(void) +{ + struct pdbg_target *target, *thread; + int rc = 0, count = 0; + + pdbg_for_each_class_target("pib", target) { + struct pib *pib = target_to_pib(target); + + if (!pib->thread_stop_all) + break; + + rc |= pib->thread_stop_all(pib); + count++; + } + + if (count > 0) + return rc; + + pdbg_for_each_class_target("thread", thread) { + if (pdbg_target_status(thread) != PDBG_TARGET_ENABLED) + continue; + + rc |= thread_stop(thread); + } + + return rc; +} + +int thread_sreset_all(void) +{ + struct pdbg_target *target, *thread; + int rc = 0, count = 0; + + pdbg_for_each_class_target("pib", target) { + struct pib *pib = target_to_pib(target); + + if (!pib->thread_sreset_all) + break; + + rc |= pib->thread_sreset_all(pib); + count++; + } + + if (count > 0) + return rc; + + pdbg_for_each_class_target("thread", thread) { + if (pdbg_target_status(thread) != PDBG_TARGET_ENABLED) + continue; + + rc |= thread_sreset(thread); + } + + return rc; +} + +int thread_getmem(struct pdbg_target *target, uint64_t addr, uint64_t *value) +{ + struct thread *thread; + + assert(pdbg_target_is_class(target, "thread")); + thread = target_to_thread(target); + + if (thread->getmem) + return thread->getmem(thread, addr, value); + + PR_ERROR("Not implemented on the backend\n"); + return -1; +} + +int thread_getregs(struct pdbg_target *target, struct thread_regs *regs) +{ + struct thread *thread; + + assert(pdbg_target_is_class(target, "thread")); + thread = target_to_thread(target); + + if (thread->getregs) + return thread->getregs(thread, regs); + + PR_ERROR("Not implemented on the backend\n"); + return -1; +} + +int thread_getgpr(struct pdbg_target *target, int gpr, uint64_t *value) +{ + struct thread *thread; + + assert(pdbg_target_is_class(target, "thread")); + thread = target_to_thread(target); + + return thread->getgpr(thread, gpr, value); +} + +int thread_putgpr(struct pdbg_target *target, int gpr, uint64_t value) +{ + struct thread *thread; + + assert(pdbg_target_is_class(target, "thread")); + thread = target_to_thread(target); + + return thread->putgpr(thread, gpr, value); +} + +int thread_getspr(struct pdbg_target *target, int spr, uint64_t *value) +{ + struct thread *thread; + + assert(pdbg_target_is_class(target, "thread")); + thread = target_to_thread(target); + + return thread->getspr(thread, spr, value); +} + +int thread_putspr(struct pdbg_target *target, int spr, uint64_t value) +{ + struct thread *thread; + + assert(pdbg_target_is_class(target, "thread")); + thread = target_to_thread(target); + + return thread->putspr(thread, spr, value); +} + +int thread_getmsr(struct pdbg_target *target, uint64_t *value) +{ + struct thread *thread; + + assert(pdbg_target_is_class(target, "thread")); + thread = target_to_thread(target); + + return thread->getmsr(thread, value); +} + +int thread_putmsr(struct pdbg_target *target, uint64_t value) +{ + struct thread *thread; + + assert(pdbg_target_is_class(target, "thread")); + thread = target_to_thread(target); + + return thread->putmsr(thread, value); +} + +int thread_getnia(struct pdbg_target *target, uint64_t *value) +{ + struct thread *thread; + + assert(pdbg_target_is_class(target, "thread")); + thread = target_to_thread(target); + + return thread->getnia(thread, value); +} + +int thread_putnia(struct pdbg_target *target, uint64_t value) +{ + struct thread *thread; + + assert(pdbg_target_is_class(target, "thread")); + thread = target_to_thread(target); + + return thread->putnia(thread, value); +} + +int thread_getxer(struct pdbg_target *target, uint64_t *value) +{ + struct thread *thread; + + assert(pdbg_target_is_class(target, "thread")); + thread = target_to_thread(target); + + return thread->getxer(thread, value); +} + +int thread_putxer(struct pdbg_target *target, uint64_t value) +{ + struct thread *thread; + + assert(pdbg_target_is_class(target, "thread")); + thread = target_to_thread(target); + + return thread->putxer(thread, value); +} + +int thread_getcr(struct pdbg_target *target, uint32_t *value) +{ + struct thread *thread; + + assert(pdbg_target_is_class(target, "thread")); + thread = target_to_thread(target); + + return thread->getcr(thread, value); +} + +int thread_putcr(struct pdbg_target *target, uint32_t value) +{ + struct thread *thread; + + assert(pdbg_target_is_class(target, "thread")); + thread = target_to_thread(target); + + return thread->putcr(thread, value); +} From patchwork Mon Jun 22 00:45:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amitay Isaacs X-Patchwork-Id: 1314034 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49qrLP0bdmz9sRR for ; Mon, 22 Jun 2020 10:45:49 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=ozlabs.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=ZcQeo2uZ; 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Mon, 22 Jun 2020 10:45:13 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ozlabs.org; s=201707; t=1592786713; bh=eyZIZlesfSHrNRvC1oZOGRCwdjRUl8aJJTTf/BcDM5o=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ZcQeo2uZJPS0YRjrHnXavwcAvhIwppqRyTsVrvE0+jH84jnxwNVXrZYC+r9Z+h1Ng DsCsWK0nA1abVvby8biINGm8Gb8gvMFo0H98d7LsL66LaGaCk2LH7qhHg3g/os3EdM pVyuf6ZhMv3MhfTYO2UnnZgg89/hpPqVAme+AzB19OWj0QybRGFpmO+b8uGRF2ZvYE owQEd4/xw5zg8RmViqjCKKCzHIZkP6s3hhAPqkp9gerKL4fPmqZJyx50NsmlOPX61Q OUcT8/LBg0g+EtWItpb0A6uOPHEpzTCs1XXvR7hIXHy2yOTcPh1l+f2jFVsE7H91SZ tQ/aI0zxgcBdQ== From: Amitay Isaacs To: pdbg@lists.ozlabs.org Date: Mon, 22 Jun 2020 10:45:00 +1000 Message-Id: <20200622004501.12889-9-amitay@ozlabs.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200622004501.12889-1-amitay@ozlabs.org> References: <20200622004501.12889-1-amitay@ozlabs.org> MIME-Version: 1.0 Subject: [Pdbg] [PATCH 8/9] libsbefifo: Fix register access chip-ops X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Amitay Isaacs Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Amitay Isaacs --- libsbefifo/cmd_register.c | 12 ++++++------ libsbefifo/libsbefifo.h | 4 ++-- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/libsbefifo/cmd_register.c b/libsbefifo/cmd_register.c index 8737e7f..060d3dc 100644 --- a/libsbefifo/cmd_register.c +++ b/libsbefifo/cmd_register.c @@ -22,7 +22,7 @@ #include "libsbefifo.h" #include "sbefifo_private.h" -static int sbefifo_register_get_push(uint8_t core_id, uint8_t thread_id, uint8_t reg_type, uint8_t *reg_id, uint8_t reg_count, uint8_t **buf, uint32_t *buflen) +static int sbefifo_register_get_push(uint8_t core_id, uint8_t thread_id, uint8_t reg_type, uint32_t *reg_id, uint8_t reg_count, uint8_t **buf, uint32_t *buflen) { uint32_t *msg; uint32_t nwords, cmd; @@ -48,7 +48,7 @@ static int sbefifo_register_get_push(uint8_t core_id, uint8_t thread_id, uint8_t msg[1] = htobe32(cmd); msg[2] = htobe32(r); for (i=0; i> 32); msg[3+i*3+2] = htobe32(value[i] & 0xffffffff); } @@ -143,7 +143,7 @@ static int sbefifo_register_put_pull(uint8_t *buf, uint32_t buflen) return 0; } -int sbefifo_register_put(struct sbefifo_context *sctx, uint8_t core_id, uint8_t thread_id, uint8_t reg_type, uint8_t *reg_id, uint8_t reg_count, uint64_t *value) +int sbefifo_register_put(struct sbefifo_context *sctx, uint8_t core_id, uint8_t thread_id, uint8_t reg_type, uint32_t *reg_id, uint8_t reg_count, uint64_t *value) { uint8_t *msg, *out; uint32_t msg_len, out_len; diff --git a/libsbefifo/libsbefifo.h b/libsbefifo/libsbefifo.h index 2efb25c..cbfb76d 100644 --- a/libsbefifo/libsbefifo.h +++ b/libsbefifo/libsbefifo.h @@ -104,8 +104,8 @@ int sbefifo_occsram_put(struct sbefifo_context *sctx, uint32_t addr, uint8_t *da #define SBEFIFO_REGISTER_TYPE_SPR 0x1 #define SBEFIFO_REGISTER_TYPE_FPR 0x2 -int sbefifo_register_get(struct sbefifo_context *sctx, uint8_t core_id, uint8_t thread_id, uint8_t reg_type, uint8_t *reg_id, uint8_t reg_count, uint64_t **value); -int sbefifo_register_put(struct sbefifo_context *sctx, uint8_t core_id, uint8_t thread_id, uint8_t reg_type, uint8_t *reg_id, uint8_t reg_count, uint64_t *value); +int sbefifo_register_get(struct sbefifo_context *sctx, uint8_t core_id, uint8_t thread_id, uint8_t reg_type, uint32_t *reg_id, uint8_t reg_count, uint64_t **value); +int sbefifo_register_put(struct sbefifo_context *sctx, uint8_t core_id, uint8_t thread_id, uint8_t reg_type, uint32_t *reg_id, uint8_t reg_count, uint64_t *value); int sbefifo_control_fast_array(struct sbefifo_context *sctx, uint16_t target_type, uint8_t chiplet_id, uint8_t mode, uint64_t clock_cycle); int sbefifo_control_trace_array(struct sbefifo_context *sctx, uint16_t target_type, uint8_t chiplet_id, uint16_t array_id, uint16_t operation, uint8_t **trace_data, uint32_t *trace_data_len); From patchwork Mon Jun 22 00:45:01 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amitay Isaacs X-Patchwork-Id: 1314035 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49qrLV3PJTz9sRh for ; Mon, 22 Jun 2020 10:45:54 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=ozlabs.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=ksMKLB8I; dkim-atps=neutral Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 49qrLV1xJTzDqbW for ; Mon, 22 Jun 2020 10:45:54 +1000 (AEST) X-Original-To: pdbg@lists.ozlabs.org Delivered-To: pdbg@lists.ozlabs.org Received: from ozlabs.org (bilbo.ozlabs.org [IPv6:2401:3900:2:1::2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 49qrKk0xnSzDqWf for ; Mon, 22 Jun 2020 10:45:14 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=ozlabs.org Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; secure) header.d=ozlabs.org header.i=@ozlabs.org header.a=rsa-sha256 header.s=201707 header.b=ksMKLB8I; dkim-atps=neutral Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 49qrKj6LYcz9sRR; Mon, 22 Jun 2020 10:45:13 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ozlabs.org; s=201707; t=1592786714; bh=Bxf37fxUY2NV9FI2zfWXqCptyrUDmMnnuZpHsssWPLw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ksMKLB8ImqSmqDHUZfOxUGHqM11fMalBUh+8+fwReW6xNxSMghbb8eS+q4GIKCzQ7 n2uhudLj9MdLsp866nQul/ZChPbN3ePtBflkPeSXcTJUs0s8q+VFX7ns0FsZDpLU6O gVfGlE40SETV3FdiAonTP2C5nlHvhmerIPTpypcTvATgnYL6dLxI/0jBkuV+BRsHYe MTTex4fUwuKuEhROOs7KInJ9o6dRoTZ1S6awnXeBJDmuK7Au5iEDkU503yvM/Xo7/i ByQiB2EJzLlA9wbgyy//ld21BTTcNALBpWpzB21t2R5xFQxxtD5Q7/1ReXcp1iUBof 7FuREJgPeHglg== From: Amitay Isaacs To: pdbg@lists.ozlabs.org Date: Mon, 22 Jun 2020 10:45:01 +1000 Message-Id: <20200622004501.12889-10-amitay@ozlabs.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200622004501.12889-1-amitay@ozlabs.org> References: <20200622004501.12889-1-amitay@ozlabs.org> MIME-Version: 1.0 Subject: [Pdbg] [PATCH 9/9] libpdbg: Add sbefifo based thread register access X-BeenThere: pdbg@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: "mailing list for https://github.com/open-power/pdbg development" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Amitay Isaacs Errors-To: pdbg-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Pdbg" Signed-off-by: Amitay Isaacs --- libpdbg/sbefifo.c | 260 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 260 insertions(+) diff --git a/libpdbg/sbefifo.c b/libpdbg/sbefifo.c index eadce10..d2748d0 100644 --- a/libpdbg/sbefifo.c +++ b/libpdbg/sbefifo.c @@ -24,6 +24,7 @@ #include "hwunit.h" #include "debug.h" +#include "sprs.h" static int sbefifo_op_getmem(struct mem *sbefifo_mem, uint64_t addr, uint8_t *data, uint64_t size, @@ -320,6 +321,7 @@ static int sbefifo_thread_op(struct thread *thread, uint32_t oper) oper, mode); } + static int sbefifo_thread_start(struct thread *thread) { return sbefifo_thread_op(thread, SBEFIFO_INSN_OP_START); @@ -345,6 +347,251 @@ static int sbefifo_thread_sreset(struct thread *thread) return sbefifo_thread_op(thread, SBEFIFO_INSN_OP_SRESET); } +static int sbefifo_thread_getregs(struct thread *thread, struct thread_regs *regs) +{ + struct pdbg_target *chiplet = pdbg_target_require_parent("chiplet", &thread->target); + struct pdbg_target *pib = pdbg_target_require_parent("pib", chiplet); + struct sbefifo *sbefifo = pib_to_sbefifo(pib); + struct sbefifo_context *sctx = sbefifo->get_sbefifo_context(sbefifo); + uint32_t reg_id[34]; + uint64_t value[34]; + int ret, i; + + for (i=0; i<32; i++) + reg_id[i] = i; + + /* This chip-op requires core-id as pervasive (chiplet) id */ + ret = sbefifo_register_get(sctx, + pdbg_target_index(chiplet), + thread->id, + 0, + reg_id, + 32, + (uint64_t **)®s->gprs); + if (ret) + return ret; + + reg_id[0] = SPR_NIA; + reg_id[1] = SPR_MSR; + reg_id[2] = SPR_CFAR; + reg_id[3] = SPR_LR; + reg_id[4] = SPR_CTR; + reg_id[5] = SPR_TAR; + reg_id[6] = SPR_CR; + reg_id[7] = SPR_XER; + reg_id[8] = SPR_LPCR; + reg_id[9] = SPR_PTCR; + reg_id[10] = SPR_LPIDR; + reg_id[11] = SPR_PIDR; + reg_id[12] = SPR_HFSCR; + reg_id[13] = SPR_HDSISR; + reg_id[14] = SPR_HDAR; + reg_id[15] = SPR_HSRR0; + reg_id[16] = SPR_HSRR1; + reg_id[17] = SPR_HDEC; + reg_id[18] = SPR_HEIR; + reg_id[19] = SPR_HID; + reg_id[20] = SPR_HSPRG0; + reg_id[21] = SPR_HSPRG1; + reg_id[22] = SPR_FSCR; + reg_id[23] = SPR_DSISR; + reg_id[24] = SPR_DAR; + reg_id[25] = SPR_SRR0; + reg_id[26] = SPR_SRR1; + reg_id[27] = SPR_DEC; + reg_id[28] = SPR_TB; + reg_id[29] = SPR_SPRG0; + reg_id[30] = SPR_SPRG1; + reg_id[31] = SPR_SPRG2; + reg_id[32] = SPR_SPRG3; + reg_id[33] = SPR_PPR; + + ret = sbefifo_register_get(sctx, + pdbg_target_index(chiplet), + thread->id, + 1, + reg_id, + 34, + (uint64_t **)&value); + if (ret) + return ret; + + regs->nia = value[0]; + regs->msr = value[1]; + regs->cfar = value[2]; + regs->lr = value[3]; + regs->ctr = value[4]; + regs->tar = value[5]; + regs->cr = (uint32_t)(value[6] & 0xffffffff); + regs->xer = value[7]; + regs->lpcr = value[8]; + regs->ptcr = value[9]; + regs->lpidr = value[10]; + regs->pidr = value[11]; + regs->hfscr = value[12]; + regs->hdsisr = (uint32_t)(value[13] & 0xffffffff); + regs->hdar = value[14]; + regs->hsrr0 = value[15]; + regs->hsrr1 = value[16]; + regs->hdec = value[17]; + regs->heir = (uint32_t)(value[18] & 0xffffffff); + regs->hid = value[19]; + regs->hsprg0 = value[20]; + regs->hsprg1 = value[21]; + regs->fscr = value[22]; + regs->dsisr = (uint32_t)(value[23] & 0xffffffff); + regs->dar = value[24]; + regs->srr0 = value[25]; + regs->srr1 = value[26]; + regs->dec = value[27]; + regs->tb = value[28]; + regs->sprg0 = value[29]; + regs->sprg1 = value[30]; + regs->sprg2 = value[31]; + regs->sprg3 = value[32]; + regs->ppr = value[33]; + + return 0; +} + +static int sbefifo_thread_get_reg(struct thread *thread, uint8_t reg_type, uint32_t reg_id, uint64_t *value) +{ + struct pdbg_target *chiplet = pdbg_target_require_parent("chiplet", &thread->target); + struct pdbg_target *pib = pdbg_target_require_parent("pib", chiplet); + struct sbefifo *sbefifo = pib_to_sbefifo(pib); + struct sbefifo_context *sctx = sbefifo->get_sbefifo_context(sbefifo); + + /* This chip-op requires core-id as pervasive (chiplet) id */ + return sbefifo_register_get(sctx, + pdbg_target_index(chiplet), + thread->id, + reg_type, + ®_id, + 1, + &value); +} + +static int sbefifo_thread_put_reg(struct thread *thread, uint8_t reg_type, uint32_t reg_id, uint64_t value) +{ + struct pdbg_target *chiplet = pdbg_target_require_parent("chiplet", &thread->target); + struct pdbg_target *pib = pdbg_target_require_parent("pib", chiplet); + struct sbefifo *sbefifo = pib_to_sbefifo(pib); + struct sbefifo_context *sctx = sbefifo->get_sbefifo_context(sbefifo); + + /* This chip-op requires core-id as pervasive (chiplet) id */ + return sbefifo_register_put(sctx, + pdbg_target_index(chiplet), + thread->id, + reg_type, + ®_id, + 1, + &value); +} + +static int sbefifo_thread_getgpr(struct thread *thread, int gpr, uint64_t *value) +{ + uint8_t reg_type = 0x0; /* GPR */ + uint32_t reg_id = gpr; + + return sbefifo_thread_get_reg(thread, reg_type, reg_id, value); +} + +static int sbefifo_thread_putgpr(struct thread *thread, int gpr, uint64_t value) +{ + uint8_t reg_type = 0x0; /* GPR */ + uint32_t reg_id = gpr; + + return sbefifo_thread_put_reg(thread, reg_type, reg_id, value); +} + +static int sbefifo_thread_getspr(struct thread *thread, int spr, uint64_t *value) +{ + uint8_t reg_type = 0x1; /* SPR */ + uint32_t reg_id = spr; + + return sbefifo_thread_get_reg(thread, reg_type, reg_id, value); +} + +static int sbefifo_thread_putspr(struct thread *thread, int spr, uint64_t value) +{ + uint8_t reg_type = 0x1; /* SPR */ + uint32_t reg_id = spr; + + return sbefifo_thread_put_reg(thread, reg_type, reg_id, value); +} + +static int sbefifo_thread_getmsr(struct thread *thread, uint64_t *value) +{ + uint8_t reg_type = 0x1; /* SPR */ + uint32_t reg_id = SPR_MSR; + + return sbefifo_thread_get_reg(thread, reg_type, reg_id, value); +} + +static int sbefifo_thread_putmsr(struct thread *thread, uint64_t value) +{ + uint8_t reg_type = 0x1; /* SPR */ + uint32_t reg_id = SPR_MSR; + + return sbefifo_thread_put_reg(thread, reg_type, reg_id, value); +} + +static int sbefifo_thread_getnia(struct thread *thread, uint64_t *value) +{ + uint8_t reg_type = 0x1; /* SPR */ + uint32_t reg_id = SPR_NIA; + + return sbefifo_thread_get_reg(thread, reg_type, reg_id, value); +} + +static int sbefifo_thread_putnia(struct thread *thread, uint64_t value) +{ + uint8_t reg_type = 0x1; /* SPR */ + uint32_t reg_id = SPR_NIA; + + return sbefifo_thread_put_reg(thread, reg_type, reg_id, value); +} + +static int sbefifo_thread_getxer(struct thread *thread, uint64_t *value) +{ + uint8_t reg_type = 0x1; /* SPR */ + uint32_t reg_id = SPR_XER; + + return sbefifo_thread_get_reg(thread, reg_type, reg_id, value); +} + +static int sbefifo_thread_putxer(struct thread *thread, uint64_t value) +{ + uint8_t reg_type = 0x1; /* SPR */ + uint32_t reg_id = SPR_XER; + + return sbefifo_thread_put_reg(thread, reg_type, reg_id, value); +} + +static int sbefifo_thread_getcr(struct thread *thread, uint32_t *value) +{ + uint8_t reg_type = 0x1; /* SPR */ + uint32_t reg_id = SPR_CR; + uint64_t val; + int ret; + + ret = sbefifo_thread_get_reg(thread, reg_type, reg_id, &val); + if (ret) + return ret; + + *value = (uint32_t)(val & 0xffffffff); + return 0; +} + +static int sbefifo_thread_putcr(struct thread *thread, uint32_t value) +{ + uint8_t reg_type = 0x1; /* SPR */ + uint32_t reg_id = SPR_CR; + uint64_t val = value;; + + return sbefifo_thread_put_reg(thread, reg_type, reg_id, val); +} + static struct sbefifo_context *sbefifo_op_get_context(struct sbefifo *sbefifo) { return sbefifo->sf_ctx; @@ -439,6 +686,19 @@ static struct thread sbefifo_thread = { .stop = sbefifo_thread_stop, .step = sbefifo_thread_step, .sreset = sbefifo_thread_sreset, + .getregs = sbefifo_thread_getregs, + .getgpr = sbefifo_thread_getgpr, + .putgpr = sbefifo_thread_putgpr, + .getspr = sbefifo_thread_getspr, + .putspr = sbefifo_thread_putspr, + .getmsr = sbefifo_thread_getmsr, + .putmsr = sbefifo_thread_putmsr, + .getnia = sbefifo_thread_getnia, + .putnia = sbefifo_thread_putnia, + .getxer = sbefifo_thread_getxer, + .putxer = sbefifo_thread_putxer, + .getcr = sbefifo_thread_getcr, + .putcr = sbefifo_thread_putcr, }; DECLARE_HW_UNIT(sbefifo_thread);