From patchwork Sun Jun 14 18:13:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: BALATON Zoltan X-Patchwork-Id: 1309031 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=eik.bme.hu Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49lNGw4wCXz9sRK for ; Mon, 15 Jun 2020 04:27:20 +1000 (AEST) Received: from localhost ([::1]:44532 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jkXLi-00043c-9S for incoming@patchwork.ozlabs.org; Sun, 14 Jun 2020 14:27:18 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48720) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jkXLL-00042p-AP; Sun, 14 Jun 2020 14:26:55 -0400 Received: from zero.eik.bme.hu ([2001:738:2001:2001::2001]:52051) by eggs.gnu.org with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jkXLI-0007dx-6O; Sun, 14 Jun 2020 14:26:54 -0400 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id 2C8A7746307; Sun, 14 Jun 2020 20:26:44 +0200 (CEST) Received: by zero.eik.bme.hu (Postfix, from userid 432) id A40A0746331; Sun, 14 Jun 2020 20:26:43 +0200 (CEST) Message-Id: <0b594026c77bfe3e5f2c7dc3ad4fa1effa651294.1592158400.git.balaton@eik.bme.hu> In-Reply-To: References: From: BALATON Zoltan Subject: [PATCH v4 1/9] mac_oldworld: Allow loading binary ROM image Date: Sun, 14 Jun 2020 20:13:19 +0200 MIME-Version: 1.0 To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org X-Spam-Probability: 8% Received-SPF: pass client-ip=2001:738:2001:2001::2001; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Howard Spoelstra , Mark Cave-Ayland , David Gibson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" The beige G3 Power Macintosh has a 4MB firmware ROM. Fix the size of the rom region and fall back to loading a binary image with -bios if loading ELF image failed. This allows testing emulation with a ROM image from real hardware as well as using an ELF OpenBIOS image. Signed-off-by: BALATON Zoltan --- v4: use load address from ELF to check if ROM is too big hw/ppc/mac_oldworld.c | 29 ++++++++++++++++++++--------- 1 file changed, 20 insertions(+), 9 deletions(-) diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c index 0b4c1c6373..33421c28c4 100644 --- a/hw/ppc/mac_oldworld.c +++ b/hw/ppc/mac_oldworld.c @@ -59,6 +59,8 @@ #define NDRV_VGA_FILENAME "qemu_vga.ndrv" #define GRACKLE_BASE 0xfec00000 +#define PROM_BASE 0xffc00000 +#define PROM_SIZE (4 * MiB) static void fw_cfg_boot_set(void *opaque, const char *boot_device, Error **errp) @@ -99,6 +101,7 @@ static void ppc_heathrow_init(MachineState *machine) SysBusDevice *s; DeviceState *dev, *pic_dev; BusState *adb_bus; + uint64_t bios_addr; int bios_size; unsigned int smp_cpus = machine->smp.cpus; uint16_t ppc_boot_device; @@ -127,24 +130,32 @@ static void ppc_heathrow_init(MachineState *machine) memory_region_add_subregion(sysmem, 0, machine->ram); - /* allocate and load BIOS */ - memory_region_init_rom(bios, NULL, "ppc_heathrow.bios", BIOS_SIZE, + /* allocate and load firmware ROM */ + memory_region_init_rom(bios, NULL, "ppc_heathrow.bios", PROM_SIZE, &error_fatal); + memory_region_add_subregion(sysmem, PROM_BASE, bios); - if (bios_name == NULL) + if (!bios_name) { bios_name = PROM_FILENAME; + } filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); - memory_region_add_subregion(sysmem, PROM_ADDR, bios); - - /* Load OpenBIOS (ELF) */ if (filename) { - bios_size = load_elf(filename, NULL, 0, NULL, NULL, NULL, NULL, NULL, - 1, PPC_ELF_MACHINE, 0, 0); + /* Load OpenBIOS (ELF) */ + bios_size = load_elf(filename, NULL, NULL, NULL, NULL, &bios_addr, + NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0); + if (bios_size <= 0) { + /* or load binary ROM image */ + bios_size = load_image_targphys(filename, PROM_BASE, PROM_SIZE); + bios_addr = PROM_BASE; + } else { + /* load_elf sets high 32 bits for some reason, strip those */ + bios_addr &= 0xffffffffULL; + } g_free(filename); } else { bios_size = -1; } - if (bios_size < 0 || bios_size > BIOS_SIZE) { + if (bios_size < 0 || bios_addr - PROM_BASE + bios_size > PROM_SIZE) { error_report("could not load PowerPC bios '%s'", bios_name); exit(1); } From patchwork Sun Jun 14 18:13:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: BALATON Zoltan X-Patchwork-Id: 1309041 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=eik.bme.hu Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49lNNN2GXNz9sQx for ; Mon, 15 Jun 2020 04:32:04 +1000 (AEST) Received: from localhost ([::1]:59838 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jkXQI-0002he-2l for incoming@patchwork.ozlabs.org; Sun, 14 Jun 2020 14:32:02 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48800) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jkXLQ-0004Cw-VM; Sun, 14 Jun 2020 14:27:00 -0400 Received: from zero.eik.bme.hu ([2001:738:2001:2001::2001]:52079) by eggs.gnu.org with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jkXLP-0007ga-0t; Sun, 14 Jun 2020 14:27:00 -0400 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id C9189748DD0; Sun, 14 Jun 2020 20:26:51 +0200 (CEST) Received: by zero.eik.bme.hu (Postfix, from userid 432) id A7C337475FA; Sun, 14 Jun 2020 20:26:43 +0200 (CEST) Message-Id: <076b37ab493049ef05fdeb2b7c0833375833b370.1592158400.git.balaton@eik.bme.hu> In-Reply-To: References: From: BALATON Zoltan Subject: [PATCH v4 2/9] mac_newworld: Allow loading binary ROM image Date: Sun, 14 Jun 2020 20:13:19 +0200 MIME-Version: 1.0 To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org X-Spam-Probability: 8% Received-SPF: pass client-ip=2001:738:2001:2001::2001; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Howard Spoelstra , Mark Cave-Ayland , David Gibson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Fall back to load binary ROM image if loading ELF fails. This also moves PROM_BASE and PROM_SIZE defines to board as these are matching the ROM size and address on this board. Signed-off-by: BALATON Zoltan --- Notes: Unlike mac_oldworld where the openbios-ppc image loads at end of ROM region here we only check size and assume ELF image is loaded from PROM_BASE, Checking the load addr here is tricky because this board is also be compiled both 64 and 32 bit and load_elf seems to always return 64 bit value so handling that could become a mess. If this is a problem then it's a preexisting one so should be fixed in a separate patch. This one just allows loading ROM binary too otherwise preserving previous behaviour. hw/ppc/mac.h | 2 -- hw/ppc/mac_newworld.c | 22 ++++++++++++++-------- 2 files changed, 14 insertions(+), 10 deletions(-) diff --git a/hw/ppc/mac.h b/hw/ppc/mac.h index 6af87d1fa0..a0d9e47031 100644 --- a/hw/ppc/mac.h +++ b/hw/ppc/mac.h @@ -38,10 +38,8 @@ /* SMP is not enabled, for now */ #define MAX_CPUS 1 -#define BIOS_SIZE (1 * MiB) #define NVRAM_SIZE 0x2000 #define PROM_FILENAME "openbios-ppc" -#define PROM_ADDR 0xfff00000 #define KERNEL_LOAD_ADDR 0x01000000 #define KERNEL_GAP 0x00100000 diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c index 3507f26f6e..5c8a625276 100644 --- a/hw/ppc/mac_newworld.c +++ b/hw/ppc/mac_newworld.c @@ -82,6 +82,8 @@ #define NDRV_VGA_FILENAME "qemu_vga.ndrv" +#define PROM_BASE 0xfff00000 +#define PROM_SIZE (1 * MiB) static void fw_cfg_boot_set(void *opaque, const char *boot_device, Error **errp) @@ -100,7 +102,7 @@ static void ppc_core99_reset(void *opaque) cpu_reset(CPU(cpu)); /* 970 CPUs want to get their initial IP as part of their boot protocol */ - cpu->env.nip = PROM_ADDR + 0x100; + cpu->env.nip = PROM_BASE + 0x100; } /* PowerPC Mac99 hardware initialisation */ @@ -153,25 +155,29 @@ static void ppc_core99_init(MachineState *machine) /* allocate RAM */ memory_region_add_subregion(get_system_memory(), 0, machine->ram); - /* allocate and load BIOS */ - memory_region_init_rom(bios, NULL, "ppc_core99.bios", BIOS_SIZE, + /* allocate and load firmware ROM */ + memory_region_init_rom(bios, NULL, "ppc_core99.bios", PROM_SIZE, &error_fatal); + memory_region_add_subregion(get_system_memory(), PROM_BASE, bios); - if (bios_name == NULL) + if (!bios_name) { bios_name = PROM_FILENAME; + } filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); - memory_region_add_subregion(get_system_memory(), PROM_ADDR, bios); - - /* Load OpenBIOS (ELF) */ if (filename) { + /* Load OpenBIOS (ELF) */ bios_size = load_elf(filename, NULL, NULL, NULL, NULL, NULL, NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0); + if (bios_size <= 0) { + /* or load binary ROM image */ + bios_size = load_image_targphys(filename, PROM_BASE, PROM_SIZE); + } g_free(filename); } else { bios_size = -1; } - if (bios_size < 0 || bios_size > BIOS_SIZE) { + if (bios_size < 0 || bios_size > PROM_SIZE) { error_report("could not load PowerPC bios '%s'", bios_name); exit(1); } From patchwork Sun Jun 14 18:13:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: BALATON Zoltan X-Patchwork-Id: 1309043 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=eik.bme.hu Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49lNS72T5jz9sQx for ; Mon, 15 Jun 2020 04:35:19 +1000 (AEST) Received: from localhost ([::1]:39062 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jkXTR-0005y3-42 for incoming@patchwork.ozlabs.org; Sun, 14 Jun 2020 14:35:17 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48840) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jkXLU-0004LD-4u; Sun, 14 Jun 2020 14:27:04 -0400 Received: from zero.eik.bme.hu ([2001:738:2001:2001::2001]:52081) by eggs.gnu.org with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jkXLS-0007go-DK; Sun, 14 Jun 2020 14:27:03 -0400 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id C8DA7748DCF; Sun, 14 Jun 2020 20:26:51 +0200 (CEST) Received: by zero.eik.bme.hu (Postfix, from userid 432) id AB9BB7482CE; Sun, 14 Jun 2020 20:26:43 +0200 (CEST) Message-Id: In-Reply-To: References: From: BALATON Zoltan Subject: [PATCH v4 3/9] grackle: Set revision in PCI config to match hardware Date: Sun, 14 Jun 2020 20:13:19 +0200 MIME-Version: 1.0 To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org X-Spam-Probability: 8% Received-SPF: pass client-ip=2001:738:2001:2001::2001; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Howard Spoelstra , Mark Cave-Ayland , David Gibson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: BALATON Zoltan --- hw/pci-host/grackle.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/pci-host/grackle.c b/hw/pci-host/grackle.c index 4b3af0c704..48d11f13ab 100644 --- a/hw/pci-host/grackle.c +++ b/hw/pci-host/grackle.c @@ -130,7 +130,7 @@ static void grackle_pci_class_init(ObjectClass *klass, void *data) k->realize = grackle_pci_realize; k->vendor_id = PCI_VENDOR_ID_MOTOROLA; k->device_id = PCI_DEVICE_ID_MOTOROLA_MPC106; - k->revision = 0x00; + k->revision = 0x40; k->class_id = PCI_CLASS_BRIDGE_HOST; /* * PCI-facing part of the host bridge, not usable without the From patchwork Sun Jun 14 18:13:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: BALATON Zoltan X-Patchwork-Id: 1309040 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=eik.bme.hu Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49lNMw1BHjz9sQx for ; Mon, 15 Jun 2020 04:31:40 +1000 (AEST) Received: from localhost ([::1]:58316 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jkXPt-000258-Sd for incoming@patchwork.ozlabs.org; Sun, 14 Jun 2020 14:31:37 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48742) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jkXLN-00043f-66; Sun, 14 Jun 2020 14:26:57 -0400 Received: from zero.eik.bme.hu ([2001:738:2001:2001::2001]:52043) by eggs.gnu.org with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jkXLJ-0007dv-E7; Sun, 14 Jun 2020 14:26:56 -0400 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id D96057456F8; Sun, 14 Jun 2020 20:26:43 +0200 (CEST) Received: by zero.eik.bme.hu (Postfix, from userid 432) id B007B748DD0; Sun, 14 Jun 2020 20:26:43 +0200 (CEST) Message-Id: <42a58a0aa1a9e55cf558933b8efeb21071f50363.1592158400.git.balaton@eik.bme.hu> In-Reply-To: References: From: BALATON Zoltan Subject: [PATCH v4 4/9] mac_oldworld: Rename ppc_heathrow_reset to ppc_heathrow_cpu_reset Date: Sun, 14 Jun 2020 20:13:19 +0200 MIME-Version: 1.0 To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org X-Spam-Probability: 8% Received-SPF: pass client-ip=2001:738:2001:2001::2001; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Howard Spoelstra , Mark Cave-Ayland , David Gibson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" This function resets a CPU not the whole machine so reflect that in its name. Signed-off-by: BALATON Zoltan Reviewed-by: Philippe Mathieu-Daudé --- hw/ppc/mac_oldworld.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c index 33421c28c4..2afdef55aa 100644 --- a/hw/ppc/mac_oldworld.c +++ b/hw/ppc/mac_oldworld.c @@ -73,7 +73,7 @@ static uint64_t translate_kernel_address(void *opaque, uint64_t addr) return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR; } -static void ppc_heathrow_reset(void *opaque) +static void ppc_heathrow_cpu_reset(void *opaque) { PowerPCCPU *cpu = opaque; @@ -118,7 +118,7 @@ static void ppc_heathrow_init(MachineState *machine) /* Set time-base frequency to 16.6 Mhz */ cpu_ppc_tb_init(env, TBFREQ); - qemu_register_reset(ppc_heathrow_reset, cpu); + qemu_register_reset(ppc_heathrow_cpu_reset, cpu); } /* allocate RAM */ From patchwork Sun Jun 14 18:13:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: BALATON Zoltan X-Patchwork-Id: 1309038 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=eik.bme.hu Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49lNKY3FK0z9sSJ for ; Mon, 15 Jun 2020 04:29:37 +1000 (AEST) Received: from localhost ([::1]:52402 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jkXNv-0007vm-5s for incoming@patchwork.ozlabs.org; Sun, 14 Jun 2020 14:29:35 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48728) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jkXLM-000439-0h; Sun, 14 Jun 2020 14:26:56 -0400 Received: from zero.eik.bme.hu ([152.66.115.2]:52047) by eggs.gnu.org with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jkXLI-0007dC-SF; Sun, 14 Jun 2020 14:26:55 -0400 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id 1F66A745702; Sun, 14 Jun 2020 20:26:44 +0200 (CEST) Received: by zero.eik.bme.hu (Postfix, from userid 432) id B3EDF748DD8; Sun, 14 Jun 2020 20:26:43 +0200 (CEST) Message-Id: <3d8c105ee2234d003dc65e25a07f568510829d0c.1592158400.git.balaton@eik.bme.hu> In-Reply-To: References: From: BALATON Zoltan Subject: [PATCH v4 5/9] mac_oldworld: Map macio to expected address at reset Date: Sun, 14 Jun 2020 20:13:19 +0200 MIME-Version: 1.0 To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org X-Spam-Probability: 8% Received-SPF: pass client-ip=152.66.115.2; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/14 14:26:44 X-ACL-Warn: Detected OS = FreeBSD 9.x or newer [fuzzy] X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Howard Spoelstra , Mark Cave-Ayland , David Gibson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Add a reset function that maps macio to the address expected by the firmware of the board at startup. Signed-off-by: BALATON Zoltan --- hw/ppc/mac.h | 12 ++++++++++++ hw/ppc/mac_oldworld.c | 17 +++++++++++++++-- 2 files changed, 27 insertions(+), 2 deletions(-) diff --git a/hw/ppc/mac.h b/hw/ppc/mac.h index a0d9e47031..e04288ddfd 100644 --- a/hw/ppc/mac.h +++ b/hw/ppc/mac.h @@ -55,6 +55,18 @@ #define OLDWORLD_IDE1_IRQ 0xe #define OLDWORLD_IDE1_DMA_IRQ 0x3 +/* g3beige machine */ +#define TYPE_HEATHROW_MACHINE MACHINE_TYPE_NAME("g3beige") +#define HEATHROW_MACHINE(obj) OBJECT_CHECK(HeathrowMachineState, (obj), \ + TYPE_HEATHROW_MACHINE) + +typedef struct HeathrowMachineState { + /*< private >*/ + MachineState parent; + + PCIDevice *macio_pci; +} HeathrowMachineState; + /* New World IRQs */ #define NEWWORLD_CUDA_IRQ 0x19 #define NEWWORLD_PMU_IRQ 0x19 diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c index 2afdef55aa..cb4a0f3211 100644 --- a/hw/ppc/mac_oldworld.c +++ b/hw/ppc/mac_oldworld.c @@ -73,6 +73,15 @@ static uint64_t translate_kernel_address(void *opaque, uint64_t addr) return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR; } +static void ppc_heathrow_reset(MachineState *machine) +{ + HeathrowMachineState *m = HEATHROW_MACHINE(machine); + + qemu_devices_reset(); + pci_default_write_config(m->macio_pci, PCI_COMMAND, PCI_COMMAND_MEMORY, 2); + pci_default_write_config(m->macio_pci, PCI_BASE_ADDRESS_0, 0xf3000000, 4); +} + static void ppc_heathrow_cpu_reset(void *opaque) { PowerPCCPU *cpu = opaque; @@ -82,6 +91,7 @@ static void ppc_heathrow_cpu_reset(void *opaque) static void ppc_heathrow_init(MachineState *machine) { + HeathrowMachineState *hm = HEATHROW_MACHINE(machine); ram_addr_t ram_size = machine->ram_size; const char *kernel_filename = machine->kernel_filename; const char *kernel_cmdline = machine->kernel_cmdline; @@ -289,7 +299,8 @@ static void ppc_heathrow_init(MachineState *machine) ide_drive_get(hd, ARRAY_SIZE(hd)); /* MacIO */ - macio = OLDWORLD_MACIO(pci_create(pci_bus, -1, TYPE_OLDWORLD_MACIO)); + hm->macio_pci = pci_create(pci_bus, -1, TYPE_OLDWORLD_MACIO); + macio = OLDWORLD_MACIO(hm->macio_pci); dev = DEVICE(macio); qdev_prop_set_uint64(dev, "frequency", tbfreq); object_property_set_link(OBJECT(macio), OBJECT(pic_dev), "pic", @@ -441,6 +452,7 @@ static void heathrow_class_init(ObjectClass *oc, void *data) mc->desc = "Heathrow based PowerMAC"; mc->init = ppc_heathrow_init; + mc->reset = ppc_heathrow_reset; mc->block_default_type = IF_IDE; mc->max_cpus = MAX_CPUS; #ifndef TARGET_PPC64 @@ -457,9 +469,10 @@ static void heathrow_class_init(ObjectClass *oc, void *data) } static const TypeInfo ppc_heathrow_machine_info = { - .name = MACHINE_TYPE_NAME("g3beige"), + .name = TYPE_HEATHROW_MACHINE, .parent = TYPE_MACHINE, .class_init = heathrow_class_init, + .instance_size = sizeof(HeathrowMachineState), .interfaces = (InterfaceInfo[]) { { TYPE_FW_PATH_PROVIDER }, { } From patchwork Sun Jun 14 18:13:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: BALATON Zoltan X-Patchwork-Id: 1309033 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=eik.bme.hu Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49lNH743fJz9sSJ for ; Mon, 15 Jun 2020 04:27:31 +1000 (AEST) Received: from localhost ([::1]:45036 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jkXLs-0004Jq-Dp for incoming@patchwork.ozlabs.org; Sun, 14 Jun 2020 14:27:28 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48684) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jkXLL-00042n-9f; Sun, 14 Jun 2020 14:26:55 -0400 Received: from zero.eik.bme.hu ([2001:738:2001:2001::2001]:52054) by eggs.gnu.org with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jkXLI-0007dE-7g; Sun, 14 Jun 2020 14:26:54 -0400 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id 3D2A474633E; Sun, 14 Jun 2020 20:26:44 +0200 (CEST) Received: by zero.eik.bme.hu (Postfix, from userid 432) id B8186748DCF; Sun, 14 Jun 2020 20:26:43 +0200 (CEST) Message-Id: In-Reply-To: References: From: BALATON Zoltan Subject: [PATCH v4 6/9] mac_oldworld: Add machine ID register Date: Sun, 14 Jun 2020 20:13:19 +0200 MIME-Version: 1.0 To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org X-Spam-Probability: 8% Received-SPF: pass client-ip=2001:738:2001:2001::2001; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Howard Spoelstra , Mark Cave-Ayland , David Gibson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" The G3 beige machine has a machine ID register that is accessed by the firmware to deternine the board config. Add basic emulation of it. Signed-off-by: BALATON Zoltan --- v4: Move MermoryRegion to MachineState, use constants hw/ppc/mac.h | 1 + hw/ppc/mac_oldworld.c | 24 ++++++++++++++++++++++++ 2 files changed, 25 insertions(+) diff --git a/hw/ppc/mac.h b/hw/ppc/mac.h index e04288ddfd..f4e1d5c758 100644 --- a/hw/ppc/mac.h +++ b/hw/ppc/mac.h @@ -64,6 +64,7 @@ typedef struct HeathrowMachineState { /*< private >*/ MachineState parent; + MemoryRegion machine_id; PCIDevice *macio_pci; } HeathrowMachineState; diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c index cb4a0f3211..53615af6b1 100644 --- a/hw/ppc/mac_oldworld.c +++ b/hw/ppc/mac_oldworld.c @@ -52,6 +52,9 @@ #define MAX_IDE_BUS 2 #define CFG_ADDR 0xf0000510 +#define MACHINE_ID_ADDR 0xff000004 +#define MACHINE_ID_VAL 0x3d8c + #define TBFREQ 16600000UL #define CLOCKFREQ 266000000UL #define BUSFREQ 66000000UL @@ -89,6 +92,22 @@ static void ppc_heathrow_cpu_reset(void *opaque) cpu_reset(CPU(cpu)); } +static uint64_t machine_id_read(void *opaque, hwaddr addr, unsigned size) +{ + return (addr == 0 && size == 2 ? MACHINE_ID_VAL : 0); +} + +static void machine_id_write(void *opaque, hwaddr addr, + uint64_t val, unsigned size) +{ + return; +} + +const MemoryRegionOps machine_id_reg_ops = { + .read = machine_id_read, + .write = machine_id_write, +}; + static void ppc_heathrow_init(MachineState *machine) { HeathrowMachineState *hm = HEATHROW_MACHINE(machine); @@ -242,6 +261,11 @@ static void ppc_heathrow_init(MachineState *machine) } } + memory_region_init_io(&hm->machine_id, OBJECT(machine), + &machine_id_reg_ops, NULL, "machine_id", 2); + memory_region_add_subregion(get_system_memory(), MACHINE_ID_ADDR, + &hm->machine_id); + /* XXX: we register only 1 output pin for heathrow PIC */ pic_dev = qdev_create(NULL, TYPE_HEATHROW); qdev_init_nofail(pic_dev); From patchwork Sun Jun 14 18:13:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: BALATON Zoltan X-Patchwork-Id: 1309032 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=eik.bme.hu Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49lNH250Spz9sQx for ; Mon, 15 Jun 2020 04:27:26 +1000 (AEST) Received: from localhost ([::1]:44918 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jkXLo-0004GH-Cg for incoming@patchwork.ozlabs.org; Sun, 14 Jun 2020 14:27:24 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48792) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jkXLQ-0004Bb-DW; Sun, 14 Jun 2020 14:27:00 -0400 Received: from zero.eik.bme.hu ([152.66.115.2]:52078) by eggs.gnu.org with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jkXLO-0007gM-Mf; Sun, 14 Jun 2020 14:27:00 -0400 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id 4EEC274633F; Sun, 14 Jun 2020 20:26:44 +0200 (CEST) Received: by zero.eik.bme.hu (Postfix, from userid 432) id BD322748DD1; Sun, 14 Jun 2020 20:26:43 +0200 (CEST) Message-Id: In-Reply-To: References: From: BALATON Zoltan Subject: [PATCH v4 7/9] macio: Add dummy screamer register area Date: Sun, 14 Jun 2020 20:13:19 +0200 MIME-Version: 1.0 To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org X-Spam-Probability: 8% Received-SPF: pass client-ip=152.66.115.2; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/14 14:26:44 X-ACL-Warn: Detected OS = FreeBSD 9.x or newer [fuzzy] X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Howard Spoelstra , Mark Cave-Ayland , David Gibson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" The only thing this returns is an idle status so the firmware continues, otherwise just ignores and logs access for debugging. This is a stop gap until proper implementation of this device lands. Signed-off-by: BALATON Zoltan --- This could be reverted as the first patch of a series adding real implementation so it should not cause much trouble. Or in case it's found that firmware continues once SPD data is available this patch may not be needed. hw/misc/macio/macio.c | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/hw/misc/macio/macio.c b/hw/misc/macio/macio.c index 3779865ab2..dbc3df9ab1 100644 --- a/hw/misc/macio/macio.c +++ b/hw/misc/macio/macio.c @@ -26,6 +26,7 @@ #include "qemu/osdep.h" #include "qapi/error.h" #include "qemu/module.h" +#include "qemu/log.h" #include "hw/ppc/mac.h" #include "hw/misc/macio/cuda.h" #include "hw/pci/pci.h" @@ -103,6 +104,33 @@ static void macio_init_child_obj(MacIOState *s, const char *childname, qdev_set_parent_bus(DEVICE(child), BUS(&s->macio_bus)); } +#define AWAC_CODEC_STATUS_REG 0x20 + +#define AWAC_MAKER_CRYSTAL 1 +#define AWAC_REV_SCREAMER 3 +#define AWAC_VALID_DATA 0x40 + +static uint64_t screamer_read(void *opaque, hwaddr addr, unsigned size) +{ + qemu_log_mask(LOG_UNIMP, + "macio: screamer read %" HWADDR_PRIx " %d\n", addr, size); + return (addr == AWAC_CODEC_STATUS_REG ? AWAC_VALID_DATA << 8 | + AWAC_MAKER_CRYSTAL << 16 | AWAC_REV_SCREAMER << 20 : 0); +} + +static void screamer_write(void *opaque, hwaddr addr, + uint64_t val, unsigned size) +{ + qemu_log_mask(LOG_UNIMP, + "macio: screamer write %" HWADDR_PRIx " %d = %"PRIx64"\n", + addr, size, val); +} + +const MemoryRegionOps screamer_ops = { + .read = screamer_read, + .write = screamer_write, +}; + static void macio_common_realize(PCIDevice *d, Error **errp) { MacIOState *s = MACIO(d); @@ -158,6 +186,7 @@ static void macio_oldworld_realize(PCIDevice *d, Error **errp) DeviceState *pic_dev = DEVICE(os->pic); Error *err = NULL; SysBusDevice *sysbus_dev; + MemoryRegion *screamer = g_new(MemoryRegion, 1); macio_common_realize(d, &err); if (err) { @@ -217,6 +246,11 @@ static void macio_oldworld_realize(PCIDevice *d, Error **errp) error_propagate(errp, err); return; } + + /* Dummy screamer sound device */ + memory_region_init_io(screamer, OBJECT(d), &screamer_ops, NULL, + "screamer", 0x2000); + memory_region_add_subregion(&s->bar, 0x14000, screamer); } static void macio_init_ide(MacIOState *s, MACIOIDEState *ide, size_t ide_size, From patchwork Sun Jun 14 18:13:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: BALATON Zoltan X-Patchwork-Id: 1309042 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=eik.bme.hu Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49lNQL5PgDz9sQx for ; Mon, 15 Jun 2020 04:33:46 +1000 (AEST) Received: from localhost ([::1]:36412 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jkXRw-0004mR-I5 for incoming@patchwork.ozlabs.org; Sun, 14 Jun 2020 14:33:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48818) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jkXLR-0004Eg-Sh; Sun, 14 Jun 2020 14:27:01 -0400 Received: from zero.eik.bme.hu ([2001:738:2001:2001::2001]:52077) by eggs.gnu.org with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jkXLQ-0007gh-2A; Sun, 14 Jun 2020 14:27:01 -0400 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id 641637482C8; Sun, 14 Jun 2020 20:26:44 +0200 (CEST) Received: by zero.eik.bme.hu (Postfix, from userid 432) id C06B1748DDA; Sun, 14 Jun 2020 20:26:43 +0200 (CEST) Message-Id: <71dbf049654ff55cba40e7b92b73674479223009.1592158400.git.balaton@eik.bme.hu> In-Reply-To: References: From: BALATON Zoltan Subject: [PATCH v4 8/9] WIP RFC macio/cuda: Attempt to add i2c support Date: Sun, 14 Jun 2020 20:13:19 +0200 MIME-Version: 1.0 To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org X-Spam-Probability: 8% Received-SPF: pass client-ip=2001:738:2001:2001::2001; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Howard Spoelstra , Mark Cave-Ayland , David Gibson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" This is a non-working RFC patch attempt to implement i2c bus in CUDA needed for firmware to access SPD data of installed RAM. The skeleton is there but actual operation fails because I don't know how this is supposed to work and the i2c bus state becomes invalid quickly. Also sending back results may be missing or wrong. Help fixing and finishing this is welcome, I don't plan to spend more time with this so just submitted it for whoever picks this up. Signed-off-by: BALATON Zoltan --- hw/misc/macio/cuda.c | 65 +++++++++++++++++++++++++++++++++++- include/hw/misc/macio/cuda.h | 1 + 2 files changed, 65 insertions(+), 1 deletion(-) diff --git a/hw/misc/macio/cuda.c b/hw/misc/macio/cuda.c index e0cc0aac5d..9609828091 100644 --- a/hw/misc/macio/cuda.c +++ b/hw/misc/macio/cuda.c @@ -28,6 +28,7 @@ #include "hw/ppc/mac.h" #include "hw/qdev-properties.h" #include "migration/vmstate.h" +#include "hw/i2c/i2c.h" #include "hw/input/adb.h" #include "hw/misc/mos6522.h" #include "hw/misc/macio/cuda.h" @@ -369,6 +370,64 @@ static bool cuda_cmd_set_time(CUDAState *s, return true; } +static bool cuda_cmd_get_set_iic(CUDAState *s, + const uint8_t *in_data, int in_len, + uint8_t *out_data, int *out_len) +{ + int i; + + qemu_log_mask(LOG_UNIMP, "CUDA: unimplemented GET_SET_IIC %s 0x%x %d\n", + (in_data[0] & 1 ? "read" : "write"), in_data[0] >> 1, + in_len); + if (i2c_start_transfer(s->i2c_bus, in_data[0] >> 1, in_data[0] & 1)) { + return false; + } + for (i = 0; i < in_len - 3; i++) { + if (i2c_send(s->i2c_bus, in_data[i])) { + i2c_end_transfer(s->i2c_bus); + return false; + } + } + return true; +} + +static bool cuda_cmd_combined_iic(CUDAState *s, + const uint8_t *in_data, int in_len, + uint8_t *out_data, int *out_len) +{ + int i; + + if (in_len < 3) { + qemu_log_mask(LOG_GUEST_ERROR, + "CUDA: COMBINED_FORMAT_IIC too few input bytes\n"); + return false; + } + if ((in_data[0] & 0xfe) != (in_data[2] & 0xfe)) { + qemu_log_mask(LOG_GUEST_ERROR, + "CUDA: COMBINED_FORMAT_IIC address mismatch\n"); + return false; + } + + uint8_t addr = in_data[0] >> 1; + int recv = in_data[0] & 1; + + uint8_t data = in_data[1]; + if (i2c_start_transfer(s->i2c_bus, in_data[0] >> 1, in_data[0] & 1) || + i2c_send_recv(s->i2c_bus, &data, in_data[0] & 1)) { + return false; + } else { + for (i = 0; i < in_len - 3; i++) { + data = in_data[3 + i]; + if (i2c_send_recv(s->i2c_bus, (in_data[2] & 1 ? &out_data[i] : + &data), in_data[2] & 1)) { + i2c_end_transfer(s->i2c_bus); + return false; + } + } + } + return true; +} + static const CudaCommand handlers[] = { { CUDA_AUTOPOLL, "AUTOPOLL", cuda_cmd_autopoll }, { CUDA_SET_AUTO_RATE, "SET_AUTO_RATE", cuda_cmd_set_autorate }, @@ -381,6 +440,8 @@ static const CudaCommand handlers[] = { cuda_cmd_set_power_message }, { CUDA_GET_TIME, "GET_TIME", cuda_cmd_get_time }, { CUDA_SET_TIME, "SET_TIME", cuda_cmd_set_time }, + { CUDA_GET_SET_IIC, "GET_SET_IIC", cuda_cmd_get_set_iic }, + { CUDA_COMBINED_FORMAT_IIC, "COMBINED_FORMAT_IIC", cuda_cmd_combined_iic }, }; static void cuda_receive_packet(CUDAState *s, @@ -548,6 +609,7 @@ static void cuda_init(Object *obj) { CUDAState *s = CUDA(obj); SysBusDevice *sbd = SYS_BUS_DEVICE(obj); + DeviceState *dev = DEVICE(obj); sysbus_init_child_obj(obj, "mos6522-cuda", &s->mos6522_cuda, sizeof(s->mos6522_cuda), TYPE_MOS6522_CUDA); @@ -556,7 +618,8 @@ static void cuda_init(Object *obj) sysbus_init_mmio(sbd, &s->mem); qbus_create_inplace(&s->adb_bus, sizeof(s->adb_bus), TYPE_ADB_BUS, - DEVICE(obj), "adb.0"); + dev, "adb.0"); + s->i2c_bus = i2c_init_bus(dev, "i2c"); } static Property cuda_properties[] = { diff --git a/include/hw/misc/macio/cuda.h b/include/hw/misc/macio/cuda.h index 5768075ac5..0c798100dc 100644 --- a/include/hw/misc/macio/cuda.h +++ b/include/hw/misc/macio/cuda.h @@ -79,6 +79,7 @@ typedef struct CUDAState { ADBBusState adb_bus; MOS6522CUDAState mos6522_cuda; + I2CBus *i2c_bus; uint32_t tick_offset; uint64_t tb_frequency; From patchwork Sun Jun 14 18:13:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: BALATON Zoltan X-Patchwork-Id: 1309037 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=eik.bme.hu Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49lNKX5SYvz9sQx for ; Mon, 15 Jun 2020 04:29:36 +1000 (AEST) Received: from localhost ([::1]:52352 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jkXNu-0007tm-FR for incoming@patchwork.ozlabs.org; Sun, 14 Jun 2020 14:29:34 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48820) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jkXLS-0004Fo-Eh; Sun, 14 Jun 2020 14:27:02 -0400 Received: from zero.eik.bme.hu ([152.66.115.2]:52080) by eggs.gnu.org with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jkXLQ-0007gy-D4; Sun, 14 Jun 2020 14:27:02 -0400 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id 6C198748DDD; Sun, 14 Jun 2020 20:26:44 +0200 (CEST) Received: by zero.eik.bme.hu (Postfix, from userid 432) id C44E2748DDB; Sun, 14 Jun 2020 20:26:43 +0200 (CEST) Message-Id: In-Reply-To: References: From: BALATON Zoltan Subject: [PATCH v4 9/9] mac_oldworld: Add SPD data to cover RAM Date: Sun, 14 Jun 2020 20:13:19 +0200 MIME-Version: 1.0 To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org X-Spam-Probability: 8% Received-SPF: pass client-ip=152.66.115.2; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/14 14:26:44 X-ACL-Warn: Detected OS = FreeBSD 9.x or newer [fuzzy] X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Howard Spoelstra , Mark Cave-Ayland , David Gibson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" OpenBIOS gets RAM size via fw_cfg but rhe original board firmware detects RAM using SPD data so generate and add SDP eeproms to cover as much RAM as possible to describe with SPD (this may be less than the actual ram_size due to SDRAM size constraints). Signed-off-by: BALATON Zoltan --- hw/ppc/mac_oldworld.c | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c index 53615af6b1..1f85859034 100644 --- a/hw/ppc/mac_oldworld.c +++ b/hw/ppc/mac_oldworld.c @@ -34,6 +34,7 @@ #include "hw/input/adb.h" #include "sysemu/sysemu.h" #include "net/net.h" +#include "hw/i2c/smbus_eeprom.h" #include "hw/isa/isa.h" #include "hw/pci/pci.h" #include "hw/pci/pci_host.h" @@ -137,6 +138,8 @@ static void ppc_heathrow_init(MachineState *machine) DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; void *fw_cfg; uint64_t tbfreq; + uint8_t *spd_data[3] = {}; + I2CBus *i2c_bus; linux_boot = (kernel_filename != NULL); @@ -156,8 +159,16 @@ static void ppc_heathrow_init(MachineState *machine) "maximum 2047 MB", ram_size / MiB); exit(1); } - memory_region_add_subregion(sysmem, 0, machine->ram); + for (i = 0; i < 3; i++) { + int size_left = ram_size - i * 512 * MiB; + if (size_left > 0) { + uint32_t s = size_left / MiB; + s = (s > 512 ? 512 : s); + s = 1U << (31 - clz32(s)); + spd_data[i] = spd_data_generate(SDR, s * MiB); + } + } /* allocate and load firmware ROM */ memory_region_init_rom(bios, NULL, "ppc_heathrow.bios", PROM_SIZE, @@ -340,6 +351,12 @@ static void ppc_heathrow_init(MachineState *machine) macio_ide_init_drives(macio_ide, &hd[MAX_IDE_DEVS]); dev = DEVICE(object_resolve_path_component(OBJECT(macio), "cuda")); + i2c_bus = I2C_BUS(qdev_get_child_bus(dev, "i2c")); + for (i = 0; i < 3; i++) { + if (spd_data[i]) { + smbus_eeprom_init_one(i2c_bus, 0x50 + i, spd_data[i]); + } + } adb_bus = qdev_get_child_bus(dev, "adb.0"); dev = qdev_create(adb_bus, TYPE_ADB_KEYBOARD); qdev_init_nofail(dev);