From patchwork Mon Aug 28 14:23:05 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lucas Stach X-Patchwork-Id: 806602 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3xgvBZ3xjyz9sMN for ; Tue, 29 Aug 2017 00:23:18 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751470AbdH1OXP (ORCPT ); Mon, 28 Aug 2017 10:23:15 -0400 Received: from metis.ext.4.pengutronix.de ([92.198.50.35]:36777 "EHLO metis.ext.4.pengutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751302AbdH1OXM (ORCPT ); Mon, 28 Aug 2017 10:23:12 -0400 Received: from dude.hi.pengutronix.de ([2001:67c:670:100:1d::7] helo=dude.pengutronix.de.) by metis.ext.pengutronix.de with esmtp (Exim 4.84_2) (envelope-from ) id 1dmKwX-0005gz-9c; Mon, 28 Aug 2017 16:23:09 +0200 From: Lucas Stach To: Bjorn Helgaas , Tim Harvey , Jingoo Han , Joao Pinto , Shawn Guo Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, patchwork-lst@pengutronix.de, kernel@pengutronix.de Subject: [PATCH 1/3] PCI: designware: only register MSI controller when MSI irq line is valid Date: Mon, 28 Aug 2017 16:23:05 +0200 Message-Id: <20170828142307.30061-2-l.stach@pengutronix.de> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170828142307.30061-1-l.stach@pengutronix.de> References: <20170828142307.30061-1-l.stach@pengutronix.de> X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::7 X-SA-Exim-Mail-From: l.stach@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-pci@vger.kernel.org Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org The MSI part of the controller isn't essential, so the host controller can be registered without the MSI controller being present. This allows the host to work in PCIe legancy interrupt only mode, if the IRQ line for the MSI controller is missing. Signed-off-by: Lucas Stach --- drivers/pci/dwc/pcie-designware-host.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/pci/dwc/pcie-designware-host.c b/drivers/pci/dwc/pcie-designware-host.c index d29c020da082..8494089f088d 100644 --- a/drivers/pci/dwc/pcie-designware-host.c +++ b/drivers/pci/dwc/pcie-designware-host.c @@ -381,7 +381,7 @@ int dw_pcie_host_init(struct pcie_port *pp) if (ret) pci->num_viewport = 2; - if (IS_ENABLED(CONFIG_PCI_MSI)) { + if (IS_ENABLED(CONFIG_PCI_MSI) && pp->msi_irq > 0) { if (!pp->ops->msi_host_init) { pp->irq_domain = irq_domain_add_linear(dev->of_node, MAX_MSI_IRQS, &msi_domain_ops, @@ -412,7 +412,7 @@ int dw_pcie_host_init(struct pcie_port *pp) bridge->ops = &dw_pcie_ops; bridge->map_irq = of_irq_parse_and_map_pci; bridge->swizzle_irq = pci_common_swizzle; - if (IS_ENABLED(CONFIG_PCI_MSI)) { + if (IS_ENABLED(CONFIG_PCI_MSI) && pp->msi_irq > 0) { bridge->msi = &dw_pcie_msi_chip; dw_pcie_msi_chip.dev = dev; } From patchwork Mon Aug 28 14:23:06 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lucas Stach X-Patchwork-Id: 806604 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3xgvBb6tlHz9s7m for ; Tue, 29 Aug 2017 00:23:19 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751858AbdH1OXO (ORCPT ); Mon, 28 Aug 2017 10:23:14 -0400 Received: from metis.ext.4.pengutronix.de ([92.198.50.35]:51771 "EHLO metis.ext.4.pengutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751859AbdH1OXN (ORCPT ); Mon, 28 Aug 2017 10:23:13 -0400 Received: from dude.hi.pengutronix.de ([2001:67c:670:100:1d::7] helo=dude.pengutronix.de.) by metis.ext.pengutronix.de with esmtp (Exim 4.84_2) (envelope-from ) id 1dmKwX-0005gz-Bs; Mon, 28 Aug 2017 16:23:09 +0200 From: Lucas Stach To: Bjorn Helgaas , Tim Harvey , Jingoo Han , Joao Pinto , Shawn Guo Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, patchwork-lst@pengutronix.de, kernel@pengutronix.de Subject: [PATCH 2/3] PCI: imx6: allow MSI irq to be absent Date: Mon, 28 Aug 2017 16:23:06 +0200 Message-Id: <20170828142307.30061-3-l.stach@pengutronix.de> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170828142307.30061-1-l.stach@pengutronix.de> References: <20170828142307.30061-1-l.stach@pengutronix.de> X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::7 X-SA-Exim-Mail-From: l.stach@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-pci@vger.kernel.org Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org The host can fall back to PCIe legacy IRQ only operation if the MSI irq is missing, thus allowing systems to work with peripherals that don't support MSI irqs. Signed-off-by: Lucas Stach --- .../devicetree/bindings/pci/fsl,imx6q-pcie.txt | 8 ++++---- drivers/pci/dwc/pci-imx6.c | 23 +++++++++++----------- 2 files changed, 15 insertions(+), 16 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt index cf92d3ba5a26..d85db21503f4 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt @@ -10,14 +10,14 @@ Required properties: - "fsl,imx6qp-pcie" - "fsl,imx7d-pcie" - reg: base address and length of the PCIe controller -- interrupts: A list of interrupt outputs of the controller. Must contain an - entry for each entry in the interrupt-names property. -- interrupt-names: Must include the following entries: - - "msi": The interrupt that is asserted when an MSI is received - clock-names: Must include the following additional entries: - "pcie_phy" Optional properties: +- interrupts: A list of interrupt outputs of the controller. Must contain an + entry for each entry in the interrupt-names property. +- interrupt-names: Must include the following entries: + - "msi": The interrupt that is asserted when an MSI is received - fsl,tx-deemph-gen1: Gen1 De-emphasis value. Default: 0 - fsl,tx-deemph-gen2-3p5db: Gen2 (3.5db) De-emphasis value. Default: 0 - fsl,tx-deemph-gen2-6db: Gen2 (6db) De-emphasis value. Default: 20 diff --git a/drivers/pci/dwc/pci-imx6.c b/drivers/pci/dwc/pci-imx6.c index bf5c3616e344..d2507272b3ab 100644 --- a/drivers/pci/dwc/pci-imx6.c +++ b/drivers/pci/dwc/pci-imx6.c @@ -671,18 +671,17 @@ static int imx6_add_pcie_port(struct imx6_pcie *imx6_pcie, if (IS_ENABLED(CONFIG_PCI_MSI)) { pp->msi_irq = platform_get_irq_byname(pdev, "msi"); - if (pp->msi_irq <= 0) { - dev_err(dev, "failed to get MSI irq\n"); - return -ENODEV; - } - - ret = devm_request_irq(dev, pp->msi_irq, - imx6_pcie_msi_handler, - IRQF_SHARED | IRQF_NO_THREAD, - "mx6-pcie-msi", imx6_pcie); - if (ret) { - dev_err(dev, "failed to request MSI irq\n"); - return ret; + if (pp->msi_irq > 0) { + ret = devm_request_irq(dev, pp->msi_irq, + imx6_pcie_msi_handler, + IRQF_SHARED | IRQF_NO_THREAD, + "mx6-pcie-msi", imx6_pcie); + if (ret) { + dev_err(dev, "failed to request MSI irq\n"); + return ret; + } + } else { + dev_info(dev, "missing MSI irq, MSI support unavailable\n"); } } From patchwork Mon Aug 28 14:23:07 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lucas Stach X-Patchwork-Id: 806605 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-pci-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3xgvBc4RSsz9sMN for ; Tue, 29 Aug 2017 00:23:20 +1000 (AEST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751862AbdH1OXO (ORCPT ); Mon, 28 Aug 2017 10:23:14 -0400 Received: from metis.ext.4.pengutronix.de ([92.198.50.35]:41043 "EHLO metis.ext.4.pengutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751858AbdH1OXN (ORCPT ); Mon, 28 Aug 2017 10:23:13 -0400 Received: from dude.hi.pengutronix.de ([2001:67c:670:100:1d::7] helo=dude.pengutronix.de.) by metis.ext.pengutronix.de with esmtp (Exim 4.84_2) (envelope-from ) id 1dmKwX-0005gz-EC; Mon, 28 Aug 2017 16:23:09 +0200 From: Lucas Stach To: Bjorn Helgaas , Tim Harvey , Jingoo Han , Joao Pinto , Shawn Guo Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, patchwork-lst@pengutronix.de, kernel@pengutronix.de Subject: [PATCH 3/3] ARM: dts: imx6qdl: remove MSI irq line Date: Mon, 28 Aug 2017 16:23:07 +0200 Message-Id: <20170828142307.30061-4-l.stach@pengutronix.de> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170828142307.30061-1-l.stach@pengutronix.de> References: <20170828142307.30061-1-l.stach@pengutronix.de> X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::7 X-SA-Exim-Mail-From: l.stach@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-pci@vger.kernel.org Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org The DWC PCIe host controller doesn't support MSI and legacy IRQs at the same time. If the MSI controller is in use (which is always the case, as PCIe port serives are using MSI IRQs when available), legacy endpoint devices are unable to raise an IRQ. Remove the MSI irq line to inhibit the MSI controller from being used, which is a much better default, as most enpoint devices are able to fall back to legacy PCIe IRQs, if MSI are not available. Systems which are validated to work in MSI only mode can opt-in to use the MSI controller by adding back the MSI irq line in the board DT. Signed-off-by: Lucas Stach --- arch/arm/boot/dts/imx6qdl.dtsi | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi index a9723b94bafa..0f47a9d4024e 100644 --- a/arch/arm/boot/dts/imx6qdl.dtsi +++ b/arch/arm/boot/dts/imx6qdl.dtsi @@ -209,8 +209,6 @@ ranges = <0x81000000 0 0 0x01f80000 0 0x00010000 /* downstream I/O */ 0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */ num-lanes = <1>; - interrupts = ; - interrupt-names = "msi"; #interrupt-cells = <1>; interrupt-map-mask = <0 0 0 0x7>; interrupt-map = <0 0 0 1 &gpc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,