From patchwork Fri Jun 5 08:55:05 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1303966 X-Patchwork-Delegate: priyanka.jain@nxp.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49dc7T6P2Vz9sTC for ; Fri, 5 Jun 2020 19:00:53 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id DEA6581E23; Fri, 5 Jun 2020 11:00:46 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=nxp.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id E79CD81E22; Fri, 5 Jun 2020 11:00:44 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id EED86818F9 for ; Fri, 5 Jun 2020 11:00:41 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=Zhiqiang.Hou@nxp.com Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 9EC4F1A1F58; Fri, 5 Jun 2020 11:00:41 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 413AA1A1F57; Fri, 5 Jun 2020 11:00:39 +0200 (CEST) Received: from localhost.localdomain (mega.ap.freescale.net [10.192.208.232]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id E9C2A402DF; Fri, 5 Jun 2020 17:00:35 +0800 (SGT) From: Zhiqiang Hou To: u-boot@lists.denx.de, priyanka.jain@nxp.com, bmeng.cn@gmail.com, olteanv@gmail.com Cc: Hou Zhiqiang Subject: [PATCHv2 01/13] net: fsl_pq_mdio: Add the compatible "fsl, gianfar-mdio" support Date: Fri, 5 Jun 2020 16:55:05 +0800 Message-Id: <20200605085517.13046-2-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200605085517.13046-1-Zhiqiang.Hou@nxp.com> References: <20200605085517.13046-1-Zhiqiang.Hou@nxp.com> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de X-Virus-Status: Clean From: Hou Zhiqiang Add compatible string "fsl,gianfar-mdio" support and update the device-tree-bindings doc. Signed-off-by: Hou Zhiqiang --- V2: - Rebase the patch, no change intended. doc/device-tree-bindings/net/fsl-tsec-phy.txt | 3 ++- drivers/net/fsl_mdio.c | 15 +++++++++++++-- include/fsl_mdio.h | 4 ++++ 3 files changed, 19 insertions(+), 3 deletions(-) diff --git a/doc/device-tree-bindings/net/fsl-tsec-phy.txt b/doc/device-tree-bindings/net/fsl-tsec-phy.txt index 8e8574bc97..a709b89a5c 100644 --- a/doc/device-tree-bindings/net/fsl-tsec-phy.txt +++ b/doc/device-tree-bindings/net/fsl-tsec-phy.txt @@ -28,7 +28,8 @@ device that exists on this bus, a PHY node should be created. Required properties: - compatible : Should define the compatible device type for the - mdio. Currently supported string/device is "fsl,etsec2-mdio". + mdio. Currently supported string/device is "fsl,etsec2-mdio" and + "fsl,gianfar-mdio". - reg : Offset and length of the register set for the device Example: diff --git a/drivers/net/fsl_mdio.c b/drivers/net/fsl_mdio.c index 284508062c..ea9c37ad19 100644 --- a/drivers/net/fsl_mdio.c +++ b/drivers/net/fsl_mdio.c @@ -138,10 +138,12 @@ static int dm_fsl_pq_mdio_write(struct udevice *dev, int addr, int devad, static int fsl_pq_mdio_probe(struct udevice *dev) { struct fsl_pq_mdio_info *info = dev_get_priv(dev); + struct fsl_pq_mdio_data *data; fdt_addr_t reg; + data = (struct fsl_pq_mdio_data *)dev_get_driver_data(dev); reg = devfdt_get_addr(dev); - info->regs = map_physmem(reg + TSEC_MDIO_REGS_OFFSET, 0, MAP_NOCACHE); + info->regs = map_physmem(reg + data->mdio_regs_off, 0, MAP_NOCACHE); return fsl_pq_mdio_reset(info->regs); } @@ -151,8 +153,17 @@ static const struct mdio_ops fsl_pq_mdio_ops = { .write = dm_fsl_pq_mdio_write, }; +static struct fsl_pq_mdio_data etsec2_data = { + .mdio_regs_off = TSEC_MDIO_REGS_OFFSET, +}; + +static struct fsl_pq_mdio_data gianfar_data = { + .mdio_regs_off = 0x0, +}; + static const struct udevice_id fsl_pq_mdio_ids[] = { - { .compatible = "fsl,etsec2-mdio" }, + { .compatible = "fsl,etsec2-mdio", .data = (ulong)&etsec2_data }, + { .compatible = "fsl,gianfar-mdio", .data = (ulong)&gianfar_data }, { } }; diff --git a/include/fsl_mdio.h b/include/fsl_mdio.h index 386c477a8b..80e3100cda 100644 --- a/include/fsl_mdio.h +++ b/include/fsl_mdio.h @@ -53,6 +53,10 @@ int memac_mdio_read(struct mii_dev *bus, int port_addr, int dev_addr, int regnum); int memac_mdio_reset(struct mii_dev *bus); +struct fsl_pq_mdio_data { + u32 mdio_regs_off; +}; + struct fsl_pq_mdio_info { struct tsec_mii_mng __iomem *regs; char *name; From patchwork Fri Jun 5 08:55:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1303970 X-Patchwork-Delegate: priyanka.jain@nxp.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49dc8T1Mcyz9sTC for ; Fri, 5 Jun 2020 19:01:45 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 9599481E39; Fri, 5 Jun 2020 11:00:59 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=nxp.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 0166D81E30; Fri, 5 Jun 2020 11:00:50 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 614C081DFC for ; Fri, 5 Jun 2020 11:00:42 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=Zhiqiang.Hou@nxp.com Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id ECAF81A0447; Fri, 5 Jun 2020 11:00:41 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 905CA1A02CE; Fri, 5 Jun 2020 11:00:39 +0200 (CEST) Received: from localhost.localdomain (mega.ap.freescale.net [10.192.208.232]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 9BD8040296; Fri, 5 Jun 2020 17:00:36 +0800 (SGT) From: Zhiqiang Hou To: u-boot@lists.denx.de, priyanka.jain@nxp.com, bmeng.cn@gmail.com, olteanv@gmail.com Cc: Hou Zhiqiang Subject: [PATCHv2 02/13] net: tsec: Add the compatible string "gianfar" support Date: Fri, 5 Jun 2020 16:55:06 +0800 Message-Id: <20200605085517.13046-3-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200605085517.13046-1-Zhiqiang.Hou@nxp.com> References: <20200605085517.13046-1-Zhiqiang.Hou@nxp.com> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de X-Virus-Status: Clean From: Hou Zhiqiang Add compatible string "gianfar" support and update the device-tree-bindings doc. Signed-off-by: Hou Zhiqiang --- V2: - Rebase the patch, no change intended. doc/device-tree-bindings/net/fsl-tsec-phy.txt | 2 +- drivers/net/tsec.c | 16 ++++++++++++++-- include/tsec.h | 4 ++++ 3 files changed, 19 insertions(+), 3 deletions(-) diff --git a/doc/device-tree-bindings/net/fsl-tsec-phy.txt b/doc/device-tree-bindings/net/fsl-tsec-phy.txt index a709b89a5c..fae6770cbe 100644 --- a/doc/device-tree-bindings/net/fsl-tsec-phy.txt +++ b/doc/device-tree-bindings/net/fsl-tsec-phy.txt @@ -2,7 +2,7 @@ Properties: - - compatible : Should be "fsl,etsec2" + - compatible : Should be "fsl,etsec2" or "gianfar" - reg : Offset and length of the register set for the device - phy-handle : See ethernet.txt file in the same directory. - phy-connection-type : See ethernet.txt file in the same directory. This diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c index 93f151a8a6..f7c70bb08d 100644 --- a/drivers/net/tsec.c +++ b/drivers/net/tsec.c @@ -804,11 +804,14 @@ int tsec_probe(struct udevice *dev) struct tsec_private *priv = dev_get_priv(dev); struct ofnode_phandle_args phandle_args; u32 tbiaddr = CONFIG_SYS_TBIPA_VALUE; + struct tsec_data *data; const char *phy_mode; fdt_addr_t reg; ofnode parent; int ret; + data = (struct tsec_data *)dev_get_driver_data(dev); + pdata->iobase = (phys_addr_t)dev_read_addr(dev); priv->regs = dev_remap_addr(dev); @@ -829,7 +832,7 @@ int tsec_probe(struct udevice *dev) return -ENOENT; } - priv->phyregs_sgmii = map_physmem(reg + TSEC_MDIO_REGS_OFFSET, + priv->phyregs_sgmii = map_physmem(reg + data->mdio_regs_off, 0, MAP_NOCACHE); } @@ -883,8 +886,17 @@ static const struct eth_ops tsec_ops = { .mcast = tsec_mcast_addr, }; +static struct tsec_data etsec2_data = { + .mdio_regs_off = TSEC_MDIO_REGS_OFFSET, +}; + +static struct tsec_data gianfar_data = { + .mdio_regs_off = 0x0, +}; + static const struct udevice_id tsec_ids[] = { - { .compatible = "fsl,etsec2" }, + { .compatible = "fsl,etsec2", .data = (ulong)&etsec2_data }, + { .compatible = "gianfar", .data = (ulong)&gianfar_data }, { } }; diff --git a/include/tsec.h b/include/tsec.h index b17fa957df..047dd3c373 100644 --- a/include/tsec.h +++ b/include/tsec.h @@ -394,6 +394,10 @@ struct tsec { #define TX_BUF_CNT 2 +struct tsec_data { + u32 mdio_regs_off; +}; + struct tsec_private { struct txbd8 __iomem txbd[TX_BUF_CNT]; struct rxbd8 __iomem rxbd[PKTBUFSRX]; From patchwork Fri Jun 5 08:55:07 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1303971 X-Patchwork-Delegate: priyanka.jain@nxp.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49dc8j33KGz9sTC for ; Fri, 5 Jun 2020 19:01:57 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 2D1FF81E30; Fri, 5 Jun 2020 11:01:01 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=nxp.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 7A8FE81E3D; Fri, 5 Jun 2020 11:00:50 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 4E98F81E01 for ; Fri, 5 Jun 2020 11:00:43 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=Zhiqiang.Hou@nxp.com Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 0A4FD2002E2; Fri, 5 Jun 2020 11:00:43 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id A2D1F2002DC; Fri, 5 Jun 2020 11:00:40 +0200 (CEST) Received: from localhost.localdomain (mega.ap.freescale.net [10.192.208.232]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 4DF64402E4; Fri, 5 Jun 2020 17:00:37 +0800 (SGT) From: Zhiqiang Hou To: u-boot@lists.denx.de, priyanka.jain@nxp.com, bmeng.cn@gmail.com, olteanv@gmail.com Cc: Hou Zhiqiang Subject: [PATCHv2 03/13] powerpc: mpc8xxx: Don't compile cpu_eth_init() when DM_ETH enabled Date: Fri, 5 Jun 2020 16:55:07 +0800 Message-Id: <20200605085517.13046-4-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200605085517.13046-1-Zhiqiang.Hou@nxp.com> References: <20200605085517.13046-1-Zhiqiang.Hou@nxp.com> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de X-Virus-Status: Clean From: Hou Zhiqiang The cpu_eth_init() is only used by the legacy ethernet driver framework. Signed-off-by: Hou Zhiqiang --- V2: - Rebase the patch, no change intended. arch/powerpc/cpu/mpc8xxx/cpu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/powerpc/cpu/mpc8xxx/cpu.c b/arch/powerpc/cpu/mpc8xxx/cpu.c index ed482a9c09..d41d6a6110 100644 --- a/arch/powerpc/cpu/mpc8xxx/cpu.c +++ b/arch/powerpc/cpu/mpc8xxx/cpu.c @@ -345,6 +345,7 @@ int fixup_cpu(void) * Initializes on-chip ethernet controllers. * to override, implement board_eth_init() */ +#ifndef CONFIG_DM_ETH int cpu_eth_init(bd_t *bis) { #if defined(CONFIG_ETHER_ON_FCC) @@ -368,3 +369,4 @@ int cpu_eth_init(bd_t *bis) #endif return 0; } +#endif From patchwork Fri Jun 5 08:55:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1303968 X-Patchwork-Delegate: priyanka.jain@nxp.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49dc7z2MVsz9sTC for ; Fri, 5 Jun 2020 19:01:19 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 1F30581E1E; Fri, 5 Jun 2020 11:00:54 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=nxp.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 53BDB81E0F; Fri, 5 Jun 2020 11:00:50 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 9073281E0F for ; Fri, 5 Jun 2020 11:00:43 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=Zhiqiang.Hou@nxp.com Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 58C482002D4; Fri, 5 Jun 2020 11:00:43 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id F0E35200005; Fri, 5 Jun 2020 11:00:40 +0200 (CEST) Received: from localhost.localdomain (mega.ap.freescale.net [10.192.208.232]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 0934040323; Fri, 5 Jun 2020 17:00:37 +0800 (SGT) From: Zhiqiang Hou To: u-boot@lists.denx.de, priyanka.jain@nxp.com, bmeng.cn@gmail.com, olteanv@gmail.com Cc: Hou Zhiqiang Subject: [PATCHv2 04/13] fsl: p1_p2_rdb: Move vsc7835 firmware uploading to board_early_init_r() Date: Fri, 5 Jun 2020 16:55:08 +0800 Message-Id: <20200605085517.13046-5-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200605085517.13046-1-Zhiqiang.Hou@nxp.com> References: <20200605085517.13046-1-Zhiqiang.Hou@nxp.com> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de X-Virus-Status: Clean From: Hou Zhiqiang Move vsc7835 firmware uploading to board_early_init_r(), so that the switch also can work in DM eTSEC driver. Signed-off-by: Hou Zhiqiang --- V2: - Rebase the patch, no change intended. board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c | 35 +++++++++++---------- 1 file changed, 18 insertions(+), 17 deletions(-) diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c index f668d7efb1..671109a73a 100644 --- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c +++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c @@ -313,6 +313,10 @@ int board_early_init_r(void) { const unsigned int flashbase = CONFIG_SYS_FLASH_BASE; int flash_esel = find_tlb_idx((void *)flashbase, 1); +#ifdef CONFIG_VSC7385_ENET + unsigned int vscfw_addr; + char *tmp; +#endif /* * Remap Boot flash region to caching-inhibited @@ -335,6 +339,20 @@ int board_early_init_r(void) set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS, /* tlb, epn, rpn */ MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,/* perms, wimge */ 0, flash_esel, BOOKE_PAGESZ_64M, 1);/* ts, esel, tsize, iprot */ + +#ifdef CONFIG_VSC7385_ENET + /* If a VSC7385 microcode image is present, then upload it. */ + tmp = env_get("vscfw_addr"); + if (tmp) { + vscfw_addr = simple_strtoul(tmp, NULL, 16); + printf("uploading VSC7385 microcode from %x\n", vscfw_addr); + if (vsc7385_upload_firmware((void *)vscfw_addr, + CONFIG_VSC7385_IMAGE_SIZE)) + puts("Failure uploading VSC7385 microcode.\n"); + } else { + puts("No address specified for VSC7385 microcode.\n"); + } +#endif return 0; } @@ -345,10 +363,6 @@ int board_eth_init(bd_t *bis) ccsr_gur_t *gur __attribute__((unused)) = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); int num = 0; -#ifdef CONFIG_VSC7385_ENET - char *tmp; - unsigned int vscfw_addr; -#endif #ifdef CONFIG_TSEC1 SET_STD_TSEC_INFO(tsec_info[num], 1); @@ -372,19 +386,6 @@ int board_eth_init(bd_t *bis) return 0; } -#ifdef CONFIG_VSC7385_ENET - /* If a VSC7385 microcode image is present, then upload it. */ - tmp = env_get("vscfw_addr"); - if (tmp) { - vscfw_addr = simple_strtoul(tmp, NULL, 16); - printf("uploading VSC7385 microcode from %x\n", vscfw_addr); - if (vsc7385_upload_firmware((void *) vscfw_addr, - CONFIG_VSC7385_IMAGE_SIZE)) - puts("Failure uploading VSC7385 microcode.\n"); - } else - puts("No address specified for VSC7385 microcode.\n"); -#endif - mdio_info.regs = TSEC_GET_MDIO_REGS_BASE(1); mdio_info.name = DEFAULT_MII_NAME; From patchwork Fri Jun 5 08:55:09 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1303972 X-Patchwork-Delegate: priyanka.jain@nxp.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49dc8x2m9tz9sTC for ; Fri, 5 Jun 2020 19:02:09 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id A6A9581E4F; Fri, 5 Jun 2020 11:01:08 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=nxp.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id CE4EE81E3F; Fri, 5 Jun 2020 11:00:49 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 49D6781E13 for ; Fri, 5 Jun 2020 11:00:44 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=Zhiqiang.Hou@nxp.com Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 1646D20010B; Fri, 5 Jun 2020 11:00:44 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id AB7112002C0; Fri, 5 Jun 2020 11:00:41 +0200 (CEST) Received: from localhost.localdomain (mega.ap.freescale.net [10.192.208.232]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id AF20B402AD; Fri, 5 Jun 2020 17:00:38 +0800 (SGT) From: Zhiqiang Hou To: u-boot@lists.denx.de, priyanka.jain@nxp.com, bmeng.cn@gmail.com, olteanv@gmail.com Cc: Hou Zhiqiang Subject: [PATCHv2 05/13] configs: p1_p2_rdb: Add the default address of vsc7385 firmware Date: Fri, 5 Jun 2020 16:55:09 +0800 Message-Id: <20200605085517.13046-6-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200605085517.13046-1-Zhiqiang.Hou@nxp.com> References: <20200605085517.13046-1-Zhiqiang.Hou@nxp.com> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de X-Virus-Status: Clean From: Hou Zhiqiang Add the environment 'vscfw_addr' to assign a default address for vsc7385 firmware uploading. Signed-off-by: Hou Zhiqiang --- V2: - Rebase the patch, no change intended. include/configs/p1_p2_rdb_pc.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index d59fd033bd..c1c2adcd5e 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -461,6 +461,7 @@ /* Vsc7385 switch */ #ifdef CONFIG_VSC7385_ENET +#define __VSCFW_ADDR "vscfw_addr=ef000000" #define CONFIG_SYS_VSC7385_BASE 0xffb00000 #ifdef CONFIG_PHYS_64BIT @@ -820,6 +821,7 @@ i2c mw 18 3 __SW_BOOT_MASK 1; reset "ramdisk_size=120000\0" \ "map_lowernorbank=i2c dev 1; i2c mw 18 1 02 1; i2c mw 18 3 fd 1\0" \ "map_uppernorbank=i2c dev 1; i2c mw 18 1 00 1; i2c mw 18 3 fd 1\0" \ +__stringify(__VSCFW_ADDR)"\0" \ __stringify(__NOR_RST_CMD)"\0" \ __stringify(__SPI_RST_CMD)"\0" \ __stringify(__SD_RST_CMD)"\0" \ From patchwork Fri Jun 5 08:55:10 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1303969 X-Patchwork-Delegate: priyanka.jain@nxp.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49dc8D492Pz9sTC for ; Fri, 5 Jun 2020 19:01:32 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 38DF281D7E; Fri, 5 Jun 2020 11:00:56 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=nxp.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 2CBB481E01; Fri, 5 Jun 2020 11:00:51 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 83CB081785 for ; Fri, 5 Jun 2020 11:00:45 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=Zhiqiang.Hou@nxp.com Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 47DD31A1F65; Fri, 5 Jun 2020 11:00:45 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id B3A8E1A1F53; Fri, 5 Jun 2020 11:00:42 +0200 (CEST) Received: from localhost.localdomain (mega.ap.freescale.net [10.192.208.232]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 69542402C1; Fri, 5 Jun 2020 17:00:39 +0800 (SGT) From: Zhiqiang Hou To: u-boot@lists.denx.de, priyanka.jain@nxp.com, bmeng.cn@gmail.com, olteanv@gmail.com Cc: Hou Zhiqiang Subject: [PATCHv2 06/13] dts: powerpc: p1020rdb: Add eTSEC DT nodes Date: Fri, 5 Jun 2020 16:55:10 +0800 Message-Id: <20200605085517.13046-7-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200605085517.13046-1-Zhiqiang.Hou@nxp.com> References: <20200605085517.13046-1-Zhiqiang.Hou@nxp.com> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de X-Virus-Status: Clean From: Hou Zhiqiang P1020RDB implements 3 enhanced three-speed Ethernet controllers, and the connection is shown below: eTSEC1: Connected to RGMII PHY VSC7385 eTSEC2: Connected to SGMII PHY VSC8221 eTSEC3: Connected to SGMII PHY AR8021 Signed-off-by: Hou Zhiqiang --- V2: - Rebase the patch, no change intended. arch/powerpc/dts/p1020-post.dtsi | 16 +++++++ arch/powerpc/dts/p1020rdb-pc.dts | 1 + arch/powerpc/dts/p1020rdb-pc.dtsi | 55 ++++++++++++++++++++++++ arch/powerpc/dts/p1020rdb-pc_36b.dts | 1 + arch/powerpc/dts/p1020rdb-pd.dts | 57 +++++++++++++++++++++++++ arch/powerpc/dts/pq3-etsec2-0.dtsi | 35 +++++++++++++++ arch/powerpc/dts/pq3-etsec2-1.dtsi | 35 +++++++++++++++ arch/powerpc/dts/pq3-etsec2-2.dtsi | 35 +++++++++++++++ arch/powerpc/dts/pq3-etsec2-grp2-0.dtsi | 16 +++++++ arch/powerpc/dts/pq3-etsec2-grp2-1.dtsi | 16 +++++++ arch/powerpc/dts/pq3-etsec2-grp2-2.dtsi | 16 +++++++ 11 files changed, 283 insertions(+) create mode 100644 arch/powerpc/dts/p1020rdb-pc.dtsi create mode 100644 arch/powerpc/dts/pq3-etsec2-0.dtsi create mode 100644 arch/powerpc/dts/pq3-etsec2-1.dtsi create mode 100644 arch/powerpc/dts/pq3-etsec2-2.dtsi create mode 100644 arch/powerpc/dts/pq3-etsec2-grp2-0.dtsi create mode 100644 arch/powerpc/dts/pq3-etsec2-grp2-1.dtsi create mode 100644 arch/powerpc/dts/pq3-etsec2-grp2-2.dtsi diff --git a/arch/powerpc/dts/p1020-post.dtsi b/arch/powerpc/dts/p1020-post.dtsi index 1dce8e86e9..2c0aa7a5c3 100644 --- a/arch/powerpc/dts/p1020-post.dtsi +++ b/arch/powerpc/dts/p1020-post.dtsi @@ -46,8 +46,24 @@ /include/ "pq3-i2c-0.dtsi" /include/ "pq3-i2c-1.dtsi" + +/include/ "pq3-etsec2-0.dtsi" + enet0: enet0_grp2: ethernet@b0000 { + }; + +/include/ "pq3-etsec2-1.dtsi" + enet1: enet1_grp2: ethernet@b1000 { + }; + +/include/ "pq3-etsec2-2.dtsi" + enet2: enet2_grp2: ethernet@b2000 { + }; }; +/include/ "pq3-etsec2-grp2-0.dtsi" +/include/ "pq3-etsec2-grp2-1.dtsi" +/include/ "pq3-etsec2-grp2-2.dtsi" + /* PCIe controller base address 0x9000 */ &pci1 { compatible = "fsl,pcie-p1_p2", "fsl,pcie-fsl-qoriq"; diff --git a/arch/powerpc/dts/p1020rdb-pc.dts b/arch/powerpc/dts/p1020rdb-pc.dts index 7ebaa619df..715330dc50 100644 --- a/arch/powerpc/dts/p1020rdb-pc.dts +++ b/arch/powerpc/dts/p1020rdb-pc.dts @@ -32,4 +32,5 @@ }; }; +/include/ "p1020rdb-pc.dtsi" /include/ "p1020-post.dtsi" diff --git a/arch/powerpc/dts/p1020rdb-pc.dtsi b/arch/powerpc/dts/p1020rdb-pc.dtsi new file mode 100644 index 0000000000..6bf424fd3f --- /dev/null +++ b/arch/powerpc/dts/p1020rdb-pc.dtsi @@ -0,0 +1,55 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * P1020 RDB-PC Device Tree Source stub (no addresses or top-level ranges) + * + * Copyright 2012 Freescale Semiconductor Inc. + * Copyright 2020 NXP + */ + +&soc { + mdio@24000 { + phy0: ethernet-phy@0 { + interrupt-parent = <&mpic>; + interrupts = <3 1 0 0>; + reg = <0x0>; + }; + + phy1: ethernet-phy@1 { + interrupt-parent = <&mpic>; + interrupts = <2 1 0 0>; + reg = <0x1>; + }; + + tbi0: tbi-phy@11 { + device_type = "tbi-phy"; + reg = <0x11>; + }; + }; + + mdio@25000 { + tbi1: tbi-phy@11 { + reg = <0x11>; + device_type = "tbi-phy"; + }; + }; + + enet0: ethernet@b0000 { + phy-connection-type = "rgmii-id"; + fixed-link { + speed = <1000>; + full-duplex; + }; + + }; + + enet1: ethernet@b1000 { + phy-handle = <&phy0>; + tbi-handle = <&tbi1>; + phy-connection-type = "sgmii"; + }; + + enet2: ethernet@b2000 { + phy-handle = <&phy1>; + phy-connection-type = "rgmii-id"; + }; +}; diff --git a/arch/powerpc/dts/p1020rdb-pc_36b.dts b/arch/powerpc/dts/p1020rdb-pc_36b.dts index c0e5ef4cf4..7680b7c7e1 100644 --- a/arch/powerpc/dts/p1020rdb-pc_36b.dts +++ b/arch/powerpc/dts/p1020rdb-pc_36b.dts @@ -32,4 +32,5 @@ }; }; +/include/ "p1020rdb-pc.dtsi" /include/ "p1020-post.dtsi" diff --git a/arch/powerpc/dts/p1020rdb-pd.dts b/arch/powerpc/dts/p1020rdb-pd.dts index 21174a09be..7868c9b95c 100644 --- a/arch/powerpc/dts/p1020rdb-pd.dts +++ b/arch/powerpc/dts/p1020rdb-pd.dts @@ -17,6 +17,63 @@ soc: soc@ffe00000 { ranges = <0x0 0x0 0xffe00000 0x100000>; + + mdio@24000 { + phy0: ethernet-phy@0 { + interrupts = <3 1 0 0>; + reg = <0x0>; + }; + + phy1: ethernet-phy@1 { + interrupts = <2 1 0 0>; + reg = <0x1>; + }; + }; + + mdio@25000 { + tbi1: tbi-phy@11 { + reg = <0x11>; + device_type = "tbi-phy"; + }; + }; + + mdio@26000 { + tbi2: tbi-phy@11 { + reg = <0x11>; + device_type = "tbi-phy"; + }; + }; + + ptp_clock@b0e00 { + compatible = "fsl,etsec-ptp"; + reg = <0xb0e00 0xb0>; + interrupts = <68 2 0 0 69 2 0 0>; + fsl,tclk-period = <10>; + fsl,tmr-prsc = <2>; + fsl,tmr-add = <0x80000016>; + fsl,tmr-fiper1 = <999999990>; + fsl,tmr-fiper2 = <99990>; + fsl,max-adj = <199999999>; + }; + + enet0: ethernet@b0000 { + phy-connection-type = "rgmii-id"; + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + enet1: ethernet@b1000 { + phy-handle = <&phy0>; + tbi-handle = <&tbi1>; + phy-connection-type = "sgmii"; + }; + + enet2: ethernet@b2000 { + phy-handle = <&phy1>; + phy-connection-type = "rgmii-id"; + }; }; pci1: pcie@ffe09000 { diff --git a/arch/powerpc/dts/pq3-etsec2-0.dtsi b/arch/powerpc/dts/pq3-etsec2-0.dtsi new file mode 100644 index 0000000000..f9d3d04650 --- /dev/null +++ b/arch/powerpc/dts/pq3-etsec2-0.dtsi @@ -0,0 +1,35 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * PQ3 eTSEC2 device tree stub [ @ offsets 0x24000/0xb0000 ] + * + * Copyright 2011 Freescale Semiconductor Inc. + * Copyright 2020 NXP + */ + +mdio@24000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,etsec2-mdio"; + reg = <0x24000 0x1000 0xb0030 0x4>; +}; + +ethernet@b0000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "network"; + model = "eTSEC"; + compatible = "fsl,etsec2"; + reg = <0xb0000 0x1000>; + fsl,num_rx_queues = <0x8>; + fsl,num_tx_queues = <0x8>; + fsl,magic-packet; + local-mac-address = [ 00 00 00 00 00 00 ]; + ranges; + + queue-group@b0000 { + #address-cells = <1>; + #size-cells = <1>; + reg = <0xb0000 0x1000>; + interrupts = <29 2 0 0 30 2 0 0 34 2 0 0>; + }; +}; diff --git a/arch/powerpc/dts/pq3-etsec2-1.dtsi b/arch/powerpc/dts/pq3-etsec2-1.dtsi new file mode 100644 index 0000000000..6c01481909 --- /dev/null +++ b/arch/powerpc/dts/pq3-etsec2-1.dtsi @@ -0,0 +1,35 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * PQ3 eTSEC2 device tree stub [ @ offsets 0x25000/0xb1000 ] + * + * Copyright 2011 Freescale Semiconductor Inc. + * Copyright 2020 NXP + */ + +mdio@25000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,etsec2-tbi"; + reg = <0x25000 0x1000 0xb1030 0x4>; +}; + +ethernet@b1000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "network"; + model = "eTSEC"; + compatible = "fsl,etsec2"; + reg = <0xb1000 0x1000>; + fsl,num_rx_queues = <0x8>; + fsl,num_tx_queues = <0x8>; + fsl,magic-packet; + local-mac-address = [ 00 00 00 00 00 00 ]; + ranges; + + queue-group@b1000 { + #address-cells = <1>; + #size-cells = <1>; + reg = <0xb1000 0x1000>; + interrupts = <35 2 0 0 36 2 0 0 40 2 0 0>; + }; +}; diff --git a/arch/powerpc/dts/pq3-etsec2-2.dtsi b/arch/powerpc/dts/pq3-etsec2-2.dtsi new file mode 100644 index 0000000000..2a597c0db6 --- /dev/null +++ b/arch/powerpc/dts/pq3-etsec2-2.dtsi @@ -0,0 +1,35 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * PQ3 eTSEC2 device tree stub [ @ offsets 0x26000/0xb2000 ] + * + * Copyright 2011 Freescale Semiconductor Inc. + * Copyright 2020 NXP + */ + +mdio@26000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,etsec2-tbi"; + reg = <0x26000 0x1000 0xb1030 0x4>; +}; + +ethernet@b2000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "network"; + model = "eTSEC"; + compatible = "fsl,etsec2"; + reg = <0xb2000 0x1000>; + fsl,num_rx_queues = <0x8>; + fsl,num_tx_queues = <0x8>; + fsl,magic-packet; + local-mac-address = [ 00 00 00 00 00 00 ]; + ranges; + + queue-group@b2000 { + #address-cells = <1>; + #size-cells = <1>; + reg = <0xb2000 0x1000>; + interrupts = <31 2 0 0 32 2 0 0 33 2 0 0>; + }; +}; diff --git a/arch/powerpc/dts/pq3-etsec2-grp2-0.dtsi b/arch/powerpc/dts/pq3-etsec2-grp2-0.dtsi new file mode 100644 index 0000000000..16752a7c45 --- /dev/null +++ b/arch/powerpc/dts/pq3-etsec2-grp2-0.dtsi @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * PQ3 eTSEC2 Group 2 device tree stub [ @ offsets 0xb4000 ] + * + * Copyright 2011 Freescale Semiconductor Inc. + * Copyright 2020 NXP + */ + +&enet0_grp2 { + queue-group@b4000 { + #address-cells = <1>; + #size-cells = <1>; + reg = <0xb4000 0x1000>; + interrupts = <17 2 0 0 18 2 0 0 24 2 0 0>; + }; +}; diff --git a/arch/powerpc/dts/pq3-etsec2-grp2-1.dtsi b/arch/powerpc/dts/pq3-etsec2-grp2-1.dtsi new file mode 100644 index 0000000000..0464938424 --- /dev/null +++ b/arch/powerpc/dts/pq3-etsec2-grp2-1.dtsi @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * PQ3 eTSEC2 Group 2 device tree stub [ @ offsets 0xb5000 ] + * + * Copyright 2011 Freescale Semiconductor Inc. + * Copyright 2020 NXP + */ + +&enet1_grp2 { + queue-group@b5000 { + #address-cells = <1>; + #size-cells = <1>; + reg = <0xb5000 0x1000>; + interrupts = <51 2 0 0 52 2 0 0 67 2 0 0>; + }; +}; diff --git a/arch/powerpc/dts/pq3-etsec2-grp2-2.dtsi b/arch/powerpc/dts/pq3-etsec2-grp2-2.dtsi new file mode 100644 index 0000000000..fe8003c44a --- /dev/null +++ b/arch/powerpc/dts/pq3-etsec2-grp2-2.dtsi @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * PQ3 eTSEC2 Group 2 device tree stub [ @ offsets 0xb6000 ] + * + * Copyright 2011 Freescale Semiconductor Inc. + * Copyright 2020 NXP + */ + +&enet2_grp2 { + queue-group@b6000 { + #address-cells = <1>; + #size-cells = <1>; + reg = <0xb6000 0x1000>; + interrupts = <25 2 0 0 26 2 0 0 27 2 0 0>; + }; +}; From patchwork Fri Jun 5 08:55:11 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1303973 X-Patchwork-Delegate: priyanka.jain@nxp.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49dc990WwQz9sTC for ; Fri, 5 Jun 2020 19:02:21 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 573E381E5B; Fri, 5 Jun 2020 11:01:11 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=nxp.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 373BD81E0F; Fri, 5 Jun 2020 11:00:53 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id A647A818F9 for ; Fri, 5 Jun 2020 11:00:45 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=Zhiqiang.Hou@nxp.com Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 733472002C0; Fri, 5 Jun 2020 11:00:45 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 172602002E3; Fri, 5 Jun 2020 11:00:43 +0200 (CEST) Received: from localhost.localdomain (mega.ap.freescale.net [10.192.208.232]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 19B9F40327; Fri, 5 Jun 2020 17:00:40 +0800 (SGT) From: Zhiqiang Hou To: u-boot@lists.denx.de, priyanka.jain@nxp.com, bmeng.cn@gmail.com, olteanv@gmail.com Cc: Hou Zhiqiang Subject: [PATCHv2 07/13] powerpc: p1_p2_rdb: Don't compile board_eth_init() when DM_ETH enabled Date: Fri, 5 Jun 2020 16:55:11 +0800 Message-Id: <20200605085517.13046-8-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200605085517.13046-1-Zhiqiang.Hou@nxp.com> References: <20200605085517.13046-1-Zhiqiang.Hou@nxp.com> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de X-Virus-Status: Clean From: Hou Zhiqiang The board_eth_init() is only used by legacy ethernet driver framework, so do not compile it when DM_ETH config has been selected. Signed-off-by: Hou Zhiqiang --- V2: - Rebase the patch, no change intended. board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c index 671109a73a..9c9f1d2c1d 100644 --- a/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c +++ b/board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c @@ -356,6 +356,7 @@ int board_early_init_r(void) return 0; } +#ifndef CONFIG_DM_ETH int board_eth_init(bd_t *bis) { struct fsl_pq_mdio_info mdio_info; @@ -403,6 +404,7 @@ int board_eth_init(bd_t *bis) return pci_eth_init(bis); } +#endif #if defined(CONFIG_QE) && \ (defined(CONFIG_TARGET_P1025RDB) || defined(CONFIG_TARGET_P1021RDB)) From patchwork Fri Jun 5 08:55:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1303976 X-Patchwork-Delegate: priyanka.jain@nxp.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49dc9Z3vhgz9sTD for ; Fri, 5 Jun 2020 19:02:42 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id D1E4F81E5F; Fri, 5 Jun 2020 11:01:17 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=nxp.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id ECF6381E39; Fri, 5 Jun 2020 11:00:53 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, UPPERCASE_50_75,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.2 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 8CEBD81E1E for ; Fri, 5 Jun 2020 11:00:46 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=Zhiqiang.Hou@nxp.com Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 564F92002C0; Fri, 5 Jun 2020 11:00:46 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id BF491200005; Fri, 5 Jun 2020 11:00:43 +0200 (CEST) Received: from localhost.localdomain (mega.ap.freescale.net [10.192.208.232]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id C901B402B0; Fri, 5 Jun 2020 17:00:40 +0800 (SGT) From: Zhiqiang Hou To: u-boot@lists.denx.de, priyanka.jain@nxp.com, bmeng.cn@gmail.com, olteanv@gmail.com Cc: Hou Zhiqiang Subject: [PATCHv2 08/13] configs: P1020RDB: Enable DM_ETH config Date: Fri, 5 Jun 2020 16:55:12 +0800 Message-Id: <20200605085517.13046-9-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200605085517.13046-1-Zhiqiang.Hou@nxp.com> References: <20200605085517.13046-1-Zhiqiang.Hou@nxp.com> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de X-Virus-Status: Clean From: Hou Zhiqiang Enable the DM_ETH and DM_MDIO config. On P1020RDB, the eTSEC1 is connecting with a switch VSC7385, so also enable the fixed PHY support. Signed-off-by: Hou Zhiqiang --- V2: - Rebase the patch, no change intended. configs/P1020RDB-PC_36BIT_NAND_defconfig | 3 +++ configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 3 +++ configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 3 +++ configs/P1020RDB-PC_36BIT_defconfig | 3 +++ configs/P1020RDB-PC_NAND_defconfig | 3 +++ configs/P1020RDB-PC_SDCARD_defconfig | 3 +++ configs/P1020RDB-PC_SPIFLASH_defconfig | 3 +++ configs/P1020RDB-PC_defconfig | 3 +++ configs/P1020RDB-PD_NAND_defconfig | 3 +++ configs/P1020RDB-PD_SDCARD_defconfig | 3 +++ configs/P1020RDB-PD_SPIFLASH_defconfig | 3 +++ configs/P1020RDB-PD_defconfig | 3 +++ 12 files changed, 36 insertions(+) diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig index cdcdefd989..9280f3dbe4 100644 --- a/configs/P1020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig @@ -61,6 +61,7 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_FIXED=y CONFIG_PHY_ATHEROS=y CONFIG_PHY_BROADCOM=y CONFIG_PHY_DAVICOM=y @@ -72,8 +73,10 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig index 0fb3507e49..6939b70967 100644 --- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig @@ -56,6 +56,7 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_FIXED=y CONFIG_PHY_ATHEROS=y CONFIG_PHY_BROADCOM=y CONFIG_PHY_DAVICOM=y @@ -67,8 +68,10 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig index 24fdda7656..32a8d48de4 100644 --- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig @@ -58,6 +58,7 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_FIXED=y CONFIG_PHY_ATHEROS=y CONFIG_PHY_BROADCOM=y CONFIG_PHY_DAVICOM=y @@ -69,8 +70,10 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig index b0a3e0f188..ad9a55bea5 100644 --- a/configs/P1020RDB-PC_36BIT_defconfig +++ b/configs/P1020RDB-PC_36BIT_defconfig @@ -45,6 +45,7 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_FIXED=y CONFIG_PHY_ATHEROS=y CONFIG_PHY_BROADCOM=y CONFIG_PHY_DAVICOM=y @@ -56,8 +57,10 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig index d94885dcbd..db19a15869 100644 --- a/configs/P1020RDB-PC_NAND_defconfig +++ b/configs/P1020RDB-PC_NAND_defconfig @@ -60,6 +60,7 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_FIXED=y CONFIG_PHY_ATHEROS=y CONFIG_PHY_BROADCOM=y CONFIG_PHY_DAVICOM=y @@ -71,8 +72,10 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig index c324faff6d..388e08afbe 100644 --- a/configs/P1020RDB-PC_SDCARD_defconfig +++ b/configs/P1020RDB-PC_SDCARD_defconfig @@ -55,6 +55,7 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_FIXED=y CONFIG_PHY_ATHEROS=y CONFIG_PHY_BROADCOM=y CONFIG_PHY_DAVICOM=y @@ -66,8 +67,10 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig index 4058e91895..d52bb0b23e 100644 --- a/configs/P1020RDB-PC_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_SPIFLASH_defconfig @@ -57,6 +57,7 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_FIXED=y CONFIG_PHY_ATHEROS=y CONFIG_PHY_BROADCOM=y CONFIG_PHY_DAVICOM=y @@ -68,8 +69,10 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig index 58cb584525..dcee02254e 100644 --- a/configs/P1020RDB-PC_defconfig +++ b/configs/P1020RDB-PC_defconfig @@ -44,6 +44,7 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_FIXED=y CONFIG_PHY_ATHEROS=y CONFIG_PHY_BROADCOM=y CONFIG_PHY_DAVICOM=y @@ -55,8 +56,10 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig index 37b174623f..17600ebd81 100644 --- a/configs/P1020RDB-PD_NAND_defconfig +++ b/configs/P1020RDB-PD_NAND_defconfig @@ -64,6 +64,7 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_FIXED=y CONFIG_PHY_ATHEROS=y CONFIG_PHY_BROADCOM=y CONFIG_PHY_DAVICOM=y @@ -75,8 +76,10 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig index df89dcfc76..43f10e6eeb 100644 --- a/configs/P1020RDB-PD_SDCARD_defconfig +++ b/configs/P1020RDB-PD_SDCARD_defconfig @@ -59,6 +59,7 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_FIXED=y CONFIG_PHY_ATHEROS=y CONFIG_PHY_BROADCOM=y CONFIG_PHY_DAVICOM=y @@ -70,8 +71,10 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig index 68e3970d6d..f205d3a834 100644 --- a/configs/P1020RDB-PD_SPIFLASH_defconfig +++ b/configs/P1020RDB-PD_SPIFLASH_defconfig @@ -61,6 +61,7 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_FIXED=y CONFIG_PHY_ATHEROS=y CONFIG_PHY_BROADCOM=y CONFIG_PHY_DAVICOM=y @@ -72,8 +73,10 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig index 6251ca268a..14f0b98916 100644 --- a/configs/P1020RDB-PD_defconfig +++ b/configs/P1020RDB-PD_defconfig @@ -48,6 +48,7 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_FIXED=y CONFIG_PHY_ATHEROS=y CONFIG_PHY_BROADCOM=y CONFIG_PHY_DAVICOM=y @@ -59,8 +60,10 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y From patchwork Fri Jun 5 08:55:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1303974 X-Patchwork-Delegate: priyanka.jain@nxp.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49dc9M66hxz9sTC for ; Fri, 5 Jun 2020 19:02:31 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id C698481E4B; Fri, 5 Jun 2020 11:01:14 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=nxp.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id D855F81E0F; Fri, 5 Jun 2020 11:00:54 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 48D5B81E26 for ; Fri, 5 Jun 2020 11:00:47 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=Zhiqiang.Hou@nxp.com Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 0E0431A1F65; Fri, 5 Jun 2020 11:00:47 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 7053C1A045F; Fri, 5 Jun 2020 11:00:44 +0200 (CEST) Received: from localhost.localdomain (mega.ap.freescale.net [10.192.208.232]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 7B558402A5; Fri, 5 Jun 2020 17:00:41 +0800 (SGT) From: Zhiqiang Hou To: u-boot@lists.denx.de, priyanka.jain@nxp.com, bmeng.cn@gmail.com, olteanv@gmail.com Cc: Hou Zhiqiang Subject: [PATCHv2 09/13] dts: powerpc: p1010rdb: Add eTSEC DT nodes Date: Fri, 5 Jun 2020 16:55:13 +0800 Message-Id: <20200605085517.13046-10-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200605085517.13046-1-Zhiqiang.Hou@nxp.com> References: <20200605085517.13046-1-Zhiqiang.Hou@nxp.com> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de X-Virus-Status: Clean From: Hou Zhiqiang P1010RDB implements 3 enhanced three-speed Ethernet controllers, and the connection is shown below: eTSEC1: Connected to RGMII PHY AR8033 eTSEC2: Connected to SGMII PHY AR8033 eTSEC3: Connected to SGMII PHY AR8033 Signed-off-by: Hou Zhiqiang --- V2: - Rebase the patch, no change intended. arch/powerpc/dts/p1010rdb-pa.dts | 1 + arch/powerpc/dts/p1010rdb-pa_36b.dts | 1 + arch/powerpc/dts/p1010rdb.dtsi | 62 ++++++++++++++++++++++++++++ arch/powerpc/dts/p1010si-post.dtsi | 25 +++++++++++ 4 files changed, 89 insertions(+) diff --git a/arch/powerpc/dts/p1010rdb-pa.dts b/arch/powerpc/dts/p1010rdb-pa.dts index c66c4923ac..360d254d91 100644 --- a/arch/powerpc/dts/p1010rdb-pa.dts +++ b/arch/powerpc/dts/p1010rdb-pa.dts @@ -15,3 +15,4 @@ }; /include/ "p1010si-post.dtsi" +/include/ "p1010rdb.dtsi" diff --git a/arch/powerpc/dts/p1010rdb-pa_36b.dts b/arch/powerpc/dts/p1010rdb-pa_36b.dts index b943de7cbb..062086a8c0 100644 --- a/arch/powerpc/dts/p1010rdb-pa_36b.dts +++ b/arch/powerpc/dts/p1010rdb-pa_36b.dts @@ -15,3 +15,4 @@ }; /include/ "p1010si-post.dtsi" +/include/ "p1010rdb.dtsi" diff --git a/arch/powerpc/dts/p1010rdb.dtsi b/arch/powerpc/dts/p1010rdb.dtsi index 4f58ee2446..f7662648e5 100644 --- a/arch/powerpc/dts/p1010rdb.dtsi +++ b/arch/powerpc/dts/p1010rdb.dtsi @@ -5,6 +5,68 @@ * Copyright 2020 NXP */ &soc { + mdio@24000 { + phy0: ethernet-phy@0 { + reg = <0x1>; + }; + + phy1: ethernet-phy@1 { + reg = <0x0>; + }; + + phy2: ethernet-phy@2 { + reg = <0x2>; + }; + + tbi-phy@3 { + device_type = "tbi-phy"; + reg = <0x3>; + }; + }; + + mdio@25000 { + tbi0: tbi-phy@11 { + reg = <0x11>; + device_type = "tbi-phy"; + }; + }; + + mdio@26000 { + tbi1: tbi-phy@11 { + reg = <0x11>; + device_type = "tbi-phy"; + }; + }; + + ptp_clock@b0e00 { + compatible = "fsl,etsec-ptp"; + reg = <0xb0e00 0xb0>; + interrupts = <68 2 0 0 69 2 0 0>; + fsl,tclk-period = <10>; + fsl,tmr-prsc = <2>; + fsl,tmr-add = <0x80000016>; + fsl,tmr-fiper1 = <999999990>; + fsl,tmr-fiper2 = <99990>; + fsl,max-adj = <199999999>; + }; + + enet0: ethernet@b0000 { + phy-handle = <&phy0>; + phy-connection-type = "rgmii-id"; + }; + + enet1: ethernet@b1000 { + phy-handle = <&phy1>; + tbi-handle = <&tbi0>; + phy-connection-type = "sgmii"; + }; + + enet2: ethernet@b2000 { + phy-handle = <&phy2>; + tbi-handle = <&tbi1>; + phy-connection-type = "sgmii"; + }; + i2c@3000 { rtc@68 { compatible = "pericom,pt7c4338"; diff --git a/arch/powerpc/dts/p1010si-post.dtsi b/arch/powerpc/dts/p1010si-post.dtsi index 0289441381..f825208056 100644 --- a/arch/powerpc/dts/p1010si-post.dtsi +++ b/arch/powerpc/dts/p1010si-post.dtsi @@ -25,6 +25,31 @@ }; /include/ "pq3-i2c-0.dtsi" /include/ "pq3-i2c-1.dtsi" + +/include/ "pq3-etsec2-0.dtsi" + enet0: ethernet@b0000 { + queue-group@b0000 { + fsl,rx-bit-map = <0xff>; + fsl,tx-bit-map = <0xff>; + }; + }; + +/include/ "pq3-etsec2-1.dtsi" + enet1: ethernet@b1000 { + queue-group@b1000 { + fsl,rx-bit-map = <0xff>; + fsl,tx-bit-map = <0xff>; + }; + }; + +/include/ "pq3-etsec2-2.dtsi" + enet2: ethernet@b2000 { + queue-group@b2000 { + fsl,rx-bit-map = <0xff>; + fsl,tx-bit-map = <0xff>; + }; + + }; }; /* controller at 0x9000 */ From patchwork Fri Jun 5 08:55:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1303980 X-Patchwork-Delegate: priyanka.jain@nxp.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49dcB11ZH4z9sTC for ; Fri, 5 Jun 2020 19:03:05 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id E445681E79; Fri, 5 Jun 2020 11:01:22 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=nxp.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 1967781E0F; Fri, 5 Jun 2020 11:00:56 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 2C0C181E37 for ; Fri, 5 Jun 2020 11:00:48 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=Zhiqiang.Hou@nxp.com Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id E0D001A1F6E; Fri, 5 Jun 2020 11:00:47 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 8467A1A0456; Fri, 5 Jun 2020 11:00:45 +0200 (CEST) Received: from localhost.localdomain (mega.ap.freescale.net [10.192.208.232]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 2DC3240296; Fri, 5 Jun 2020 17:00:42 +0800 (SGT) From: Zhiqiang Hou To: u-boot@lists.denx.de, priyanka.jain@nxp.com, bmeng.cn@gmail.com, olteanv@gmail.com Cc: Hou Zhiqiang Subject: [PATCHv2 10/13] powerpc: p1010rdb: Compile legacy ethernet init function when no DM_ETH Date: Fri, 5 Jun 2020 16:55:14 +0800 Message-Id: <20200605085517.13046-11-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200605085517.13046-1-Zhiqiang.Hou@nxp.com> References: <20200605085517.13046-1-Zhiqiang.Hou@nxp.com> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de X-Virus-Status: Clean From: Hou Zhiqiang The board_eth_init() is only used by legacy ethernet driver framework, so do not compile it when DM_ETH config has been selected. Signed-off-by: Hou Zhiqiang --- V2: - Rebase the patch, no change intended. board/freescale/p1010rdb/p1010rdb.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/board/freescale/p1010rdb/p1010rdb.c b/board/freescale/p1010rdb/p1010rdb.c index 314646d4ff..4f62df591b 100644 --- a/board/freescale/p1010rdb/p1010rdb.c +++ b/board/freescale/p1010rdb/p1010rdb.c @@ -481,6 +481,7 @@ int checkboard(void) return 0; } +#ifndef CONFIG_DM_ETH int board_eth_init(bd_t *bis) { #ifdef CONFIG_TSEC_ENET @@ -521,6 +522,7 @@ int board_eth_init(bd_t *bis) return pci_eth_init(bis); } +#endif #if defined(CONFIG_OF_BOARD_SETUP) void fdt_del_flexcan(void *blob) From patchwork Fri Jun 5 08:55:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1303978 X-Patchwork-Delegate: priyanka.jain@nxp.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49dc9n5K05z9sTC for ; Fri, 5 Jun 2020 19:02:53 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id CEF7081E6F; Fri, 5 Jun 2020 11:01:20 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=nxp.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 5063781E2F; Fri, 5 Jun 2020 11:00:55 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, UPPERCASE_50_75,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.2 Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id AEDE381E38 for ; Fri, 5 Jun 2020 11:00:48 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=Zhiqiang.Hou@nxp.com Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 694D41A0447; Fri, 5 Jun 2020 11:00:48 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id D591D1A1F60; Fri, 5 Jun 2020 11:00:45 +0200 (CEST) Received: from localhost.localdomain (mega.ap.freescale.net [10.192.208.232]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id DE44240324; Fri, 5 Jun 2020 17:00:42 +0800 (SGT) From: Zhiqiang Hou To: u-boot@lists.denx.de, priyanka.jain@nxp.com, bmeng.cn@gmail.com, olteanv@gmail.com Cc: Hou Zhiqiang Subject: [PATCHv2 11/13] configs: P1010RDB: Enable DM_ETH config Date: Fri, 5 Jun 2020 16:55:15 +0800 Message-Id: <20200605085517.13046-12-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200605085517.13046-1-Zhiqiang.Hou@nxp.com> References: <20200605085517.13046-1-Zhiqiang.Hou@nxp.com> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de X-Virus-Status: Clean From: Hou Zhiqiang Enable the DM_ETH and DM_MDIO config. Signed-off-by: Hou Zhiqiang --- V2: - Rebase the patch, no change intended. configs/P1010RDB-PA_36BIT_NAND_defconfig | 2 ++ configs/P1010RDB-PA_36BIT_NOR_defconfig | 2 ++ configs/P1010RDB-PA_36BIT_SDCARD_defconfig | 2 ++ configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig | 2 ++ configs/P1010RDB-PA_NAND_defconfig | 2 ++ configs/P1010RDB-PA_NOR_defconfig | 2 ++ configs/P1010RDB-PA_SDCARD_defconfig | 2 ++ configs/P1010RDB-PA_SPIFLASH_defconfig | 2 ++ configs/P1010RDB-PB_36BIT_NAND_defconfig | 2 ++ configs/P1010RDB-PB_36BIT_NOR_defconfig | 2 ++ configs/P1010RDB-PB_36BIT_SDCARD_defconfig | 2 ++ configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig | 2 ++ configs/P1010RDB-PB_NAND_defconfig | 2 ++ configs/P1010RDB-PB_NOR_defconfig | 2 ++ configs/P1010RDB-PB_SDCARD_defconfig | 2 ++ configs/P1010RDB-PB_SPIFLASH_defconfig | 2 ++ 16 files changed, 32 insertions(+) diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig index 5280a1d070..fafdfbb1cb 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig @@ -71,12 +71,14 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_DM=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/P1010RDB-PA_36BIT_NOR_defconfig b/configs/P1010RDB-PA_36BIT_NOR_defconfig index b83e99f8f7..6f366d7908 100644 --- a/configs/P1010RDB-PA_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PA_36BIT_NOR_defconfig @@ -53,12 +53,14 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_DM=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig index a1b08b17f9..bcd85e1356 100644 --- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig @@ -65,12 +65,14 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_DM=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig index 2b336f4a92..97f5fb719a 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig @@ -67,12 +67,14 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_DM=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig index 6062fd8d0f..37390e2ffb 100644 --- a/configs/P1010RDB-PA_NAND_defconfig +++ b/configs/P1010RDB-PA_NAND_defconfig @@ -70,12 +70,14 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_DM=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/P1010RDB-PA_NOR_defconfig b/configs/P1010RDB-PA_NOR_defconfig index 4ee53e85f7..f9353a24b3 100644 --- a/configs/P1010RDB-PA_NOR_defconfig +++ b/configs/P1010RDB-PA_NOR_defconfig @@ -52,12 +52,14 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_DM=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig index f4e89592b8..d2f994ceaa 100644 --- a/configs/P1010RDB-PA_SDCARD_defconfig +++ b/configs/P1010RDB-PA_SDCARD_defconfig @@ -64,12 +64,14 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_DM=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig index 6d4175e2d1..9c10f80176 100644 --- a/configs/P1010RDB-PA_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_defconfig @@ -66,12 +66,14 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_DM=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig index 123c044cf7..27b0f7b71e 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig @@ -71,12 +71,14 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_DM=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/P1010RDB-PB_36BIT_NOR_defconfig b/configs/P1010RDB-PB_36BIT_NOR_defconfig index 1e149f965d..3400acfa96 100644 --- a/configs/P1010RDB-PB_36BIT_NOR_defconfig +++ b/configs/P1010RDB-PB_36BIT_NOR_defconfig @@ -53,12 +53,14 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_DM=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig index aeb7e16467..f7a70dd0d1 100644 --- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig @@ -65,12 +65,14 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_DM=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig index 7b6aaf64cb..fda9651d54 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig @@ -67,12 +67,14 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_DM=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig index 0af9e1795a..62d1f462bf 100644 --- a/configs/P1010RDB-PB_NAND_defconfig +++ b/configs/P1010RDB-PB_NAND_defconfig @@ -74,8 +74,10 @@ CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/P1010RDB-PB_NOR_defconfig b/configs/P1010RDB-PB_NOR_defconfig index 73fe54d13a..79d96535ea 100644 --- a/configs/P1010RDB-PB_NOR_defconfig +++ b/configs/P1010RDB-PB_NOR_defconfig @@ -56,8 +56,10 @@ CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig index d373cd2890..8b53e4c269 100644 --- a/configs/P1010RDB-PB_SDCARD_defconfig +++ b/configs/P1010RDB-PB_SDCARD_defconfig @@ -64,12 +64,14 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_DM=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig index 88fc5fe5ae..cbbf20797a 100644 --- a/configs/P1010RDB-PB_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_defconfig @@ -66,12 +66,14 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_DM=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_FSL_ESPI=y From patchwork Fri Jun 5 08:55:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1303982 X-Patchwork-Delegate: priyanka.jain@nxp.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49dcBQ6ngjz9sTC for ; Fri, 5 Jun 2020 19:03:26 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id C379481E84; Fri, 5 Jun 2020 11:01:29 +0200 (CEST) Authentication-Results: phobos.denx.de; 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Fri, 5 Jun 2020 11:00:49 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 909BA200005; Fri, 5 Jun 2020 11:00:46 +0200 (CEST) Received: from localhost.localdomain (mega.ap.freescale.net [10.192.208.232]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 8FDDA40323; Fri, 5 Jun 2020 17:00:43 +0800 (SGT) From: Zhiqiang Hou To: u-boot@lists.denx.de, priyanka.jain@nxp.com, bmeng.cn@gmail.com, olteanv@gmail.com Cc: Hou Zhiqiang Subject: [PATCHv2 12/13] dts: powerpc: p2020rdb: Add eTSEC DT nodes Date: Fri, 5 Jun 2020 16:55:16 +0800 Message-Id: <20200605085517.13046-13-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200605085517.13046-1-Zhiqiang.Hou@nxp.com> References: <20200605085517.13046-1-Zhiqiang.Hou@nxp.com> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de X-Virus-Status: Clean From: Hou Zhiqiang P2020RDB implements 3 enhanced three-speed Ethernet controllers, and the connection is shown below: eTSEC1: Connected to RGMII PHY VSC7385 eTSEC2: Connected to SGMII PHY VSC8221 eTSEC3: Connected to SGMII PHY AR8021 Signed-off-by: Hou Zhiqiang --- V2: - Rebase the patch, no change intended. arch/powerpc/dts/p2020-post.dtsi | 10 ++++ arch/powerpc/dts/p2020rdb-pc.dts | 1 + arch/powerpc/dts/p2020rdb-pc.dtsi | 59 ++++++++++++++++++++++++ arch/powerpc/dts/p2020rdb-pc_36b.dts | 1 + arch/powerpc/dts/pq3-etsec1-0.dtsi | 28 +++++++++++ arch/powerpc/dts/pq3-etsec1-1.dtsi | 28 +++++++++++ arch/powerpc/dts/pq3-etsec1-2.dtsi | 28 +++++++++++ arch/powerpc/dts/pq3-etsec1-3.dtsi | 28 +++++++++++ arch/powerpc/dts/pq3-etsec1-timer-0.dtsi | 13 ++++++ 9 files changed, 196 insertions(+) create mode 100644 arch/powerpc/dts/p2020rdb-pc.dtsi create mode 100644 arch/powerpc/dts/pq3-etsec1-0.dtsi create mode 100644 arch/powerpc/dts/pq3-etsec1-1.dtsi create mode 100644 arch/powerpc/dts/pq3-etsec1-2.dtsi create mode 100644 arch/powerpc/dts/pq3-etsec1-3.dtsi create mode 100644 arch/powerpc/dts/pq3-etsec1-timer-0.dtsi diff --git a/arch/powerpc/dts/p2020-post.dtsi b/arch/powerpc/dts/p2020-post.dtsi index 4ed093dad4..af79705eba 100644 --- a/arch/powerpc/dts/p2020-post.dtsi +++ b/arch/powerpc/dts/p2020-post.dtsi @@ -40,6 +40,16 @@ /include/ "pq3-i2c-0.dtsi" /include/ "pq3-i2c-1.dtsi" + +/include/ "pq3-etsec1-0.dtsi" +/include/ "pq3-etsec1-timer-0.dtsi" + + ptp_clock@24e00 { + interrupts = <68 2 0 0 69 2 0 0 70 2 0 0>; + }; + +/include/ "pq3-etsec1-1.dtsi" +/include/ "pq3-etsec1-2.dtsi" }; /* PCIe controller base address 0x8000 */ diff --git a/arch/powerpc/dts/p2020rdb-pc.dts b/arch/powerpc/dts/p2020rdb-pc.dts index 08befd4c59..f3f6be1080 100644 --- a/arch/powerpc/dts/p2020rdb-pc.dts +++ b/arch/powerpc/dts/p2020rdb-pc.dts @@ -37,4 +37,5 @@ }; }; +/include/ "p2020rdb-pc.dtsi" /include/ "p2020-post.dtsi" diff --git a/arch/powerpc/dts/p2020rdb-pc.dtsi b/arch/powerpc/dts/p2020rdb-pc.dtsi new file mode 100644 index 0000000000..9abd700999 --- /dev/null +++ b/arch/powerpc/dts/p2020rdb-pc.dtsi @@ -0,0 +1,59 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * P2020 RDB-PC Device Tree Source stub (no addresses or top-level ranges) + * + * Copyright 2011 Freescale Semiconductor Inc. + * Copyright 2020 NXP + */ + +&soc { + mdio@24520 { + phy0: ethernet-phy@0 { + interrupts = <3 1 0 0>; + reg = <0x0>; + }; + phy1: ethernet-phy@1 { + interrupts = <2 1 0 0>; + reg = <0x1>; + }; + }; + + mdio@25520 { + tbi0: tbi-phy@11 { + reg = <0x11>; + device_type = "tbi-phy"; + }; + }; + + mdio@26520 { + status = "disabled"; + }; + + ptp_clock@24e00 { + fsl,tclk-period = <5>; + fsl,tmr-prsc = <2>; + fsl,tmr-add = <0xaaaaaaab>; + fsl,tmr-fiper1 = <999999995>; + fsl,tmr-fiper2 = <99990>; + fsl,max-adj = <299999999>; + }; + + enet0: ethernet@24000 { + phy-connection-type = "rgmii-id"; + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + + enet1: ethernet@25000 { + tbi-handle = <&tbi0>; + phy-handle = <&phy0>; + phy-connection-type = "sgmii"; + }; + + enet2: ethernet@26000 { + phy-handle = <&phy1>; + phy-connection-type = "rgmii-id"; + }; +}; diff --git a/arch/powerpc/dts/p2020rdb-pc_36b.dts b/arch/powerpc/dts/p2020rdb-pc_36b.dts index 04b2519e1a..6d983b7d71 100644 --- a/arch/powerpc/dts/p2020rdb-pc_36b.dts +++ b/arch/powerpc/dts/p2020rdb-pc_36b.dts @@ -37,4 +37,5 @@ }; }; +/include/ "p2020rdb-pc.dtsi" /include/ "p2020-post.dtsi" diff --git a/arch/powerpc/dts/pq3-etsec1-0.dtsi b/arch/powerpc/dts/pq3-etsec1-0.dtsi new file mode 100644 index 0000000000..8800243f34 --- /dev/null +++ b/arch/powerpc/dts/pq3-etsec1-0.dtsi @@ -0,0 +1,28 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * PQ3 eTSEC device tree stub [ @ offsets 0x24000 ] + * + * Copyright 2011-2012 Freescale Semiconductor Inc. + * Copyright 2020 NXP + */ + +ethernet@24000 { + #address-cells = <1>; + #size-cells = <1>; + cell-index = <0>; + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar"; + reg = <0x24000 0x1000>; + ranges = <0x0 0x24000 0x1000>; + fsl,magic-packet; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <29 2 0 0 30 2 0 0 34 2 0 0>; +}; + +mdio@24520 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,gianfar-mdio"; + reg = <0x24520 0x20>; +}; diff --git a/arch/powerpc/dts/pq3-etsec1-1.dtsi b/arch/powerpc/dts/pq3-etsec1-1.dtsi new file mode 100644 index 0000000000..2bc62d1a57 --- /dev/null +++ b/arch/powerpc/dts/pq3-etsec1-1.dtsi @@ -0,0 +1,28 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * PQ3 eTSEC device tree stub [ @ offsets 0x25000 ] + * + * Copyright 2011-2012 Freescale Semiconductor Inc. + * Copyright 2020 NXP + */ + +ethernet@25000 { + #address-cells = <1>; + #size-cells = <1>; + cell-index = <1>; + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar"; + reg = <0x25000 0x1000>; + ranges = <0x0 0x25000 0x1000>; + fsl,magic-packet; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <35 2 0 0 36 2 0 0 40 2 0 0>; +}; + +mdio@25520 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,gianfar-tbi"; + reg = <0x25520 0x20>; +}; diff --git a/arch/powerpc/dts/pq3-etsec1-2.dtsi b/arch/powerpc/dts/pq3-etsec1-2.dtsi new file mode 100644 index 0000000000..d45865fe03 --- /dev/null +++ b/arch/powerpc/dts/pq3-etsec1-2.dtsi @@ -0,0 +1,28 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * PQ3 eTSEC device tree stub [ @ offsets 0x26000 ] + * + * Copyright 2011-2012 Freescale Semiconductor Inc. + * Copyright 2020 NXP + */ + +ethernet@26000 { + #address-cells = <1>; + #size-cells = <1>; + cell-index = <2>; + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar"; + reg = <0x26000 0x1000>; + ranges = <0x0 0x26000 0x1000>; + fsl,magic-packet; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <31 2 0 0 32 2 0 0 33 2 0 0>; +}; + +mdio@26520 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,gianfar-tbi"; + reg = <0x26520 0x20>; +}; diff --git a/arch/powerpc/dts/pq3-etsec1-3.dtsi b/arch/powerpc/dts/pq3-etsec1-3.dtsi new file mode 100644 index 0000000000..853a27359d --- /dev/null +++ b/arch/powerpc/dts/pq3-etsec1-3.dtsi @@ -0,0 +1,28 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * PQ3 eTSEC device tree stub [ @ offsets 0x27000 ] + * + * Copyright 2011-2012 Freescale Semiconductor Inc. + * Copyright 2020 NXP + */ + +ethernet@27000 { + #address-cells = <1>; + #size-cells = <1>; + cell-index = <3>; + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar"; + reg = <0x27000 0x1000>; + ranges = <0x0 0x27000 0x1000>; + fsl,magic-packet; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <37 2 0 0 38 2 0 0 39 2 0 0>; +}; + +mdio@27520 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,gianfar-tbi"; + reg = <0x27520 0x20>; +}; diff --git a/arch/powerpc/dts/pq3-etsec1-timer-0.dtsi b/arch/powerpc/dts/pq3-etsec1-timer-0.dtsi new file mode 100644 index 0000000000..19b37aca1d --- /dev/null +++ b/arch/powerpc/dts/pq3-etsec1-timer-0.dtsi @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: GPL-2.0+ OR X11 +/* + * PQ3 eTSEC Timer (IEEE 1588) device tree stub [ @ offsets 0x24e00 ] + * + * Copyright 2011 Freescale Semiconductor Inc. + * Copyright 2020 NXP + */ + +ptp_clock@24e00 { + compatible = "fsl,etsec-ptp"; + reg = <0x24e00 0xb0>; + interrupts = <68 2 0 0 69 2 0 0>; +}; From patchwork Fri Jun 5 08:55:17 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Z.Q. Hou" X-Patchwork-Id: 1303981 X-Patchwork-Delegate: priyanka.jain@nxp.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49dcBC5gpNz9sTH for ; Fri, 5 Jun 2020 19:03:15 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 6AAF281E7A; Fri, 5 Jun 2020 11:01:26 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=nxp.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id ADCF481E22; Fri, 5 Jun 2020 11:00:58 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,SPF_HELO_NONE, UPPERCASE_50_75,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.2 Received: from inva021.nxp.com (inva021.nxp.com [92.121.34.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 1BA4881E47 for ; Fri, 5 Jun 2020 11:00:50 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=Zhiqiang.Hou@nxp.com Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id D274B200005; Fri, 5 Jun 2020 11:00:49 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 4B12620010B; Fri, 5 Jun 2020 11:00:47 +0200 (CEST) Received: from localhost.localdomain (mega.ap.freescale.net [10.192.208.232]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 41F42402AD; Fri, 5 Jun 2020 17:00:44 +0800 (SGT) From: Zhiqiang Hou To: u-boot@lists.denx.de, priyanka.jain@nxp.com, bmeng.cn@gmail.com, olteanv@gmail.com Cc: Hou Zhiqiang Subject: [PATCHv2 13/13] configs: P2020RDB: Enable DM_ETH config Date: Fri, 5 Jun 2020 16:55:17 +0800 Message-Id: <20200605085517.13046-14-Zhiqiang.Hou@nxp.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200605085517.13046-1-Zhiqiang.Hou@nxp.com> References: <20200605085517.13046-1-Zhiqiang.Hou@nxp.com> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de X-Virus-Status: Clean From: Hou Zhiqiang Enable the DM_ETH and DM_MDIO config. On P2020RDB, the eTSEC1 is connecting with a switch VSC7385, so also enable the fixed PHY support. Signed-off-by: Hou Zhiqiang --- V2: - Rebase the patch, no change intended. configs/P2020RDB-PC_36BIT_NAND_defconfig | 3 +++ configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 3 +++ configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 3 +++ configs/P2020RDB-PC_36BIT_defconfig | 3 +++ configs/P2020RDB-PC_NAND_defconfig | 3 +++ configs/P2020RDB-PC_SDCARD_defconfig | 3 +++ configs/P2020RDB-PC_SPIFLASH_defconfig | 3 +++ configs/P2020RDB-PC_defconfig | 3 +++ 8 files changed, 24 insertions(+) diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig index 950fabef21..9cacade529 100644 --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig @@ -66,6 +66,7 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_FIXED=y CONFIG_PHY_ATHEROS=y CONFIG_PHY_BROADCOM=y CONFIG_PHY_DAVICOM=y @@ -77,8 +78,10 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig index e9b21d2d7b..2714d30464 100644 --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig @@ -61,6 +61,7 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_FIXED=y CONFIG_PHY_ATHEROS=y CONFIG_PHY_BROADCOM=y CONFIG_PHY_DAVICOM=y @@ -72,8 +73,10 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig index 6de28bd0c5..2c7ec8435f 100644 --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig @@ -63,6 +63,7 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_FIXED=y CONFIG_PHY_ATHEROS=y CONFIG_PHY_BROADCOM=y CONFIG_PHY_DAVICOM=y @@ -74,8 +75,10 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig index c48e993b71..05171218b3 100644 --- a/configs/P2020RDB-PC_36BIT_defconfig +++ b/configs/P2020RDB-PC_36BIT_defconfig @@ -50,6 +50,7 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_FIXED=y CONFIG_PHY_ATHEROS=y CONFIG_PHY_BROADCOM=y CONFIG_PHY_DAVICOM=y @@ -61,8 +62,10 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig index 8d7a7891fb..2905078abf 100644 --- a/configs/P2020RDB-PC_NAND_defconfig +++ b/configs/P2020RDB-PC_NAND_defconfig @@ -65,6 +65,7 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_FIXED=y CONFIG_PHY_ATHEROS=y CONFIG_PHY_BROADCOM=y CONFIG_PHY_DAVICOM=y @@ -76,8 +77,10 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig index 280b190be4..daf9a92936 100644 --- a/configs/P2020RDB-PC_SDCARD_defconfig +++ b/configs/P2020RDB-PC_SDCARD_defconfig @@ -60,6 +60,7 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_FIXED=y CONFIG_PHY_ATHEROS=y CONFIG_PHY_BROADCOM=y CONFIG_PHY_DAVICOM=y @@ -71,8 +72,10 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig index e0ebe44cac..ebb3934ca7 100644 --- a/configs/P2020RDB-PC_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig @@ -62,6 +62,7 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_FIXED=y CONFIG_PHY_ATHEROS=y CONFIG_PHY_BROADCOM=y CONFIG_PHY_DAVICOM=y @@ -73,8 +74,10 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig index dd5c14e4cb..63fd9f1c8f 100644 --- a/configs/P2020RDB-PC_defconfig +++ b/configs/P2020RDB-PC_defconfig @@ -49,6 +49,7 @@ CONFIG_SPI_FLASH=y CONFIG_SF_DEFAULT_MODE=0 CONFIG_SF_DEFAULT_SPEED=10000000 CONFIG_SPI_FLASH_SPANSION=y +CONFIG_PHY_FIXED=y CONFIG_PHY_ATHEROS=y CONFIG_PHY_BROADCOM=y CONFIG_PHY_DAVICOM=y @@ -60,8 +61,10 @@ CONFIG_PHY_SMSC=y CONFIG_PHY_VITESSE=y CONFIG_PHY_GIGE=y CONFIG_E1000=y +CONFIG_DM_ETH=y CONFIG_MII=y CONFIG_TSEC_ENET=y +CONFIG_DM_MDIO=y CONFIG_DM_PCI=y CONFIG_DM_PCI_COMPAT=y CONFIG_PCIE_FSL=y