From patchwork Fri Jun 5 06:45:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jakub Jelinek X-Patchwork-Id: 1303902 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=sourceware.org; envelope-from=gcc-patches-bounces@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=gcc.gnu.org Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=IbMjDuUk; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49dY7P2bWTz9sTD for ; Fri, 5 Jun 2020 16:45:35 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 94A6438708DA; Fri, 5 Jun 2020 06:45:31 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 94A6438708DA DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1591339531; bh=M+fNoF3bOOvyBkLz/4ONfjfFX7BFc7rqggqnN6iIjv4=; h=Date:To:Subject:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:Cc:From; b=IbMjDuUk8xvUDd2Rbt6568uwt6e4Q/L5QH5XQNpQB5fp5UaC9AOPrfLifnkqxu6BP EfHx/ZdRA6Z8vQzjlN3jOgvGp3PCfcquys1h0oVP25/DjdCB5fQDfC5evvYxxz5e8S aB36MbBr2FDvXtteSNDAhISjnRSFTzj8CIl+j6Og= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from us-smtp-1.mimecast.com (us-smtp-delivery-1.mimecast.com [207.211.31.120]) by sourceware.org (Postfix) with ESMTP id 0E20E385BF81 for ; Fri, 5 Jun 2020 06:45:27 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 0E20E385BF81 Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-39-zy3e3p7yOS2YQinr5nHGlQ-1; Fri, 05 Jun 2020 02:45:23 -0400 X-MC-Unique: zy3e3p7yOS2YQinr5nHGlQ-1 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id B6E6C835B43; Fri, 5 Jun 2020 06:45:22 +0000 (UTC) Received: from tucnak.zalov.cz (ovpn-112-94.ams2.redhat.com [10.36.112.94]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 4FAFA7CCD7; Fri, 5 Jun 2020 06:45:22 +0000 (UTC) Received: from tucnak.zalov.cz (localhost [127.0.0.1]) by tucnak.zalov.cz (8.15.2/8.15.2) with ESMTP id 0556jKfc015740; Fri, 5 Jun 2020 08:45:20 +0200 Received: (from jakub@localhost) by tucnak.zalov.cz (8.15.2/8.15.2/Submit) id 0556jJqx015739; Fri, 5 Jun 2020 08:45:19 +0200 Date: Fri, 5 Jun 2020 08:45:19 +0200 To: Uros Bizjak Subject: [PATCH] ix86: Improve __builtin_c[lt]z followed by extension [PR95535] Message-ID: <20200605064519.GF8462@tucnak> MIME-Version: 1.0 User-Agent: Mutt/1.11.3 (2019-02-01) X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Disposition: inline X-Spam-Status: No, score=-9.0 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Jakub Jelinek via Gcc-patches From: Jakub Jelinek Reply-To: Jakub Jelinek Cc: gcc-patches@gcc.gnu.org Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" Hi! In January I've added patterns to optimize SImode -> DImode sign or zero extension of __builtin_popcount, this patch does the same for __builtin_c[lt]z. Like most other instructions, the [tl]zcntl instructions clear the upper 32 bits of the destination register and as the instructions only result in values 0 to 32 inclusive, both sign and zero extensions behave the same. Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk? 2020-06-05 Jakub Jelinek PR target/95535 * config/i386/i386.md (*ctzsi2_zext, *clzsi2_lzcnt_zext): New define_insn_and_split patterns. (*ctzsi2_zext_falsedep, *clzsi2_lzcnt_zext_falsedep): New define_insn patterns. * gcc.target/i386/pr95535-1.c: New test. * gcc.target/i386/pr95535-2.c: New test. Jakub --- gcc/config/i386/i386.md.jj 2020-05-25 10:06:59.882176002 +0200 +++ gcc/config/i386/i386.md 2020-06-04 18:44:26.333963121 +0200 @@ -13985,6 +13985,50 @@ (define_insn "*ctz2_falsedep" (set_attr "prefix_rep" "1") (set_attr "mode" "")]) +(define_insn_and_split "*ctzsi2_zext" + [(set (match_operand:DI 0 "register_operand" "=r") + (and:DI + (subreg:DI + (ctz:SI + (match_operand:SI 1 "nonimmediate_operand" "rm")) 0) + (const_int 63))) + (clobber (reg:CC FLAGS_REG))] + "TARGET_BMI && TARGET_64BIT" + "tzcnt{l}\t{%1, %k0|%k0, %1}" + "&& TARGET_AVOID_FALSE_DEP_FOR_BMI && epilogue_completed + && optimize_function_for_speed_p (cfun) + && !reg_mentioned_p (operands[0], operands[1])" + [(parallel + [(set (match_dup 0) + (and:DI (subreg:DI (ctz:SI (match_dup 1)) 0) (const_int 63))) + (unspec [(match_dup 0)] UNSPEC_INSN_FALSE_DEP) + (clobber (reg:CC FLAGS_REG))])] + "ix86_expand_clear (operands[0]);" + [(set_attr "type" "alu1") + (set_attr "prefix_0f" "1") + (set_attr "prefix_rep" "1") + (set_attr "mode" "SI")]) + +; False dependency happens when destination is only updated by tzcnt, +; lzcnt or popcnt. There is no false dependency when destination is +; also used in source. +(define_insn "*ctzsi2_zext_falsedep" + [(set (match_operand:DI 0 "register_operand" "=r") + (and:DI + (subreg:DI + (ctz:SI + (match_operand:SI 1 "nonimmediate_operand" "rm")) 0) + (const_int 63))) + (unspec [(match_operand:DI 2 "register_operand" "0")] + UNSPEC_INSN_FALSE_DEP) + (clobber (reg:CC FLAGS_REG))] + "TARGET_BMI && TARGET_64BIT" + "tzcnt{l}\t{%1, %k0|%k0, %1}" + [(set_attr "type" "alu1") + (set_attr "prefix_0f" "1") + (set_attr "prefix_rep" "1") + (set_attr "mode" "SI")]) + (define_insn "bsr_rex64" [(set (match_operand:DI 0 "register_operand" "=r") (minus:DI (const_int 63) @@ -14077,6 +14121,48 @@ (define_insn "*clz2_lzcnt_falsedep (set_attr "type" "bitmanip") (set_attr "mode" "")]) +(define_insn_and_split "*clzsi2_lzcnt_zext" + [(set (match_operand:DI 0 "register_operand" "=r") + (and:DI + (subreg:DI + (clz:SI + (match_operand:SI 1 "nonimmediate_operand" "rm")) 0) + (const_int 63))) + (clobber (reg:CC FLAGS_REG))] + "TARGET_LZCNT && TARGET_64BIT" + "lzcnt{l}\t{%1, %k0|%k0, %1}" + "&& TARGET_AVOID_FALSE_DEP_FOR_BMI && epilogue_completed + && optimize_function_for_speed_p (cfun) + && !reg_mentioned_p (operands[0], operands[1])" + [(parallel + [(set (match_dup 0) + (and:DI (subreg:DI (clz:SI (match_dup 1)) 0) (const_int 63))) + (unspec [(match_dup 0)] UNSPEC_INSN_FALSE_DEP) + (clobber (reg:CC FLAGS_REG))])] + "ix86_expand_clear (operands[0]);" + [(set_attr "prefix_rep" "1") + (set_attr "type" "bitmanip") + (set_attr "mode" "SI")]) + +; False dependency happens when destination is only updated by tzcnt, +; lzcnt or popcnt. There is no false dependency when destination is +; also used in source. +(define_insn "*clzsi2_lzcnt_zext_falsedep" + [(set (match_operand:DI 0 "register_operand" "=r") + (and:DI + (subreg:DI + (clz:SI + (match_operand:SWI48 1 "nonimmediate_operand" "rm")) 0) + (const_int 63))) + (unspec [(match_operand:DI 2 "register_operand" "0")] + UNSPEC_INSN_FALSE_DEP) + (clobber (reg:CC FLAGS_REG))] + "TARGET_LZCNT" + "lzcnt{l}\t{%1, %k0|%k0, %1}" + [(set_attr "prefix_rep" "1") + (set_attr "type" "bitmanip") + (set_attr "mode" "SI")]) + (define_int_iterator LT_ZCNT [(UNSPEC_TZCNT "TARGET_BMI") (UNSPEC_LZCNT "TARGET_LZCNT")]) --- gcc/testsuite/gcc.target/i386/pr95535-1.c.jj 2020-06-04 18:47:07.642642830 +0200 +++ gcc/testsuite/gcc.target/i386/pr95535-1.c 2020-06-04 18:47:34.011263537 +0200 @@ -0,0 +1,54 @@ +/* PR target/95535 */ +/* { dg-do compile { target lp64 } } */ +/* { dg-options "-O2 -mbmi" } */ +/* { dg-final { scan-assembler-not "cltq" } } */ + +unsigned int foo (void); + +unsigned long +f1 (unsigned int x) +{ + return __builtin_ctz (x); +} + +unsigned long +f2 (unsigned int x) +{ + return (unsigned) __builtin_ctz (x); +} + +unsigned long +f3 (unsigned int x) +{ + return __builtin_ctz (x) & 63ULL; +} + +unsigned long +f4 (unsigned int x) +{ + return __builtin_ctz (x) & 1023ULL; +} + +unsigned long +f5 (void) +{ + return __builtin_ctz (foo ()); +} + +unsigned long +f6 (void) +{ + return (unsigned) __builtin_ctz (foo ()); +} + +unsigned long +f7 (void) +{ + return __builtin_ctz (foo ()) & 63ULL; +} + +unsigned long +f8 (void) +{ + return __builtin_ctz (foo ()) & 1023ULL; +} --- gcc/testsuite/gcc.target/i386/pr95535-2.c.jj 2020-06-04 18:47:10.774597782 +0200 +++ gcc/testsuite/gcc.target/i386/pr95535-2.c 2020-06-04 18:47:50.576025269 +0200 @@ -0,0 +1,54 @@ +/* PR target/95535 */ +/* { dg-do compile { target lp64 } } */ +/* { dg-options "-O2 -mlzcnt" } */ +/* { dg-final { scan-assembler-not "cltq" } } */ + +unsigned int foo (void); + +unsigned long +f1 (unsigned int x) +{ + return __builtin_clz (x); +} + +unsigned long +f2 (unsigned int x) +{ + return (unsigned) __builtin_clz (x); +} + +unsigned long +f3 (unsigned int x) +{ + return __builtin_clz (x) & 63ULL; +} + +unsigned long +f4 (unsigned int x) +{ + return __builtin_clz (x) & 1023ULL; +} + +unsigned long +f5 (void) +{ + return __builtin_clz (foo ()); +} + +unsigned long +f6 (void) +{ + return (unsigned) __builtin_clz (foo ()); +} + +unsigned long +f7 (void) +{ + return __builtin_clz (foo ()) & 63ULL; +} + +unsigned long +f8 (void) +{ + return __builtin_clz (foo ()) & 1023ULL; +}