From patchwork Wed May 20 00:22:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Cercueil X-Patchwork-Id: 1293905 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.infradead.org (client-ip=2607:7c80:54:e::133; helo=bombadil.infradead.org; envelope-from=linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=crapouillou.net Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=lists.infradead.org header.i=@lists.infradead.org header.a=rsa-sha256 header.s=bombadil.20170209 header.b=DIq0++1c; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=crapouillou.net header.i=@crapouillou.net header.a=rsa-sha256 header.s=mail header.b=pFXsq/qv; dkim-atps=neutral Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2607:7c80:54:e::133]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49RYPQ0vYDz9sTN for ; Wed, 20 May 2020 10:23:06 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:To :From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=EJfgbrBKNdC6OfQfGHiBQGrax4AeuUHZu74q/uyACpw=; b=DIq0++1cZk8LXr fFZoeBGhJN53K2xAlaZlJE8xSWjDYkimrOvPXLIcvqTwd34N50mRhHJvNGh7yU4lrxi8nGa1Jm4Q3 tyXXAPYuLxM6F1Y0dREHI79P7tjIaqr//PVYneD9IP6OA8Oe8NCZWrTW6ky7VGHafATYzJEKjF2QP 7IxrU4tohVb6T9nKXy3+hdWVf17jo5zZovVvfrz+bHNdY5ygm13wQDcyIVqtm3I0wft+SleYvZflM dlcl87aq4yHtK1sQiCt1EH77wnjKufoGpGl+ju8QGfKxDazRHLNrd38j8j6eRdUUb+OH6UBXH8H8G FECYBSFHOiNtP0P+V+hQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jbCVi-0003aL-CO; Wed, 20 May 2020 00:23:02 +0000 Received: from outils.crapouillou.net ([89.234.176.41] helo=crapouillou.net) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jbCVd-0003Xz-E5 for linux-mtd@lists.infradead.org; Wed, 20 May 2020 00:23:00 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crapouillou.net; s=mail; t=1589934174; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:references; bh=S4TMOQR23TFpFNf/Gdrrq65wyImfAOA6VASHODQN8A8=; b=pFXsq/qv/ySG1OgqJMAkj47v1iFVwABNrhzagp24huDrvQQD7/2MOGfDRL8kP21Pv7ixuC YqzHiUe9AvbE+hvbSjuBo8cgHvQYq2EZzDV+6T6G1QxIlG9TkztILSEs8uwYgQth4/w1fw 7Y33eInpQqi0G3I/Hzs0azYubnoc1rQ= From: Paul Cercueil To: Rob Herring Subject: [PATCH v2 1/3] dt-bindings: pinctrl: Convert ingenic, pinctrl.txt to YAML Date: Wed, 20 May 2020 02:22:32 +0200 Message-Id: <20200520002234.418025-1-paul@crapouillou.net> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200519_172257_846660_9F6F1A91 X-CRM114-Status: GOOD ( 13.61 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on bombadil.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Boris Brezillon , linux-kernel@vger.kernel.org, Paul Cercueil , linux-gpio@vger.kernel.org, od@zcrc.me, linux-mtd@lists.infradead.org Sender: "linux-mtd" Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org Convert the ingenic,pinctrl.txt doc file to ingenic,pinctrl.yaml. In the process, some compatible strings now require a fallback, as the corresponding SoCs are pin-compatible with their fallback variant. Signed-off-by: Paul Cercueil --- Notes: v2: - Use 'pinctrl' instead of 'pin-controller' as the node name - remove 'additionalProperties: false' since we will have pin conf nodes .../bindings/pinctrl/ingenic,pinctrl.txt | 81 ----------- .../bindings/pinctrl/ingenic,pinctrl.yaml | 136 ++++++++++++++++++ 2 files changed, 136 insertions(+), 81 deletions(-) delete mode 100644 Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.txt create mode 100644 Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.yaml diff --git a/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.txt deleted file mode 100644 index d9b2100c98e8..000000000000 --- a/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.txt +++ /dev/null @@ -1,81 +0,0 @@ -Ingenic XBurst pin controller - -Please refer to pinctrl-bindings.txt in this directory for details of the -common pinctrl bindings used by client devices, including the meaning of the -phrase "pin configuration node". - -For the XBurst SoCs, pin control is tightly bound with GPIO ports. All pins may -be used as GPIOs, multiplexed device functions are configured within the -GPIO port configuration registers and it is typical to refer to pins using the -naming scheme "PxN" where x is a character identifying the GPIO port with -which the pin is associated and N is an integer from 0 to 31 identifying the -pin within that GPIO port. For example PA0 is the first pin in GPIO port A, and -PB31 is the last pin in GPIO port B. The jz4740, the x1000 and the x1830 -contains 4 GPIO ports, PA to PD, for a total of 128 pins. The jz4760, the -jz4770 and the jz4780 contains 6 GPIO ports, PA to PF, for a total of 192 pins. - - -Required properties: --------------------- - - - compatible: One of: - - "ingenic,jz4740-pinctrl" - - "ingenic,jz4725b-pinctrl" - - "ingenic,jz4760-pinctrl" - - "ingenic,jz4760b-pinctrl" - - "ingenic,jz4770-pinctrl" - - "ingenic,jz4780-pinctrl" - - "ingenic,x1000-pinctrl" - - "ingenic,x1000e-pinctrl" - - "ingenic,x1500-pinctrl" - - "ingenic,x1830-pinctrl" - - reg: Address range of the pinctrl registers. - - -Required properties for sub-nodes (GPIO chips): ------------------------------------------------ - - - compatible: Must contain one of: - - "ingenic,jz4740-gpio" - - "ingenic,jz4760-gpio" - - "ingenic,jz4770-gpio" - - "ingenic,jz4780-gpio" - - "ingenic,x1000-gpio" - - "ingenic,x1830-gpio" - - reg: The GPIO bank number. - - interrupt-controller: Marks the device node as an interrupt controller. - - interrupts: Interrupt specifier for the controllers interrupt. - - #interrupt-cells: Should be 2. Refer to - ../interrupt-controller/interrupts.txt for more details. - - gpio-controller: Marks the device node as a GPIO controller. - - #gpio-cells: Should be 2. The first cell is the GPIO number and the second - cell specifies GPIO flags, as defined in . Only the - GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported. - - gpio-ranges: Range of pins managed by the GPIO controller. Refer to - ../gpio/gpio.txt for more details. - - -Example: --------- - -pinctrl: pin-controller@10010000 { - compatible = "ingenic,jz4740-pinctrl"; - reg = <0x10010000 0x400>; - #address-cells = <1>; - #size-cells = <0>; - - gpa: gpio@0 { - compatible = "ingenic,jz4740-gpio"; - reg = <0>; - - gpio-controller; - gpio-ranges = <&pinctrl 0 0 32>; - #gpio-cells = <2>; - - interrupt-controller; - #interrupt-cells = <2>; - - interrupt-parent = <&intc>; - interrupts = <28>; - }; -}; diff --git a/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.yaml new file mode 100644 index 000000000000..5be2b1e95b36 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/ingenic,pinctrl.yaml @@ -0,0 +1,136 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/ingenic,pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Ingenic SoCs pin controller devicetree bindings + +description: > + Please refer to pinctrl-bindings.txt in this directory for details of the + common pinctrl bindings used by client devices, including the meaning of the + phrase "pin configuration node". + + For the Ingenic SoCs, pin control is tightly bound with GPIO ports. All pins + may be used as GPIOs, multiplexed device functions are configured within the + GPIO port configuration registers and it is typical to refer to pins using the + naming scheme "PxN" where x is a character identifying the GPIO port with + which the pin is associated and N is an integer from 0 to 31 identifying the + pin within that GPIO port. For example PA0 is the first pin in GPIO port A, + and PB31 is the last pin in GPIO port B. The JZ4740, the X1000 and the X1830 + contains 4 GPIO ports, PA to PD, for a total of 128 pins. The JZ4760, the + JZ4770 and the JZ4780 contains 6 GPIO ports, PA to PF, for a total of 192 + pins. + +maintainers: + - Paul Cercueil + +properties: + nodename: + pattern: "^pinctrl@[0-9a-f]+$" + + compatible: + oneOf: + - enum: + - ingenic,jz4740-pinctrl + - ingenic,jz4725b-pinctrl + - ingenic,jz4760-pinctrl + - ingenic,jz4770-pinctrl + - ingenic,jz4780-pinctrl + - ingenic,x1000-pinctrl + - ingenic,x1500-pinctrl + - ingenic,x1830-pinctrl + - items: + - const: ingenic,jz4760b-pinctrl + - const: ingenic,jz4760-pinctrl + - items: + - const: ingenic,x1000e-pinctrl + - const: ingenic,x1000-pinctrl + + reg: + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + +patternProperties: + "^gpio@[0-9]$": + type: object + properties: + compatible: + enum: + - ingenic,jz4740-gpio + - ingenic,jz4725b-gpio + - ingenic,jz4760-gpio + - ingenic,jz4770-gpio + - ingenic,jz4780-gpio + - ingenic,x1000-gpio + - ingenic,x1500-gpio + - ingenic,x1830-gpio + + reg: + items: + - description: The GPIO bank number + + gpio-controller: true + + "#gpio-cells": + const: 2 + + gpio-ranges: + maxItems: 1 + + interrupt-controller: true + + "#interrupt-cells": + const: 2 + description: + Refer to ../interrupt-controller/interrupts.txt for more details. + + interrupts: + maxItems: 1 + + required: + - compatible + - reg + - gpio-controller + - "#gpio-cells" + - interrupts + - interrupt-controller + - "#interrupt-cells" + + additionalProperties: false + +required: + - compatible + - reg + - "#address-cells" + - "#size-cells" + +examples: + - | + pin-controller@10010000 { + compatible = "ingenic,jz4770-pinctrl"; + reg = <0x10010000 0x600>; + + #address-cells = <1>; + #size-cells = <0>; + + gpio@0 { + compatible = "ingenic,jz4770-gpio"; + reg = <0>; + + gpio-controller; + gpio-ranges = <&pinctrl 0 0 32>; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupt-parent = <&intc>; + interrupts = <17>; + }; + }; From patchwork Wed May 20 00:22:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Cercueil X-Patchwork-Id: 1293907 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.infradead.org (client-ip=2607:7c80:54:e::133; helo=bombadil.infradead.org; envelope-from=linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=crapouillou.net Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=lists.infradead.org header.i=@lists.infradead.org header.a=rsa-sha256 header.s=bombadil.20170209 header.b=lcJVq+Oo; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=crapouillou.net header.i=@crapouillou.net header.a=rsa-sha256 header.s=mail header.b=LkHAgOV2; dkim-atps=neutral Received: from bombadil.infradead.org (bombadil.infradead.org [IPv6:2607:7c80:54:e::133]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49RYPb3hrkz9sTM for ; Wed, 20 May 2020 10:23:15 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=UhMWzQAMsom/52rNZfm5f7IlWsJOrQpwvjfwI9Euseg=; b=lcJVq+OoFHPJqP l/k4W7mq1KizbCVdo7Xw+0ebBQyzf1TBvvTl+yqXAAMnvoMdbh9mdLXAVZPsQiVAdRdqHP+UHB9pL 2vWgbm1IzWeBblgrcRjN4kDa+4lIafF07EK9x4giezbyJ91fA/p65Hd0Ey858h50OKjztO3YeeTQZ 0yB1oCnDCNcX+oeC0lM5lY/A8sXWTGJEmTYPuKh2YMFYIT4Sr5fPxLT3pn03GlXCzwV4wFmYR6FQg sOi9aHHDd9Sqozg8L+zcipSr8YZ6MBLMzmaD7IiXg1hyiJjXD5B1wvJm0nG32L1QYislPF3dsQmaJ alBX6fvras0Xy+Cmmw6Q==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jbCVt-0003od-7c; Wed, 20 May 2020 00:23:13 +0000 Received: from outils.crapouillou.net ([89.234.176.41] helo=crapouillou.net) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jbCVn-0003fm-Ji for linux-mtd@lists.infradead.org; Wed, 20 May 2020 00:23:11 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crapouillou.net; s=mail; t=1589934175; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=GMx7lv+DuafqUFovOJSTconzAY08KKqmrXSIWvOA/qs=; b=LkHAgOV2Sel6NGZWS7aXsULgZo5z6ylN72iuA+9Tt5iO/EExdgfaDzVKCgf+FBRupGrMnk tNnCS/sfqHpP+SauEmofSmfTRw2FkRGkez5+Cjop2T0S28273m/aKPIYqAmQ9YddkuG30v Dn9CVVgmZtLt0RMGaTT0BNKwxeZVhd4= From: Paul Cercueil To: Rob Herring Subject: [PATCH v2 2/3] dt-bindings: memory: Convert ingenic, jz4780-nemc.txt to YAML Date: Wed, 20 May 2020 02:22:33 +0200 Message-Id: <20200520002234.418025-2-paul@crapouillou.net> In-Reply-To: <20200520002234.418025-1-paul@crapouillou.net> References: <20200520002234.418025-1-paul@crapouillou.net> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200519_172308_023708_DEE2885A X-CRM114-Status: GOOD ( 16.34 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on bombadil.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Boris Brezillon , linux-kernel@vger.kernel.org, Paul Cercueil , linux-gpio@vger.kernel.org, od@zcrc.me, linux-mtd@lists.infradead.org Sender: "linux-mtd" Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org Convert the ingenic,jz4780-nemc.txt doc file to ingenic,nemc.yaml. The ingenic,jz4725b-nemc compatible string was added in the process, with a fallback to ingenic,jz4740-nemc. Signed-off-by: Paul Cercueil --- Notes: v2: - Inline content of ingenic,nemc-client.yaml inside ingenic,nemc.yaml - Add missing 'reg' property to sub-nodes and mark it as required - Use a more generic wildcard to match all sub-nodes. .../ingenic,jz4780-nemc.txt | 76 ----------- .../memory-controllers/ingenic,nemc.yaml | 126 ++++++++++++++++++ 2 files changed, 126 insertions(+), 76 deletions(-) delete mode 100644 Documentation/devicetree/bindings/memory-controllers/ingenic,jz4780-nemc.txt create mode 100644 Documentation/devicetree/bindings/memory-controllers/ingenic,nemc.yaml diff --git a/Documentation/devicetree/bindings/memory-controllers/ingenic,jz4780-nemc.txt b/Documentation/devicetree/bindings/memory-controllers/ingenic,jz4780-nemc.txt deleted file mode 100644 index 59b8dcc118ee..000000000000 --- a/Documentation/devicetree/bindings/memory-controllers/ingenic,jz4780-nemc.txt +++ /dev/null @@ -1,76 +0,0 @@ -* Ingenic JZ4780 NAND/external memory controller (NEMC) - -This file documents the device tree bindings for the NEMC external memory -controller in Ingenic JZ4780 - -Required properties: -- compatible: Should be set to one of: - "ingenic,jz4740-nemc" (JZ4740) - "ingenic,jz4780-nemc" (JZ4780) -- reg: Should specify the NEMC controller registers location and length. -- clocks: Clock for the NEMC controller. -- #address-cells: Must be set to 2. -- #size-cells: Must be set to 1. -- ranges: A set of ranges for each bank describing the physical memory layout. - Each should specify the following 4 integer values: - - 0 - -Each child of the NEMC node describes a device connected to the NEMC. - -Required child node properties: -- reg: Should contain at least one register specifier, given in the following - format: - - - - Multiple registers can be specified across multiple banks. This is needed, - for example, for packaged NAND devices with multiple dies. Such devices - should be grouped into a single node. - -Optional child node properties: -- ingenic,nemc-bus-width: Specifies the bus width in bits. Defaults to 8 bits. -- ingenic,nemc-tAS: Address setup time in nanoseconds. -- ingenic,nemc-tAH: Address hold time in nanoseconds. -- ingenic,nemc-tBP: Burst pitch time in nanoseconds. -- ingenic,nemc-tAW: Access wait time in nanoseconds. -- ingenic,nemc-tSTRV: Static memory recovery time in nanoseconds. - -If a child node references multiple banks in its "reg" property, the same value -for all optional parameters will be configured for all banks. If any optional -parameters are omitted, they will be left unchanged from whatever they are -configured to when the NEMC device is probed (which may be the reset value as -given in the hardware reference manual, or a value configured by the boot -loader). - -Example (NEMC node with a NAND child device attached at CS1): - -nemc: nemc@13410000 { - compatible = "ingenic,jz4780-nemc"; - reg = <0x13410000 0x10000>; - - #address-cells = <2>; - #size-cells = <1>; - - ranges = <1 0 0x1b000000 0x1000000 - 2 0 0x1a000000 0x1000000 - 3 0 0x19000000 0x1000000 - 4 0 0x18000000 0x1000000 - 5 0 0x17000000 0x1000000 - 6 0 0x16000000 0x1000000>; - - clocks = <&cgu JZ4780_CLK_NEMC>; - - nand: nand@1 { - compatible = "ingenic,jz4780-nand"; - reg = <1 0 0x1000000>; - - ingenic,nemc-tAS = <10>; - ingenic,nemc-tAH = <5>; - ingenic,nemc-tBP = <10>; - ingenic,nemc-tAW = <15>; - ingenic,nemc-tSTRV = <100>; - - ... - }; -}; diff --git a/Documentation/devicetree/bindings/memory-controllers/ingenic,nemc.yaml b/Documentation/devicetree/bindings/memory-controllers/ingenic,nemc.yaml new file mode 100644 index 000000000000..9b478da0c479 --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/ingenic,nemc.yaml @@ -0,0 +1,126 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/memory-controllers/ingenic,nemc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Ingenic SoCs NAND / External Memory Controller (NEMC) devicetree bindings + +maintainers: + - Paul Cercueil + +properties: + $nodename: + pattern: "^memory-controller@[0-9a-f]+$" + + compatible: + oneOf: + - enum: + - ingenic,jz4740-nemc + - ingenic,jz4780-nemc + - items: + - const: ingenic,jz4725b-nemc + - const: ingenic,jz4740-nemc + + "#address-cells": + const: 2 + + "#size-cells": + const: 1 + + ranges: true + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + +patternProperties: + ".*@[0-9]+$": + type: object + properties: + reg: + minItems: 1 + maxItems: 255 + + ingenic,nemc-bus-width: + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [8, 16] + description: Specifies the bus width in bits. + + ingenic,nemc-tAS: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Address setup time in nanoseconds. + + ingenic,nemc-tAH: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Address hold time in nanoseconds. + + ingenic,nemc-tBP: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Burst pitch time in nanoseconds. + + ingenic,nemc-tAW: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Address wait time in nanoseconds. + + ingenic,nemc-tSTRV: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Static memory recovery time in nanoseconds. + + required: + - reg + +required: + - compatible + - "#address-cells" + - "#size-cells" + - ranges + - reg + - clocks + +additionalProperties: false + +examples: + - | + #include + #include + nemc: memory-controller@13410000 { + compatible = "ingenic,jz4780-nemc"; + reg = <0x13410000 0x10000>; + #address-cells = <2>; + #size-cells = <1>; + ranges = <1 0 0x1b000000 0x1000000>, + <2 0 0x1a000000 0x1000000>, + <3 0 0x19000000 0x1000000>, + <4 0 0x18000000 0x1000000>, + <5 0 0x17000000 0x1000000>, + <6 0 0x16000000 0x1000000>; + + clocks = <&cgu JZ4780_CLK_NEMC>; + + ethernet@6 { + compatible = "davicom,dm9000"; + davicom,no-eeprom; + + pinctrl-names = "default"; + pinctrl-0 = <&pins_nemc_cs6>; + + reg = <6 0 1>, /* addr */ + <6 2 1>; /* data */ + + ingenic,nemc-tAS = <15>; + ingenic,nemc-tAH = <10>; + ingenic,nemc-tBP = <20>; + ingenic,nemc-tAW = <50>; + ingenic,nemc-tSTRV = <100>; + + reset-gpios = <&gpf 12 GPIO_ACTIVE_HIGH>; + vcc-supply = <ð0_power>; + + interrupt-parent = <&gpe>; + interrupts = <19 4>; + }; + }; From patchwork Wed May 20 00:22:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Cercueil X-Patchwork-Id: 1293909 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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Wed, 20 May 2020 00:23:29 +0000 Received: from outils.crapouillou.net ([89.234.176.41] helo=crapouillou.net) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jbCVy-0003wQ-5q for linux-mtd@lists.infradead.org; Wed, 20 May 2020 00:23:21 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crapouillou.net; s=mail; t=1589934176; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=DMwhxCTrOVmrSTXxb5KXzDhIxLNNT9TsjN6HRPoQ70k=; b=DeiYN9aUR/53mNrba2+DaSI2rGqVECDvpnlmtn13GZImNkkYwEahJYSzuRa5FLr6yCSB93 VHLCqro+WkV1FSRp4Zv3zJBaKGDLbZXNhEIHzTjy96NTWTBylWyyrff7kRDxtJIBg4PzRU diZF3HB9XvBU9PT000d0IK4gx02Gd3w= From: Paul Cercueil To: Rob Herring Subject: [PATCH v2 3/3] dt-bindings: mtd: Convert ingenic, jz4780-nand.txt to YAML Date: Wed, 20 May 2020 02:22:34 +0200 Message-Id: <20200520002234.418025-3-paul@crapouillou.net> In-Reply-To: <20200520002234.418025-1-paul@crapouillou.net> References: <20200520002234.418025-1-paul@crapouillou.net> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200519_172318_597842_C7F3D77A X-CRM114-Status: GOOD ( 13.80 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.4 on bombadil.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Boris Brezillon , linux-kernel@vger.kernel.org, Paul Cercueil , linux-gpio@vger.kernel.org, od@zcrc.me, linux-mtd@lists.infradead.org Sender: "linux-mtd" Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org Convert the ingenic,jz4780-nand.txt doc file to ingenic,nand.yaml. Signed-off-by: Paul Cercueil --- Notes: v2: - Don't include ingenic,nemc-client.yaml which is gone - Use 'partitions' property instead of '^partitions$' pattern .../bindings/mtd/ingenic,jz4780-nand.txt | 92 ------------ .../devicetree/bindings/mtd/ingenic,nand.yaml | 132 ++++++++++++++++++ 2 files changed, 132 insertions(+), 92 deletions(-) delete mode 100644 Documentation/devicetree/bindings/mtd/ingenic,jz4780-nand.txt create mode 100644 Documentation/devicetree/bindings/mtd/ingenic,nand.yaml diff --git a/Documentation/devicetree/bindings/mtd/ingenic,jz4780-nand.txt b/Documentation/devicetree/bindings/mtd/ingenic,jz4780-nand.txt deleted file mode 100644 index c02259353327..000000000000 --- a/Documentation/devicetree/bindings/mtd/ingenic,jz4780-nand.txt +++ /dev/null @@ -1,92 +0,0 @@ -* Ingenic JZ4780 NAND/ECC - -This file documents the device tree bindings for NAND flash devices on the -JZ4780. NAND devices are connected to the NEMC controller (described in -memory-controllers/ingenic,jz4780-nemc.txt), and thus NAND device nodes must -be children of the NEMC node. - -Required NAND controller device properties: -- compatible: Should be one of: - * ingenic,jz4740-nand - * ingenic,jz4725b-nand - * ingenic,jz4780-nand -- reg: For each bank with a NAND chip attached, should specify a bank number, - an offset of 0 and a size of 0x1000000 (i.e. the whole NEMC bank). - -Optional NAND controller device properties: -- ecc-engine: To make use of the hardware ECC controller, this - property must contain a phandle for the ECC controller node. The required - properties for this node are described below. If this is not specified, - software ECC will be used instead. - -Optional children nodes: -- Individual NAND chips are children of the NAND controller node. - -Required children node properties: -- reg: An integer ranging from 1 to 6 representing the CS line to use. - -Optional children node properties: -- nand-ecc-step-size: ECC block size in bytes. -- nand-ecc-strength: ECC strength (max number of correctable bits). -- nand-ecc-mode: String, operation mode of the NAND ecc mode. "hw" by default -- nand-on-flash-bbt: boolean to enable on flash bbt option, if not present false -- rb-gpios: GPIO specifier for the busy pin. -- wp-gpios: GPIO specifier for the write protect pin. - -Optional child node of NAND chip nodes: -- partitions: see Documentation/devicetree/bindings/mtd/partition.txt - -Example: - -nemc: nemc@13410000 { - ... - - nandc: nand-controller@1 { - compatible = "ingenic,jz4780-nand"; - reg = <1 0 0x1000000>; /* Bank 1 */ - - #address-cells = <1>; - #size-cells = <0>; - - ecc-engine = <&bch>; - - nand@1 { - reg = <1>; - - nand-ecc-step-size = <1024>; - nand-ecc-strength = <24>; - nand-ecc-mode = "hw"; - nand-on-flash-bbt; - - rb-gpios = <&gpa 20 GPIO_ACTIVE_LOW>; - wp-gpios = <&gpf 22 GPIO_ACTIVE_LOW>; - - partitions { - #address-cells = <2>; - #size-cells = <2>; - ... - } - }; - }; -}; - -The ECC controller is a separate SoC component used for error correction on -NAND devices. The following is a description of the device properties for a -ECC controller. - -Required ECC properties: -- compatible: Should be one of: - * ingenic,jz4740-ecc - * ingenic,jz4725b-bch - * ingenic,jz4780-bch -- reg: Should specify the ECC controller registers location and length. -- clocks: Clock for the ECC controller. - -Example: - -bch: bch@134d0000 { - compatible = "ingenic,jz4780-bch"; - reg = <0x134d0000 0x10000>; - - clocks = <&cgu JZ4780_CLK_BCH>; -}; diff --git a/Documentation/devicetree/bindings/mtd/ingenic,nand.yaml b/Documentation/devicetree/bindings/mtd/ingenic,nand.yaml new file mode 100644 index 000000000000..8abb6d463cb6 --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/ingenic,nand.yaml @@ -0,0 +1,132 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mtd/ingenic,nand.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Ingenic SoCs NAND controller devicetree bindings + +maintainers: + - Paul Cercueil + +allOf: + - $ref: nand-controller.yaml# + +properties: + compatible: + enum: + - ingenic,jz4740-nand + - ingenic,jz4725b-nand + - ingenic,jz4780-nand + + reg: + items: + - description: Bank number, offset and size of first attached NAND chip + - description: Bank number, offset and size of second attached NAND chip + - description: Bank number, offset and size of third attached NAND chip + - description: Bank number, offset and size of fourth attached NAND chip + minItems: 1 + + ecc-engine: true + + partitions: + type: object + description: + Node containing description of fixed partitions. + See Documentation/devicetree/bindings/mtd/partition.txt + +patternProperties: + "^nand@[a-f0-9]$": + type: object + properties: + rb-gpios: + description: GPIO specifier for the busy pin. + maxItems: 1 + + wp-gpios: + description: GPIO specifier for the write-protect pin. + maxItems: 1 + +required: + - compatible + - reg + +examples: + - | + #include + memory-controller@13410000 { + compatible = "ingenic,jz4780-nemc"; + reg = <0x13410000 0x10000>; + #address-cells = <2>; + #size-cells = <1>; + ranges = <1 0 0x1b000000 0x1000000>, + <2 0 0x1a000000 0x1000000>, + <3 0 0x19000000 0x1000000>, + <4 0 0x18000000 0x1000000>, + <5 0 0x17000000 0x1000000>, + <6 0 0x16000000 0x1000000>; + + clocks = <&cgu JZ4780_CLK_NEMC>; + + nand-controller@1 { + compatible = "ingenic,jz4780-nand"; + reg = <1 0 0x1000000>; + + #address-cells = <1>; + #size-cells = <0>; + + ecc-engine = <&bch>; + + ingenic,nemc-tAS = <10>; + ingenic,nemc-tAH = <5>; + ingenic,nemc-tBP = <10>; + ingenic,nemc-tAW = <15>; + ingenic,nemc-tSTRV = <100>; + + pinctrl-names = "default"; + pinctrl-0 = <&pins_nemc>; + + nand@1 { + reg = <1>; + + nand-ecc-step-size = <1024>; + nand-ecc-strength = <24>; + nand-ecc-mode = "hw"; + nand-on-flash-bbt; + + pinctrl-names = "default"; + pinctrl-0 = <&pins_nemc_cs1>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <2>; + #size-cells = <2>; + + partition@0 { + label = "u-boot-spl"; + reg = <0x0 0x0 0x0 0x800000>; + }; + + partition@800000 { + label = "u-boot"; + reg = <0x0 0x800000 0x0 0x200000>; + }; + + partition@a00000 { + label = "u-boot-env"; + reg = <0x0 0xa00000 0x0 0x200000>; + }; + + partition@c00000 { + label = "boot"; + reg = <0x0 0xc00000 0x0 0x4000000>; + }; + + partition@4c00000 { + label = "system"; + reg = <0x0 0x4c00000 0x1 0xfb400000>; + }; + }; + }; + }; + };