From patchwork Tue May 5 14:03:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peng Fan X-Patchwork-Id: 1283612 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=nxp.com header.i=@nxp.com header.a=rsa-sha256 header.s=selector2 header.b=IuvxeQLJ; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49GgqY0fgjz9sP7 for ; Tue, 5 May 2020 23:41:28 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 511FF81E50; Tue, 5 May 2020 15:41:16 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=nxp.com header.i=@nxp.com header.b="IuvxeQLJ"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 5DD1881A25; Tue, 5 May 2020 15:41:13 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FORGED_SPF_HELO,MSGID_FROM_MTA_HEADER, SPF_HELO_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.2 Received: from EUR04-HE1-obe.outbound.protection.outlook.com (mail-he1eur04on0610.outbound.protection.outlook.com [IPv6:2a01:111:f400:fe0d::610]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id EF79E80825 for ; Tue, 5 May 2020 15:41:09 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=peng.fan@nxp.com ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=FJlEL+Fp9r2CEv9mwTss6FCrfFewdLCflPxxG9OfDqsaSJvW60A3mswyo984iQ0vsVU8QrxcfUdBjFG1bzQ/Gi2VzskKa9Kp/mVk+6TyDlhb60N5x2VjNzStFOmOr9tI+gyoAggx/jdm9onJr0hNIUYEiCrwHKcOLAztbzCiVbl97oFznM7C6V0a+aaJ9KlPPh5heXwW6vGdY0epAL9CR3DB88id06OUdXwZT1SeYC+2wcmwfdZ4zneFpuv3FkzCl6X7T4Nc06jVPOyoa5lPpt034C9haJQabDystzJ3Xj6WP9pSAr+WYfiSwIQxKNApjGp7maEvvj8dBVhKfLHRXg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=/VPF3yErhn4+2MzeQsRghsqvvd9PNE5LKjNux4KGg6A=; b=BQJsdWEQMmlXpVLtxce3NF3IAGxTdDXhMm2HOpsg+slb6L/SEoAVkrQMstU164uDmOjVKj9797QEhIgb6VFQkz1VDEMQ8x9dEDtFiw7Ao3bHzhb/BO17yEh3b2J7Moss82+hCjCC1nPJHigMYJ4vILSHeUfkp0ssnRVGEdZTIVjca7RYvujUvNnF42SGzFBWinGIF0NyLA+0vtANNfSDDE4CdCp8k/NxvU61GAZzqMg6R2Vlm50ZLMMl6jo66F/+mST2A1ag6VRKhHaQAeCHbxLLJKE5C+PPUTM8W955ENHO0mL0HpTMcmwyzJA4K97sebFz7lRSLxR4ib+4B5Tr4Q== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nxp.com; dmarc=pass action=none header.from=nxp.com; dkim=pass header.d=nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=/VPF3yErhn4+2MzeQsRghsqvvd9PNE5LKjNux4KGg6A=; b=IuvxeQLJ22FCPT5+E7b3Co6hWNt2r91Up9+/2mDnmYxYF3twwEugzkAF6FNTYk174BWPuCwBqRz98ZKnBQ+qbUZHQ2BI4KmUZFT36/gIPHP/nKFMi4r/Ql9NWwD9FUrqF7euIjr/Kam13bX/zO35eQHYeaJgcKkegHLjmI41McM= Authentication-Results: denx.de; dkim=none (message not signed) header.d=none;denx.de; dmarc=none action=none header.from=nxp.com; Received: from DB6PR0402MB2760.eurprd04.prod.outlook.com (2603:10a6:4:a1::14) by DB6PR0402MB2759.eurprd04.prod.outlook.com (2603:10a6:4:a2::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2958.27; Tue, 5 May 2020 13:41:07 +0000 Received: from DB6PR0402MB2760.eurprd04.prod.outlook.com ([fe80::d17b:d767:19c3:b871]) by DB6PR0402MB2760.eurprd04.prod.outlook.com ([fe80::d17b:d767:19c3:b871%6]) with mapi id 15.20.2958.030; Tue, 5 May 2020 13:41:07 +0000 From: Peng Fan To: sbabic@denx.de, festevam@gmail.com, han.xu@nxp.com Cc: uboot-imx@nxp.com, u-boot@lists.denx.de, jagan@amarulasolutions.com, Peng Fan Subject: [PATCH 1/6] nandbcb: fix the issue cannot support gf_14 NAND boot Date: Tue, 5 May 2020 22:03:59 +0800 Message-Id: <20200505140404.27407-2-peng.fan@nxp.com> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20200505140404.27407-1-peng.fan@nxp.com> References: <20200505140404.27407-1-peng.fan@nxp.com> X-ClientProxiedBy: SGAP274CA0024.SGPP274.PROD.OUTLOOK.COM (2603:1096:4:b6::36) To DB6PR0402MB2760.eurprd04.prod.outlook.com (2603:10a6:4:a1::14) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from linux-1xn6.ap.freescale.net (119.31.174.71) by SGAP274CA0024.SGPP274.PROD.OUTLOOK.COM (2603:1096:4:b6::36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2958.21 via Frontend Transport; Tue, 5 May 2020 13:41:04 +0000 X-Mailer: git-send-email 2.16.4 X-Originating-IP: [119.31.174.71] X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: 8b4d48d3-896d-4197-2c71-08d7f0f9f646 X-MS-TrafficTypeDiagnostic: DB6PR0402MB2759:|DB6PR0402MB2759: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:5516; X-Forefront-PRVS: 0394259C80 X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: qn98QKy8RcfVWHwW/T0Zq/3CLj5r+CpxRWY7sgkdSE4cmP6KZ8jOM73rHorTnSUidK5JaWJtgOPTbszVRXggsVpmK62GhKzJMrKinNZ+r4luR28apVsoE9IYuXoFp4sl9pCGxtg1nl3+88XQbo5DqbvF0oSBj+iUEArWqfTGm6JwGmUaFuXB8I6WtolD4aV/AlBoxV16qWId2ftQo6ZkFCiC0sDbgwTWG9qhFKfX0j4PHtbaRiqqVRfvJcbDjb3q4jubnTL3CJaSM8ikTYb79v6MwE3k5IQCmcHPd3l0e163rBd3jVUFFlQC8UxsRuysE4svAbWuiynf6oiUJvy1ZMJKbtp2J28mfUv7sdOyL5E6oReJok8KBbpH4U+4wNq4cNLBaBIbXX2FZWo1M4giGbUCWqLCEtYf9f9qpNXYH59TKr2DrhIp3r9xJ4gcxzGdDGZ2kWegeM+lkZUrPbrF0mRnzJM1fZFcUCUCnsoreZbNalb+/9/7DQ0HUq/5Ii2ydfFam9o3d056ZdoMNLSD2A== X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:DB6PR0402MB2760.eurprd04.prod.outlook.com; PTR:; CAT:NONE; SFTY:; SFS:(4636009)(366004)(33430700001)(86362001)(6506007)(52116002)(6486002)(4326008)(4744005)(498600001)(2906002)(36756003)(6636002)(6512007)(1076003)(5660300002)(44832011)(8676002)(26005)(186003)(956004)(2616005)(66946007)(66476007)(33440700001)(66556008)(8936002)(6666004)(16526019); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData: BdxQA92Cqvl0bAvbdiysCoHeFghfOB0ZcJlixAB/S7kYsSgn6J2mS8Jo2Ehvg1E42RB0SuiX0L2D624t6Gmwjn1VHCuzr6Yhbj64Xt63raqubk/mcPIWllX9uWvU3fdX4ca4SXbWHU5/3LGVh2KdiNGR0wGknzMduv3R4SDPuTdwoV/lt2lWVQuBpKKqwlUolCCskojsJf2zaxFwyccQhEwpizpOI6J9FzlJN0ixw90CfKIsEYDZOrt1o1jfN7dMpIKhtj7nQ/TSC3C4TGmC17un3JYharg5b4l6wNp+nPnVCXNjmQzNzk33xooaSXq1OUjzzuTXO3IFemRGdeWIkzj+GThVj2vYbwqJmkqQBbDRiBDE3Y8pWcMQE0VwZLUws5BImiM2VJYGg2OUm035lRnaP0PraktwaFbVBzpgOoTNT/zsiBEKpdVHE74hZQ2yhfxR4rwn5x5+PRxDI1/7WPYQh+3ilHfMIpI9DRnKlQIbuDoVu6J7/w/520fby5jUkX/Jaf6RSFYw35ti/6q/5dqKoXGgd6ClE3SqVQeF6ZedCfIHFQrlxSOhrs3uPsNhDYiojy5eDSTYMH/v78NDU3B6pxg/FPLXgGy52gPDrHKUO+AGTBvg3zNZAJoc2EYDH8QOYRj1PR68IT2/dge2pRfG5Jx1Ch2erebBw31rBvQg5Ff2lFEL3QsswIvRRtb4R8DeCIjzEyoV6Xr2+JyRoA9803n6VinuCjmdWwZJxmKG09UWehvz6jd+xLI9aeBRJzo4n8CklFPyoeyKS6oLsgNz0PeMZKNfDLHzT/dBmn8= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 8b4d48d3-896d-4197-2c71-08d7f0f9f646 X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 May 2020 13:41:06.9369 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 6QQAkFPvMVtrVfpMg4qkrvmKXbntfxG65NO2/j58PwbxKg/KB7Ir/FcxtAjol+Qb/Y542S8BFXBtnEsrG3tnAg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB6PR0402MB2759 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de X-Virus-Status: Clean From: Han Xu bchtype in FCB should be associated to the gf_13/14 settings in BCH, fix the issue and test on Micron 29F64G08CBABB, it can boot after the change. Signed-off-by: Han Xu Signed-off-by: Peng Fan --- arch/arm/mach-imx/cmd_nandbcb.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mach-imx/cmd_nandbcb.c b/arch/arm/mach-imx/cmd_nandbcb.c index b3e59b1b00..103c3d6a08 100644 --- a/arch/arm/mach-imx/cmd_nandbcb.c +++ b/arch/arm/mach-imx/cmd_nandbcb.c @@ -154,6 +154,7 @@ static void fill_fcb(struct fcb_block *fcb, struct mtd_info *mtd, fcb->ecc_level = l.ecc0; fcb->ecc_size = l.datan_size; fcb->ecc_type = l.eccn; + fcb->bchtype = l.gf_len; /* Also hardcoded in kobs-ng */ if (is_mx6()) { From patchwork Tue May 5 14:04:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peng Fan X-Patchwork-Id: 1283613 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=nxp.com header.i=@nxp.com header.a=rsa-sha256 header.s=selector2 header.b=hJBVDKhy; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49Ggqm53zrz9sSs for ; Tue, 5 May 2020 23:41:40 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id C7A9982073; Tue, 5 May 2020 15:41:19 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=nxp.com header.i=@nxp.com header.b="hJBVDKhy"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 80A3681F20; Tue, 5 May 2020 15:41:16 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FORGED_SPF_HELO,MSGID_FROM_MTA_HEADER, SPF_HELO_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.2 Received: from EUR04-HE1-obe.outbound.protection.outlook.com (mail-he1eur04on0610.outbound.protection.outlook.com [IPv6:2a01:111:f400:fe0d::610]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id ED29F81002 for ; Tue, 5 May 2020 15:41:10 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=peng.fan@nxp.com ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=lYeXa0HaWzsxmNBW609iJVzNPkFsp3aIejfYJyiIOuLFBtL2GupznYVGUoRHRFLUpNB/1gTyeeZkFGkwB5Vh+qTbUnQHne7/2N1F7NFP2wvxxea61p5oEw1AgNY0uaBKMa8MejmJi5UBys8OllZrzRTqdf8OqGpZSvNhP4TdZaSTJxd01awzmpTeqAB3waLklmdwxZQB3B8DOublERUsyTiMoPf5W5TVwWKJo31Ga+uO7oFTbmJK3cs07B7qRtpStFkLdujWD5EVpmlIBexjSEZAhegVt6cgDav3zsko85ktbLEEWHoClEJKeqITK+wnZJMqQrqQmUnJPT5FcClejg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=HdEo5A+9vCmWtBzPOPUjgAUJ/yoSL+HguByrS/bVnqA=; b=c+rhtgHZfMbdWMNBwWhpvnSJuAsS1lAdabr6DySIMEkVuJDsCs9DGy5phkb/SXswlhW3mIb763YBADp7iXjFQOX0txnO06A1WDlO+P53OhHw5sZqhDTdW8Y1vAbTL7W9Xm2pob6i3t1QaYCbNAouZSbeBZaZ79j/Qj5q3g/q6t5ycBImDSfX4O5Cl6c3CwGzx2TKZ1ughAyko0+fRvKqeIDcWsaJSBvnp8FpEs0hyxDJGn5h3+4CpPBIdq2In9TvdjV5JzRRKJ90baOO5hWdRUVB9TlWxyrhqHCmbcZN4ynNghyH6JoV6MRZlsFmO0JF6Q54OouGzWlMiRVwUEh8Kw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nxp.com; dmarc=pass action=none header.from=nxp.com; dkim=pass header.d=nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=HdEo5A+9vCmWtBzPOPUjgAUJ/yoSL+HguByrS/bVnqA=; b=hJBVDKhyxGXm+fGxM20rVREk04QFr+TWzBWGwbXQ8h8yLT9krIrBNJ3BP+rJAcujfUOiRXV7tUnzBot3lVF057z+SzOzkqgl71gIYjJ2yH32LMFrBwI5FmlTiBK48iKrWjXw7wWS+KZdEznb77VXYDze6h2i00BOzabO5PFwPSg= Authentication-Results: denx.de; dkim=none (message not signed) header.d=none;denx.de; dmarc=none action=none header.from=nxp.com; Received: from DB6PR0402MB2760.eurprd04.prod.outlook.com (2603:10a6:4:a1::14) by DB6PR0402MB2759.eurprd04.prod.outlook.com (2603:10a6:4:a2::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2958.27; Tue, 5 May 2020 13:41:10 +0000 Received: from DB6PR0402MB2760.eurprd04.prod.outlook.com ([fe80::d17b:d767:19c3:b871]) by DB6PR0402MB2760.eurprd04.prod.outlook.com ([fe80::d17b:d767:19c3:b871%6]) with mapi id 15.20.2958.030; Tue, 5 May 2020 13:41:10 +0000 From: Peng Fan To: sbabic@denx.de, festevam@gmail.com, han.xu@nxp.com Cc: uboot-imx@nxp.com, u-boot@lists.denx.de, jagan@amarulasolutions.com, Alice Guo , Peng Fan Subject: [PATCH 2/6] nandbcb: support i.MX8M Date: Tue, 5 May 2020 22:04:00 +0800 Message-Id: <20200505140404.27407-3-peng.fan@nxp.com> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20200505140404.27407-1-peng.fan@nxp.com> References: <20200505140404.27407-1-peng.fan@nxp.com> X-ClientProxiedBy: SGAP274CA0024.SGPP274.PROD.OUTLOOK.COM (2603:1096:4:b6::36) To DB6PR0402MB2760.eurprd04.prod.outlook.com (2603:10a6:4:a1::14) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from linux-1xn6.ap.freescale.net (119.31.174.71) by SGAP274CA0024.SGPP274.PROD.OUTLOOK.COM (2603:1096:4:b6::36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2958.21 via Frontend Transport; Tue, 5 May 2020 13:41:07 +0000 X-Mailer: git-send-email 2.16.4 X-Originating-IP: [119.31.174.71] X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: 22773708-4688-4d7b-7c5d-08d7f0f9f830 X-MS-TrafficTypeDiagnostic: DB6PR0402MB2759:|DB6PR0402MB2759: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:71; X-Forefront-PRVS: 0394259C80 X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: dyGbQd9W9Nr/sLS2P+Tjnigo3Q34lF70qkQA9moj57tDZLbDW7V/QGmqP2XTLY1slbDoq/2K6ngiF7gi7DfMyxNtAMEAX4iyeae6orT0lWmiLIQIwf4ATSUoaMy8wdG7d6h44I6bI3F/5Gavo1Eb4CanKU2nCrjqRdx2eAAjiY3uW1dC4nEdsZQ6I2hMcrBzh0Z6tuozOCTUjyn9Lh0rjH56l0v5bbkY1h0bB4kKBSuXtoBjYPIOXpY3chjexvX6pc7PzfopeWDXUOWoAev1PIUxxK+RI7+gA67kRitcUT4hpNl5qxFW+bImn6qINxJ0heASoCsAY8QzsYA3xvyioa2yPahu34qc5kKiGxUDjVARKoMCNc1M8+b00DLSyoaX+TaFn5siTOOevs2YXdJKh/KlI6xJNbdxYE9b1v8DgobkBGPWrYAbCrB4ZnFBCAxChSv3kgOFg86JsZq2A7yLtLI7d9iF/XgDCUdVwqkmBsRakJ9JsV4t+RhNARO/elWOaKUDcMLtMe3xj3awob9cDQ== X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:DB6PR0402MB2760.eurprd04.prod.outlook.com; PTR:; CAT:NONE; SFTY:; SFS:(4636009)(366004)(33430700001)(86362001)(6506007)(52116002)(6486002)(4326008)(498600001)(2906002)(36756003)(6636002)(6512007)(1076003)(5660300002)(44832011)(8676002)(26005)(186003)(956004)(2616005)(66946007)(66476007)(54906003)(33440700001)(66556008)(8936002)(6666004)(16526019); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData: sUn5cFCousvfxLtyrx3RqF5OS4OTBouZl4p/Y0lo5itV5O67gk2slCM3Ocuu9pFoaTexpLy1Z1REW1eTklcC3JXYZdO8XuC1q+6uKoOwlnQmqY0Tksq2OLXA9XNau3zR2kUN06xzmpSL8UuvexZYuPWpjAlOmnrGWHSfKDVhKE8A7x6/762xzseLWW7mJwFI9GwGWVL3DdW3QbPiMdeZg4WrNIJ5P6tlBU7lrVD2zBXxU6xGHj73iDYnqid/o7q4+GpjcjuTtqESs8j/k9GSGxGVkP5UabsTxf5SvNmZtBYiK6CHxM6fsFl7g0D9sYr+efa5s4LXs2/ckI2A17ka++1I1ZXK+SzSw4NwtcfbY1S3kdfaEO/PBN7nBRaZG+nyLnk3j6TJnBpykoi4yQdof+TKqOHsIYlzzVRgcK1Kg5q5bDV8rcOGlrT52Dhvda7R9XSvfVoGt1+K9DQaFw7eOFmX6fRreSNPRbdP7lAmg+cUVnQJbZO+VWh/uE9y7lpZqLHRIQXv8/ETvniPao/gGCId8femFg+IbcfwsJe7zkFT37wte9WcP+BkBU11G7yxQKOYzyTQ5gSSn+DIB+S0KKx1wStU+myckQ05lJXpNJHZtYgY3JilNR01Xk3rmObkGCc74JZmfv7mtm32fPJrKMlqwivOYnTK3hLv69pJpd7PFAdiQHn+yTfy/nXGiXYWnlhCjgFQsUiDh8pO65JK9jbUaVXFYmKDsMbiyf/i1Lakb9uu4OIoee4QiJ8GmzqhuT7kfD6zjDLD6XhU4rmkBiMew4nbTANWAraJMM978bE= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 22773708-4688-4d7b-7c5d-08d7f0f9f830 X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 May 2020 13:41:10.0023 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: a5cVxDYEGLCTMca4jj4nCI6/7+a7MwU7fdWPGU0qD41q7hMcsfQSd8M4IX+vZOjhyyM/z8AqCXum3ZyLDSqfww== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB6PR0402MB2759 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de X-Virus-Status: Clean From: Alice Guo Tested on i.MX8MM EVK, imx8mm evk uses BCH encoding and randomizer modify macro and print size_t with %zx use CONFIG_IMX8M because it should apply to imx8mq/mm/mn Signed-off-by: Alice Guo Signed-off-by: Peng Fan --- arch/arm/mach-imx/Kconfig | 2 +- arch/arm/mach-imx/cmd_nandbcb.c | 88 +++++++++++++++++++++++++++++++---------- 2 files changed, 68 insertions(+), 22 deletions(-) diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 2b97208445..6c3fedf665 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -89,7 +89,7 @@ config CMD_NANDBCB bool "i.MX6 NAND Boot Control Block(BCB) command" depends on MTD_RAW_NAND && CMD_MTDPARTS select BCH if MX6UL || MX6ULL - default y if (ARCH_MX6 && NAND_MXS) || (ARCH_MX7 && NAND_MXS) + default y if ((ARCH_MX6 || ARCH_MX7 || ARCH_IMX8M) && NAND_MXS) help Unlike normal 'nand write/erase' commands, this command update Boot Control Block(BCB) for i.MX6 platform NAND IP's. diff --git a/arch/arm/mach-imx/cmd_nandbcb.c b/arch/arm/mach-imx/cmd_nandbcb.c index 103c3d6a08..682f5064e6 100644 --- a/arch/arm/mach-imx/cmd_nandbcb.c +++ b/arch/arm/mach-imx/cmd_nandbcb.c @@ -30,6 +30,8 @@ #define BF_VAL(v, bf) (((v) & bf##_MASK) >> bf##_OFFSET) #define GETBIT(v, n) (((v) >> (n)) & 0x1) +#define IMX8MQ_SPL_SZ 0x3e000 +#define IMX8MQ_HDMI_FW_SZ 0x19c00 #if defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL) static uint8_t reverse_bit(uint8_t b) @@ -157,7 +159,7 @@ static void fill_fcb(struct fcb_block *fcb, struct mtd_info *mtd, fcb->bchtype = l.gf_len; /* Also hardcoded in kobs-ng */ - if (is_mx6()) { + if (is_mx6() || is_imx8m()) { fcb->datasetup = 80; fcb->datahold = 60; fcb->addr_setup = 25; @@ -260,11 +262,11 @@ static int write_fcb_dbbt(struct mtd_info *mtd, struct fcb_block *fcb, /* * User BCH ECC hardware module for i.MX7 */ - if (is_mx7()) { + if (is_mx7() || is_imx8m()) { u32 off = i * mtd->erasesize; size_t rwsize = sizeof(*fcb); - printf("Writing %d bytes to 0x%x: ", rwsize, off); + printf("Writing %zd bytes to 0x%x: ", rwsize, off); /* switch nand BCH to FCB compatible settings */ mxs_nand_mode_fcb(mtd); @@ -287,7 +289,7 @@ static int write_fcb_dbbt(struct mtd_info *mtd, struct fcb_block *fcb, ret = mtd_write_oob(mtd, mtd->erasesize * i, &ops); if (ret) goto fcb_raw_page_err; - debug("NAND fcb write: 0x%x offset 0x%x written: %s\n", + debug("NAND fcb write: 0x%x offset 0x%zx written: %s\n", mtd->erasesize * i, ops.len, ret ? "ERROR" : "OK"); } @@ -296,7 +298,7 @@ static int write_fcb_dbbt(struct mtd_info *mtd, struct fcb_block *fcb, mtd->writesize, &dummy, (void *)dbbt); if (ret) goto fcb_raw_page_err; - debug("NAND dbbt write: 0x%x offset, 0x%x bytes written: %s\n", + debug("NAND dbbt write: 0x%x offset, 0x%zx bytes written: %s\n", mtd->erasesize * i + mtd->writesize, dummy, ret ? "ERROR" : "OK"); @@ -330,6 +332,9 @@ static int nandbcb_update(struct mtd_info *mtd, loff_t off, size_t size, int nr_blks, nr_blks_fcb, fw1_blk; size_t fwsize; int ret; + size_t extra_fwsize; + void *extra_fwbuf; + loff_t extra_fw1_off; /* erase */ memset(&opts, 0, sizeof(opts)); @@ -366,23 +371,62 @@ static int nandbcb_update(struct mtd_info *mtd, loff_t off, size_t size, fw1_blk = nr_blks_fcb; /* write fw */ - fwsize = ALIGN(size + FLASH_OFFSET_STANDARD + mtd->writesize, - mtd->writesize); - fwbuf = kzalloc(fwsize, GFP_KERNEL); - if (!fwbuf) { - debug("failed to allocate fwbuf\n"); - ret = -ENOMEM; - goto err; - } + fwbuf = NULL; + if (is_mx6() || is_mx7()) { + fwsize = ALIGN(size + FLASH_OFFSET_STANDARD + mtd->writesize, + mtd->writesize); + fwbuf = kzalloc(fwsize, GFP_KERNEL); + if (!fwbuf) { + debug("failed to allocate fwbuf\n"); + ret = -ENOMEM; + goto err; + } - memcpy(fwbuf + FLASH_OFFSET_STANDARD, buf, size); - fw1_off = fw1_blk * mtd->erasesize; - ret = nand_write_skip_bad(mtd, fw1_off, &fwsize, NULL, maxsize, - (u_char *)fwbuf, WITH_WR_VERIFY); - printf("NAND fw write: 0x%llx offset, 0x%x bytes written: %s\n", - fw1_off, fwsize, ret ? "ERROR" : "OK"); - if (ret) - goto fwbuf_err; + memcpy(fwbuf + FLASH_OFFSET_STANDARD, buf, size); + fw1_off = fw1_blk * mtd->erasesize; + ret = nand_write_skip_bad(mtd, fw1_off, &fwsize, NULL, maxsize, + (u_char *)fwbuf, WITH_WR_VERIFY); + printf("NAND fw write: 0x%llx offset, 0x%zx bytes written: %s\n", + fw1_off, fwsize, ret ? "ERROR" : "OK"); + if (ret) + goto fwbuf_err; + } else if (is_imx8m()) { + fwsize = ALIGN(IMX8MQ_SPL_SZ + FLASH_OFFSET_STANDARD + mtd->writesize, mtd->writesize); + fwbuf = kzalloc(fwsize, GFP_KERNEL); + if (!fwbuf) { + printf("failed to allocate fwbuf\n"); + ret = -ENOMEM; + goto err; + } + + memcpy(fwbuf + FLASH_OFFSET_STANDARD, buf, IMX8MQ_SPL_SZ); + fw1_off = fw1_blk * mtd->erasesize; + ret = nand_write_skip_bad(mtd, fw1_off, &fwsize, NULL, maxsize, + (u_char *)fwbuf, WITH_WR_VERIFY); + printf("NAND fw write: 0x%llx offset, 0x%zx bytes written: %s\n", + fw1_off, fwsize, ret ? "ERROR" : "OK"); + if (ret) + goto fwbuf_err; + + extra_fwsize = ALIGN(IMX8MQ_SPL_SZ + mtd->writesize, mtd->writesize); + extra_fwbuf = kzalloc(extra_fwsize, GFP_KERNEL); + extra_fw1_off = fw1_off + mtd->erasesize * ((IMX8MQ_SPL_SZ + mtd->erasesize - 1) / mtd->erasesize); + if (!extra_fwbuf) { + printf("failed to allocate fwbuf\n"); + ret = -ENOMEM; + goto fwbuf_err; + } + + memcpy(extra_fwbuf, buf + IMX8MQ_HDMI_FW_SZ, IMX8MQ_SPL_SZ); + ret = nand_write_skip_bad(mtd, extra_fw1_off, &extra_fwsize, NULL, maxsize, + (u_char *)extra_fwbuf, WITH_WR_VERIFY); + printf("NAND extra_fw write: 0x%llx offset, 0x%zx bytes written: %s\n", + extra_fw1_off, extra_fwsize, ret ? "ERROR" : "OK"); + if (ret) { + kfree(extra_fwbuf); + goto fwbuf_err; + } + } /* fill fcb */ fcb = kzalloc(sizeof(*fcb), GFP_KERNEL); @@ -394,6 +438,8 @@ static int nandbcb_update(struct mtd_info *mtd, loff_t off, size_t size, fw1_start = (fw1_blk * mtd->erasesize) / mtd->writesize; fw1_pages = size / mtd->writesize + 1; + if (is_imx8m()) + fw1_pages = (IMX8MQ_SPL_SZ + (mtd->writesize - 1)) / mtd->writesize; fill_fcb(fcb, mtd, fw1_start, 0, fw1_pages); /* fill dbbt */ From patchwork Tue May 5 14:04:01 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peng Fan X-Patchwork-Id: 1283614 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=nxp.com header.i=@nxp.com header.a=rsa-sha256 header.s=selector2 header.b=pNHKbsyn; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49Ggr14sklz9sP7 for ; Tue, 5 May 2020 23:41:53 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 0B73981F93; Tue, 5 May 2020 15:41:23 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=nxp.com header.i=@nxp.com header.b="pNHKbsyn"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id E901782078; Tue, 5 May 2020 15:41:19 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FORGED_SPF_HELO,MSGID_FROM_MTA_HEADER, SPF_HELO_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.2 Received: from EUR05-VI1-obe.outbound.protection.outlook.com (mail-vi1eur05on20608.outbound.protection.outlook.com [IPv6:2a01:111:f400:7d00::608]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 7F70981CAA for ; Tue, 5 May 2020 15:41:14 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=peng.fan@nxp.com ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=Fq8WHHrjoQETqgQa1aKZUjTncXGHK6+w1dY3BQDntopGQYMpJm3mTdq1QZyWajoZg3OWRwkh2iDvJAflMwjcpXEMHZy29AUCbJKyci4USA0MgAzwj/IaHUtSEuL2vekQf+ipiqsf0kFGziVnNDlJwyGADVjiTWpus3mqIs5i6hAipfPMcSnMWM5UmR/e2Oy4HEamH7dr1hItzNeDkF+2paB3E335P/+GHO43C1tlc3McwzRPeCllT8+ZXUr5Mrtuwdu6XLrsq/KLKY000yuFRHxHAEJaw+WKXG7/RSOMN6ygYJNblG9zTAHcB0T/nRuI0nl039E73kb170Dc6psa3w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=Ntgz70YkO1CBg6bqdFzn6pkgOW28gBm+fugpUcALl0k=; b=Hu+e4QGp+C+UtMybsmzIzde6dhII250CcdXKpvPdg2+vOMbnEXNhAruVla1xriObdWcmhCKBLwpS1OEKJFlI57uLEJQg+diB2cr6PnC5Bd2WAR6VnlCzRBY5Lo+L4bnRwuNflp5AMgAYzfGT1l/8vQCIP3Gd20awAhgN0VZ82Z6A+h3m8sPfr1IwHm64uRInkh5NXkGAHJyxxwzluuOljD1ChM66s/gYtCaSGViOz3Ilwr1BCYCoxglWV9C2p3XsSPtEne/RNCLWC7VDL2OEdZ0opIDd+bEyGWW95HDfYEPK5EPETg1D3fOuAnWh/8En/GWxf+QOXXKEoGh6pZpy/g== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nxp.com; dmarc=pass action=none header.from=nxp.com; dkim=pass header.d=nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=Ntgz70YkO1CBg6bqdFzn6pkgOW28gBm+fugpUcALl0k=; b=pNHKbsyntKQZ0bjRyg4OZz2un6jyewn1lgvqqRL16ktV/d8MMRg7pap/SRWnxhI2qsSEu6OgBDRsrenbCcsV/MSK9q5ORmA4Z3RQwWDbnZiSbdnPB9O9qvBFYBtT9YImpmSP97t2SkVQ+wKs/u/npKu3N2gnnojc+n1g2IhlX9Q= Authentication-Results: denx.de; dkim=none (message not signed) header.d=none;denx.de; dmarc=none action=none header.from=nxp.com; Received: from DB6PR0402MB2760.eurprd04.prod.outlook.com (2603:10a6:4:a1::14) by DB6PR0402MB2759.eurprd04.prod.outlook.com (2603:10a6:4:a2::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2958.27; Tue, 5 May 2020 13:41:13 +0000 Received: from DB6PR0402MB2760.eurprd04.prod.outlook.com ([fe80::d17b:d767:19c3:b871]) by DB6PR0402MB2760.eurprd04.prod.outlook.com ([fe80::d17b:d767:19c3:b871%6]) with mapi id 15.20.2958.030; Tue, 5 May 2020 13:41:13 +0000 From: Peng Fan To: sbabic@denx.de, festevam@gmail.com, han.xu@nxp.com Cc: uboot-imx@nxp.com, u-boot@lists.denx.de, jagan@amarulasolutions.com, Alice Guo , Peng Fan Subject: [PATCH 3/6] nandbcb: add nandbcb dump command for i.MX8MM Date: Tue, 5 May 2020 22:04:01 +0800 Message-Id: <20200505140404.27407-4-peng.fan@nxp.com> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20200505140404.27407-1-peng.fan@nxp.com> References: <20200505140404.27407-1-peng.fan@nxp.com> X-ClientProxiedBy: SGAP274CA0024.SGPP274.PROD.OUTLOOK.COM (2603:1096:4:b6::36) To DB6PR0402MB2760.eurprd04.prod.outlook.com (2603:10a6:4:a1::14) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from linux-1xn6.ap.freescale.net (119.31.174.71) by SGAP274CA0024.SGPP274.PROD.OUTLOOK.COM (2603:1096:4:b6::36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2958.21 via Frontend Transport; Tue, 5 May 2020 13:41:10 +0000 X-Mailer: git-send-email 2.16.4 X-Originating-IP: [119.31.174.71] X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: 69524fd3-e136-40ea-7fe8-08d7f0f9f9ff X-MS-TrafficTypeDiagnostic: DB6PR0402MB2759:|DB6PR0402MB2759: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:82; X-Forefront-PRVS: 0394259C80 X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: /2w6YfC88e+0J1uSDo4BnyhYUWSIezpl/e7QLVRGZ7XDfOhKPLsKGS6xFaQJooOOhNGebn1jcJ3xrQ2AZWR0oxUl91gjOyjUjJHkISmX8o2uMje7ub8J+AdoTuyOsBhudt+MpMotj3bWEgWo70K9wNSHfPRe4V35ETuIaOxZoB5wbEatnN9Brw0jV/pd6kEGGR96lR6V57sGBt0RNIrxOGTfQKygrRyNiYAugMS8XAlm+NZHg//PdX2V0Gd3pvhYLWsCbzrZVIX1e2CuC6bvAduNTj16jih7qOH/g3sPtbdL614Y9qoqptCFe1z9ouqqT6+AgLPCdA+TzfrorbjJ7O4h9WM0NB9zf14k80rVIFXuySVCCfVZ3adG4xob5FWZWQe+adWub0EN109tZY0SFPoTP6yYtl4q3bm3+FxZGtEd58Q65j2iN/lwykL8zOtdqrU1bx5Hj9YvEVNZxwK7RdMhQV/X1AGvlpy1j+8ZUIKKC7biPAFjAx6Clg+iN7ADf4SUKXaydcupnBuAMEq2tw== X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:DB6PR0402MB2760.eurprd04.prod.outlook.com; PTR:; CAT:NONE; SFTY:; SFS:(4636009)(366004)(33430700001)(86362001)(6506007)(52116002)(6486002)(4326008)(30864003)(498600001)(2906002)(36756003)(6636002)(6512007)(1076003)(5660300002)(44832011)(8676002)(26005)(186003)(956004)(2616005)(66946007)(66476007)(54906003)(33440700001)(66556008)(8936002)(6666004)(16526019); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData: Za81tN4flMHqTTwiH/OirtsLWpTaGY8nSWQqmfr9nJtFNYN+pqpjnJo/zO8QqWWx2hIsDvuILeF+3upIZOxlVwEvsZZ54eDNjf3xjqs3xDGF4kKRYhm7vgaUCoL6iiSlZW45VWYSiDNWiLIxADf8hNRxc/wgpejLty4WEYw2cyx7oLxawkq1OsiFIHrB8V0Qcc4B3mPGogFq5WGPEjE94yGOmU/htgHUDDQmf7U0aoANZIGgcjh4C3WGa7PsIYWZuzdRPBMRSqMQD7p3clfS1WL8ukwMHCH31QkxU/dEfeH2VD5T7dRq7fBndMQVt7pS7JxHR5H8bbdiVHit+OhI7oeAhE+jC18yGUWBmkzViHZFmu8nzDN47k39M3YhsXlLKZclPu9JUr8G5osf0ApeD8w6usGsqshi7YcGDjD9K9IyJDW6xjprnOXXD3TosewoKFMbjrSKAFnT1d8ix+oHIPzc7nY0mSO/V0EjXlCVMKssfgx8Pp4VunYz8qlGU0P+1JkdpCdnNzjwZC3ubOaw+Kk2vKCxVV0RSgSzsbweVrPS0haRQSblDK+imGK+1hxSpB4zXrP0KO+9kfOHzN0i6o5Sy33fZ6tnlSeaYconxRTFVOd7pFRji/1XLRO6FYlThkRxjy6FqyNv2q1EboLCx8oyOSquvZaWsRp5Y/GSn0TUxKXCgKnknjQakTFBe9PJLbM+HvMwSKPm90vFPDLLMouf4hJ6M5mhKCPUqZLOslG+tLXumNCO3Mr8uMhB8z3aXaQNOqQfFP6bTJylmt7w62zPHXTA1l2SxDbqSPP/p78= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 69524fd3-e136-40ea-7fe8-08d7f0f9f9ff X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 May 2020 13:41:13.1546 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: dNh6vp839wu4I4TqkUhVkMi7vnQfk/SgixUCwqL4TAKKNLxj59zL/tA+UIFpDYP7C8tJ5oQnwyNAgcXs9XQARQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB6PR0402MB2759 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de X-Virus-Status: Clean From: Alice Guo Verify/dump boot structures written to NAND Flash chip. Signed-off-by: Alice Guo Signed-off-by: Peng Fan --- arch/arm/mach-imx/cmd_nandbcb.c | 266 ++++++++++++++++++++++++++++++++++++++-- 1 file changed, 258 insertions(+), 8 deletions(-) diff --git a/arch/arm/mach-imx/cmd_nandbcb.c b/arch/arm/mach-imx/cmd_nandbcb.c index 682f5064e6..02a65ffd43 100644 --- a/arch/arm/mach-imx/cmd_nandbcb.c +++ b/arch/arm/mach-imx/cmd_nandbcb.c @@ -25,6 +25,7 @@ #include #include #include +#include #include "../../../cmd/legacy-mtd-utils.h" @@ -32,6 +33,16 @@ #define GETBIT(v, n) (((v) >> (n)) & 0x1) #define IMX8MQ_SPL_SZ 0x3e000 #define IMX8MQ_HDMI_FW_SZ 0x19c00 +#define BOOT_SEARCH_COUNT 2 + +struct mtd_info *dump_mtd; +static loff_t dump_nandboot_size; +static struct fcb_block dump_fill_fcb; +static struct dbbt_block dump_fill_dbbt; +static struct fcb_block dump_nand_fcb[BOOT_SEARCH_COUNT]; +static struct dbbt_block dump_nand_dbbt[BOOT_SEARCH_COUNT]; +static u32 dump_fcb_off[BOOT_SEARCH_COUNT]; +static u32 dump_dbbt_off[BOOT_SEARCH_COUNT]; #if defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL) static uint8_t reverse_bit(uint8_t b) @@ -212,9 +223,10 @@ static int dbbt_fill_data(struct mtd_info *mtd, void *buf, int num_blocks) return n_bad_blocks; } -static int write_fcb_dbbt(struct mtd_info *mtd, struct fcb_block *fcb, - struct dbbt_block *dbbt, void *dbbt_data_page, - loff_t off) +static int write_fcb_dbbt_and_readback(struct mtd_info *mtd, + struct fcb_block *fcb, + struct dbbt_block *dbbt, + void *dbbt_data_page, loff_t off) { void *fcb_raw_page = 0; int i, ret; @@ -272,6 +284,11 @@ static int write_fcb_dbbt(struct mtd_info *mtd, struct fcb_block *fcb, mxs_nand_mode_fcb(mtd); ret = nand_write(mtd, off, &rwsize, (unsigned char *)fcb); + + dump_fcb_off[i] = off; + nand_read(mtd, off, &rwsize, + (unsigned char *)(dump_nand_fcb + i)); + mxs_nand_mode_normal(mtd); printf("%s\n", ret ? "ERROR" : "OK"); @@ -302,6 +319,12 @@ static int write_fcb_dbbt(struct mtd_info *mtd, struct fcb_block *fcb, mtd->erasesize * i + mtd->writesize, dummy, ret ? "ERROR" : "OK"); + dump_dbbt_off[i] = mtd->erasesize * i + mtd->writesize; + size_t rwsize = sizeof(*dbbt); + + nand_read(mtd, dump_dbbt_off[i], &rwsize, + (unsigned char *)(dump_nand_dbbt + i)); + /* dbbtpages == 0 if no bad blocks */ if (dbbt->dbbtpages > 0) { loff_t to = (mtd->erasesize * i + mtd->writesize * 5); @@ -366,7 +389,7 @@ static int nandbcb_update(struct mtd_info *mtd, loff_t off, size_t size, * - rest split in half for primary and secondary firmware * - same firmware will write two times */ - nr_blks_fcb = 2; + nr_blks_fcb = BOOT_SEARCH_COUNT; nr_blks = maxsize / mtd->erasesize; fw1_blk = nr_blks_fcb; @@ -442,6 +465,8 @@ static int nandbcb_update(struct mtd_info *mtd, loff_t off, size_t size, fw1_pages = (IMX8MQ_SPL_SZ + (mtd->writesize - 1)) / mtd->writesize; fill_fcb(fcb, mtd, fw1_start, 0, fw1_pages); + dump_fill_fcb = *fcb; + /* fill dbbt */ dbbt_page = kzalloc(mtd->writesize, GFP_KERNEL); if (!dbbt_page) { @@ -467,8 +492,10 @@ static int nandbcb_update(struct mtd_info *mtd, loff_t off, size_t size, else if (ret > 0) dbbt->dbbtpages = 1; + dump_fill_dbbt = *dbbt; + /* write fcb and dbbt to nand */ - ret = write_fcb_dbbt(mtd, fcb, dbbt, dbbt_data_page, off); + ret = write_fcb_dbbt_and_readback(mtd, fcb, dbbt, dbbt_data_page, off); if (ret < 0) printf("failed to write FCB/DBBT\n"); @@ -550,7 +577,7 @@ static int do_nandbcb_bcbonly(int argc, char * const argv[]) dbbt->dbbtpages = 1; /* write fcb and dbbt to nand */ - ret = write_fcb_dbbt(mtd, fcb, dbbt, dbbt_data_page, 0); + ret = write_fcb_dbbt_and_readback(mtd, fcb, dbbt, dbbt_data_page, 0); dbbt_data_page_err: kfree(dbbt_data_page); dbbt_page_err: @@ -566,6 +593,218 @@ fcb_err: return CMD_RET_SUCCESS; } +/* dump data which is planned to be encoded and written to NAND chip */ +void mtd_cfg_dump(void) +{ + u64 blocks; + + printf("MTD CONFIG:\n"); + printf(" %s = %d\n", "data_setup_time", dump_fill_fcb.datasetup); + printf(" %s = %d\n", "data_hold_time", dump_fill_fcb.datahold); + printf(" %s = %d\n", "address_setup_time", dump_fill_fcb.addr_setup); + printf(" %s = %d\n", "data_sample_time", dump_fill_fcb.dsample_time); + + printf("NFC geometry :\n"); + printf("\tECC Strength : %d\n", dump_mtd->ecc_strength); + printf("\tPage Size in Bytes : %d\n", dump_fill_fcb.oob_pagesize); + printf("\tMetadata size : %d\n", dump_fill_fcb.meta_size); + printf("\tECC Chunk Size in byte : %d\n", dump_fill_fcb.ecc_size); + printf("\tECC Chunk count : %d\n", dump_fill_fcb.nr_blocks + 1); + printf("\tBlock Mark Byte Offset : %d\n", dump_fill_fcb.bb_byte); + printf("\tBlock Mark Bit Offset : %d\n", dump_fill_fcb.bb_start_bit); + printf("====================================================\n"); + + printf("mtd: partition #0\n"); + printf(" %s = %d\n", "type", dump_mtd->type); + printf(" %s = %d\n", "flags", dump_mtd->flags); + printf(" %s = %llu\n", "size", dump_nandboot_size); + printf(" %s = %d\n", "erasesize", dump_mtd->erasesize); + printf(" %s = %d\n", "writesize", dump_mtd->writesize); + printf(" %s = %d\n", "oobsize", dump_mtd->oobsize); + blocks = dump_nandboot_size; + do_div(blocks, dump_mtd->erasesize); + printf(" %s = %llu\n", "blocks", blocks); +} + +/* dump data which is read from NAND chip */ +void mtd_dump_structure(int i) +{ + #define P1(x) printf(" %s = 0x%08x\n", #x, dump_nand_fcb[i].x) + printf("FCB %d:\n", i); + P1(checksum); + P1(fingerprint); + P1(version); + #undef P1 + #define P1(x) printf(" %s = %d\n", #x, dump_nand_fcb[i].x) + P1(datasetup); + P1(datahold); + P1(addr_setup); + P1(dsample_time); + P1(pagesize); + P1(oob_pagesize); + P1(sectors); + P1(nr_nand); + P1(nr_die); + P1(celltype); + P1(ecc_type); + P1(ecc_nr); + P1(ecc_size); + P1(ecc_level); + P1(meta_size); + P1(nr_blocks); + P1(ecc_type_sdk); + P1(ecc_nr_sdk); + P1(ecc_size_sdk); + P1(ecc_level_sdk); + P1(nr_blocks_sdk); + P1(meta_size_sdk); + P1(erase_th); + P1(bootpatch); + P1(patch_size); + P1(fw1_start); + P1(fw2_start); + P1(fw1_pages); + P1(fw2_pages); + P1(dbbt_start); + P1(bb_byte); + P1(bb_start_bit); + P1(phy_offset); + P1(bchtype); + P1(readlatency); + P1(predelay); + P1(cedelay); + P1(postdelay); + P1(cmdaddpause); + P1(datapause); + P1(tmspeed); + P1(busytimeout); + P1(disbbm); + P1(spare_offset); + P1(onfi_sync_enable); + P1(onfi_sync_speed); + P1(onfi_sync_nand_data); + P1(disbbm_search); + P1(disbbm_search_limit); + P1(read_retry_enable); + #undef P1 + #define P1(x) printf(" %s = 0x%08x\n", #x, dump_nand_dbbt[i].x) + printf("DBBT %d:\n", i); + P1(checksum); + P1(fingerprint); + P1(version); + #undef P1 + #define P1(x) printf(" %s = %d\n", #x, dump_nand_dbbt[i].x) + P1(numberbb); + #undef P1 + + printf("Firmware: image #0 @ 0x%x size 0x%x - available 0x%llx\n", + dump_nand_fcb[i].fw1_start * dump_nand_fcb[i].pagesize, + dump_nand_fcb[i].fw1_pages * dump_nand_fcb[i].pagesize, + dump_nandboot_size - dump_nand_fcb[i].fw1_start * + dump_nand_fcb[i].pagesize); + if (is_imx8m()) { + printf("Extra Firmware: image #0 @ 0x%x size 0x%x - available 0x%llx\n", + dump_nand_fcb[i].fw1_start * + dump_nand_fcb[i].pagesize + dump_mtd->erasesize * + ((IMX8MQ_SPL_SZ + dump_mtd->erasesize - 1) / + dump_mtd->erasesize), + dump_nand_fcb[i].fw1_pages * dump_nand_fcb[i].pagesize, + dump_nandboot_size - + (dump_nand_fcb[i].fw1_start * + dump_nand_fcb[i].pagesize + dump_mtd->erasesize * + ((IMX8MQ_SPL_SZ + dump_mtd->erasesize - 1) / + dump_mtd->erasesize))); + } +} + +static int do_nandbcb_dump(int argc, char * const argv[]) +{ + int num; + int stride; + int search_area_sz; + bool bab_block_table[BOOT_SEARCH_COUNT]; + int bab_block_flag; + + if (argc != 2) + return CMD_RET_USAGE; + + switch (argv[1][0]) { + case '0': + num = 0; + break; + case '1': + num = 1; + break; + default: + return CMD_RET_USAGE; + } + + /* dump data which is planned to be encoded and written to NAND chip */ + mtd_cfg_dump(); + + stride = dump_mtd->erasesize; + search_area_sz = BOOT_SEARCH_COUNT * stride; + printf("stride: %x, search_area_sz: %x\n", stride, search_area_sz); + + bab_block_flag = 0; + for (int i = 0; i < BOOT_SEARCH_COUNT; i++) { + if (mtd_block_isbad(dump_mtd, + (loff_t)(dump_mtd->erasesize * i))) { + bab_block_table[i] = 1; + bab_block_flag = 1; + continue; + } + bab_block_table[i] = 0; + if (!memcmp(dump_nand_fcb + i, &dump_fill_fcb, + sizeof(dump_fill_fcb))) { + printf("mtd: found FCB%d candidate version %08x @%d:0x%x\n", + i, dump_nand_fcb[i].version, i, dump_fcb_off[i]); + } else { + printf("mtd: FCB%d not found\n", i); + } + } + + for (int i = 0; i < BOOT_SEARCH_COUNT; i++) { + if (mtd_block_isbad(dump_mtd, + (loff_t)(dump_mtd->erasesize * i))) + continue; + + if (!memcmp(dump_nand_dbbt + i, &dump_fill_dbbt, + sizeof(dump_fill_dbbt))) { + printf("mtd: DBBT%d found\n", i); + printf("mtd: Valid DBBT%d found @%d:0x%x\n", + i, i, dump_dbbt_off[i]); + + } else { + printf("mtd: DBBT%d not found\n", i); + } + } + if (bab_block_flag == 0) { + printf("no bad block found, dbbt: %08x\n", + dump_fill_dbbt.fingerprint); + } else { + for (int i = 0; i < BOOT_SEARCH_COUNT; i++) { + if (bab_block_table[i] == 1) + printf("mtd: bad block @ 0x%llx\n", + (loff_t)(dump_mtd->erasesize * i)); + } + } + + /* dump data which is read from NAND chip */ + if (num > (BOOT_SEARCH_COUNT - 1)) + return CMD_RET_USAGE; + + if (bab_block_table[num] == 1) { + printf("mtd: bad block @ 0x%llx (FCB - DBBT)\n", + (loff_t)(dump_mtd->erasesize * num)); + return CMD_RET_USAGE; + } + + mtd_dump_structure(num); + + return 0; +} + static int do_nandbcb_update(int argc, char * const argv[]) { struct mtd_info *mtd; @@ -593,6 +832,10 @@ static int do_nandbcb_update(int argc, char * const argv[]) &maxsize, MTD_DEV_TYPE_NAND, mtd->size)) return CMD_RET_FAILURE; + /* dump_mtd and dump_nandboot_size are used for "nandbcb dump [-v]" */ + dump_mtd = mtd; + dump_nandboot_size = maxsize; + buf = map_physmem(addr, size, MAP_WRBACK); if (!buf) { puts("failed to map physical memory\n"); @@ -610,7 +853,7 @@ static int do_nandbcb(cmd_tbl_t *cmdtp, int flag, int argc, const char *cmd; int ret = 0; - if (argc < 5) + if (argc < 3) goto usage; cmd = argv[1]; @@ -622,6 +865,11 @@ static int do_nandbcb(cmd_tbl_t *cmdtp, int flag, int argc, goto done; } + if (strcmp(cmd, "dump") == 0) { + ret = do_nandbcb_dump(argc, argv); + goto done; + } + if (strcmp(cmd, "bcbonly") == 0) { ret = do_nandbcb_bcbonly(argc, argv); goto done; @@ -643,7 +891,9 @@ static char nandbcb_help_text[] = " and `fw2-off` - firmware offsets\n" " FIY, BCB isn't erased automatically, so mtd erase should\n" " be called in advance before writing new BCB:\n" - " > mtd erase mx7-bcb"; + " > mtd erase mx7-bcb\n" + "nandbcb dump num - verify/dump boot structures\n" + " 'num' can be set to 0 and 1"; #endif U_BOOT_CMD(nandbcb, 5, 1, do_nandbcb, From patchwork Tue May 5 14:04:02 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peng Fan X-Patchwork-Id: 1283615 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=nxp.com header.i=@nxp.com header.a=rsa-sha256 header.s=selector2 header.b=PE1x14B7; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49GgrG68xNz9sP7 for ; Tue, 5 May 2020 23:42:06 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id D3C4C8207F; Tue, 5 May 2020 15:41:26 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=nxp.com header.i=@nxp.com header.b="PE1x14B7"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 83D8982054; Tue, 5 May 2020 15:41:22 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FORGED_SPF_HELO,MSGID_FROM_MTA_HEADER, SPF_HELO_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.2 Received: from EUR05-VI1-obe.outbound.protection.outlook.com (mail-vi1eur05on20619.outbound.protection.outlook.com [IPv6:2a01:111:f400:7d00::619]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 9C1DC81FB6 for ; Tue, 5 May 2020 15:41:17 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=peng.fan@nxp.com ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=Tn+aEoCqp669s0RwRUExzrkF3YG2ziYcfjJQXHuhQzgWgUPQNzdIMzbRyrtbY18BKM0NBk8Qt1Vzhf1iAowLxcf33lHZw48pt1z/40SibvGQzU4nLn4M8egKuavuWGpB8Rwp5be/gDFXtm4kwv/HRF7F5pzeV1zhYAWjH0SkiM26FmHG8tizlm3ycFVvuPfCi7djDw0AhBfNAxUsbk5pOe2K4d/oXfUl+OskXRD4hAiif4OZ0IB98iF+fKN9mgMd5Q+ZvStfFpIVIakFq8uH890sjmJgbjhRYWuxJ7WC0wDmIfHO5uR3tSG5uQAfRANV7yxlgJa6oAbxXkNb9GbaLA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=TfpWsXQZd/vJxMQx7KJFfyi7mexO4tFX1hd5R98IXVY=; b=ZuI8wiYinC5VBmh7O96ZQEM9LpGrxJhVYwpe3nXdRCvHvGI068tzlNHifN8GURXiDRFVgsusri6DLca3ZuNZG8W97rZZxHAPL/AC9sr7BEJNMCM5VHHplhnuVqZmhUGIBKefKQ9nBLA5K8a9U0VK6PIvJdPvwtrTWm0FHWvuv0iWZUrKaeTEWavqgrbhsnqYp8Ux7sejA+tpetOgdsuKo+iFk04NgbMy7CIrUjfTLqpYlHKhiYpguOPoQjQ7KuopgPTpZqDZuA1jebERPqqvN4XCwDvrvt3bui4TjEj2BMOvTaIBC2Hm99KSMNijgF8iZSr/HvUjJtFhgFdX5i1PSA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nxp.com; dmarc=pass action=none header.from=nxp.com; dkim=pass header.d=nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=TfpWsXQZd/vJxMQx7KJFfyi7mexO4tFX1hd5R98IXVY=; b=PE1x14B7Tl0KEeghEK92Rne+7Rty3GidMLy0NDolVIFdSZqNYg2+csap0y28OJZ3LN7B8cfiN3z7XgpuKqlVOK5ubbWBqDwUarrCAfzJgtgTRiA0hz3QWCJC3yNqz7R54KWsXn4dA5lBji4ILeB7x+Rwuunq8XPW+dPI00cAgmg= Authentication-Results: denx.de; dkim=none (message not signed) header.d=none;denx.de; dmarc=none action=none header.from=nxp.com; Received: from DB6PR0402MB2760.eurprd04.prod.outlook.com (2603:10a6:4:a1::14) by DB6PR0402MB2759.eurprd04.prod.outlook.com (2603:10a6:4:a2::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2958.27; Tue, 5 May 2020 13:41:16 +0000 Received: from DB6PR0402MB2760.eurprd04.prod.outlook.com ([fe80::d17b:d767:19c3:b871]) by DB6PR0402MB2760.eurprd04.prod.outlook.com ([fe80::d17b:d767:19c3:b871%6]) with mapi id 15.20.2958.030; Tue, 5 May 2020 13:41:16 +0000 From: Peng Fan To: sbabic@denx.de, festevam@gmail.com, han.xu@nxp.com Cc: uboot-imx@nxp.com, u-boot@lists.denx.de, jagan@amarulasolutions.com, Alice Guo , Peng Fan Subject: [PATCH 4/6] nandbcb: add nandbcb dump command for i.MX6 Date: Tue, 5 May 2020 22:04:02 +0800 Message-Id: <20200505140404.27407-5-peng.fan@nxp.com> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20200505140404.27407-1-peng.fan@nxp.com> References: <20200505140404.27407-1-peng.fan@nxp.com> X-ClientProxiedBy: SGAP274CA0024.SGPP274.PROD.OUTLOOK.COM (2603:1096:4:b6::36) To DB6PR0402MB2760.eurprd04.prod.outlook.com (2603:10a6:4:a1::14) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from linux-1xn6.ap.freescale.net (119.31.174.71) by SGAP274CA0024.SGPP274.PROD.OUTLOOK.COM (2603:1096:4:b6::36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2958.21 via Frontend Transport; Tue, 5 May 2020 13:41:13 +0000 X-Mailer: git-send-email 2.16.4 X-Originating-IP: [119.31.174.71] X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: a6231317-cc9e-4f76-1ab4-08d7f0f9fbda X-MS-TrafficTypeDiagnostic: DB6PR0402MB2759:|DB6PR0402MB2759: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:243; X-Forefront-PRVS: 0394259C80 X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: nq8hBfmt2JUhbSQoZT8BjmV3l/S1NKubBPfaSAe1ntIhGzCB3CctTVJYE+et38nboNe3kNonlfo1Mf1jKeOkn2YNiPAxffPydgNEkhBWscugbg2Jcwqem02pEtEN+A/ZWIyEY5WDT/OuHpJjrrqfIYdQ7SfumbQKjiFY0NCxn4ASRG6PBEBU5L8v0fK71l/nv5ug6R7wxWtDl5HM13iKEzeXT5Qfxc3qKjTd0vjCeY1PnyDcgsI++8Kbt1iJLZmviL06k1kLopKIFN11KhaccsfeO0zYCZx8OLHVROo9N+EFICb/faMDhfL6+uL6IVyJDwX0kMFaBU7rZ9+u2zpcvscd+ByCs717mU8dZkmXA9VO55JQHpXTrVzJAAanCCbHco4/5xcB/PW49Piy1ObsRv0tjd5howD1ogaJ1oJIoDkjc0qaTndorJuEL+cnaiukrrXtFGqZRrGxTB7LTumDwBWZjfBIR5OZaImHXTJr9qeW3VlmBbOUDiAb4IvInDQPNSlUrrGixTGiTYlGkIssfg== X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:DB6PR0402MB2760.eurprd04.prod.outlook.com; PTR:; CAT:NONE; SFTY:; SFS:(4636009)(366004)(33430700001)(86362001)(6506007)(52116002)(6486002)(4326008)(4744005)(498600001)(2906002)(36756003)(6636002)(6512007)(1076003)(5660300002)(44832011)(8676002)(26005)(186003)(956004)(2616005)(66946007)(66476007)(54906003)(33440700001)(66556008)(8936002)(6666004)(16526019); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData: G5kMo0osLTA1qzfPYSWULsP2eXCHGEIXP9ibL04mXBQiJMzf7c4/J0PfxP57GxIvgzNAPq2zmWRHhyPtRhQP6Ha9atbjHWHqD8q6y5JFjhl4r8zNc6JK66ltgAG3FhCo4rbPlaAvFiwckij/ZxFgLIrXMhJ+L7uc7X9YUFlKWQSTN2RyrksydtSacYNa7UTRtwGSv6qr1KxGRawjmC0psiRJb2VhdRlySgMlNy9HxEgIKQ7qH6I4ewSSb9AeotsgH99csPqcFRjQutndesmygG5z3t+BtloC2kUJbhDzavRrZaGnWnqTzW9x4BW9KCYzVK3OAkdn5eOUvdJSyqWfeRy0U1EXVdO7oi3N1X5Shbrf88xuiMt2x75TYvJAuv3wG7lG6MoAb0h9QzGPOW8tIqP+QX9n2HvsPuZ+UcLPZ55Lzgu63wDfvNCHq7xLhv1Cuu6zy+6scZ2qEAHKBYM838rnBosq814GoQnnGlYvOJtKW3b0p9TaLOfq4OdTFKu6a21WM9QAhP4gCPEN5jNqEor1Uv+1r/Pgxmb5TyGZGYV9XRcECvUI7e4UTeUIiKRWMxdLAnzh+sFN2Q25VKE1TNMYN8AHoSwTKTZiK4IEkGweOoaAVrhSBVsm2guPvCIVFAZg2DmCuIwNWrONAqRYlug8nSDTQyX7JovT5txAit36Yd6UhcaoIBqQviQvq3qp227BN2AGrhWDvfABh3C2eoiQEw1ucuyB5e4jMBxX+pz/FBK3k7RVoaUKJLqnpbnIoVT/WnzpuUsxar4V8+Uq95EPWP1JtXF3XaPjOMEui+I= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: a6231317-cc9e-4f76-1ab4-08d7f0f9fbda X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 May 2020 13:41:16.3679 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: JavGZ0mG/gPvfSi/qsYKXOUm0hTmTkeJAFejDSA01tGZLWXyEo7BoKpxReI+3eGjOpVuzpCjos/0r9Sl+I2nmg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB6PR0402MB2759 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de X-Virus-Status: Clean From: Alice Guo Verify/dump boot structures. Signed-off-by: Alice Guo Signed-off-by: Peng Fan --- arch/arm/mach-imx/cmd_nandbcb.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/mach-imx/cmd_nandbcb.c b/arch/arm/mach-imx/cmd_nandbcb.c index 02a65ffd43..a8531def35 100644 --- a/arch/arm/mach-imx/cmd_nandbcb.c +++ b/arch/arm/mach-imx/cmd_nandbcb.c @@ -309,6 +309,10 @@ static int write_fcb_dbbt_and_readback(struct mtd_info *mtd, debug("NAND fcb write: 0x%x offset 0x%zx written: %s\n", mtd->erasesize * i, ops.len, ret ? "ERROR" : "OK"); + + ops.datbuf = (u8 *)(dump_nand_fcb + i); + ops.oobbuf = ((u8 *)(dump_nand_fcb + i)) + mtd->writesize; + mtd_read_oob(mtd, mtd->erasesize * i, &ops); } ret = mtd_write(mtd, mtd->erasesize * i + mtd->writesize, From patchwork Tue May 5 14:04:03 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peng Fan X-Patchwork-Id: 1283617 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=nxp.com header.i=@nxp.com header.a=rsa-sha256 header.s=selector2 header.b=DQFmG76/; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49Ggrm4mQ1z9sSW for ; Tue, 5 May 2020 23:42:32 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 2E59F82086; Tue, 5 May 2020 15:41:33 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=nxp.com header.i=@nxp.com header.b="DQFmG76/"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 1A56C82097; Tue, 5 May 2020 15:41:29 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FORGED_SPF_HELO,MSGID_FROM_MTA_HEADER, SPF_HELO_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.2 Received: from EUR05-VI1-obe.outbound.protection.outlook.com (mail-vi1eur05on20617.outbound.protection.outlook.com [IPv6:2a01:111:f400:7d00::617]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id B763A81F63 for ; Tue, 5 May 2020 15:41:21 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=peng.fan@nxp.com ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=jMjWc54MM3CMeNIQwBOZw442PiUA53FZPeM2nxnaKDHz/hF3uDSgOooTpKK9dCxAfJqKyWQtwgkijdF+LC6voz9RwMX6hARzP+EykPBVJBqCDJNTq26RpssSw4/Gb+33ru86uuZYf87OBCTBcq5NNuVKLAS3Q1mLCEi+GbT12wfNUugItSHvWgofRGeisq9aqWnmQvoF5lmglTwNSR0Lhpk3rxd9r0ln8DEZt4zNWuwV2qaCNkOfkgp0lcc2cSJdpGTOr6CjJsdpSREM8iU4pu7u/DtKQnmX5zU2nDFb0rvhBENbZPDmAO2nn95QybrKlLfqBeEfTYdOqX9DBEfFaQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=miUrh1z/BOPXhyH6xK1c/Cti1dJ3FIpX4nMEzPkxmAg=; b=Nr+MUhTuqejZhkk75cZNJS5v7mA09pJfSErT435/RmiTHtD0zAejGG/mlHdb98Urj1JHtlXH3zgxmtc7wg8bItHx5eal8fKW7U4U6QD8eVJJb59qvTrp/O+xkUlnAbUrUrD9mht0tAdP9L0idveBuPmuTTwGbmP9FCn4orOtITVrkB/Y5nt9NOnbNA8KmdWSmGtsexzbWpQCrDZoglqdxGUoMfPf54K+GrSwSHMUrB18DfzZO1PQ+tMCIGNX2fpEaKwQFIbATGz27kmUlohs3/ZtkQGSNWuGjbcPqyXxlVCxW+97oiYIiwRpa5nUO0WBA97WH+T0X77DDlUwkL/6Dw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nxp.com; dmarc=pass action=none header.from=nxp.com; dkim=pass header.d=nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=miUrh1z/BOPXhyH6xK1c/Cti1dJ3FIpX4nMEzPkxmAg=; b=DQFmG76/YugpwEetrVXIyHNLfq6dX7CaSDDq59EhkDCj6jP9vnc8x+qm7zbGp2vrqFqQY1wbvXISpW/9n8GsiIgbJ8Irt+dqnPQhmPIIyRKq1fCGm2ddDAGUnNQI8z46nCy6t64RhqBLvmJ7Kiu/UxgxPfoVsZ868F/ig0F9j4w= Authentication-Results: denx.de; dkim=none (message not signed) header.d=none;denx.de; dmarc=none action=none header.from=nxp.com; Received: from DB6PR0402MB2760.eurprd04.prod.outlook.com (2603:10a6:4:a1::14) by DB6PR0402MB2759.eurprd04.prod.outlook.com (2603:10a6:4:a2::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2958.27; Tue, 5 May 2020 13:41:19 +0000 Received: from DB6PR0402MB2760.eurprd04.prod.outlook.com ([fe80::d17b:d767:19c3:b871]) by DB6PR0402MB2760.eurprd04.prod.outlook.com ([fe80::d17b:d767:19c3:b871%6]) with mapi id 15.20.2958.030; Tue, 5 May 2020 13:41:19 +0000 From: Peng Fan To: sbabic@denx.de, festevam@gmail.com, han.xu@nxp.com Cc: uboot-imx@nxp.com, u-boot@lists.denx.de, jagan@amarulasolutions.com, Peng Fan Subject: [PATCH 5/6] cmd: nandbcb: Reconstruct the nandbcb tool for all platforms Date: Tue, 5 May 2020 22:04:03 +0800 Message-Id: <20200505140404.27407-6-peng.fan@nxp.com> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20200505140404.27407-1-peng.fan@nxp.com> References: <20200505140404.27407-1-peng.fan@nxp.com> X-ClientProxiedBy: SGAP274CA0024.SGPP274.PROD.OUTLOOK.COM (2603:1096:4:b6::36) To DB6PR0402MB2760.eurprd04.prod.outlook.com (2603:10a6:4:a1::14) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from linux-1xn6.ap.freescale.net (119.31.174.71) by SGAP274CA0024.SGPP274.PROD.OUTLOOK.COM (2603:1096:4:b6::36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2958.21 via Frontend Transport; Tue, 5 May 2020 13:41:16 +0000 X-Mailer: git-send-email 2.16.4 X-Originating-IP: [119.31.174.71] X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: f3eb901e-6225-40a0-e226-08d7f0f9fda0 X-MS-TrafficTypeDiagnostic: DB6PR0402MB2759:|DB6PR0402MB2759: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:378; X-Forefront-PRVS: 0394259C80 X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 8dizS+ecTFucoazgQO1cdE6VLXNm7UGtwtPjMxUuQNhORVmOvipEMwdPt7AMimAUO3PRxlwD3j9pDvmDFVhB+V1fYNlJ7hRMb0hJIUCVtVsiTnHBjrg4NL99WZ1rHjouP6zUiLB8lGtSUEUyD714Q9mPlAkuzZ1bDv0bxYC6y3as+sCEPxdfzfXW52/Q1mkIroHkqu82NUkHCPL0Mh79Ae+BdWpNNUgIwD0TqvMKOrI4BTg8I94oG11Ef8dyDqFdC6Ita51h+j1uAPcWYo5KTl3RJgzi5wYdw9GSU+ynVLzP7+70qMLoYcQ1VDUw5jXt05SUgTNjsB8CEniRKkQ6/qb7QEHcFsTLttCTg/7FIvSSBRNcF05FEq/O3R0PPBeqyB2U9Y43VF2KolnsUr+ByQTJ/L+71UtJbZjMxXdMw6uggijf4pNcdWo1H0/Mfgt+FcR6WiYhy4pLiWakH4/34ny8jfaltE9fBRu/L7y0KNEvbK5yqhfhCXGh0xIb4tdqpo7HJBlTfrQOuuw6W+pMGA== X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:DB6PR0402MB2760.eurprd04.prod.outlook.com; PTR:; CAT:NONE; SFTY:; SFS:(4636009)(366004)(33430700001)(86362001)(6506007)(52116002)(6486002)(4326008)(30864003)(498600001)(2906002)(36756003)(6636002)(6512007)(1076003)(5660300002)(44832011)(8676002)(26005)(186003)(956004)(2616005)(66946007)(66476007)(33440700001)(66556008)(8936002)(6666004)(16526019)(579004); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData: CiICcW3NFAPTgDrNbNIz2XyihlnisFVGC/kENKDAFlREnliUsqNG4wFE2Jjqm9bkmcug5+u9FPlPU51rTgVCzBJZUk3HDYopGvx0NUcUOHVJEjobT22i1ua9ncD82icp4Y8hNqQsK/2TLeANnF7GCeOPIi4y4qqTYGex/hhOEJV9DhjPXfzcQ1G/Uaf94w9OcyDyiLLdElABKSvhPBahrecs6G8YLH2/IkAja/NRrLStedYsrD/lNY6JdiXr+S9H0eIAQ6X2Zg+GbQmjvKEVMqIEHYxeW/E3/mGidD9f/eQ6SJhiTABcEx21O3h/vQWfBkdaRdwe1a0qn6sIdh19kZ0ebTuVijBvIdr2eoOxM6gEEkYG1KAdNEEo4esUMWw8etrFyp7iKJw3rxJlLxaMyG/fZ/Shvd4+Sl9xsXbKSGLeI0t6FTGgUZiGVu823YfOOSWfsUtJemOjHkxpYMqpQQW1TpyUzLGcmQuz5+sU05CXSxwW40wAsLGa3OvOQi/6F3W2d3yVPRofL/027UG9fMiK1eIIZUypo84NQ5CYuZGNfXmhOyPTVlhdwAxMmVyWESO1gvu+MtJoH2y+2Lhs/rvGMD4uYTs3UK214XhXiETfIRfYSsDxrFXjs3LCsaDqY8gJhgXH19eyKeJ/rw3i7ydhZr/tD3mnjESwlODRY00o+Iqk6QsnD5Fc8ZvJ+7Cv77rt5ExFe7+zNOkHwZhjzvi1GZRJch4R0ahEPQwUodMkRBDmFpjlowCS5+SLYzPkYmR0I7iAFzoijvRAqTsIZlxL1cJMbkMzNluDmeyZPVo= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: f3eb901e-6225-40a0-e226-08d7f0f9fda0 X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 May 2020 13:41:19.3794 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: /SjEhlwEvMj1Oc6HTdRUIwmxn+fn6BFe40htbiUgLsBIKYH7wMo3GlVVphw5NRkt5b50efRD5cDs9+bJloV0ag== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB6PR0402MB2759 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de X-Virus-Status: Clean From: Han Xu The original nandbcb tool was designed for imx6 only, when trying to leverage it to replace the kobs-ng tool, we found the design is not friendly for supporting all platforms. To support all iMX6/7/8 platforms and for easy further maintain, I reconstruct the structure of the tool. The main changes including: 1. Use platform_data to determine the logic branches rather than simply use SOC name. 2. More data structures as parameter for functions. 3. Global variables to define the FCB/DBBT/FW locations. 4. Implement the kobs-ng default 4 FCB/4 DBBT/2 FW layout. 5. Support Hamming coding/ 40bit BCH/ 62bit BCH coding FCB. 6. Dump and compare all written FCB/DBBT to verify data integrity. The tool has been verified on iMX6Q/DL, 6SX, 7D, 6ULL, iMX8QX, iMX8MM. Signed-off-by: Han Xu Signed-off-by: Peng Fan --- arch/arm/include/asm/mach-imx/imx-nandbcb.h | 4 +- arch/arm/mach-imx/cmd_nandbcb.c | 1303 +++++++++++++++++++-------- 2 files changed, 955 insertions(+), 352 deletions(-) diff --git a/arch/arm/include/asm/mach-imx/imx-nandbcb.h b/arch/arm/include/asm/mach-imx/imx-nandbcb.h index 907e7ed8f9..74c9031d4e 100644 --- a/arch/arm/include/asm/mach-imx/imx-nandbcb.h +++ b/arch/arm/include/asm/mach-imx/imx-nandbcb.h @@ -9,9 +9,11 @@ #define FCB_FINGERPRINT 0x20424346 /* 'FCB' */ #define FCB_VERSION_1 0x01000000 +#define FCB_FINGERPRINT_OFF 0x4 /* FCB fingerprint offset*/ -#define DBBT_FINGERPRINT2 0x54424244 /* 'DBBT' */ +#define DBBT_FINGERPRINT 0x54424244 /* 'DBBT' */ #define DBBT_VERSION_1 0x01000000 +#define DBBT_FINGERPRINT_OFF 0x4 /* DBBT fingerprint offset*/ struct dbbt_block { u32 checksum; /* reserved on i.MX6 */ diff --git a/arch/arm/mach-imx/cmd_nandbcb.c b/arch/arm/mach-imx/cmd_nandbcb.c index a8531def35..ab12b1f1cf 100644 --- a/arch/arm/mach-imx/cmd_nandbcb.c +++ b/arch/arm/mach-imx/cmd_nandbcb.c @@ -1,11 +1,13 @@ /* - * i.MX6 nand boot control block(bcb). + * i.MX nand boot control block(bcb). * * Based on the common/imx-bbu-nand-fcb.c from barebox and imx kobs-ng * * Copyright (C) 2017 Jagan Teki * Copyright (C) 2016 Sergey Kubushyn * + * Reconstucted by Han Xu + * * SPDX-License-Identifier: GPL-2.0+ */ @@ -25,24 +27,295 @@ #include #include #include -#include #include "../../../cmd/legacy-mtd-utils.h" -#define BF_VAL(v, bf) (((v) & bf##_MASK) >> bf##_OFFSET) +/* FCB related flags */ +/* FCB layout with leading 12B reserved */ +#define FCB_LAYOUT_RESV_12B BIT(0) +/* FCB layout with leading 32B meta data */ +#define FCB_LAYOUT_META_32B BIT(1) +/* FCB encrypted by Hamming code */ +#define FCB_ENCODE_HAMMING BIT(2) +/* FCB encrypted by 40bit BCH */ +#define FCB_ENCODE_BCH_40b BIT(3) +/* FCB encrypted by 62bit BCH */ +#define FCB_ENCODE_BCH_62b BIT(4) +/* FCB encrypted by BCH */ +#define FCB_ENCODE_BCH (FCB_ENCODE_BCH_40b | FCB_ENCODE_BCH_62b) +/* FCB data was randomized */ +#define FCB_RANDON_ENABLED BIT(5) + +/* Firmware related flags */ +/* No 1K padding */ +#define FIRMWARE_NEED_PADDING BIT(8) +/* Extra firmware*/ +#define FIRMWARE_EXTRA_ONE BIT(9) +/* Secondary firmware on fixed address */ +#define FIRMWARE_SECONDARY_FIXED_ADDR BIT(10) + +/* Boot search related flags */ +#define BT_SEARCH_CNT_FROM_FUSE BIT(16) + +struct platform_config { + int misc_flags; +}; + +static struct platform_config plat_config; + +/* imx6q/dl/solo */ +static struct platform_config imx6qdl_plat_config = { + .misc_flags = FCB_LAYOUT_RESV_12B | + FCB_ENCODE_HAMMING | + FIRMWARE_NEED_PADDING, +}; + +static struct platform_config imx6sx_plat_config = { + .misc_flags = FCB_LAYOUT_META_32B | + FCB_ENCODE_BCH_62b | + FIRMWARE_NEED_PADDING | + FCB_RANDON_ENABLED, +}; + +static struct platform_config imx7d_plat_config = { + .misc_flags = FCB_LAYOUT_META_32B | + FCB_ENCODE_BCH_62b | + FIRMWARE_NEED_PADDING | + FCB_RANDON_ENABLED, +}; + +/* imx6ul/ull/ulz */ +static struct platform_config imx6ul_plat_config = { + .misc_flags = FCB_LAYOUT_META_32B | + FCB_ENCODE_BCH_40b | + FIRMWARE_NEED_PADDING, +}; + +static struct platform_config imx8mq_plat_config = { + .misc_flags = FCB_LAYOUT_META_32B | + FCB_ENCODE_BCH_62b | + FIRMWARE_NEED_PADDING | + FCB_RANDON_ENABLED | + FIRMWARE_EXTRA_ONE, +}; + +/* all other imx8mm */ +static struct platform_config imx8mm_plat_config = { + .misc_flags = FCB_LAYOUT_META_32B | + FCB_ENCODE_BCH_62b | + FIRMWARE_NEED_PADDING | + FCB_RANDON_ENABLED, +}; + +/* imx8mn */ +static struct platform_config imx8mn_plat_config = { + .misc_flags = FCB_LAYOUT_META_32B | + FCB_ENCODE_BCH_62b | + FCB_RANDON_ENABLED | + FIRMWARE_SECONDARY_FIXED_ADDR | + BT_SEARCH_CNT_FROM_FUSE, +}; + +/* imx8qx/qm */ +static struct platform_config imx8q_plat_config = { + .misc_flags = FCB_LAYOUT_META_32B | + FCB_ENCODE_BCH_62b | + FCB_RANDON_ENABLED | + FIRMWARE_SECONDARY_FIXED_ADDR | + BT_SEARCH_CNT_FROM_FUSE, +}; + +/* boot search related variables and definitions */ +static int g_boot_search_count = 4; +static int g_boot_search_stride; +static int g_pages_per_stride; + +/* mtd config structure */ +struct boot_config { + int dev; + struct mtd_info *mtd; + loff_t maxsize; + loff_t input_size; + loff_t offset; + loff_t boot_stream1_address; + loff_t boot_stream2_address; + size_t boot_stream1_size; + size_t boot_stream2_size; + size_t max_boot_stream_size; + int stride_size_in_byte; + int search_area_size_in_bytes; + int search_area_size_in_pages; + int secondary_boot_stream_off_in_MB; +}; + +/* boot_stream config structure */ +struct boot_stream_config { + char bs_label[32]; + loff_t bs_addr; + size_t bs_size; + void *bs_buf; + loff_t next_bs_addr; + bool need_padding; +}; + +/* FW index */ +#define FW1_ONLY 1 +#define FW2_ONLY 2 +#define FW_ALL FW1_ONLY | FW2_ONLY +#define FW_INX(x) (1 << (x)) + +/* NAND convert macros */ +#define CONV_TO_PAGES(x) ((u32)(x) / (u32)(mtd->writesize)) +#define CONV_TO_BLOCKS(x) ((u32)(x) / (u32)(mtd->erasesize)) + #define GETBIT(v, n) (((v) >> (n)) & 0x1) #define IMX8MQ_SPL_SZ 0x3e000 #define IMX8MQ_HDMI_FW_SZ 0x19c00 -#define BOOT_SEARCH_COUNT 2 -struct mtd_info *dump_mtd; -static loff_t dump_nandboot_size; -static struct fcb_block dump_fill_fcb; -static struct dbbt_block dump_fill_dbbt; -static struct fcb_block dump_nand_fcb[BOOT_SEARCH_COUNT]; -static struct dbbt_block dump_nand_dbbt[BOOT_SEARCH_COUNT]; -static u32 dump_fcb_off[BOOT_SEARCH_COUNT]; -static u32 dump_dbbt_off[BOOT_SEARCH_COUNT]; +static int nandbcb_get_info(int argc, char * const argv[], + struct boot_config *boot_cfg) +{ + int dev; + struct mtd_info *mtd; + + dev = nand_curr_device; + if (dev < 0) { + printf("failed to get nand_curr_device, run nand device\n"); + return CMD_RET_FAILURE; + } + + mtd = get_nand_dev_by_index(dev); + if (!mtd) { + printf("failed to get mtd info\n"); + return CMD_RET_FAILURE; + } + + boot_cfg->dev = dev; + boot_cfg->mtd = mtd; + + return CMD_RET_SUCCESS; +} + +static int nandbcb_get_size(int argc, char * const argv[], int num, + struct boot_config *boot_cfg) +{ + int dev; + loff_t offset, size, maxsize; + struct mtd_info *mtd; + + dev = boot_cfg->dev; + mtd = boot_cfg->mtd; + size = 0; + + if (mtd_arg_off_size(argc - num, argv + num, &dev, &offset, &size, + &maxsize, MTD_DEV_TYPE_NAND, mtd->size)) + return CMD_RET_FAILURE; + + boot_cfg->maxsize = maxsize; + boot_cfg->offset = offset; + + debug("max: %llx, offset: %llx\n", maxsize, offset); + + if (size && size != maxsize) + boot_cfg->input_size = size; + + return CMD_RET_SUCCESS; +} + +static int nandbcb_set_boot_config(int argc, char * const argv[], + struct boot_config *boot_cfg) +{ + struct mtd_info *mtd; + loff_t maxsize; + loff_t boot_stream1_address, boot_stream2_address, max_boot_stream_size; + + if (!boot_cfg->mtd) { + printf("Didn't get the mtd info, quit\n"); + return CMD_RET_FAILURE; + } + mtd = boot_cfg->mtd; + + /* + * By default + * set the search count as 4 + * set each FCB/DBBT/Firmware offset at the beginning of blocks + * customers may change the value as needed + */ + + /* if need more compact layout, change these values */ + /* g_boot_search_count was set as 4 at the definition*/ + /* g_pages_per_stride was set as block size */ + + g_pages_per_stride = mtd->erasesize / mtd->writesize; + + g_boot_search_stride = mtd->writesize * g_pages_per_stride; + + boot_cfg->stride_size_in_byte = g_boot_search_stride * mtd->writesize; + boot_cfg->search_area_size_in_bytes = + g_boot_search_count * g_boot_search_stride; + boot_cfg->search_area_size_in_pages = + boot_cfg->search_area_size_in_bytes / mtd->writesize; + + /* after FCB/DBBT, split the rest of area for two Firmwares */ + if (!boot_cfg->maxsize) { + printf("Didn't get the maxsize, quit\n"); + return CMD_RET_FAILURE; + } + maxsize = boot_cfg->maxsize; + /* align to page boundary */ + maxsize = ((u32)(maxsize + mtd->writesize - 1)) / (u32)mtd->writesize + * mtd->writesize; + + boot_stream1_address = 2 * boot_cfg->search_area_size_in_bytes; + boot_stream2_address = ((maxsize - boot_stream1_address) / 2 + + boot_stream1_address); + + if (boot_cfg->secondary_boot_stream_off_in_MB) + boot_stream2_address = boot_cfg->secondary_boot_stream_off_in_MB * 1024 * 1024; + + max_boot_stream_size = boot_stream2_address - boot_stream1_address; + + /* sanity check */ + if (max_boot_stream_size <= 0) { + debug("st1_addr: %llx, st2_addr: %llx, max: %llx\n", + boot_stream1_address, boot_stream2_address, + max_boot_stream_size); + printf("something wrong with firmware address settings\n"); + return CMD_RET_FAILURE; + } + boot_cfg->boot_stream1_address = boot_stream1_address; + boot_cfg->boot_stream2_address = boot_stream2_address; + boot_cfg->max_boot_stream_size = max_boot_stream_size; + + /* set the boot_stream size as the input size now */ + if (boot_cfg->input_size) { + boot_cfg->boot_stream1_size = boot_cfg->input_size; + boot_cfg->boot_stream2_size = boot_cfg->input_size; + } + + return CMD_RET_SUCCESS; +} + +static int nandbcb_check_space(struct boot_config *boot_cfg) +{ + size_t maxsize = boot_cfg->maxsize; + size_t max_boot_stream_size = boot_cfg->max_boot_stream_size; + loff_t boot_stream2_address = boot_cfg->boot_stream2_address; + + if (boot_cfg->boot_stream1_size && + boot_cfg->boot_stream1_size > max_boot_stream_size) { + printf("boot stream1 doesn't fit, check partition size or settings\n"); + return CMD_RET_FAILURE; + } + + if (boot_cfg->boot_stream2_size && + boot_cfg->boot_stream2_size > maxsize - boot_stream2_address) { + printf("boot stream2 doesn't fit, check partition size or settings\n"); + return CMD_RET_FAILURE; + } + + return CMD_RET_SUCCESS; +} #if defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL) static uint8_t reverse_bit(uint8_t b) @@ -145,9 +418,9 @@ static u32 calc_chksum(void *buf, size_t size) return ~chksum; } -static void fill_fcb(struct fcb_block *fcb, struct mtd_info *mtd, - u32 fw1_start, u32 fw2_start, u32 fw_pages) +static void fill_fcb(struct fcb_block *fcb, struct boot_config *boot_cfg) { + struct mtd_info *mtd = boot_cfg->mtd; struct nand_chip *chip = mtd_to_nand(mtd); struct mxs_nand_info *nand_info = nand_get_controller_data(chip); struct mxs_nand_layout l; @@ -157,6 +430,11 @@ static void fill_fcb(struct fcb_block *fcb, struct mtd_info *mtd, fcb->fingerprint = FCB_FINGERPRINT; fcb->version = FCB_VERSION_1; + fcb->datasetup = 80; + fcb->datahold = 60; + fcb->addr_setup = 25; + fcb->dsample_time = 6; + fcb->pagesize = mtd->writesize; fcb->oob_pagesize = mtd->writesize + mtd->oobsize; fcb->sectors = mtd->erasesize / mtd->writesize; @@ -169,41 +447,25 @@ static void fill_fcb(struct fcb_block *fcb, struct mtd_info *mtd, fcb->ecc_type = l.eccn; fcb->bchtype = l.gf_len; - /* Also hardcoded in kobs-ng */ - if (is_mx6() || is_imx8m()) { - fcb->datasetup = 80; - fcb->datahold = 60; - fcb->addr_setup = 25; - fcb->dsample_time = 6; - } else if (is_mx7()) { - fcb->datasetup = 10; - fcb->datahold = 7; - fcb->addr_setup = 15; - fcb->dsample_time = 6; - } - - /* DBBT search area starts at second page on first block */ - fcb->dbbt_start = 1; + /* DBBT search area starts from the next block after all FCB */ + fcb->dbbt_start = boot_cfg->search_area_size_in_pages; fcb->bb_byte = nand_info->bch_geometry.block_mark_byte_offset; fcb->bb_start_bit = nand_info->bch_geometry.block_mark_bit_offset; fcb->phy_offset = mtd->writesize; - fcb->nr_blocks = mtd->writesize / fcb->ecc_nr - 1; - fcb->disbbm = 0; - fcb->disbbm_search = 0; - fcb->fw1_start = fw1_start; /* Firmware image starts on this sector */ - fcb->fw2_start = fw2_start; /* Secondary FW Image starting Sector */ - fcb->fw1_pages = fw_pages; /* Number of sectors in firmware image */ - fcb->fw2_pages = fw_pages; /* Number of sector in secondary FW image */ + fcb->fw1_start = CONV_TO_PAGES(boot_cfg->boot_stream1_address); + fcb->fw2_start = CONV_TO_PAGES(boot_cfg->boot_stream2_address); + fcb->fw1_pages = CONV_TO_PAGES(boot_cfg->boot_stream1_size); + fcb->fw2_pages = CONV_TO_PAGES(boot_cfg->boot_stream2_size); fcb->checksum = calc_chksum((void *)fcb + 4, sizeof(*fcb) - 4); } -static int dbbt_fill_data(struct mtd_info *mtd, void *buf, int num_blocks) +static int fill_dbbt_data(struct mtd_info *mtd, void *buf, int num_blocks) { int n, n_bad_blocks = 0; u32 *bb = buf + 0x8; @@ -223,21 +485,92 @@ static int dbbt_fill_data(struct mtd_info *mtd, void *buf, int num_blocks) return n_bad_blocks; } -static int write_fcb_dbbt_and_readback(struct mtd_info *mtd, - struct fcb_block *fcb, - struct dbbt_block *dbbt, - void *dbbt_data_page, loff_t off) +/* + * return 1 - bad block + * return 0 - read successfully + * return < 0 - read failed + */ +static int read_fcb(struct boot_config *boot_cfg, struct fcb_block *fcb, + loff_t off) { - void *fcb_raw_page = 0; + struct mtd_info *mtd; + void *fcb_raw_page; + size_t size; + int ret = 0; + + mtd = boot_cfg->mtd; + fcb_raw_page = kzalloc(mtd->writesize + mtd->oobsize, GFP_KERNEL); + + if (mtd_block_isbad(mtd, off)) { + printf("Block %d is bad, skipped\n", (int)CONV_TO_BLOCKS(off)); + return 1; + } + + /* + * User BCH hardware to decode ECC for FCB + */ + if (plat_config.misc_flags & FCB_ENCODE_BCH) { + size = sizeof(struct fcb_block); + + /* switch nand BCH to FCB compatible settings */ + if (plat_config.misc_flags & FCB_ENCODE_BCH_62b) + mxs_nand_mode_fcb_62bit(mtd); + else if (plat_config.misc_flags & FCB_ENCODE_BCH_40b) + mxs_nand_mode_fcb_40bit(mtd); + + ret = nand_read(mtd, off, &size, (u_char *)fcb); + + /* switch BCH back */ + mxs_nand_mode_normal(mtd); + printf("NAND FCB read from 0x%llx offset 0x%zx read: %s\n", + off, size, ret ? "ERROR" : "OK"); + + } else if (plat_config.misc_flags & FCB_ENCODE_HAMMING) { + /* raw read*/ + mtd_oob_ops_t ops = { + .datbuf = (u8 *)fcb_raw_page, + .oobbuf = ((u8 *)fcb_raw_page) + mtd->writesize, + .len = mtd->writesize, + .ooblen = mtd->oobsize, + .mode = MTD_OPS_RAW + }; + + ret = mtd_read_oob(mtd, off, &ops); + printf("NAND FCB read from 0x%llx offset 0x%zx read: %s\n", + off, ops.len, ret ? "ERROR" : "OK"); + } + + if (ret) + goto fcb_raw_page_err; + + if ((plat_config.misc_flags & FCB_ENCODE_HAMMING) && + (plat_config.misc_flags & FCB_LAYOUT_RESV_12B)) + memcpy(fcb, fcb_raw_page + 12, sizeof(struct fcb_block)); + +/* TODO: check if it can pass Hamming check */ + +fcb_raw_page_err: + kfree(fcb_raw_page); + + return ret; +} + +static int write_fcb(struct boot_config *boot_cfg, struct fcb_block *fcb) +{ + struct mtd_info *mtd; + void *fcb_raw_page = NULL; int i, ret; - size_t dummy; + loff_t off; + size_t size; + + mtd = boot_cfg->mtd; /* * We prepare raw page only for i.MX6, for i.MX7 we * leverage BCH hw module instead */ - if (is_mx6()) { - /* write fcb/dbbt */ + if ((plat_config.misc_flags & FCB_ENCODE_HAMMING) && + (plat_config.misc_flags & FCB_LAYOUT_RESV_12B)) { fcb_raw_page = kzalloc(mtd->writesize + mtd->oobsize, GFP_KERNEL); if (!fcb_raw_page) { @@ -265,34 +598,36 @@ static int write_fcb_dbbt_and_readback(struct mtd_info *mtd, */ memset(fcb_raw_page + mtd->writesize, 0xFF, 2); } - for (i = 0; i < 2; i++) { + + /* start writing FCB from the very beginning */ + off = 0; + + for (i = 0; i < g_boot_search_count; i++) { if (mtd_block_isbad(mtd, off)) { printf("Block %d is bad, skipped\n", i); continue; } /* - * User BCH ECC hardware module for i.MX7 + * User BCH hardware module to generate ECC for FCB */ - if (is_mx7() || is_imx8m()) { - u32 off = i * mtd->erasesize; - size_t rwsize = sizeof(*fcb); - - printf("Writing %zd bytes to 0x%x: ", rwsize, off); + if (plat_config.misc_flags & FCB_ENCODE_BCH) { + size = sizeof(struct fcb_block); /* switch nand BCH to FCB compatible settings */ - mxs_nand_mode_fcb(mtd); - ret = nand_write(mtd, off, &rwsize, - (unsigned char *)fcb); + if (plat_config.misc_flags & FCB_ENCODE_BCH_62b) + mxs_nand_mode_fcb_62bit(mtd); + else if (plat_config.misc_flags & FCB_ENCODE_BCH_40b) + mxs_nand_mode_fcb_40bit(mtd); - dump_fcb_off[i] = off; - nand_read(mtd, off, &rwsize, - (unsigned char *)(dump_nand_fcb + i)); + ret = nand_write(mtd, off, &size, (u_char *)fcb); + /* switch BCH back */ mxs_nand_mode_normal(mtd); + printf("NAND FCB write to 0x%zx offset 0x%llx written: %s\n", + size, off, ret ? "ERROR" : "OK"); - printf("%s\n", ret ? "ERROR" : "OK"); - } else if (is_mx6()) { + } else if (plat_config.misc_flags & FCB_ENCODE_HAMMING) { /* raw write */ mtd_oob_ops_t ops = { .datbuf = (u8 *)fcb_raw_page, @@ -303,65 +638,327 @@ static int write_fcb_dbbt_and_readback(struct mtd_info *mtd, .mode = MTD_OPS_RAW }; - ret = mtd_write_oob(mtd, mtd->erasesize * i, &ops); - if (ret) - goto fcb_raw_page_err; - debug("NAND fcb write: 0x%x offset 0x%zx written: %s\n", - mtd->erasesize * i, ops.len, ret ? - "ERROR" : "OK"); - - ops.datbuf = (u8 *)(dump_nand_fcb + i); - ops.oobbuf = ((u8 *)(dump_nand_fcb + i)) + mtd->writesize; - mtd_read_oob(mtd, mtd->erasesize * i, &ops); + ret = mtd_write_oob(mtd, off, &ops); + printf("NAND FCB write to 0x%llxx offset 0x%zx written: %s\n", off, ops.len, ret ? "ERROR" : "OK"); } - ret = mtd_write(mtd, mtd->erasesize * i + mtd->writesize, - mtd->writesize, &dummy, (void *)dbbt); if (ret) goto fcb_raw_page_err; - debug("NAND dbbt write: 0x%x offset, 0x%zx bytes written: %s\n", - mtd->erasesize * i + mtd->writesize, dummy, - ret ? "ERROR" : "OK"); - dump_dbbt_off[i] = mtd->erasesize * i + mtd->writesize; - size_t rwsize = sizeof(*dbbt); + /* next writing location */ + off += g_boot_search_stride; + } + + return 0; + +fcb_raw_page_err: + kfree(fcb_raw_page); + + return ret; +} + +/* + * return 1 - bad block + * return 0 - read successfully + * return < 0 - read failed + */ +static int read_dbbt(struct boot_config *boot_cfg, struct dbbt_block *dbbt, + void *dbbt_data_page, loff_t off) +{ + size_t size; + struct mtd_info *mtd; + loff_t to; + int ret; + + mtd = boot_cfg->mtd; + + if (mtd_block_isbad(mtd, off)) { + printf("Block %d is bad, skipped\n", + (int)CONV_TO_BLOCKS(off)); + return 1; + } + + size = sizeof(struct dbbt_block); + ret = nand_read(mtd, off, &size, (u_char *)dbbt); + printf("NAND DBBT read from 0x%llx offset 0x%zx read: %s\n", + off, size, ret ? "ERROR" : "OK"); + if (ret) + return ret; + + /* dbbtpages == 0 if no bad blocks */ + if (dbbt->dbbtpages > 0) { + to = off + 4 * mtd->writesize; + size = mtd->writesize; + ret = nand_read(mtd, to, &size, dbbt_data_page); + printf("DBBT data read from 0x%llx offset 0x%zx read: %s\n", + to, size, ret ? "ERROR" : "OK"); + + if (ret) + return ret; + } + + return 0; +} + +static int write_dbbt(struct boot_config *boot_cfg, struct dbbt_block *dbbt, + void *dbbt_data_page) +{ + int i; + loff_t off, to; + size_t size; + struct mtd_info *mtd; + int ret; + + mtd = boot_cfg->mtd; + + /* start writing DBBT after all FCBs */ + off = boot_cfg->search_area_size_in_bytes; + size = mtd->writesize; - nand_read(mtd, dump_dbbt_off[i], &rwsize, - (unsigned char *)(dump_nand_dbbt + i)); + for (i = 0; i < g_boot_search_count; i++) { + if (mtd_block_isbad(mtd, off)) { + printf("Block %d is bad, skipped\n", + (int)(i + CONV_TO_BLOCKS(off))); + continue; + } + + ret = nand_write(mtd, off, &size, (u_char *)dbbt); + printf("NAND DBBT write to 0x%llx offset 0x%zx written: %s\n", + off, size, ret ? "ERROR" : "OK"); + if (ret) + return ret; /* dbbtpages == 0 if no bad blocks */ if (dbbt->dbbtpages > 0) { - loff_t to = (mtd->erasesize * i + mtd->writesize * 5); + to = off + 4 * mtd->writesize; + ret = nand_write(mtd, to, &size, dbbt_data_page); + printf("DBBT data write to 0x%llx offset 0x%zx written: %s\n", + to, size, ret ? "ERROR" : "OK"); - ret = mtd_write(mtd, to, mtd->writesize, &dummy, - dbbt_data_page); - if (ret) - goto fcb_raw_page_err; + if (ret) + return ret; } + + /* next writing location */ + off += g_boot_search_stride; } -fcb_raw_page_err: - if (is_mx6()) - kfree(fcb_raw_page); + return 0; +} + +/* reuse the check_skip_len from nand_util.c with minor change*/ +static int check_skip_length(struct boot_config *boot_cfg, loff_t offset, + size_t length, size_t *used) +{ + struct mtd_info *mtd = boot_cfg->mtd; + size_t maxsize = boot_cfg->maxsize; + size_t len_excl_bad = 0; + int ret = 0; + + while (len_excl_bad < length) { + size_t block_len, block_off; + loff_t block_start; + + if (offset >= maxsize) + return -1; + + block_start = offset & ~(loff_t)(mtd->erasesize - 1); + block_off = offset & (mtd->erasesize - 1); + block_len = mtd->erasesize - block_off; + + if (!nand_block_isbad(mtd, block_start)) + len_excl_bad += block_len; + else + ret = 1; + + offset += block_len; + *used += block_len; + } + + /* If the length is not a multiple of block_len, adjust. */ + if (len_excl_bad > length) + *used -= (len_excl_bad - length); return ret; } -static int nandbcb_update(struct mtd_info *mtd, loff_t off, size_t size, - size_t maxsize, const u_char *buf) +static int nandbcb_get_next_good_blk_addr(struct boot_config *boot_cfg, + struct boot_stream_config *bs_cfg) { + struct mtd_info *mtd = boot_cfg->mtd; + loff_t offset = bs_cfg->bs_addr; + size_t length = bs_cfg->bs_size; + size_t used = 0; + int ret; + + ret = check_skip_length(boot_cfg, offset, length, &used); + + if (ret < 0) + return ret; + + /* get next image address */ + bs_cfg->next_bs_addr = (u32)(offset + used + mtd->erasesize - 1) + / (u32)mtd->erasesize * mtd->erasesize; + + return ret; +} + +static int nandbcb_write_bs_skip_bad(struct boot_config *boot_cfg, + struct boot_stream_config *bs_cfg) +{ + struct mtd_info *mtd; + void *buf; + loff_t offset, maxsize; + size_t size; + size_t length; + int ret; + bool padding_flag = false; + + mtd = boot_cfg->mtd; + offset = bs_cfg->bs_addr; + maxsize = boot_cfg->maxsize; + size = bs_cfg->bs_size; + + /* some boot images may need leading offset */ + if (bs_cfg->need_padding && + (plat_config.misc_flags & FIRMWARE_NEED_PADDING)) + padding_flag = 1; + + if (padding_flag) + length = ALIGN(size + FLASH_OFFSET_STANDARD, mtd->writesize); + else + length = ALIGN(size, mtd->writesize); + + buf = kzalloc(length, GFP_KERNEL); + if (!buf) { + printf("failed to allocate buffer for firmware\n"); + ret = -ENOMEM; + return ret; + } + + if (padding_flag) + memcpy(buf + FLASH_OFFSET_STANDARD, bs_cfg->bs_buf, size); + else + memcpy(buf, bs_cfg->bs_buf, size); + + ret = nand_write_skip_bad(mtd, offset, &length, NULL, maxsize, + (u_char *)buf, WITH_WR_VERIFY); + printf("Write %s @0x%llx offset, 0x%zx bytes written: %s\n", + bs_cfg->bs_label, offset, length, ret ? "ERROR" : "OK"); + + if (ret) + /* write image failed, quit */ + goto err; + + /* get next good blk address if needed */ + if (bs_cfg->need_padding) { + ret = nandbcb_get_next_good_blk_addr(boot_cfg, bs_cfg); + if (ret < 0) { + printf("Next image cannot fit in NAND partition\n"); + goto err; + } + } + + /* now we know how the exact image size written to NAND */ + bs_cfg->bs_size = length; + return 0; +err: + kfree(buf); + return ret; +} + +static int nandbcb_write_fw(struct boot_config *boot_cfg, u_char *buf, + int index) +{ + int i; + loff_t offset; + size_t size; + loff_t next_bs_addr; + struct boot_stream_config bs_cfg; + int ret; + + for (i = 0; i < 2; ++i) { + if (!(FW_INX(i) & index)) + continue; + + if (i == 0) { + offset = boot_cfg->boot_stream1_address; + size = boot_cfg->boot_stream1_size; + } else { + offset = boot_cfg->boot_stream2_address; + size = boot_cfg->boot_stream2_size; + } + + /* write Firmware*/ + if (!(plat_config.misc_flags & FIRMWARE_EXTRA_ONE)) { + memset(&bs_cfg, 0, sizeof(struct boot_stream_config)); + sprintf(bs_cfg.bs_label, "firmware%d", i); + bs_cfg.bs_addr = offset; + bs_cfg.bs_size = size; + bs_cfg.bs_buf = buf; + bs_cfg.need_padding = 1; + + ret = nandbcb_write_bs_skip_bad(boot_cfg, &bs_cfg); + if (ret) + return ret; + + /* update the boot stream size */ + if (i == 0) + boot_cfg->boot_stream1_size = bs_cfg.bs_size; + else + boot_cfg->boot_stream2_size = bs_cfg.bs_size; + + } else { + /* some platforms need extra firmware */ + memset(&bs_cfg, 0, sizeof(struct boot_stream_config)); + sprintf(bs_cfg.bs_label, "fw%d_part%d", i, 1); + bs_cfg.bs_addr = offset; + bs_cfg.bs_size = IMX8MQ_HDMI_FW_SZ; + bs_cfg.bs_buf = buf; + bs_cfg.need_padding = 1; + + ret = nandbcb_write_bs_skip_bad(boot_cfg, &bs_cfg); + if (ret) + return ret; + + /* update the boot stream size */ + if (i == 0) + boot_cfg->boot_stream1_size = bs_cfg.bs_size; + else + boot_cfg->boot_stream2_size = bs_cfg.bs_size; + + /* get next image address */ + next_bs_addr = bs_cfg.next_bs_addr; + + memset(&bs_cfg, 0, sizeof(struct boot_stream_config)); + sprintf(bs_cfg.bs_label, "fw%d_part%d", i, 2); + bs_cfg.bs_addr = next_bs_addr; + bs_cfg.bs_size = IMX8MQ_SPL_SZ; + bs_cfg.bs_buf = (u_char *)(buf + IMX8MQ_HDMI_FW_SZ); + bs_cfg.need_padding = 0; + + ret = nandbcb_write_bs_skip_bad(boot_cfg, &bs_cfg); + if (ret) + return ret; + } + } + + return 0; +} + +static int nandbcb_init(struct boot_config *boot_cfg, u_char *buf) +{ + struct mtd_info *mtd; nand_erase_options_t opts; struct fcb_block *fcb; struct dbbt_block *dbbt; - loff_t fw1_off; - void *fwbuf, *dbbt_page, *dbbt_data_page; - u32 fw1_start, fw1_pages; - int nr_blks, nr_blks_fcb, fw1_blk; - size_t fwsize; + void *dbbt_page, *dbbt_data_page; int ret; - size_t extra_fwsize; - void *extra_fwbuf; - loff_t extra_fw1_off; + loff_t maxsize, off; + + mtd = boot_cfg->mtd; + maxsize = boot_cfg->maxsize; + off = boot_cfg->offset; /* erase */ memset(&opts, 0, sizeof(opts)); @@ -391,85 +988,24 @@ static int nandbcb_update(struct mtd_info *mtd, loff_t off, size_t size, * - two firmware blocks, primary and secondary * - first 4 block for FCB/DBBT * - rest split in half for primary and secondary firmware - * - same firmware will write two times + * - same firmware write twice */ - nr_blks_fcb = BOOT_SEARCH_COUNT; - nr_blks = maxsize / mtd->erasesize; - fw1_blk = nr_blks_fcb; - - /* write fw */ - fwbuf = NULL; - if (is_mx6() || is_mx7()) { - fwsize = ALIGN(size + FLASH_OFFSET_STANDARD + mtd->writesize, - mtd->writesize); - fwbuf = kzalloc(fwsize, GFP_KERNEL); - if (!fwbuf) { - debug("failed to allocate fwbuf\n"); - ret = -ENOMEM; - goto err; - } - - memcpy(fwbuf + FLASH_OFFSET_STANDARD, buf, size); - fw1_off = fw1_blk * mtd->erasesize; - ret = nand_write_skip_bad(mtd, fw1_off, &fwsize, NULL, maxsize, - (u_char *)fwbuf, WITH_WR_VERIFY); - printf("NAND fw write: 0x%llx offset, 0x%zx bytes written: %s\n", - fw1_off, fwsize, ret ? "ERROR" : "OK"); - if (ret) - goto fwbuf_err; - } else if (is_imx8m()) { - fwsize = ALIGN(IMX8MQ_SPL_SZ + FLASH_OFFSET_STANDARD + mtd->writesize, mtd->writesize); - fwbuf = kzalloc(fwsize, GFP_KERNEL); - if (!fwbuf) { - printf("failed to allocate fwbuf\n"); - ret = -ENOMEM; - goto err; - } - memcpy(fwbuf + FLASH_OFFSET_STANDARD, buf, IMX8MQ_SPL_SZ); - fw1_off = fw1_blk * mtd->erasesize; - ret = nand_write_skip_bad(mtd, fw1_off, &fwsize, NULL, maxsize, - (u_char *)fwbuf, WITH_WR_VERIFY); - printf("NAND fw write: 0x%llx offset, 0x%zx bytes written: %s\n", - fw1_off, fwsize, ret ? "ERROR" : "OK"); - if (ret) - goto fwbuf_err; - - extra_fwsize = ALIGN(IMX8MQ_SPL_SZ + mtd->writesize, mtd->writesize); - extra_fwbuf = kzalloc(extra_fwsize, GFP_KERNEL); - extra_fw1_off = fw1_off + mtd->erasesize * ((IMX8MQ_SPL_SZ + mtd->erasesize - 1) / mtd->erasesize); - if (!extra_fwbuf) { - printf("failed to allocate fwbuf\n"); - ret = -ENOMEM; - goto fwbuf_err; - } - - memcpy(extra_fwbuf, buf + IMX8MQ_HDMI_FW_SZ, IMX8MQ_SPL_SZ); - ret = nand_write_skip_bad(mtd, extra_fw1_off, &extra_fwsize, NULL, maxsize, - (u_char *)extra_fwbuf, WITH_WR_VERIFY); - printf("NAND extra_fw write: 0x%llx offset, 0x%zx bytes written: %s\n", - extra_fw1_off, extra_fwsize, ret ? "ERROR" : "OK"); - if (ret) { - kfree(extra_fwbuf); - goto fwbuf_err; - } - } + /* write Firmware*/ + ret = nandbcb_write_fw(boot_cfg, buf, FW_ALL); + if (ret) + goto err; /* fill fcb */ fcb = kzalloc(sizeof(*fcb), GFP_KERNEL); if (!fcb) { debug("failed to allocate fcb\n"); ret = -ENOMEM; - goto fwbuf_err; + return ret; } + fill_fcb(fcb, boot_cfg); - fw1_start = (fw1_blk * mtd->erasesize) / mtd->writesize; - fw1_pages = size / mtd->writesize + 1; - if (is_imx8m()) - fw1_pages = (IMX8MQ_SPL_SZ + (mtd->writesize - 1)) / mtd->writesize; - fill_fcb(fcb, mtd, fw1_start, 0, fw1_pages); - - dump_fill_fcb = *fcb; + ret = write_fcb(boot_cfg, fcb); /* fill dbbt */ dbbt_page = kzalloc(mtd->writesize, GFP_KERNEL); @@ -488,18 +1024,16 @@ static int nandbcb_update(struct mtd_info *mtd, loff_t off, size_t size, dbbt = dbbt_page; dbbt->checksum = 0; - dbbt->fingerprint = DBBT_FINGERPRINT2; + dbbt->fingerprint = DBBT_FINGERPRINT; dbbt->version = DBBT_VERSION_1; - ret = dbbt_fill_data(mtd, dbbt_data_page, nr_blks); + ret = fill_dbbt_data(mtd, dbbt_data_page, CONV_TO_BLOCKS(maxsize)); if (ret < 0) goto dbbt_data_page_err; else if (ret > 0) dbbt->dbbtpages = 1; - dump_fill_dbbt = *dbbt; - - /* write fcb and dbbt to nand */ - ret = write_fcb_dbbt_and_readback(mtd, fcb, dbbt, dbbt_data_page, off); + /* write dbbt */ + ret = write_dbbt(boot_cfg, dbbt, dbbt_data_page); if (ret < 0) printf("failed to write FCB/DBBT\n"); @@ -509,8 +1043,6 @@ dbbt_page_err: kfree(dbbt_page); fcb_err: kfree(fcb); -fwbuf_err: - kfree(fwbuf); err: return ret; } @@ -519,69 +1051,98 @@ static int do_nandbcb_bcbonly(int argc, char * const argv[]) { struct fcb_block *fcb; struct dbbt_block *dbbt; - u32 fw_len, fw1_off, fw2_off; struct mtd_info *mtd; + nand_erase_options_t opts; + size_t maxsize; + loff_t off; void *dbbt_page, *dbbt_data_page; - int dev, ret; + int ret; + struct boot_config cfg; - dev = nand_curr_device; - if ((dev < 0) || (dev >= CONFIG_SYS_MAX_NAND_DEVICE) || - (!get_nand_dev_by_index(dev))) { - puts("No devices available\n"); + if (argc < 4) + return CMD_RET_USAGE; + + memset(&cfg, 0, sizeof(struct boot_config)); + if (nandbcb_get_info(argc, argv, &cfg)) return CMD_RET_FAILURE; - } - mtd = get_nand_dev_by_index(dev); + /* only get the partition info */ + if (nandbcb_get_size(2, argv, 1, &cfg)) + return CMD_RET_FAILURE; - if (argc < 3) + if (nandbcb_set_boot_config(argc, argv, &cfg)) return CMD_RET_FAILURE; - fw_len = simple_strtoul(argv[1], NULL, 16); - fw1_off = simple_strtoul(argv[2], NULL, 16); + mtd = cfg.mtd; - if (argc > 3) - fw2_off = simple_strtoul(argv[3], NULL, 16); - else - fw2_off = fw1_off; + cfg.boot_stream1_address = simple_strtoul(argv[2], NULL, 16); + cfg.boot_stream1_size = simple_strtoul(argv[3], NULL, 16); + cfg.boot_stream1_size = ALIGN(cfg.boot_stream1_size, mtd->writesize); + + if (argc > 5) { + cfg.boot_stream2_address = simple_strtoul(argv[4], NULL, 16); + cfg.boot_stream2_size = simple_strtoul(argv[5], NULL, 16); + cfg.boot_stream2_size = ALIGN(cfg.boot_stream2_size, + mtd->writesize); + } + + /* sanity check */ + nandbcb_check_space(&cfg); + + maxsize = cfg.maxsize; + off = cfg.offset; + + /* erase the previous FCB/DBBT */ + memset(&opts, 0, sizeof(opts)); + opts.offset = off; + opts.length = g_boot_search_stride * 2; + ret = nand_erase_opts(mtd, &opts); + if (ret) { + printf("%s: erase failed (ret = %d)\n", __func__, ret); + return CMD_RET_FAILURE; + } /* fill fcb */ fcb = kzalloc(sizeof(*fcb), GFP_KERNEL); if (!fcb) { - debug("failed to allocate fcb\n"); + printf("failed to allocate fcb\n"); ret = -ENOMEM; return CMD_RET_FAILURE; } - fill_fcb(fcb, mtd, fw1_off / mtd->writesize, - fw2_off / mtd->writesize, fw_len / mtd->writesize); + fill_fcb(fcb, &cfg); + + /* write fcb */ + ret = write_fcb(&cfg, fcb); /* fill dbbt */ dbbt_page = kzalloc(mtd->writesize, GFP_KERNEL); if (!dbbt_page) { - debug("failed to allocate dbbt_page\n"); + printf("failed to allocate dbbt_page\n"); ret = -ENOMEM; goto fcb_err; } dbbt_data_page = kzalloc(mtd->writesize, GFP_KERNEL); if (!dbbt_data_page) { - debug("failed to allocate dbbt_data_page\n"); + printf("failed to allocate dbbt_data_page\n"); ret = -ENOMEM; goto dbbt_page_err; } dbbt = dbbt_page; dbbt->checksum = 0; - dbbt->fingerprint = DBBT_FINGERPRINT2; + dbbt->fingerprint = DBBT_FINGERPRINT; dbbt->version = DBBT_VERSION_1; - ret = dbbt_fill_data(mtd, dbbt_data_page, 0); + ret = fill_dbbt_data(mtd, dbbt_data_page, CONV_TO_BLOCKS(maxsize)); if (ret < 0) goto dbbt_data_page_err; else if (ret > 0) dbbt->dbbtpages = 1; - /* write fcb and dbbt to nand */ - ret = write_fcb_dbbt_and_readback(mtd, fcb, dbbt, dbbt_data_page, 0); + /* write dbbt */ + ret = write_dbbt(&cfg, dbbt, dbbt_data_page); + dbbt_data_page_err: kfree(dbbt_data_page); dbbt_page_err: @@ -597,49 +1158,20 @@ fcb_err: return CMD_RET_SUCCESS; } -/* dump data which is planned to be encoded and written to NAND chip */ -void mtd_cfg_dump(void) -{ - u64 blocks; - - printf("MTD CONFIG:\n"); - printf(" %s = %d\n", "data_setup_time", dump_fill_fcb.datasetup); - printf(" %s = %d\n", "data_hold_time", dump_fill_fcb.datahold); - printf(" %s = %d\n", "address_setup_time", dump_fill_fcb.addr_setup); - printf(" %s = %d\n", "data_sample_time", dump_fill_fcb.dsample_time); - - printf("NFC geometry :\n"); - printf("\tECC Strength : %d\n", dump_mtd->ecc_strength); - printf("\tPage Size in Bytes : %d\n", dump_fill_fcb.oob_pagesize); - printf("\tMetadata size : %d\n", dump_fill_fcb.meta_size); - printf("\tECC Chunk Size in byte : %d\n", dump_fill_fcb.ecc_size); - printf("\tECC Chunk count : %d\n", dump_fill_fcb.nr_blocks + 1); - printf("\tBlock Mark Byte Offset : %d\n", dump_fill_fcb.bb_byte); - printf("\tBlock Mark Bit Offset : %d\n", dump_fill_fcb.bb_start_bit); - printf("====================================================\n"); - - printf("mtd: partition #0\n"); - printf(" %s = %d\n", "type", dump_mtd->type); - printf(" %s = %d\n", "flags", dump_mtd->flags); - printf(" %s = %llu\n", "size", dump_nandboot_size); - printf(" %s = %d\n", "erasesize", dump_mtd->erasesize); - printf(" %s = %d\n", "writesize", dump_mtd->writesize); - printf(" %s = %d\n", "oobsize", dump_mtd->oobsize); - blocks = dump_nandboot_size; - do_div(blocks, dump_mtd->erasesize); - printf(" %s = %llu\n", "blocks", blocks); -} - /* dump data which is read from NAND chip */ -void mtd_dump_structure(int i) +void dump_structure(struct boot_config *boot_cfg, struct fcb_block *fcb, + struct dbbt_block *dbbt, void *dbbt_data_page) { - #define P1(x) printf(" %s = 0x%08x\n", #x, dump_nand_fcb[i].x) - printf("FCB %d:\n", i); + int i; + struct mtd_info *mtd = boot_cfg->mtd; + + #define P1(x) printf(" %s = 0x%08x\n", #x, fcb->x) + printf("FCB\n"); P1(checksum); P1(fingerprint); P1(version); #undef P1 - #define P1(x) printf(" %s = %d\n", #x, dump_nand_fcb[i].x) + #define P1(x) printf(" %s = %d\n", #x, fcb->x) P1(datasetup); P1(datahold); P1(addr_setup); @@ -684,161 +1216,206 @@ void mtd_dump_structure(int i) P1(busytimeout); P1(disbbm); P1(spare_offset); +#if !defined(CONFIG_MX6) || defined(CONFIG_MX6SX) || \ + defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL) P1(onfi_sync_enable); P1(onfi_sync_speed); P1(onfi_sync_nand_data); P1(disbbm_search); P1(disbbm_search_limit); P1(read_retry_enable); +#endif #undef P1 - #define P1(x) printf(" %s = 0x%08x\n", #x, dump_nand_dbbt[i].x) - printf("DBBT %d:\n", i); + #define P1(x) printf(" %s = 0x%08x\n", #x, dbbt->x) + printf("DBBT :\n"); P1(checksum); P1(fingerprint); P1(version); #undef P1 - #define P1(x) printf(" %s = %d\n", #x, dump_nand_dbbt[i].x) - P1(numberbb); + #define P1(x) printf(" %s = %d\n", #x, dbbt->x) + P1(dbbtpages); #undef P1 - printf("Firmware: image #0 @ 0x%x size 0x%x - available 0x%llx\n", - dump_nand_fcb[i].fw1_start * dump_nand_fcb[i].pagesize, - dump_nand_fcb[i].fw1_pages * dump_nand_fcb[i].pagesize, - dump_nandboot_size - dump_nand_fcb[i].fw1_start * - dump_nand_fcb[i].pagesize); - if (is_imx8m()) { - printf("Extra Firmware: image #0 @ 0x%x size 0x%x - available 0x%llx\n", - dump_nand_fcb[i].fw1_start * - dump_nand_fcb[i].pagesize + dump_mtd->erasesize * - ((IMX8MQ_SPL_SZ + dump_mtd->erasesize - 1) / - dump_mtd->erasesize), - dump_nand_fcb[i].fw1_pages * dump_nand_fcb[i].pagesize, - dump_nandboot_size - - (dump_nand_fcb[i].fw1_start * - dump_nand_fcb[i].pagesize + dump_mtd->erasesize * - ((IMX8MQ_SPL_SZ + dump_mtd->erasesize - 1) / - dump_mtd->erasesize))); + for (i = 0; i < dbbt->dbbtpages; ++i) + printf("%d ", *((u32 *)(dbbt_data_page + i))); + + if (!(plat_config.misc_flags & FIRMWARE_EXTRA_ONE)) { + printf("Firmware: image #0 @ 0x%x size 0x%x\n", + fcb->fw1_start, fcb->fw1_pages * mtd->writesize); + printf("Firmware: image #1 @ 0x%x size 0x%x\n", + fcb->fw2_start, fcb->fw2_pages * mtd->writesize); + } else { + printf("Firmware: image #0 @ 0x%x size 0x%x\n", + fcb->fw1_start, fcb->fw1_pages * mtd->writesize); + printf("Firmware: image #1 @ 0x%x size 0x%x\n", + fcb->fw2_start, fcb->fw2_pages * mtd->writesize); + /* TODO: Add extra image information */ } } -static int do_nandbcb_dump(int argc, char * const argv[]) +static bool check_fingerprint(void *data, int fingerprint) { - int num; - int stride; - int search_area_sz; - bool bab_block_table[BOOT_SEARCH_COUNT]; - int bab_block_flag; + int off = 4; - if (argc != 2) - return CMD_RET_USAGE; + return (*(int *)(data + off) == fingerprint); +} - switch (argv[1][0]) { - case '0': - num = 0; - break; - case '1': - num = 1; - break; - default: - return CMD_RET_USAGE; - } +static int nandbcb_dump(struct boot_config *boot_cfg) +{ + int i; + loff_t off; + struct mtd_info *mtd = boot_cfg->mtd; + struct fcb_block fcb, fcb_copy; + struct dbbt_block dbbt, dbbt_copy; + void *dbbt_data_page, *dbbt_data_page_copy; + bool fcb_not_found, dbbt_not_found; + int ret = 0; - /* dump data which is planned to be encoded and written to NAND chip */ - mtd_cfg_dump(); + dbbt_data_page = kzalloc(mtd->writesize, GFP_KERNEL); + if (!dbbt_data_page) { + printf("failed to allocate dbbt_data_page\n"); + ret = -ENOMEM; + return ret; + } - stride = dump_mtd->erasesize; - search_area_sz = BOOT_SEARCH_COUNT * stride; - printf("stride: %x, search_area_sz: %x\n", stride, search_area_sz); + dbbt_data_page_copy = kzalloc(mtd->writesize, GFP_KERNEL); + if (!dbbt_data_page_copy) { + printf("failed to allocate dbbt_data_page\n"); + ret = -ENOMEM; + goto dbbt_page_err; + } - bab_block_flag = 0; - for (int i = 0; i < BOOT_SEARCH_COUNT; i++) { - if (mtd_block_isbad(dump_mtd, - (loff_t)(dump_mtd->erasesize * i))) { - bab_block_table[i] = 1; - bab_block_flag = 1; - continue; - } - bab_block_table[i] = 0; - if (!memcmp(dump_nand_fcb + i, &dump_fill_fcb, - sizeof(dump_fill_fcb))) { - printf("mtd: found FCB%d candidate version %08x @%d:0x%x\n", - i, dump_nand_fcb[i].version, i, dump_fcb_off[i]); + /* read fcb */ + fcb_not_found = 1; + off = 0; + for (i = 0; i < g_boot_search_count; ++i) { + if (fcb_not_found) { + ret = read_fcb(boot_cfg, &fcb, off); + + if (ret < 0) + goto dbbt_page_copy_err; + else if (ret == 1) + continue; + else if (ret == 0) + if (check_fingerprint(&fcb, FCB_FINGERPRINT)) + fcb_not_found = 0; } else { - printf("mtd: FCB%d not found\n", i); + ret = read_fcb(boot_cfg, &fcb_copy, off); + + if (ret < 0) + goto dbbt_page_copy_err; + if (memcmp(&fcb, &fcb_copy, + sizeof(struct fcb_block))) { + printf("FCB copies are not identical\n"); + ret = -EINVAL; + goto dbbt_page_copy_err; + } } - } - - for (int i = 0; i < BOOT_SEARCH_COUNT; i++) { - if (mtd_block_isbad(dump_mtd, - (loff_t)(dump_mtd->erasesize * i))) - continue; - if (!memcmp(dump_nand_dbbt + i, &dump_fill_dbbt, - sizeof(dump_fill_dbbt))) { - printf("mtd: DBBT%d found\n", i); - printf("mtd: Valid DBBT%d found @%d:0x%x\n", - i, i, dump_dbbt_off[i]); + /* next read location */ + off += g_boot_search_stride; + } + /* read dbbt*/ + dbbt_not_found = 1; + off = boot_cfg->search_area_size_in_bytes; + for (i = 0; i < g_boot_search_count; ++i) { + if (dbbt_not_found) { + ret = read_dbbt(boot_cfg, &dbbt, dbbt_data_page, off); + + if (ret < 0) + goto dbbt_page_copy_err; + else if (ret == 1) + continue; + else if (ret == 0) + if (check_fingerprint(&dbbt, DBBT_FINGERPRINT)) + dbbt_not_found = 0; } else { - printf("mtd: DBBT%d not found\n", i); - } - } - if (bab_block_flag == 0) { - printf("no bad block found, dbbt: %08x\n", - dump_fill_dbbt.fingerprint); - } else { - for (int i = 0; i < BOOT_SEARCH_COUNT; i++) { - if (bab_block_table[i] == 1) - printf("mtd: bad block @ 0x%llx\n", - (loff_t)(dump_mtd->erasesize * i)); + ret = read_dbbt(boot_cfg, &dbbt_copy, + dbbt_data_page_copy, off); + + if (ret < 0) + goto dbbt_page_copy_err; + if (memcmp(&dbbt, &dbbt_copy, + sizeof(struct dbbt_block))) { + printf("DBBT copies are not identical\n"); + ret = -EINVAL; + goto dbbt_page_copy_err; + } + if (dbbt.dbbtpages > 0 && + memcmp(dbbt_data_page, dbbt_data_page_copy, + mtd->writesize)) { + printf("DBBT data copies are not identical\n"); + ret = -EINVAL; + goto dbbt_page_copy_err; + } } + + /* next read location */ + off += g_boot_search_stride; } - /* dump data which is read from NAND chip */ - if (num > (BOOT_SEARCH_COUNT - 1)) - return CMD_RET_USAGE; + dump_structure(boot_cfg, &fcb, &dbbt, dbbt_data_page); + +dbbt_page_copy_err: + kfree(dbbt_data_page_copy); +dbbt_page_err: + kfree(dbbt_data_page); + + return ret; +} + +static int do_nandbcb_dump(int argc, char * const argv[]) +{ + struct boot_config cfg; + int ret; - if (bab_block_table[num] == 1) { - printf("mtd: bad block @ 0x%llx (FCB - DBBT)\n", - (loff_t)(dump_mtd->erasesize * num)); + if (argc != 2) return CMD_RET_USAGE; - } - mtd_dump_structure(num); + memset(&cfg, 0, sizeof(struct boot_config)); + if (nandbcb_get_info(argc, argv, &cfg)) + return CMD_RET_FAILURE; + + if (nandbcb_get_size(argc, argv, 1, &cfg)) + return CMD_RET_FAILURE; - return 0; + if (nandbcb_set_boot_config(argc, argv, &cfg)) + return CMD_RET_FAILURE; + + ret = nandbcb_dump(&cfg); + if (ret) + return ret; + + return ret; } -static int do_nandbcb_update(int argc, char * const argv[]) +static int do_nandbcb_init(int argc, char * const argv[]) { - struct mtd_info *mtd; - loff_t addr, offset, size, maxsize; - char *endp; u_char *buf; - int dev; + size_t size; + loff_t addr; + char *endp; int ret; + struct boot_config cfg; if (argc != 4) return CMD_RET_USAGE; - dev = nand_curr_device; - if (dev < 0) { - printf("failed to get nand_curr_device, run nand device\n"); + memset(&cfg, 0, sizeof(struct boot_config)); + if (nandbcb_get_info(argc, argv, &cfg)) return CMD_RET_FAILURE; - } - addr = simple_strtoul(argv[1], &endp, 16); - if (*argv[1] == 0 || *endp != 0) + if (nandbcb_get_size(argc, argv, 2, &cfg)) return CMD_RET_FAILURE; + size = cfg.boot_stream1_size; - mtd = get_nand_dev_by_index(dev); - if (mtd_arg_off_size(argc - 2, argv + 2, &dev, &offset, &size, - &maxsize, MTD_DEV_TYPE_NAND, mtd->size)) + if (nandbcb_set_boot_config(argc, argv, &cfg)) return CMD_RET_FAILURE; - /* dump_mtd and dump_nandboot_size are used for "nandbcb dump [-v]" */ - dump_mtd = mtd; - dump_nandboot_size = maxsize; + addr = simple_strtoul(argv[1], &endp, 16); + if (*argv[1] == 0 || *endp != 0) + return CMD_RET_FAILURE; buf = map_physmem(addr, size, MAP_WRBACK); if (!buf) { @@ -846,7 +1423,7 @@ static int do_nandbcb_update(int argc, char * const argv[]) return CMD_RET_FAILURE; } - ret = nandbcb_update(mtd, offset, size, maxsize, buf); + ret = nandbcb_init(&cfg, buf); return ret == 0 ? CMD_RET_SUCCESS : CMD_RET_FAILURE; } @@ -860,12 +1437,36 @@ static int do_nandbcb(cmd_tbl_t *cmdtp, int flag, int argc, if (argc < 3) goto usage; + /* check the platform config first */ + if (is_mx6sx()) { + plat_config = imx6sx_plat_config; + } else if (is_mx7()) { + plat_config = imx7d_plat_config; + } else if (is_mx6ul() || is_mx6ull()) { + plat_config = imx6ul_plat_config; + } else if (is_mx6() && !is_mx6sx() && !is_mx6ul() && !is_mx6ull()) { + plat_config = imx6qdl_plat_config; + } else if (is_imx8mq()) { + plat_config = imx8mq_plat_config; + } else if (is_imx8mm()) { + plat_config = imx8mm_plat_config; + } else if (is_imx8mn()) { + plat_config = imx8mn_plat_config; + } else if (is_imx8qm() || is_imx8qxp()) { + plat_config = imx8q_plat_config; + } else { + printf("ERROR: Unknown platform\n"); + return CMD_RET_FAILURE; + } + + /* TODO: set the boot search count if need to read from fuse */ + cmd = argv[1]; --argc; ++argv; - if (strcmp(cmd, "update") == 0) { - ret = do_nandbcb_update(argc, argv); + if (strcmp(cmd, "init") == 0) { + ret = do_nandbcb_init(argc, argv); goto done; } @@ -888,19 +1489,19 @@ usage: #ifdef CONFIG_SYS_LONGHELP static char nandbcb_help_text[] = - "update addr off|partition len - update 'len' bytes starting at\n" + "init addr off|partition len - update 'len' bytes starting at\n" " 'off|part' to memory address 'addr', skipping bad blocks\n" - "bcbonly fw-size fw1-off [fw2-off] - write only BCB (FCB and DBBT)\n" - " where `fw-size` is fw sizes in bytes, `fw1-off`\n" + "nandbcb bcbonly off|partition fw1-off fw1-size [fw2-off fw2-size]\n" + " - write BCB only (FCB and DBBT)\n" + " where `fwx-size` is fw sizes in bytes, `fw1-off`\n" " and `fw2-off` - firmware offsets\n" " FIY, BCB isn't erased automatically, so mtd erase should\n" " be called in advance before writing new BCB:\n" " > mtd erase mx7-bcb\n" - "nandbcb dump num - verify/dump boot structures\n" - " 'num' can be set to 0 and 1"; + "nandbcb dump off|partition - dump/verify boot structures\n"; #endif -U_BOOT_CMD(nandbcb, 5, 1, do_nandbcb, - "i.MX6/i.MX7 NAND Boot Control Blocks write", +U_BOOT_CMD(nandbcb, 7, 1, do_nandbcb, + "i.MX NAND Boot Control Blocks write", nandbcb_help_text ); From patchwork Tue May 5 14:04:04 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peng Fan X-Patchwork-Id: 1283616 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=nxp.com header.i=@nxp.com header.a=rsa-sha256 header.s=selector2 header.b=cy5Slg3e; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49GgrW69jtz9sP7 for ; Tue, 5 May 2020 23:42:19 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 01FAF82097; Tue, 5 May 2020 15:41:31 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=nxp.com header.i=@nxp.com header.b="cy5Slg3e"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 037FE82085; Tue, 5 May 2020 15:41:27 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FORGED_SPF_HELO,MSGID_FROM_MTA_HEADER, SPF_HELO_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.2 Received: from EUR05-VI1-obe.outbound.protection.outlook.com (mail-vi1eur05on2061e.outbound.protection.outlook.com [IPv6:2a01:111:f400:7d00::61e]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 32DF781FB6 for ; Tue, 5 May 2020 15:41:23 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=peng.fan@nxp.com ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=nRQY6wz7i7gJC73TitmXZKO4/hFUnpQHSa2dEFWCoGlZCK77GL8lkBqbUQq8ztfdNyRs2VIuaetLdufXJoLtuTtcLVpozzfdu6KqU5CmS5clz/OlcbXsDOgtyxKZiN8ZyFoAqFT+vUEY5OMbzamBujsjES6LMuBg9hD1i7ZyY0qn1JZrBf3B298A+M1qZaarplatfA4EfOy+KaJ+Z3PJTmVmgB/MirFJlY/DUDUW0TP5rx+/GlhbN5FQcGuvhkNlSFP5gm5BWHrP7xnO9jFMU4IXtcI7K/I5QczgB1zn7EXtw2VVL06gQbfc1DE9X0hzGfHTCcrohKX2Bg39gXX0Ow== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=P8yRKe6WMXxKs01nYc+C3gRTcmvWkO4OvV6XAY5o2rU=; b=VOTpBlRAw8PaEJOVkrjNczhXCT3c31FOLkNlHbOPgoyZ6fz0jmsr2pn8/ha8wS9oBJPP2tRU6fU/ZZIvQ2PjQvtFg84+F7Z6SzJRJh4xGX7qSvYAqM5RCEFM93k+tkAKZHpKkWVkpz7D8/Ls4Zmruzpvm/2aYl2SSZNIkWlOOjeY8mJy8Z6HwZdybtLnZWyaphW+LZkh2L1/mTJjMpB9JdT2D0JIice8rz4H9nHSnj+yfKuoxDz3COGBQQyFhYO1oy4wm5BlkvRxKWCUPRsRTmcMm3WK7GTVxCw8DYAPgu/or0O1jtLf9RD61LUp+KMo3gH4lsYdNzw246Ejk0cDTA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nxp.com; dmarc=pass action=none header.from=nxp.com; dkim=pass header.d=nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=P8yRKe6WMXxKs01nYc+C3gRTcmvWkO4OvV6XAY5o2rU=; b=cy5Slg3e/DzDv1Z4cY8QCvnVEV4Txtgf65S1oPXSwrJ1z69cD/sljjdIpnb7DxTpW8RBV6+AgSPVGjUcMK8XPQlUdoPMepC/WD2DDoFTA4iTPudnBfCTVx2hXxEs+Ovnyo67xBukWbJKmFrr0W6kXbPq16b+j8RFPKWnuQ0kyYo= Authentication-Results: denx.de; dkim=none (message not signed) header.d=none;denx.de; dmarc=none action=none header.from=nxp.com; Received: from DB6PR0402MB2760.eurprd04.prod.outlook.com (2603:10a6:4:a1::14) by DB6PR0402MB2759.eurprd04.prod.outlook.com (2603:10a6:4:a2::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2958.27; Tue, 5 May 2020 13:41:22 +0000 Received: from DB6PR0402MB2760.eurprd04.prod.outlook.com ([fe80::d17b:d767:19c3:b871]) by DB6PR0402MB2760.eurprd04.prod.outlook.com ([fe80::d17b:d767:19c3:b871%6]) with mapi id 15.20.2958.030; Tue, 5 May 2020 13:41:22 +0000 From: Peng Fan To: sbabic@denx.de, festevam@gmail.com, han.xu@nxp.com Cc: uboot-imx@nxp.com, u-boot@lists.denx.de, jagan@amarulasolutions.com, Peng Fan Subject: [PATCH 6/6] nandbcb: read boot search count from fuse for imx8qxp Date: Tue, 5 May 2020 22:04:04 +0800 Message-Id: <20200505140404.27407-7-peng.fan@nxp.com> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20200505140404.27407-1-peng.fan@nxp.com> References: <20200505140404.27407-1-peng.fan@nxp.com> X-ClientProxiedBy: SGAP274CA0024.SGPP274.PROD.OUTLOOK.COM (2603:1096:4:b6::36) To DB6PR0402MB2760.eurprd04.prod.outlook.com (2603:10a6:4:a1::14) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from linux-1xn6.ap.freescale.net (119.31.174.71) by SGAP274CA0024.SGPP274.PROD.OUTLOOK.COM (2603:1096:4:b6::36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2958.21 via Frontend Transport; Tue, 5 May 2020 13:41:19 +0000 X-Mailer: git-send-email 2.16.4 X-Originating-IP: [119.31.174.71] X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: 0ccc0032-189a-4f27-c362-08d7f0f9ff6d X-MS-TrafficTypeDiagnostic: DB6PR0402MB2759:|DB6PR0402MB2759: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:4941; X-Forefront-PRVS: 0394259C80 X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: w9Y2xTzC1H/WpfHkhTcvc99f2aPmPmw1A3BGsTUCUoNV0a+3q69TtOESRlGUSki/fWiHp1vLHNF0XaTE59Kl0g20qjc8WdHLmFtF3koiSN9W8d/tcCncy6f4pORFYpEcv1hADsncalB5e4CZTJG1Jgu44JNoqXN+h11E+1UfB1Nxv5H6XKCYLbeLGbJrIlp9FCk8qM0l0JqQgm+nOAYcoK/xozUB1nBHX7JMbsHZ+34/qH5FIhfnIrtvjpJToPHCpIHQ/2YHyg5HfjSyFsLe+tXzVgwXONNaqosxksMOPuz63uCcez1gTzNrcdUpK3yrbyoQqnx2duU7EHYnHTtPDIpv42nBYx8jhsVkVN7njpnHZ81SiyDxXyqd/noQYJgnYbKcOMkJSlOS6zAlVLMddiiY/I5wi817K7pEZTMTdeq8mqmjiUMsg3wOo3XaTV7+deP4n2o8GlLoDZKV8wvK+eSLGB7GpjDDMVgyuwfOIszeI2qT/HTtqgnOpaVS2lcj/Gx1uzHF4QXiDR/GPjfqLGLcjiXJ3KlEUsLH+GcTnHawEVb8d8W5RRgKJOIz/vWX X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:DB6PR0402MB2760.eurprd04.prod.outlook.com; PTR:; CAT:NONE; SFTY:; SFS:(4636009)(366004)(33430700001)(86362001)(6506007)(52116002)(6486002)(4326008)(498600001)(2906002)(36756003)(6636002)(6512007)(1076003)(5660300002)(44832011)(8676002)(26005)(186003)(956004)(2616005)(66946007)(66476007)(33440700001)(66556008)(8936002)(6666004)(16526019)(32563001); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData: 1EpuxvWMFLhz91zkSOaC6WEM/Jtcsz4ronPp9L2c1fj/T5pGjO1S/rOxQaOIvcrEsNCyQ94ov4A6w5wSNcpDGlupifv+dTidQUCJeK2wkFa1xq5Q7NqKvote71XGHsvVHYNX/PJutH0hZNfbDhEvkEbd+/L3vipjOnmzCaE15vZLisGDQeqhuC+nq6KWZ3/fyxeLZgzcaWqM8ArL97lEC+PuMNq6jPSTONpd5CdG1nhHvXzj+tFOfDwsGs5Ika6Rh7rjU4vLAId+hTKvnD5tQV7zivmWrIhQVEgjo4BTorFD1PJ/PCEzObFRnNVGXiJN4OnFIr3YZ8TCehqIlF8g68URthzJ4EcTQBv+1HD0sZv7OWp2ELSMGg2BCmj+MLign3Kf81swDFS+8FMeUknjI68tcleLIcCwbAGcaCZhFjlJ9GtHxMiO3sPVlnP6xwLqacNKwQFm1bzSh+/0/4RBHCSf4mf9AxssjICqedPYjS9zrxw7o4pwDi3dqRDqCY4juiw59juupJxjo+QCgWhamSGBZJ2zm+pcLi4yAzcQLu+vA1k16cjg1Xkc0OTmOHIeRPhqwY2U3Adc0IWl/NnjtVugKzDgMH8ku449UKXNN/ZbVpy42khu1phybyen6nS+JFyNvytTcVdlRXbkIB7CfMv4RfqZeL4++B0QZSV/Z4AftIv+oB5C68QF6ENStA69QxxxkrLPtJNO7s2X7HOgyv0hLoLlSHcYslLVzhR6yPClxBFDGxhZQwe5ntx2JAtSre+5YbB4gY2PQlAvgv/uNfA72VTgOaYtUfBTyNWqWno= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 0ccc0032-189a-4f27-c362-08d7f0f9ff6d X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 May 2020 13:41:22.1389 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: HQZ2zPXKp6NiqAacWxfiD6sTK/z4gn2SEVF00j26nk5gNnzxL2rXT+cXhWGT8Y0Dbkc95BKNq2pHxhxWsy7zDQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB6PR0402MB2759 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de X-Virus-Status: Clean From: Han Xu add support for imx8qxp to read boot search count from fuse in nandbcb Signed-off-by: Han Xu Signed-off-by: Peng Fan --- arch/arm/mach-imx/cmd_nandbcb.c | 39 ++++++++++++++++++++++++++++++++++++++- 1 file changed, 38 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-imx/cmd_nandbcb.c b/arch/arm/mach-imx/cmd_nandbcb.c index ab12b1f1cf..94cae146ce 100644 --- a/arch/arm/mach-imx/cmd_nandbcb.c +++ b/arch/arm/mach-imx/cmd_nandbcb.c @@ -27,6 +27,7 @@ #include #include #include +#include #include "../../../cmd/legacy-mtd-utils.h" @@ -1260,6 +1261,35 @@ static bool check_fingerprint(void *data, int fingerprint) return (*(int *)(data + off) == fingerprint); } +static int fuse_to_search_count(u32 bank, u32 word, u32 mask, u32 off) +{ + int err; + u32 val; + int ret; + + /* by default, the boot search count from fuse should be 2 */ + err = fuse_read(bank, word, &val); + if (err) + return 2; + + val = (val & mask) >> off; + + switch (val) { + case 0: + ret = 2; + break; + case 1: + case 2: + case 3: + ret = 1 << val; + break; + default: + ret = 2; + } + + return ret; +} + static int nandbcb_dump(struct boot_config *boot_cfg) { int i; @@ -1459,7 +1489,14 @@ static int do_nandbcb(cmd_tbl_t *cmdtp, int flag, int argc, return CMD_RET_FAILURE; } - /* TODO: set the boot search count if need to read from fuse */ + if (plat_config.misc_flags & BT_SEARCH_CNT_FROM_FUSE) { + if (is_imx8qxp()) { + g_boot_search_count = fuse_to_search_count(0, 720, + 0xc0, 6); + printf("search count set to %d from fuse\n", + g_boot_search_count); + } + } cmd = argv[1]; --argc;