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Wed, 29 Apr 2020 09:37:42 +0200 (CEST) Received: from SI-HUB2000.de.bosch.com (si-hub2000.de.bosch.com [10.4.103.108]) by si0vm1949.rbesz01.com (Postfix) with ESMTPS id 49Br2Y6mj5z6CjZNV; Wed, 29 Apr 2020 09:37:41 +0200 (CEST) Received: from localhost.localdomain (10.195.6.238) by SI-HUB2000.de.bosch.com (10.4.103.108) with Microsoft SMTP Server id 15.1.1979.3; Wed, 29 Apr 2020 09:37:40 +0200 From: Moses Christopher To: CC: , , , Subject: [PATCH] drivers: video: Add Support for Himax HX8238D Panel Date: Wed, 29 Apr 2020 07:37:11 +0000 Message-ID: <20200429073711.23349-1-BollavarapuMoses.Christopher@in.bosch.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-Originating-IP: [10.195.6.238] X-Brightmail-Tracker: H4sIAAAAAAAAA22SfUxbZRTGedsLvbTccXuhcOzGZq5h0U6+NpiwFadOs4aIGhcT3RBoxx2t 0A/bwmCarYCawJjSLQboYjfKl3yPLltKJpSRCHSTbKITYQwVwfHRytjGphGcbQqjf/jfec9z fud53ycvzqY6OUJcodIzWpU0lw7gYtxdbRFR/dFN6bGmHpTYcbsOJVYOuPwTvzx1gZPo6i7l vIRJVu6MYBKzaRCTzPU2cyRD4zb0FnaAK85ichX5jDbmxUyu/PMFoabt9QLr4ESAAU2Jy1Ag DmQ8zNYb/csQF6fIKhZcnq5lew92BJ0zdZj30IpgpWfAPYbjAeResI3He+hQUgizpZ1sT80m C6H19jTLU4eQr8LyQC3mqTEyEn4+aeJ4UIJ8A0ZH3/Qab4HrJ9s5npog+eConsK8a7ZAycUz qysBrszMsL3zT4NtzBFQgYJNPojJBzH5IOcQuxkJDjOx+cq4F+Jjo7UyRnc0Ni76kFppRd5I Q23IUX43ug+xcNSHEnAWLSBmg5vSqQ0ydVahXKqTZ2jzchkdLSSOO0vfp0KetHV5MqVCp1Oo VX0IcDYdSkzKG9IpIktaeJTRqr1YH9qIY3Q4IeB+lE6R2VI9k8MwGka7pu7GcRoIRZTbkK9l spmCw4pc/ZpMRxDIz8+PCvNVfG1ZeGAf2oEHub27RO4VhE4jVeoU2av4U16cWuuuo1fRXtzR XGdhU5hKrWKE4YTweTdPeibleaonNxBuIoic+nRK4COsb5lDIwhHdAjR7oGD3J913RsIgycu /mpzHdpe62bI4TAY/xBOLRgRmG1LCLoelbDgQVMLG0bPFWFgHSnHYKm1BQOzuQ2DlrGBAJit nsehyGLlgrm3kwefnOjlwenFYR6M1/3CA+eJxzywf9UYBF2llmAYbG8Ohr+7vw+Gv74rJqGk f5qEsZJlEi7X9fDhm6suPkys3KRgqtESAs4L3QK4P/5QAH/OFYVB1dL1sDl3rCx3rDkhjZ5Y 9VL9/8S62l1/m9DAyl8+f+/XGzk1dI3B/s4fL28aXbEmffysMomHKjPU4fWfnlZJ9+yZlMbc 2IlJdsU93n5JbBQfF3EdHRmahXCBc9vwjsy7Zv+0xfLd25Jfya4qbhgyOrNSoy/+ONFg3vcg YZgzmZY7JFuIciLTxmMtlSsJKdXk+eSZndYjMn532uLs7w/7hRVxlbcii87qg56rV918LSY5 M3WAn/N2+SObc19/NpeypzQG2jWW+//S9Neims2/icT2+Z/m929OOfgu772zl4zTR25tLZSf SX5m/4F7E//M+V8rOyS+9kHDZ2mmatHBrZkRV1wzx5JEd2qN0wZZRWjxtx0/FMxHtlhcytQN sV/QmE4ujROxtTrpf1ElHS/EBAAA X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de X-Virus-Status: Clean * SPI based initialization for HX8238D * Resolution: 320x240 * Available Color-Modes: RGB/BGR Example for DT-Binding in *-u-boot.dtsi &spi0 { lcd0: display@0 { compatible = "himax,hx8238d"; pinctrl-names = "default"; pinctrl-0 = <&lcd0_pins>; reg = <0>; label = "lcd"; spi-max-frequency = <100000>; }; }; * Derived from the work done by Sjoerd Simons https://gitlab.apertis.org/packaging/u-boot/-/blob\ /5f259720e3e64965d50da89a841ad6eb256a47df/debian/patches\ /apertis/powertools/0005-video-Add-Himax-HX8238-D-driver.patch * Tested on Bosch Guardian Board Cc: Sjoerd Simons Signed-off-by: Moses Christopher --- drivers/video/Kconfig | 10 ++ drivers/video/Makefile | 1 + drivers/video/hx8238d.c | 196 ++++++++++++++++++++++++++++++++++++++++ 3 files changed, 207 insertions(+) create mode 100644 drivers/video/hx8238d.c diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 7c5012a67f..90b2fb0ec2 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -113,6 +113,16 @@ config CONSOLE_TRUETYPE With this option you can adjust the text size and use a variety of fonts. Note that this is noticeably slower than with normal console. +config DM_PANEL_HX8238D + bool "Enable Himax HX-8238D LCD driver" + depends on DM_VIDEO + help + Support for HX-8238D LCD Panel Initialization using SPI. + The HX8238-D is a single chip controller and driver LSI that + integrates the power circuit. + It can drive a maximum 960x240 dot graphics on a-TFT panel + displays in 16M colors with dithering. + config CONSOLE_TRUETYPE_SIZE int "TrueType font size" depends on CONSOLE_TRUETYPE diff --git a/drivers/video/Makefile b/drivers/video/Makefile index df7119d62a..2b5f2c9cbc 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -13,6 +13,7 @@ obj-$(CONFIG_DISPLAY) += display-uclass.o obj-$(CONFIG_DM_VIDEO) += backlight-uclass.o obj-$(CONFIG_VIDEO_MIPI_DSI) += dsi-host-uclass.o obj-$(CONFIG_DM_VIDEO) += panel-uclass.o simple_panel.o +obj-$(CONFIG_DM_PANEL_HX8238D) += hx8238d.o obj-$(CONFIG_DM_VIDEO) += video-uclass.o vidconsole-uclass.o obj-$(CONFIG_DM_VIDEO) += video_bmp.o endif diff --git a/drivers/video/hx8238d.c b/drivers/video/hx8238d.c new file mode 100644 index 0000000000..9197826360 --- /dev/null +++ b/drivers/video/hx8238d.c @@ -0,0 +1,196 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copied from simple-panel + * Copyright (c) 2016 Google, Inc + * Written by Simon Glass + * Copyright (c) 2018 Sjoerd Simons + * Modified by Moses Christopher + * + * Panel Initialization for HX8238D panel from Himax + * Resolution: 320x240 + * + */ + +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +/* Register Address */ +#define HX8238D_OUTPUT_CTRL_ADDR 0x01 +#define HX8238D_LCD_AC_CTRL_ADDR 0x02 +#define HX8238D_POWER_CTRL_1_ADDR 0x03 +#define HX8238D_DATA_CLR_CTRL_ADDR 0X04 +#define HX8238D_FUNCTION_CTRL_ADDR 0x05 +#define HX8238D_LED_CTRL_ADDR 0x08 +#define HX8238D_CONT_BRIGHT_CTRL_ADDR 0x0A +#define HX8238D_FRAME_CYCLE_CTRL_ADDR 0x0B +#define HX8238D_POWER_CTRL_2_ADDR 0x0D +#define HX8238D_POWER_CTRL_3_ADDR 0x0E +#define HX8238D_GATE_SCAN_POS_ADDR 0x0F +#define HX8238D_HORIZONTAL_PORCH_ADDR 0x16 +#define HX8238D_VERTICAL_PORCH_ADDR 0x17 +#define HX8238D_POWER_CTRL_4_ADDR 0x1E +#define HX8238D_GAMMA_CTRL_1_ADDR 0x30 +#define HX8238D_GAMMA_CTRL_2_ADDR 0x31 +#define HX8238D_GAMMA_CTRL_3_ADDR 0x32 +#define HX8238D_GAMMA_CTRL_4_ADDR 0x33 +#define HX8238D_GAMMA_CTRL_5_ADDR 0x34 +#define HX8238D_GAMMA_CTRL_6_ADDR 0x35 +#define HX8238D_GAMMA_CTRL_7_ADDR 0x36 +#define HX8238D_GAMMA_CTRL_8_ADDR 0x37 +#define HX8238D_GAMMA_CTRL_9_ADDR 0x3A +#define HX8238D_GAMMA_CTRL_10_ADDR 0x3B + +/* Register Data */ +#define HX8238D_OUTPUT_CTRL 0x6300 +#define HX8238D_LCD_AC_CTRL 0x0200 +#define HX8238D_POWER_CTRL_1 0x6564 +#define HX8238D_DATA_CLR_CTRL 0x04C7 +#define HX8238D_FUNCTION_CTRL 0xA884 +#define HX8238D_LED_CTRL 0x00CE +#define HX8238D_CONT_BRIGHT_CTRL 0x4008 +#define HX8238D_FRAME_CYCLE_CTRL 0xD400 +#define HX8238D_POWER_CTRL_2 0x3229 +#define HX8238D_POWER_CTRL_3 0x1200 +#define HX8238D_GATE_SCAN_POS 0x0000 +#define HX8238D_HORIZONTAL_PORCH 0x9F80 +#define HX8238D_VERTICAL_PORCH 0x3F02 +#define HX8238D_POWER_CTRL_4 0x005C + +/* Gamma Control */ +#define HX8238D_GAMMA_CTRL_1 0x0103 +#define HX8238D_GAMMA_CTRL_2 0x0407 +#define HX8238D_GAMMA_CTRL_3 0x0705 +#define HX8238D_GAMMA_CTRL_4 0x0002 +#define HX8238D_GAMMA_CTRL_5 0x0505 +#define HX8238D_GAMMA_CTRL_6 0x0303 +#define HX8238D_GAMMA_CTRL_7 0x0707 +#define HX8238D_GAMMA_CTRL_8 0x0100 +#define HX8238D_GAMMA_CTRL_9 0x1F00 +#define HX8238D_GAMMA_CTRL_10 0x000F + +/* Primary SPI register identification, 011100 */ +/* Select register, RS=0, RS=0 */ +/* Write register, RS=1, RW=0 */ +#define HX8238D_PRIMARY_SELECT_REG 0x70 +#define HX8238D_PRIMARY_WRITE_REG (HX8238D_PRIMARY_SELECT_REG | BIT(1)) + +#define HX8238D_REG_BIT_LEN 24 + +struct hx8238d_priv { + struct spi_slave *spi; +}; + +static int hx8238d_ofdata_to_platdata(struct udevice *dev) +{ + struct hx8238d_priv *priv = dev_get_priv(dev); + + priv->spi = dev_get_parent_priv(dev); + + return 0; +} + +/* data[0] => REGISTER ADDRESS */ +/* data[1] => REGISTER VALUE */ +struct hx8238d_command { + u16 data[2]; +}; + +static struct hx8238d_command hx8238d_init_commands[] = { + { .data = { HX8238D_OUTPUT_CTRL_ADDR, HX8238D_OUTPUT_CTRL } }, + { .data = { HX8238D_LCD_AC_CTRL_ADDR, HX8238D_LCD_AC_CTRL } }, + { .data = { HX8238D_POWER_CTRL_1_ADDR, HX8238D_POWER_CTRL_1 } }, + { .data = { HX8238D_DATA_CLR_CTRL_ADDR, HX8238D_DATA_CLR_CTRL } }, + { .data = { HX8238D_FUNCTION_CTRL_ADDR, HX8238D_FUNCTION_CTRL } }, + { .data = { HX8238D_LED_CTRL_ADDR, HX8238D_LED_CTRL } }, + { .data = { HX8238D_CONT_BRIGHT_CTRL_ADDR, HX8238D_CONT_BRIGHT_CTRL } }, + { .data = { HX8238D_FRAME_CYCLE_CTRL_ADDR, HX8238D_FRAME_CYCLE_CTRL } }, + { .data = { HX8238D_POWER_CTRL_2_ADDR, HX8238D_POWER_CTRL_2 } }, + { .data = { HX8238D_POWER_CTRL_3_ADDR, HX8238D_POWER_CTRL_3 } }, + { .data = { HX8238D_GATE_SCAN_POS_ADDR, HX8238D_GATE_SCAN_POS } }, + { .data = { HX8238D_HORIZONTAL_PORCH_ADDR, HX8238D_HORIZONTAL_PORCH } }, + { .data = { HX8238D_VERTICAL_PORCH_ADDR, HX8238D_VERTICAL_PORCH } }, + { .data = { HX8238D_POWER_CTRL_4_ADDR, HX8238D_POWER_CTRL_4 } }, + { .data = { HX8238D_GAMMA_CTRL_1_ADDR, HX8238D_GAMMA_CTRL_1 } }, + { .data = { HX8238D_GAMMA_CTRL_2_ADDR, HX8238D_GAMMA_CTRL_2 } }, + { .data = { HX8238D_GAMMA_CTRL_3_ADDR, HX8238D_GAMMA_CTRL_3 } }, + { .data = { HX8238D_GAMMA_CTRL_4_ADDR, HX8238D_GAMMA_CTRL_4 } }, + { .data = { HX8238D_GAMMA_CTRL_5_ADDR, HX8238D_GAMMA_CTRL_5 } }, + { .data = { HX8238D_GAMMA_CTRL_6_ADDR, HX8238D_GAMMA_CTRL_6 } }, + { .data = { HX8238D_GAMMA_CTRL_7_ADDR, HX8238D_GAMMA_CTRL_7 } }, + { .data = { HX8238D_GAMMA_CTRL_8_ADDR, HX8238D_GAMMA_CTRL_8 } }, + { .data = { HX8238D_GAMMA_CTRL_9_ADDR, HX8238D_GAMMA_CTRL_9 } }, + { .data = { HX8238D_GAMMA_CTRL_10_ADDR, HX8238D_GAMMA_CTRL_10 } }, +}; + +/* + * Generate Primary Register Buffer for Register Select and Register Write + * First 6 MSB bits of Primary Register is represented with 011100 + * + */ +static void hx8238d_generate_reg_buffers(struct hx8238d_command command, + u8 *sr_buf, uint8_t *wr_buf) +{ + struct hx8238d_command cmd = command; + + sr_buf[0] = HX8238D_PRIMARY_SELECT_REG; + sr_buf[1] = (cmd.data[0] >> 8) & 0xff; + sr_buf[2] = (cmd.data[0]) & 0xff; + + wr_buf[0] = HX8238D_PRIMARY_WRITE_REG; + wr_buf[1] = (cmd.data[1] >> 8) & 0xff; + wr_buf[2] = (cmd.data[1]) & 0xff; +} + +static int hx8238d_probe(struct udevice *dev) +{ + struct hx8238d_priv *priv = dev_get_priv(dev); + int ret; + + ret = spi_claim_bus(priv->spi); + if (ret) { + debug("Failed to claim bus: %d\n", ret); + return ret; + } + + for (int i = 0; i < ARRAY_SIZE(hx8238d_init_commands); i++) { + u8 sr_buf[3], wr_buf[3]; + const struct hx8238d_command cmd = hx8238d_init_commands[i]; + + hx8238d_generate_reg_buffers(cmd, sr_buf, wr_buf); + ret = spi_xfer(priv->spi, HX8238D_REG_BIT_LEN, sr_buf, NULL, + SPI_XFER_BEGIN | SPI_XFER_END); + if (ret) { + debug("Failed to select register %d\n", ret); + goto free; + } + + ret = spi_xfer(priv->spi, HX8238D_REG_BIT_LEN, wr_buf, NULL, + SPI_XFER_BEGIN | SPI_XFER_END); + if (ret) { + debug("Failed to write value %d\n", ret); + goto free; + } + } + +free: + spi_release_bus(priv->spi); + return ret; +} + +static const struct udevice_id hx8238d_ids[] = { + { .compatible = "himax,hx8238d" }, + { } +}; + +U_BOOT_DRIVER(hx8238d) = { + .name = "hx8238d", + .id = UCLASS_PANEL, + .of_match = hx8238d_ids, + .ofdata_to_platdata = hx8238d_ofdata_to_platdata, + .probe = hx8238d_probe, + .priv_auto_alloc_size = sizeof(struct hx8238d_priv), +};