From patchwork Mon Apr 27 01:17:02 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abhishek Goel X-Patchwork-Id: 1277275 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 499RkM6cTjz9sRf for ; Mon, 27 Apr 2020 11:18:51 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.vnet.ibm.com Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 499RkM4NYTzDqD0 for ; Mon, 27 Apr 2020 11:18:51 +1000 (AEST) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=linux.vnet.ibm.com (client-ip=148.163.158.5; helo=mx0a-001b2d01.pphosted.com; envelope-from=huntbag@linux.vnet.ibm.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.vnet.ibm.com Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 499Rj02kKCzDqTn for ; Mon, 27 Apr 2020 11:17:40 +1000 (AEST) Received: from pps.filterd (m0098417.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 03R13WO8042207; Sun, 26 Apr 2020 21:17:32 -0400 Received: from pps.reinject (localhost [127.0.0.1]) by mx0a-001b2d01.pphosted.com with ESMTP id 30mh31j2m0-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sun, 26 Apr 2020 21:17:32 -0400 Received: from m0098417.ppops.net (m0098417.ppops.net [127.0.0.1]) by pps.reinject (8.16.0.36/8.16.0.36) with SMTP id 03R1HWmQ077945; Sun, 26 Apr 2020 21:17:32 -0400 Received: from ppma04ams.nl.ibm.com (63.31.33a9.ip4.static.sl-reverse.com [169.51.49.99]) by mx0a-001b2d01.pphosted.com with ESMTP id 30mh31j2kk-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sun, 26 Apr 2020 21:17:32 -0400 Received: from pps.filterd (ppma04ams.nl.ibm.com [127.0.0.1]) by ppma04ams.nl.ibm.com (8.16.0.27/8.16.0.27) with SMTP id 03R1Fnd9015427; Mon, 27 Apr 2020 01:17:30 GMT Received: from b06avi18878370.portsmouth.uk.ibm.com (b06avi18878370.portsmouth.uk.ibm.com [9.149.26.194]) by ppma04ams.nl.ibm.com with ESMTP id 30mcu6tswn-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 27 Apr 2020 01:17:30 +0000 Received: from d06av21.portsmouth.uk.ibm.com (d06av21.portsmouth.uk.ibm.com [9.149.105.232]) by b06avi18878370.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 03R1HRDs63242608 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 27 Apr 2020 01:17:27 GMT Received: from d06av21.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 69A6152067; Mon, 27 Apr 2020 01:17:27 +0000 (GMT) Received: from ltc-wspoon6.aus.stglabs.ibm.com (unknown [9.40.193.95]) by d06av21.portsmouth.uk.ibm.com (Postfix) with ESMTP id 0AAFE5204F; Mon, 27 Apr 2020 01:17:25 +0000 (GMT) From: Abhishek Goel To: skiboot@lists.ozlabs.org Date: Sun, 26 Apr 2020 20:17:02 -0500 Message-Id: <20200427011703.65898-1-huntbag@linux.vnet.ibm.com> X-Mailer: git-send-email 2.17.1 X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138, 18.0.676 definitions=2020-04-26_11:2020-04-24, 2020-04-26 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 mlxscore=0 lowpriorityscore=0 malwarescore=0 mlxlogscore=999 priorityscore=1501 phishscore=0 suspectscore=0 clxscore=1015 impostorscore=0 spamscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2003020000 definitions=main-2004270006 Subject: [Skiboot] [RFC 1/2] opal : Support for pre-entry and post-exit of stop state in opal X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ego@linux.vnet.ibm.com, mikey@neuling.org, psampat@linux.ibm.com MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" This patch provides opal support for save restore of sprs in idle stop loop for LE opal. Opal support for stop states is needed to selectively enable stop states or to introduce a quirk quickly in case a buggy stop state is present. We make a opal call from kernel if firmware-stop-support for stop states is enabled. All the quirks for pre-entry of stop state is handled inside opal. A call from opal is made into kernel where we execute stop afer saving of NVGPRs. After waking up from 0x100 vector in kernel, we enter back into opal. All the quirks in post exit path, if any, are then handled in opal, from where we return successfully back to kernel. This patch provide support for shallow stop state only. This idea was first proposed by Nick here: https://patchwork.ozlabs.org/patch/1208159/ Signed-off-by: Abhishek Goel Signed-off-by: Nicholas Piggin --- v1->v2 : Added support for shallow stop states along with quirks. core/opal.c | 111 ++++++++++++++++++++++++++++++++++++++++ include/opal-api.h | 8 ++- include/opal-internal.h | 10 ++++ include/processor.h | 4 ++ 4 files changed, 132 insertions(+), 1 deletion(-) diff --git a/core/opal.c b/core/opal.c index 64fdfe62..2a82bdcf 100644 --- a/core/opal.c +++ b/core/opal.c @@ -44,6 +44,7 @@ static uint64_t opal_dynamic_events; extern uint32_t attn_trigger; extern uint32_t hir_trigger; +struct os_ops os_ops; void opal_table_init(void) { @@ -422,6 +423,116 @@ void add_opal_node(void) memcons_add_properties(); } +/* + * Function to register all the os operations in opal. + * Currently registering a os_ops that will handle idle stop + * saving and restoring of sprs in kernel. + */ +static int64_t opal_register_os_ops(struct opal_os_ops *__os_ops) +{ + struct cpu_thread *cpu; + + for_each_cpu(cpu) { + if (cpu == this_cpu()) + continue; + if (cpu->state == cpu_state_os) + return OPAL_BUSY; + } + + os_ops.os_idle_stop = (void *)be64_to_cpu(__os_ops->os_idle_stop); + + return OPAL_SUCCESS; +} +opal_call(OPAL_REGISTER_OS_OPS, opal_register_os_ops, 1); + +struct p9_sprs { + /* per thread sprs that get lost in shallow states */ + u64 amr; + u64 iamr; + u64 amor; + u64 uamor; +}; + +/* + * Opal function to handle idle stop in kernel. + */ +static uint64_t opal_cpu_idle(__be64 srr1_addr, uint64_t psscr) +{ + int pvr; + u64 mmcra; + u64 mmcr0 = 0; + struct p9_sprs sprs = {}; + u64 *le_srr1 = (u64 *)be64_to_cpu(srr1_addr); + + if (!os_ops.os_idle_stop) + return OPAL_UNSUPPORTED; + + if (proc_gen != proc_gen_p9) + return OPAL_UNSUPPORTED; + + /* Deep states are not supported for opal fallback */ + if ((psscr & OPAL_PM_PSSCR_RL_MASK) >= 4) + return OPAL_UNSUPPORTED; + + pvr = mfspr(SPR_PVR); + if (!(psscr & (OPAL_PM_PSSCR_EC|OPAL_PM_PSSCR_ESL))) { + *le_srr1 = os_ops.os_idle_stop(psscr, false); + goto out; + } + + /* EC=ESL=1 case */ + if (PVR_VERS_MAJ(pvr) == 2 && (PVR_VERS_MIN(pvr) == 0)) + /* + * POWER9 DD2 can incorrectly set PMAO when waking up + * after a state-loss idle. Saving and restoring MMCR0 + * over idle is a workaround. + */ + mmcr0 = mfspr(SPR_MMCR0); + + /* Save sprs lost in shallow state */ + sprs.amr = mfspr(SPR_AMR); + sprs.iamr = mfspr(SPR_IAMR); + sprs.amor = mfspr(SPR_AMOR); + sprs.uamor = mfspr(SPR_UAMOR); + + *le_srr1 = os_ops.os_idle_stop(psscr, true); + + if ((*le_srr1 & SPR_SRR1_PM_WAKE_MASK) != SPR_SRR1_PM_WAKE_NOLOSS) { + + mtspr(SPR_AMR, sprs.amr); + mtspr(SPR_IAMR, sprs.iamr); + mtspr(SPR_AMOR, sprs.amor); + mtspr(SPR_UAMOR, sprs.uamor); + + /* + * Workaround for POWER9 DD2.0, if we lost resources, the ERAT + * might have been corrupted and needs flushing. We also need + * to reload MMCR0 (see mmcr0 comment above). + */ + if (PVR_VERS_MAJ(pvr) == 2 && (PVR_VERS_MIN(pvr) == 0)) { + /* Handle PPC_ISA_3_0_INVALIDATE_ERAT */ + asm volatile (".long 0x7c1003e4": : : "memory"); + mtspr(SPR_MMCR0, mmcr0); + } + + /* + * DD2.2 and earlier need to set then clear bit 60 in MMCRA + * to ensure the PMU starts running. + */ + if (PVR_VERS_MAJ(pvr) == 2 && (PVR_VERS_MIN(pvr) <= 2)) { + mmcra = mfspr(SPR_MMCRA); + mmcra |= PPC_BIT(60); + mtspr(SPR_MMCRA, mmcra); + mmcra &= ~PPC_BIT(60); + mtspr(SPR_MMCRA, mmcra); + } + } + +out: + return OPAL_SUCCESS; +} +opal_call(OPAL_CPU_IDLE, opal_cpu_idle, 2); + static struct lock evt_lock = LOCK_UNLOCKED; void opal_update_pending_evt(uint64_t evt_mask, uint64_t evt_values) diff --git a/include/opal-api.h b/include/opal-api.h index e90cab1e..a1e7d122 100644 --- a/include/opal-api.h +++ b/include/opal-api.h @@ -227,7 +227,9 @@ #define OPAL_SECVAR_ENQUEUE_UPDATE 178 #define OPAL_PHB_SET_OPTION 179 #define OPAL_PHB_GET_OPTION 180 -#define OPAL_LAST 180 +#define OPAL_REGISTER_OS_OPS 181 +#define OPAL_CPU_IDLE 182 +#define OPAL_LAST 182 #define QUIESCE_HOLD 1 /* Spin all calls at entry */ #define QUIESCE_REJECT 2 /* Fail all calls with OPAL_BUSY */ @@ -1255,6 +1257,10 @@ struct opal_mpipl_fadump { struct opal_mpipl_region region[]; }; +struct opal_os_ops { + __be64 os_idle_stop; +}; + #endif /* __ASSEMBLY__ */ #endif /* __OPAL_API_H */ diff --git a/include/opal-internal.h b/include/opal-internal.h index f6ca7ac3..9368fb79 100644 --- a/include/opal-internal.h +++ b/include/opal-internal.h @@ -18,6 +18,14 @@ struct opal_table_entry { u32 nargs; }; +struct os_ops { + /* + * save_gprs help us distinguish between lite states and + * non-lite states. + */ + int64_t (*os_idle_stop)(uint64_t psscr, bool save_gprs); +}; + #ifdef __CHECKER__ #define __opal_func_test_arg(__func, __nargs) 0 #else @@ -75,6 +83,8 @@ extern void opal_run_pollers(void); extern void opal_add_host_sync_notifier(bool (*notify)(void *data), void *data); extern void opal_del_host_sync_notifier(bool (*notify)(void *data), void *data); +extern int64_t os_idle_stop(uint64_t psscr, bool save_gprs); + /* * Opal internal function prototype */ diff --git a/include/processor.h b/include/processor.h index 57c2ee13..ce86017f 100644 --- a/include/processor.h +++ b/include/processor.h @@ -73,12 +73,16 @@ #define SPR_HID4 0x3f4 #define SPR_HID5 0x3f6 #define SPR_PIR 0x3ff /* RO: Processor Identification */ +#define SPR_UAMOR 0x9d /* User Authority Mask Override Register */ +#define SPR_MMCR0 795 +#define SPR_MMCRA 0x312 /* Bits in SRR1 */ #define SPR_SRR1_PM_WAKE_MASK 0x3c0000 /* PM wake reason for P8/9 */ #define SPR_SRR1_PM_WAKE_SRESET 0x100000 #define SPR_SRR1_PM_WAKE_MCE 0x3c0000 /* Use reserved value for MCE */ +#define SPR_SRR1_PM_WAKE_NOLOSS 0x100000 /* Bits in LPCR */ From patchwork Mon Apr 27 01:17:03 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abhishek Goel X-Patchwork-Id: 1277276 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 499Rkg3WFlz9sSY for ; Mon, 27 Apr 2020 11:19:07 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.vnet.ibm.com Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 499Rkf5TRmzDqFD for ; Mon, 27 Apr 2020 11:19:06 +1000 (AEST) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=linux.vnet.ibm.com (client-ip=148.163.158.5; helo=mx0a-001b2d01.pphosted.com; envelope-from=huntbag@linux.vnet.ibm.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.vnet.ibm.com Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 499RjN38NpzDqVV for ; Mon, 27 Apr 2020 11:18:00 +1000 (AEST) Received: from pps.filterd (m0098413.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 03R11T8L015516 for ; Sun, 26 Apr 2020 21:17:58 -0400 Received: from e06smtp01.uk.ibm.com (e06smtp01.uk.ibm.com [195.75.94.97]) by mx0b-001b2d01.pphosted.com with ESMTP id 30mfbr455e-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Sun, 26 Apr 2020 21:17:57 -0400 Received: from localhost by e06smtp01.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Mon, 27 Apr 2020 02:17:01 +0100 Received: from d06av21.portsmouth.uk.ibm.com (d06av21.portsmouth.uk.ibm.com [9.149.105.232]) by b06cxnps3074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 03R1HqcC45350926 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 27 Apr 2020 01:17:52 GMT Received: from d06av21.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 6B51F5204E; Mon, 27 Apr 2020 01:17:52 +0000 (GMT) Received: from ltc-wspoon6.aus.stglabs.ibm.com (unknown [9.40.193.95]) by d06av21.portsmouth.uk.ibm.com (Postfix) with ESMTP id 0381952051; Mon, 27 Apr 2020 01:17:50 +0000 (GMT) From: Abhishek Goel To: skiboot@lists.ozlabs.org Date: Sun, 26 Apr 2020 20:17:03 -0500 X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200427011703.65898-1-huntbag@linux.vnet.ibm.com> References: <20200427011703.65898-1-huntbag@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 20042701-4275-0000-0000-000003C69B99 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 20042701-4276-0000-0000-000038DC2C00 Message-Id: <20200427011703.65898-2-huntbag@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138, 18.0.676 definitions=2020-04-26_11:2020-04-24, 2020-04-26 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 clxscore=1011 mlxscore=0 lowpriorityscore=0 mlxlogscore=999 priorityscore=1501 impostorscore=0 malwarescore=0 suspectscore=0 adultscore=0 spamscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2003020000 definitions=main-2004270001 Subject: [Skiboot] [RFC 2/2] opal : Introducing capability for firmware-stop-support X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ego@linux.vnet.ibm.com, mikey@neuling.org, psampat@linux.ibm.com MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" This patch introduces support for firmware-stop-support. If Kernel does not know about stop version, it can fallback to opal for idle stop support if firmware-stop-supported property is present. Just like "idle-stop", "idle-stop-quirk" can be defined in features if there is some quirk that needs to be handled and if kernel identifies the corresponding version it can use that or fallback to opal for idle stop support. The complete idea was previosuly posted in this patch: https://patchwork.ozlabs.org/project/skiboot/list/?series=162400 Signed-off-by: Pratik Rajesh Sampat Signed-off-by: Abhishek Goel --- v1->v2 : This patch has been newly added in this series. core/cpufeatures.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/core/cpufeatures.c b/core/cpufeatures.c index c6754abb..1f516028 100644 --- a/core/cpufeatures.c +++ b/core/cpufeatures.c @@ -510,6 +510,19 @@ static const struct cpu_feature cpu_features_table[] = { -1, -1, -1, NULL, }, + /* + * ISAv3.0B firmware-stop-support + * Opal fallback for shallow stop states + */ +#ifdef HAVE_BIG_ENDIAN + { "firmware-stop-supported", + CPU_P9, + ISA_V3_0B, USABLE_HV|USABLE_OS, + HV_CUSTOM, OS_CUSTOM, + -1, -1, -1, + NULL, }, +#endif + /* * ISAv3.0B Hypervisor Virtualization Interrupt * Also associated system registers, LPCR EE, HEIC, HVICE,