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Wed, 6 Dec 2017 23:11:16 +0900 (JST) From: KOBAYASHI Yoshitake To: boris.brezillon@free-electrons.com, richard@nod.at, dwmw2@infradead.org, computersforpeace@gmail.com, marek.vasut@gmail.com, cyrille.pitchen@wedev4u.fr, linux-mtd@lists.infradead.org Subject: [PATCH -next v3 1/2] mtd: nand: toshiba: Retrieve ECC requirements from extended ID Date: Wed, 6 Dec 2017 23:04:57 +0900 Message-Id: <1512569098-30038-2-git-send-email-yoshitake.kobayashi@toshiba.co.jp> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1512569098-30038-1-git-send-email-yoshitake.kobayashi@toshiba.co.jp> References: <1512569098-30038-1-git-send-email-yoshitake.kobayashi@toshiba.co.jp> X-MAIL-FROM: X-SOURCE-IP: [172.27.153.190] X-Spam: exempt X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20171206_141200_858627_F9D30659 X-CRM114-Status: GOOD ( 14.50 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.4.1 on casper.infradead.org summary: Content analysis details: (-2.6 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [210.149.48.173 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] 0.0 UNPARSEABLE_RELAY Informational: message has unparseable relay lines X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-kernel@vger.kernel.org, KOBAYASHI Yoshitake MIME-Version: 1.0 Sender: "linux-mtd" Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org This patch enables support to read the ECC strength and size from the NAND flash using Toshiba Memory SLC NAND extended-ID. This patch is based on the information of the 6th ID byte of the Toshiba Memory SLC NAND. Signed-off-by: KOBAYASHI Yoshitake --- drivers/mtd/nand/nand_toshiba.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/drivers/mtd/nand/nand_toshiba.c b/drivers/mtd/nand/nand_toshiba.c index 57df857..c2c141b 100644 --- a/drivers/mtd/nand/nand_toshiba.c +++ b/drivers/mtd/nand/nand_toshiba.c @@ -35,6 +35,34 @@ static void toshiba_nand_decode_id(struct nand_chip *chip) (chip->id.data[5] & 0x7) == 0x6 /* 24nm */ && !(chip->id.data[4] & 0x80) /* !BENAND */) mtd->oobsize = 32 * mtd->writesize >> 9; + + /* + * Extract ECC requirements from 6th id byte. + * For Toshiba SLC, ecc requrements are as follows: + * - 43nm: 1 bit ECC for each 512Byte is required. + * - 32nm: 4 bit ECC for each 512Byte is required. + * - 24nm: 8 bit ECC for each 512Byte is required. + */ + if (chip->id.len >= 6 && nand_is_slc(chip)) { + chip->ecc_step_ds = 512; + switch (chip->id.data[5] & 0x7) { + case 0x4: + chip->ecc_strength_ds = 1; + break; + case 0x5: + chip->ecc_strength_ds = 4; + break; + case 0x6: + chip->ecc_strength_ds = 8; + break; + default: + WARN(1, "Could not get ECC info"); + chip->ecc_step_ds = 0; + break; + } + } else if (chip->id.len < 6 && nand_is_slc(chip)) { + WARN(1, "Could not get ECC info, 6th nand id byte does not exist."); + } } static int toshiba_nand_init(struct nand_chip *chip) From patchwork Wed Dec 6 14:04:58 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: KOBAYASHI Yoshitake X-Patchwork-Id: 845194 X-Patchwork-Delegate: boris.brezillon@free-electrons.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.infradead.org (client-ip=65.50.211.133; helo=bombadil.infradead.org; envelope-from=linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="fmEqZ9f0"; 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Wed, 6 Dec 2017 23:11:21 +0900 (JST) From: KOBAYASHI Yoshitake To: boris.brezillon@free-electrons.com, richard@nod.at, dwmw2@infradead.org, computersforpeace@gmail.com, marek.vasut@gmail.com, cyrille.pitchen@wedev4u.fr, linux-mtd@lists.infradead.org Subject: [PATCH -next v3 2/2] mtd: nand: toshiba: Add support for Toshiba Memory BENAND (Built-in ECC NAND) Date: Wed, 6 Dec 2017 23:04:58 +0900 Message-Id: <1512569098-30038-3-git-send-email-yoshitake.kobayashi@toshiba.co.jp> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1512569098-30038-1-git-send-email-yoshitake.kobayashi@toshiba.co.jp> References: <1512569098-30038-1-git-send-email-yoshitake.kobayashi@toshiba.co.jp> X-MAIL-FROM: X-SOURCE-IP: [172.27.153.190] X-Spam: exempt X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20171206_141200_855550_92278677 X-CRM114-Status: GOOD ( 18.83 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.4.1 on casper.infradead.org summary: Content analysis details: (-2.6 points, 5.0 required) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [210.149.48.174 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] 0.0 UNPARSEABLE_RELAY Informational: message has unparseable relay lines X-BeenThere: linux-mtd@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: Linux MTD discussion mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-kernel@vger.kernel.org, KOBAYASHI Yoshitake MIME-Version: 1.0 Sender: "linux-mtd" Errors-To: linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org This patch enables support for Toshiba Memory BENAND. This checks internal ECC status in read operation when using BENAND and selecting ECC mode as on-die. Signed-off-by: KOBAYASHI Yoshitake --- drivers/mtd/nand/nand_toshiba.c | 89 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 89 insertions(+) diff --git a/drivers/mtd/nand/nand_toshiba.c b/drivers/mtd/nand/nand_toshiba.c index c2c141b..35c0ddf 100644 --- a/drivers/mtd/nand/nand_toshiba.c +++ b/drivers/mtd/nand/nand_toshiba.c @@ -17,6 +17,91 @@ #include +/* ECC Status Read Command for BENAND */ +#define TOSHIBA_NAND_CMD_ECC_STATUS 0x7A + +/* Recommended to rewrite for BENAND */ +#define TOSHIBA_NAND_STATUS_REWRITE_RECOMMENDED BIT(3) + +static int toshiba_nand_benand_status_chk(struct mtd_info *mtd, + struct nand_chip *chip) +{ + unsigned int max_bitflips = 0; + u8 status; + + /* Check Read Status */ + chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); + status = chip->read_byte(mtd); + + /* + * TOSHIBA_NAND_CMD_ECC_STATUS is vendor specific command. + * Currently we have no way to send arbitrary sequences of + * CMD+ADDR+DATA cycles and thus cannot support this custom + * TOSHIBA_NAND_CMD_ECC_STATUS operation. + * For now, we set max_bitflips mtd->bitflip_threshold. + */ + if (status & NAND_STATUS_FAIL) { + /* uncorrectable */ + mtd->ecc_stats.failed++; + } else if (status & TOSHIBA_NAND_STATUS_REWRITE_RECOMMENDED) { + /* correctable */ + max_bitflips = mtd->bitflip_threshold; + mtd->ecc_stats.corrected += max_bitflips; + } + + return max_bitflips; +} + +static int +toshiba_nand_read_page_benand(struct mtd_info *mtd, + struct nand_chip *chip, uint8_t *buf, + int oob_required, int page) +{ + nand_read_page_raw(mtd, chip, buf, oob_required, page); + + return toshiba_nand_benand_status_chk(mtd, chip); +} + +static int +toshiba_nand_read_subpage_benand(struct mtd_info *mtd, + struct nand_chip *chip, uint32_t data_offs, + uint32_t readlen, uint8_t *bufpoi, int page) +{ + uint8_t *p; + + if (data_offs != 0) + chip->cmdfunc(mtd, NAND_CMD_RNDOUT, data_offs, -1); + + p = bufpoi + data_offs; + chip->read_buf(mtd, p, readlen); + + return toshiba_nand_benand_status_chk(mtd, chip); +} + +static void toshiba_nand_benand_init(struct nand_chip *chip) +{ + struct mtd_info *mtd = nand_to_mtd(chip); + + /* + * On BENAND, the entire OOB region can be used by the MTD user. + * The calculated ECC bytes are stored into other isolated + * area which is not accessible to users. + * This is why chip->ecc.bytes = 0. + */ + chip->ecc.bytes = 0; + chip->ecc.size = 512; + chip->ecc.strength = 8; + chip->ecc.read_page = toshiba_nand_read_page_benand; + chip->ecc.read_subpage = toshiba_nand_read_subpage_benand; + chip->ecc.write_page = nand_write_page_raw; + chip->ecc.read_page_raw = nand_read_page_raw; + chip->ecc.write_page_raw = nand_write_page_raw; + + chip->options |= NAND_SUBPAGE_READ; + + mtd_set_ooblayout(mtd, &nand_ooblayout_lp_ops); +} + static void toshiba_nand_decode_id(struct nand_chip *chip) { struct mtd_info *mtd = nand_to_mtd(chip); @@ -70,6 +155,10 @@ static int toshiba_nand_init(struct nand_chip *chip) if (nand_is_slc(chip)) chip->bbt_options |= NAND_BBT_SCAN2NDPAGE; + if (nand_is_slc(chip) && (chip->id.data[4] & 0x80) /* BENAND */ && + (chip->ecc.mode == NAND_ECC_ON_DIE)) + toshiba_nand_benand_init(chip); + return 0; }