From patchwork Tue Apr 7 22:55:53 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Li, Pan2 via Gcc-patches" X-Patchwork-Id: 1267686 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=gcc.gnu.org Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=fTSyFt07; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48xjST2Hl8z9sP7 for ; Wed, 8 Apr 2020 08:56:07 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 134FF3887006; Tue, 7 Apr 2020 22:56:04 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 134FF3887006 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1586300164; bh=pV+cRV93FcLymWqi4hsC6/FMqLSfvFz2ezeM/YrRG38=; h=Date:To:Subject:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:Cc:From; b=fTSyFt07qIg5SbvAlrfTnsbP52+KZFZAnhvWL9WgSTYKGDB+yH1bY/7LSmdRegtpI pPNEkDiT8oMRgoxQKBZVQgsiNEqordv0wgy69hQO8hTGPp44Bo9+zc12jrl6UWayAw LYKfBTaceWXaDlEM812/b/UMZ7rNrq6l8HQLaD3c= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from us-smtp-1.mimecast.com (us-smtp-delivery-1.mimecast.com [205.139.110.120]) by sourceware.org (Postfix) with ESMTP id 06E14385DC3E for ; Tue, 7 Apr 2020 22:56:01 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 06E14385DC3E Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-268-GqLPMTbnNPmIvpTpNdXbtA-1; Tue, 07 Apr 2020 18:55:58 -0400 X-MC-Unique: GqLPMTbnNPmIvpTpNdXbtA-1 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id EE3438017FD for ; Tue, 7 Apr 2020 22:55:57 +0000 (UTC) Received: from tucnak.zalov.cz (ovpn-112-28.ams2.redhat.com [10.36.112.28]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 7F7E95E030; Tue, 7 Apr 2020 22:55:57 +0000 (UTC) Received: from tucnak.zalov.cz (localhost [127.0.0.1]) by tucnak.zalov.cz (8.15.2/8.15.2) with ESMTP id 037MttJg011689; Wed, 8 Apr 2020 00:55:55 +0200 Received: (from jakub@localhost) by tucnak.zalov.cz (8.15.2/8.15.2/Submit) id 037MtrCU011688; Wed, 8 Apr 2020 00:55:53 +0200 Date: Wed, 8 Apr 2020 00:55:53 +0200 To: Jeff Law Subject: [PATCH] postreload: Fix autoinc handling in reload_cse_move2add [PR94516] Message-ID: <20200407225553.GF2212@tucnak> MIME-Version: 1.0 User-Agent: Mutt/1.11.3 (2019-02-01) X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Disposition: inline X-Spam-Status: No, score=-18.8 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Jakub Jelinek via Gcc-patches From: "Li, Pan2 via Gcc-patches" Reply-To: Jakub Jelinek Cc: gcc-patches@gcc.gnu.org Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" Hi! The following testcase shows two separate issues caused by the cselib changes. One is that through the cselib sp tracking improvements on ... r12 = rsp; rsp -= 8; push cst1; push cst2; push cst3; call rsp += 32; rsp -= 8; push cst4; push cst5; push cst6; call rsp += 32; rsp -= 8; push cst7; push cst8; push cst9; call rsp += 32 reload_cse_simplify_set decides to optimize the rsp += 32 insns into rsp = r12 because cselib figures that the r12 register holds the right value. From the pure cost perspective that seems like a win and on its own at least for -Os that would be beneficial, except that there are those rsp -= 8 stack adjustments after it, where rsp += 32; rsp -= 8; is optimized into rsp += 24; by the csa pass, but rsp = r12; rsp -= 8 can't. Dunno what to do about this part, the PR has a hack in a comment. Anyway, the following patch fixes the other part, which isn't a missed optimization, but a wrong-code issue. The problem is that the pushes of constant are on x86 represented through PRE_MODIFY and while move2add_note_store has some code to handle {PRE,POST}_{INC,DEC} without REG_INC note, it doesn't handle {PRE,POST}_MODIFY (that would be enough to fix this testcase). But additionally it looks misplaced, because move2add_note_store is only called on the rtxes that are stored into, while RTX_AUTOINC can happen not just in those, but anywhere else in the instruction (e.g. pop insn can have autoinc in the SET_SRC MEM). REG_INC note seems to be required for any autoinc except for stack pointer autoinc which doesn't have those notes, so this patch just handles the sp autoinc after the REG_INC note handling loop. Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk? 2020-04-07 Jakub Jelinek PR rtl-optimization/94516 * postreload.c: Include rtl-iter.h. (reload_cse_move2add): Handle SP autoinc here by FOR_EACH_SUBRTX_VAR looking for all MEMs with RTX_AUTOINC operand. (move2add_note_store): Remove {PRE,POST}_{INC,DEC} handling. * gcc.dg/torture/pr94516.c: New test. Jakub --- gcc/postreload.c.jj 2020-01-23 20:07:55.041981751 +0100 +++ gcc/postreload.c 2020-04-07 16:13:56.812293400 +0200 @@ -41,6 +41,7 @@ along with GCC; see the file COPYING3. #include "tree-pass.h" #include "dbgcnt.h" #include "function-abi.h" +#include "rtl-iter.h" static int reload_cse_noop_set_p (rtx); static bool reload_cse_simplify (rtx_insn *, rtx); @@ -2090,6 +2091,21 @@ reload_cse_move2add (rtx_insn *first) } } } + + /* There are no REG_INC notes for SP autoinc. */ + subrtx_var_iterator::array_type array; + FOR_EACH_SUBRTX_VAR (iter, array, PATTERN (insn), NONCONST) + { + rtx mem = *iter; + if (mem + && MEM_P (mem) + && GET_RTX_CLASS (GET_CODE (XEXP (mem, 0))) == RTX_AUTOINC) + { + if (XEXP (XEXP (mem, 0), 0) == stack_pointer_rtx) + reg_mode[STACK_POINTER_REGNUM] = VOIDmode; + } + } + note_stores (insn, move2add_note_store, insn); /* If INSN is a conditional branch, we try to extract an @@ -2144,17 +2160,6 @@ move2add_note_store (rtx dst, const_rtx unsigned int regno = 0; scalar_int_mode mode; - /* Some targets do argument pushes without adding REG_INC notes. */ - - if (MEM_P (dst)) - { - dst = XEXP (dst, 0); - if (GET_CODE (dst) == PRE_INC || GET_CODE (dst) == POST_INC - || GET_CODE (dst) == PRE_DEC || GET_CODE (dst) == POST_DEC) - reg_mode[REGNO (XEXP (dst, 0))] = VOIDmode; - return; - } - if (GET_CODE (dst) == SUBREG) regno = subreg_regno (dst); else if (REG_P (dst)) --- gcc/testsuite/gcc.dg/torture/pr94516.c.jj 2020-04-07 16:50:25.531448655 +0200 +++ gcc/testsuite/gcc.dg/torture/pr94516.c 2020-04-07 16:52:57.703196275 +0200 @@ -0,0 +1,31 @@ +/* PR rtl-optimization/94516 */ +/* { dg-do run } */ +/* { dg-additional-options "-fpie" { target pie } } */ + +struct S { unsigned char *a; unsigned int b; }; +typedef int V __attribute__((vector_size (sizeof (int) * 4))); + +__attribute__((noipa)) void +foo (const char *a, const char *b, const char *c, const struct S *d, int e, int f, int g, int h, int i) +{ + V v = { 1, 2, 3, 4 }; + asm volatile ("" : : "g" (&v) : "memory"); + v += (V) { 5, 6, 7, 8 }; + asm volatile ("" : : "g" (&v) : "memory"); +} + +__attribute__((noipa)) void +bar (void) +{ + const struct S s = { "foobarbaz", 9 }; + foo ("foo", (const char *) 0, "corge", &s, 0, 1, 0, -12, -31); + foo ("bar", "quux", "qux", &s, 0, 0, 9, 0, 0); + foo ("baz", (const char *) 0, "qux", &s, 1, 0, 0, -12, -32); +} + +int +main () +{ + bar (); + return 0; +}