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Mon, 06 Apr 2020 15:55:44 -0700 (PDT) To: qemu-devel@nongnu.org Cc: joel@jms.id.au, peter.maydell@linaro.org, clg@kaod.org, philmd@redhat.com, kraxel@redhat.com Subject: [PATCH v1] nrf51: Fix last GPIO CNF address Date: Mon, 06 Apr 2020 15:55:43 -0700 Message-id: <0b02fe788de99120894f87f6d5c60e15d6a75d85.1586213450.git.dirty@apple.com> X-Mailer: git-send-email 2.24.0 MIME-version: 1.0 Content-transfer-encoding: 8bit X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138, 18.0.676 definitions=2020-04-06_10:2020-04-06, 2020-04-06 signatures=0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] X-Received-From: 17.171.2.60 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Reply-to: Cameron Esfahani X-Patchwork-Original-From: Cameron Esfahani via From: Cameron Esfahani via NRF51_GPIO_REG_CNF_END doesn't actually refer to the start of the last valid CNF register: it's referring to the last byte of the last valid CNF register. This hasn't been a problem up to now, as current implementation in memory.c turns an unaligned 4-byte read from 0x77f to a single byte read and the qtest only looks at the least-significant byte of the register. But, when running with Cedric Le Goater's pending fix for unaligned accesses in memory.c, the qtest breaks. Considering NRF51 doesn't support unaligned accesses, the simplest fix is to actually set NRF51_GPIO_REG_CNF_END to the start of the last valid CNF register: 0x77c. Now, qtests work with or without Cedric's patch. Signed-off-by: Cameron Esfahani Reviewed-by: Cédric Le Goater Tested-by: Cédric Le Goater Reviewed-by: Joel Stanley --- include/hw/gpio/nrf51_gpio.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/hw/gpio/nrf51_gpio.h b/include/hw/gpio/nrf51_gpio.h index 337ee534bb..1d62bbc928 100644 --- a/include/hw/gpio/nrf51_gpio.h +++ b/include/hw/gpio/nrf51_gpio.h @@ -42,7 +42,7 @@ #define NRF51_GPIO_REG_DIRSET 0x518 #define NRF51_GPIO_REG_DIRCLR 0x51C #define NRF51_GPIO_REG_CNF_START 0x700 -#define NRF51_GPIO_REG_CNF_END 0x77F +#define NRF51_GPIO_REG_CNF_END 0x77C #define NRF51_GPIO_PULLDOWN 1 #define NRF51_GPIO_PULLUP 3