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[83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.47.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:47:46 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 01/54] various: Remove suspicious '\' character outside of #define in C code Date: Mon, 6 Apr 2020 19:46:50 +0200 Message-Id: <20200406174743.16956-2-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::444 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Fam Zheng , Peter Maydell , Sagar Karandikar , "Michael S. Tsirkin" , Jeff Cody , Jason Wang , Alistair Francis , "Edgar E. Iglesias" , "open list:Block layer core" , =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , Richard Henderson , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Eduardo Habkost , Xie Changlong , "open list:PowerPC TCG CPUs" , David Gibson , Kevin Wolf , Vladimir Sementsov-Ogievskiy , "open list:RISC-V TCG CPUs" , Wen Congyang , =?utf-8?q?Philippe_Mathieu-Da?= =?utf-8?q?ud=C3=A9?= , Max Reitz , Palmer Dabbelt , Bastian Koppelmann , Paolo Bonzini Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Fixes the following coccinelle warnings: $ spatch --sp-file --verbose-parsing ... \ scripts/coccinelle/remove_local_err.cocci ... SUSPICIOUS: a \ character appears outside of a #define at ./target/ppc/translate_init.inc.c:5213 SUSPICIOUS: a \ character appears outside of a #define at ./target/ppc/translate_init.inc.c:5261 SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:166 SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:167 SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:169 SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:170 SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:171 SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:172 SUSPICIOUS: a \ character appears outside of a #define at ./target/microblaze/cpu.c:173 SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5787 SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5789 SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5800 SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5801 SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5802 SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5804 SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5805 SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:5806 SUSPICIOUS: a \ character appears outside of a #define at ./target/i386/cpu.c:6329 SUSPICIOUS: a \ character appears outside of a #define at ./hw/sd/sdhci.c:1133 SUSPICIOUS: a \ character appears outside of a #define at ./hw/scsi/scsi-disk.c:3081 SUSPICIOUS: a \ character appears outside of a #define at ./hw/net/virtio-net.c:1529 SUSPICIOUS: a \ character appears outside of a #define at ./hw/riscv/sifive_u.c:468 SUSPICIOUS: a \ character appears outside of a #define at ./dump/dump.c:1895 SUSPICIOUS: a \ character appears outside of a #define at ./block/vhdx.c:2209 SUSPICIOUS: a \ character appears outside of a #define at ./block/vhdx.c:2215 SUSPICIOUS: a \ character appears outside of a #define at ./block/vhdx.c:2221 SUSPICIOUS: a \ character appears outside of a #define at ./block/vhdx.c:2222 SUSPICIOUS: a \ character appears outside of a #define at ./block/replication.c:172 SUSPICIOUS: a \ character appears outside of a #define at ./block/replication.c:173 Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Marc-André Lureau --- block/replication.c | 4 ++-- block/vhdx.c | 8 ++++---- dump/dump.c | 2 +- hw/net/virtio-net.c | 2 +- hw/riscv/sifive_u.c | 2 +- hw/scsi/scsi-disk.c | 2 +- hw/sd/sdhci.c | 2 +- target/i386/cpu.c | 18 +++++++++--------- target/microblaze/cpu.c | 14 +++++++------- target/ppc/translate_init.inc.c | 4 ++-- 10 files changed, 29 insertions(+), 29 deletions(-) diff --git a/block/replication.c b/block/replication.c index 413d95407d..5e09951c6b 100644 --- a/block/replication.c +++ b/block/replication.c @@ -169,8 +169,8 @@ static void replication_child_perm(BlockDriverState *bs, BdrvChild *c, if ((bs->open_flags & (BDRV_O_INACTIVE | BDRV_O_RDWR)) == BDRV_O_RDWR) { *nperm |= BLK_PERM_WRITE; } - *nshared = BLK_PERM_CONSISTENT_READ \ - | BLK_PERM_WRITE \ + *nshared = BLK_PERM_CONSISTENT_READ + | BLK_PERM_WRITE | BLK_PERM_WRITE_UNCHANGED; return; } diff --git a/block/vhdx.c b/block/vhdx.c index 33e57cd656..e16fdc2f2d 100644 --- a/block/vhdx.c +++ b/block/vhdx.c @@ -2206,20 +2206,20 @@ static QemuOptsList vhdx_create_opts = { .name = VHDX_BLOCK_OPT_BLOCK_SIZE, .type = QEMU_OPT_SIZE, .def_value_str = stringify(0), - .help = "Block Size; min 1MB, max 256MB. " \ + .help = "Block Size; min 1MB, max 256MB. " "0 means auto-calculate based on image size." }, { .name = BLOCK_OPT_SUBFMT, .type = QEMU_OPT_STRING, - .help = "VHDX format type, can be either 'dynamic' or 'fixed'. "\ + .help = "VHDX format type, can be either 'dynamic' or 'fixed'. " "Default is 'dynamic'." }, { .name = VHDX_BLOCK_OPT_ZERO, .type = QEMU_OPT_BOOL, - .help = "Force use of payload blocks of type 'ZERO'. "\ - "Non-standard, but default. Do not set to 'off' when "\ + .help = "Force use of payload blocks of type 'ZERO'. " + "Non-standard, but default. Do not set to 'off' when " "using 'qemu-img convert' with subformat=dynamic." }, { NULL } diff --git a/dump/dump.c b/dump/dump.c index 22ed1d3b0d..248ea06370 100644 --- a/dump/dump.c +++ b/dump/dump.c @@ -1892,7 +1892,7 @@ static void dump_process(DumpState *s, Error **errp) result = qmp_query_dump(NULL); /* should never fail */ assert(result); - qapi_event_send_dump_completed(result, !!local_err, (local_err ? \ + qapi_event_send_dump_completed(result, !!local_err, (local_err ? error_get_pretty(local_err) : NULL)); qapi_free_DumpQueryResult(result); diff --git a/hw/net/virtio-net.c b/hw/net/virtio-net.c index a46e3b37a7..eddfa7f923 100644 --- a/hw/net/virtio-net.c +++ b/hw/net/virtio-net.c @@ -1526,7 +1526,7 @@ static void virtio_net_rsc_extract_unit6(VirtioNetRscChain *chain, + sizeof(struct eth_header)); unit->ip = ip6; unit->ip_plen = &(ip6->ip6_ctlun.ip6_un1.ip6_un1_plen); - unit->tcp = (struct tcp_header *)(((uint8_t *)unit->ip)\ + unit->tcp = (struct tcp_header *)(((uint8_t *)unit->ip) + sizeof(struct ip6_header)); unit->tcp_hdrlen = (htons(unit->tcp->th_offset_flags) & 0xF000) >> 10; diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index 56351c4faa..998666c91f 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -465,7 +465,7 @@ static void riscv_sifive_u_machine_instance_init(Object *obj) object_property_add_bool(obj, "start-in-flash", sifive_u_get_start_in_flash, sifive_u_set_start_in_flash, NULL); object_property_set_description(obj, "start-in-flash", - "Set on to tell QEMU's ROM to jump to " \ + "Set on to tell QEMU's ROM to jump to " "flash. Otherwise QEMU will jump to DRAM", NULL); } diff --git a/hw/scsi/scsi-disk.c b/hw/scsi/scsi-disk.c index 1c0cb63a6f..e5bcd0baf8 100644 --- a/hw/scsi/scsi-disk.c +++ b/hw/scsi/scsi-disk.c @@ -3078,7 +3078,7 @@ static const TypeInfo scsi_cd_info = { #ifdef __linux__ static Property scsi_block_properties[] = { - DEFINE_BLOCK_ERROR_PROPERTIES(SCSIDiskState, qdev.conf), \ + DEFINE_BLOCK_ERROR_PROPERTIES(SCSIDiskState, qdev.conf), DEFINE_PROP_DRIVE("drive", SCSIDiskState, qdev.conf.blk), DEFINE_PROP_BOOL("share-rw", SCSIDiskState, qdev.conf.share_rw, false), DEFINE_PROP_UINT16("rotation_rate", SCSIDiskState, rotation_rate, 0), diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index de63ffb037..70531ad360 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -1130,7 +1130,7 @@ sdhci_write(void *opaque, hwaddr offset, uint64_t val, unsigned size) /* Limit block size to the maximum buffer size */ if (extract32(s->blksize, 0, 12) > s->buf_maxsz) { - qemu_log_mask(LOG_GUEST_ERROR, "%s: Size 0x%x is larger than " \ + qemu_log_mask(LOG_GUEST_ERROR, "%s: Size 0x%x is larger than " "the maximum buffer 0x%x", __func__, s->blksize, s->buf_maxsz); diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 90ffc5f3b1..9c256ab159 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -5784,9 +5784,9 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, host_cpuid(index, 0, eax, ebx, ecx, edx); break; } - *eax = (L1_DTLB_2M_ASSOC << 24) | (L1_DTLB_2M_ENTRIES << 16) | \ + *eax = (L1_DTLB_2M_ASSOC << 24) | (L1_DTLB_2M_ENTRIES << 16) | (L1_ITLB_2M_ASSOC << 8) | (L1_ITLB_2M_ENTRIES); - *ebx = (L1_DTLB_4K_ASSOC << 24) | (L1_DTLB_4K_ENTRIES << 16) | \ + *ebx = (L1_DTLB_4K_ASSOC << 24) | (L1_DTLB_4K_ENTRIES << 16) | (L1_ITLB_4K_ASSOC << 8) | (L1_ITLB_4K_ENTRIES); *ecx = encode_cache_cpuid80000005(env->cache_info_amd.l1d_cache); *edx = encode_cache_cpuid80000005(env->cache_info_amd.l1i_cache); @@ -5797,13 +5797,13 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, host_cpuid(index, 0, eax, ebx, ecx, edx); break; } - *eax = (AMD_ENC_ASSOC(L2_DTLB_2M_ASSOC) << 28) | \ - (L2_DTLB_2M_ENTRIES << 16) | \ - (AMD_ENC_ASSOC(L2_ITLB_2M_ASSOC) << 12) | \ + *eax = (AMD_ENC_ASSOC(L2_DTLB_2M_ASSOC) << 28) | + (L2_DTLB_2M_ENTRIES << 16) | + (AMD_ENC_ASSOC(L2_ITLB_2M_ASSOC) << 12) | (L2_ITLB_2M_ENTRIES); - *ebx = (AMD_ENC_ASSOC(L2_DTLB_4K_ASSOC) << 28) | \ - (L2_DTLB_4K_ENTRIES << 16) | \ - (AMD_ENC_ASSOC(L2_ITLB_4K_ASSOC) << 12) | \ + *ebx = (AMD_ENC_ASSOC(L2_DTLB_4K_ASSOC) << 28) | + (L2_DTLB_4K_ENTRIES << 16) | + (AMD_ENC_ASSOC(L2_ITLB_4K_ASSOC) << 12) | (L2_ITLB_4K_ENTRIES); encode_cache_cpuid80000006(env->cache_info_amd.l2_cache, cpu->enable_l3_cache ? @@ -6326,7 +6326,7 @@ static void x86_cpu_expand_features(X86CPU *cpu, Error **errp) */ env->features[w] |= x86_cpu_get_supported_feature_word(w, cpu->migratable) & - ~env->user_features[w] & \ + ~env->user_features[w] & ~feature_word_info[w].no_autoenable_flags; } } diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index a2c2f271df..c9cf2364ca 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -163,14 +163,14 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp) qemu_init_vcpu(cs); - env->pvr.regs[0] = PVR0_USE_EXC_MASK \ - | PVR0_USE_ICACHE_MASK \ + env->pvr.regs[0] = PVR0_USE_EXC_MASK + | PVR0_USE_ICACHE_MASK | PVR0_USE_DCACHE_MASK; - env->pvr.regs[2] = PVR2_D_OPB_MASK \ - | PVR2_D_LMB_MASK \ - | PVR2_I_OPB_MASK \ - | PVR2_I_LMB_MASK \ - | PVR2_FPU_EXC_MASK \ + env->pvr.regs[2] = PVR2_D_OPB_MASK + | PVR2_D_LMB_MASK + | PVR2_I_OPB_MASK + | PVR2_I_LMB_MASK + | PVR2_FPU_EXC_MASK | 0; version = cpu->cfg.version ? cpu->cfg.version : DEFAULT_CPU_VERSION; diff --git a/target/ppc/translate_init.inc.c b/target/ppc/translate_init.inc.c index e853164a86..fd763e588e 100644 --- a/target/ppc/translate_init.inc.c +++ b/target/ppc/translate_init.inc.c @@ -5210,7 +5210,7 @@ POWERPC_FAMILY(e5500)(ObjectClass *oc, void *data) PPC_FLOAT_STFIWX | PPC_WAIT | PPC_MEM_TLBSYNC | PPC_TLBIVAX | PPC_MEM_SYNC | PPC_64B | PPC_POPCNTB | PPC_POPCNTWD; - pcc->insns_flags2 = PPC2_BOOKE206 | PPC2_PRCNTL | PPC2_PERM_ISA206 | \ + pcc->insns_flags2 = PPC2_BOOKE206 | PPC2_PRCNTL | PPC2_PERM_ISA206 | PPC2_FP_CVT_S64; pcc->msr_mask = (1ull << MSR_CM) | (1ull << MSR_GS) | @@ -5258,7 +5258,7 @@ POWERPC_FAMILY(e6500)(ObjectClass *oc, void *data) PPC_FLOAT_STFIWX | PPC_WAIT | PPC_MEM_TLBSYNC | PPC_TLBIVAX | PPC_MEM_SYNC | PPC_64B | PPC_POPCNTB | PPC_POPCNTWD | PPC_ALTIVEC; - pcc->insns_flags2 = PPC2_BOOKE206 | PPC2_PRCNTL | PPC2_PERM_ISA206 | \ + pcc->insns_flags2 = PPC2_BOOKE206 | PPC2_PRCNTL | PPC2_PERM_ISA206 | PPC2_FP_CVT_S64 | PPC2_ATOMIC_ISA206; pcc->msr_mask = (1ull << MSR_CM) | (1ull << MSR_GS) | From patchwork Mon Apr 6 17:46:51 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1266968 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amsat.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=Zv67Gidq; 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[83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.47.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:47:48 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 02/54] scripts/coccinelle: Script to simplify DeviceClass error propagation Date: Mon, 6 Apr 2020 19:46:51 +0200 Message-Id: <20200406174743.16956-3-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::329 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" When a device uses an Error* with data not modified before realize(), this call can be moved to init(). Add a Coccinelle patch to find such uses. Signed-off-by: Philippe Mathieu-Daudé --- ...implify-init-realize-error_propagate.cocci | 69 +++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 70 insertions(+) create mode 100644 scripts/coccinelle/simplify-init-realize-error_propagate.cocci diff --git a/scripts/coccinelle/simplify-init-realize-error_propagate.cocci b/scripts/coccinelle/simplify-init-realize-error_propagate.cocci new file mode 100644 index 0000000000..2e3ec4d98a --- /dev/null +++ b/scripts/coccinelle/simplify-init-realize-error_propagate.cocci @@ -0,0 +1,69 @@ +// Find error-propagation calls that don't need to be in DeviceClass::realize() +// because they don't use information user can change before calling realize(), +// so they can be moved to DeviceClass:initfn() where error propagation is not +// needed. +// +// Copyright: (C) 2020 Philippe Mathieu-Daudé +// This work is licensed under the terms of the GNU GPLv2 or later. +// +// spatch \ +// --macro-file scripts/cocci-macro-file.h \ +// --sp-file \ +// scripts/coccinelle/simplify-init-realize-error_propagate.cocci \ +// --timeout 60 +// +// Inspired by https://www.mail-archive.com/qemu-devel@nongnu.org/msg692500.html + + +@ match_class_init @ +TypeInfo info; +identifier class_initfn; +@@ + info.class_init = class_initfn; + + +@ match_instance_init @ +TypeInfo info; +identifier instance_initfn; +@@ + info.instance_init = instance_initfn; + + +@ match_realize @ +identifier match_class_init.class_initfn; +DeviceClass *dc; +identifier realizefn; +@@ +void class_initfn(...) +{ + ... + dc->realize = realizefn; + ... +} + + +@ propagate_in_realize @ +identifier match_realize.realizefn; +identifier err; +identifier errp; +identifier func_with_errp =~ "(?!object_property_set_link)"; +symbol error_abort, error_fatal; +position pos; +@@ +void realizefn@pos(..., Error **errp) +{ + ... + Error *err = NULL; + <+... + func_with_errp(..., \(&error_abort\|&error_fatal\)); + ...+> +} + + +@ script:python @ +initfn << match_instance_init.instance_initfn; +realizefn << match_realize.realizefn; +p << propagate_in_realize.pos; +@@ +print('>>> possible moves from {}() to {}() in {}:{}' + .format(initfn, realizefn, p[0].file, p[0].line)) diff --git a/MAINTAINERS b/MAINTAINERS index 9d156d73b3..d06ffeddd5 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2057,6 +2057,7 @@ F: scripts/coccinelle/err-bad-newline.cocci F: scripts/coccinelle/error-use-after-free.cocci F: scripts/coccinelle/error_propagate_null.cocci F: scripts/coccinelle/remove_local_err.cocci +F: scripts/coccinelle/simplify-init-realize-error_propagate.cocci F: scripts/coccinelle/use-error_fatal.cocci GDB stub From patchwork Mon Apr 6 17:46:52 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1266960 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amsat.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=OmWPI53S; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48wyhJ4rQSz9sR4 for ; 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[83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.47.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:47:49 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 03/54] hw/arm/allwinner-a10: Move some code from realize() to init() Date: Mon, 6 Apr 2020 19:46:52 +0200 Message-Id: <20200406174743.16956-4-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::343 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Beniamino Galvani , Peter Maydell , Vladimir Sementsov-Ogievskiy , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , "open list:Allwinner-a10" Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Coccinelle reported: $ spatch ... --timeout 60 --sp-file \ scripts/coccinelle/simplify-init-realize-error_propagate.cocci HANDLING: ./hw/arm/allwinner-a10.c >>> possible moves from aw_a10_init() to aw_a10_realize() in ./hw/arm/allwinner-a10.c:77 Move the calls using &error_fatal which don't depend of input updated before realize() to init(). Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/allwinner-a10.c | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/hw/arm/allwinner-a10.c b/hw/arm/allwinner-a10.c index 62a67a3e1a..f41395734a 100644 --- a/hw/arm/allwinner-a10.c +++ b/hw/arm/allwinner-a10.c @@ -60,10 +60,18 @@ static void aw_a10_init(Object *obj) int i; for (i = 0; i < AW_A10_NUM_USB; i++) { + char bus[16]; + sysbus_init_child_obj(obj, "ehci[*]", OBJECT(&s->ehci[i]), sizeof(s->ehci[i]), TYPE_PLATFORM_EHCI); sysbus_init_child_obj(obj, "ohci[*]", OBJECT(&s->ohci[i]), sizeof(s->ohci[i]), TYPE_SYSBUS_OHCI); + object_property_set_bool(OBJECT(&s->ehci[i]), true, + "companion-enable", &error_fatal); + + sprintf(bus, "usb-bus.%d", i); + object_property_set_str(OBJECT(&s->ohci[i]), bus, "masterbus", + &error_fatal); } } @@ -72,6 +80,11 @@ static void aw_a10_init(Object *obj) sysbus_init_child_obj(obj, "rtc", &s->rtc, sizeof(s->rtc), TYPE_AW_RTC_SUN4I); + + memory_region_init_ram(&s->sram_a, obj, "sram A", 48 * KiB, + &error_fatal); + memory_region_add_subregion(get_system_memory(), 0x00000000, &s->sram_a); + create_unimplemented_device("a10-sram-ctrl", 0x01c00000, 4 * KiB); } static void aw_a10_realize(DeviceState *dev, Error **errp) @@ -113,11 +126,6 @@ static void aw_a10_realize(DeviceState *dev, Error **errp) sysbus_connect_irq(sysbusdev, 4, qdev_get_gpio_in(dev, 67)); sysbus_connect_irq(sysbusdev, 5, qdev_get_gpio_in(dev, 68)); - memory_region_init_ram(&s->sram_a, OBJECT(dev), "sram A", 48 * KiB, - &error_fatal); - memory_region_add_subregion(get_system_memory(), 0x00000000, &s->sram_a); - create_unimplemented_device("a10-sram-ctrl", 0x01c00000, 4 * KiB); - /* FIXME use qdev NIC properties instead of nd_table[] */ if (nd_table[0].used) { qemu_check_nic_model(&nd_table[0], TYPE_AW_EMAC); @@ -149,12 +157,6 @@ static void aw_a10_realize(DeviceState *dev, Error **errp) int i; for (i = 0; i < AW_A10_NUM_USB; i++) { - char bus[16]; - - sprintf(bus, "usb-bus.%d", i); - - object_property_set_bool(OBJECT(&s->ehci[i]), true, - "companion-enable", &error_fatal); object_property_set_bool(OBJECT(&s->ehci[i]), true, "realized", &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(&s->ehci[i]), 0, @@ -162,8 +164,6 @@ static void aw_a10_realize(DeviceState *dev, Error **errp) sysbus_connect_irq(SYS_BUS_DEVICE(&s->ehci[i]), 0, qdev_get_gpio_in(dev, 39 + i)); - object_property_set_str(OBJECT(&s->ohci[i]), bus, "masterbus", - &error_fatal); object_property_set_bool(OBJECT(&s->ohci[i]), true, "realized", &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(&s->ohci[i]), 0, From patchwork Mon Apr 6 17:46:53 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1266963 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; 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[83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.47.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:47:51 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 04/54] hw/arm/aspeed_ast2600: Simplify use of Error* Date: Mon, 6 Apr 2020 19:46:53 +0200 Message-Id: <20200406174743.16956-5-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::336 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , Andrew Jeffery , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , "open list:ASPEED BMCs" , Joel Stanley , =?utf-8?q?C=C3=A9dric_Le_Goater?= Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Coccinelle reported: $ spatch ... --timeout 60 --sp-file \ scripts/coccinelle/simplify-init-realize-error_propagate.cocci HANDLING: ./hw/arm/aspeed_ast2600.c >>> possible moves from aspeed_soc_ast2600_init() to aspeed_soc_ast2600_realize() in ./hw/arm/aspeed_ast2600.c:243 While reviewing we notice we don't need two different Error*, drop the one less used. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Cédric Le Goater --- hw/arm/aspeed_ast2600.c | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c index 1a869e09b9..b08359f3ef 100644 --- a/hw/arm/aspeed_ast2600.c +++ b/hw/arm/aspeed_ast2600.c @@ -245,7 +245,7 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) int i; AspeedSoCState *s = ASPEED_SOC(dev); AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s); - Error *err = NULL, *local_err = NULL; + Error *err = NULL; qemu_irq irq; /* IO space */ @@ -418,9 +418,12 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) return; } object_property_set_int(OBJECT(&s->spi[i]), 1, "num-cs", &err); + if (err) { + error_propagate(errp, err); + return; + } object_property_set_bool(OBJECT(&s->spi[i]), true, "realized", - &local_err); - error_propagate(&err, local_err); + &err); if (err) { error_propagate(errp, err); return; @@ -472,9 +475,12 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) qdev_set_nic_properties(DEVICE(&s->ftgmac100[i]), &nd_table[i]); object_property_set_bool(OBJECT(&s->ftgmac100[i]), true, "aspeed", &err); + if (err) { + error_propagate(errp, err); + return; + } object_property_set_bool(OBJECT(&s->ftgmac100[i]), true, "realized", - &local_err); - error_propagate(&err, local_err); + &err); if (err) { error_propagate(errp, err); return; From patchwork Mon Apr 6 17:46:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1266967 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amsat.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; 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[83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.47.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:47:53 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 05/54] hw/arm/aspeed_ast2600: Move some code from realize() to init() Date: Mon, 6 Apr 2020 19:46:54 +0200 Message-Id: <20200406174743.16956-6-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::341 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , Andrew Jeffery , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , "open list:ASPEED BMCs" , Joel Stanley , =?utf-8?q?C=C3=A9dric_Le_Goater?= Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Coccinelle reported: $ spatch ... --timeout 60 --sp-file \ scripts/coccinelle/simplify-init-realize-error_propagate.cocci HANDLING: ./hw/arm/aspeed_ast2600.c >>> possible moves from aspeed_soc_ast2600_init() to aspeed_soc_ast2600_realize() in ./hw/arm/aspeed_ast2600.c:243 Move the calls using &error_fatal which don't depend of input updated before realize() to init(). Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/aspeed_ast2600.c | 41 ++++++++++++++++++++--------------------- 1 file changed, 20 insertions(+), 21 deletions(-) diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c index b08359f3ef..c8e0171824 100644 --- a/hw/arm/aspeed_ast2600.c +++ b/hw/arm/aspeed_ast2600.c @@ -114,6 +114,16 @@ static qemu_irq aspeed_soc_get_irq(AspeedSoCState *s, int ctrl) return qdev_get_gpio_in(DEVICE(&s->a7mpcore), sc->irqmap[ctrl]); } +/* + * ASPEED ast2600 has 0xf as cluster ID + * + * http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0388e/CIHEBGFG.html + */ +static uint64_t aspeed_calc_affinity(int cpu) +{ + return (0xf << ARM_AFF1_SHIFT) | cpu; +} + static void aspeed_soc_ast2600_init(Object *obj) { AspeedSoCState *s = ASPEED_SOC(obj); @@ -130,6 +140,13 @@ static void aspeed_soc_ast2600_init(Object *obj) object_initialize_child(obj, "cpu[*]", OBJECT(&s->cpu[i]), sizeof(s->cpu[i]), sc->cpu_type, &error_abort, NULL); + object_property_set_int(OBJECT(&s->cpu[i]), QEMU_PSCI_CONDUIT_SMC, + "psci-conduit", &error_abort); + object_property_set_int(OBJECT(&s->cpu[i]), aspeed_calc_affinity(i), + "mp-affinity", &error_abort); + + object_property_set_int(OBJECT(&s->cpu[i]), 1125000000, "cntfrq", + &error_abort); } snprintf(typename, sizeof(typename), "aspeed.scu-%s", socname); @@ -146,6 +163,9 @@ static void aspeed_soc_ast2600_init(Object *obj) sysbus_init_child_obj(obj, "a7mpcore", &s->a7mpcore, sizeof(s->a7mpcore), TYPE_A15MPCORE_PRIV); + object_property_set_int(OBJECT(&s->a7mpcore), + ASPEED_SOC_AST2600_MAX_IRQ + GIC_INTERNAL, + "num-irq", &error_abort); sysbus_init_child_obj(obj, "rtc", OBJECT(&s->rtc), sizeof(s->rtc), TYPE_ASPEED_RTC); @@ -230,16 +250,6 @@ static void aspeed_soc_ast2600_init(Object *obj) TYPE_SYSBUS_SDHCI); } -/* - * ASPEED ast2600 has 0xf as cluster ID - * - * http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0388e/CIHEBGFG.html - */ -static uint64_t aspeed_calc_affinity(int cpu) -{ - return (0xf << ARM_AFF1_SHIFT) | cpu; -} - static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) { int i; @@ -264,19 +274,11 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) /* CPU */ for (i = 0; i < s->num_cpus; i++) { - object_property_set_int(OBJECT(&s->cpu[i]), QEMU_PSCI_CONDUIT_SMC, - "psci-conduit", &error_abort); if (s->num_cpus > 1) { object_property_set_int(OBJECT(&s->cpu[i]), ASPEED_A7MPCORE_ADDR, "reset-cbar", &error_abort); } - object_property_set_int(OBJECT(&s->cpu[i]), aspeed_calc_affinity(i), - "mp-affinity", &error_abort); - - object_property_set_int(OBJECT(&s->cpu[i]), 1125000000, "cntfrq", - &error_abort); - /* * TODO: the secondary CPUs are started and a boot helper * is needed when using -kernel @@ -292,9 +294,6 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) /* A7MPCORE */ object_property_set_int(OBJECT(&s->a7mpcore), s->num_cpus, "num-cpu", &error_abort); - object_property_set_int(OBJECT(&s->a7mpcore), - ASPEED_SOC_AST2600_MAX_IRQ + GIC_INTERNAL, - "num-irq", &error_abort); object_property_set_bool(OBJECT(&s->a7mpcore), true, "realized", &error_abort); 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[83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.47.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:47:54 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 06/54] hw/arm/aspeed_soc: Move some code from realize() to init() Date: Mon, 6 Apr 2020 19:46:55 +0200 Message-Id: <20200406174743.16956-7-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::341 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , Andrew Jeffery , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , "open list:ASPEED BMCs" , Joel Stanley , =?utf-8?q?C=C3=A9dric_Le_Goater?= Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Coccinelle reported: $ spatch ... --timeout 60 --sp-file \ scripts/coccinelle/simplify-init-realize-error_propagate.cocci HANDLING: ./hw/arm/aspeed_soc.c >>> possible moves from aspeed_soc_init() to aspeed_soc_realize() in ./hw/arm/aspeed_soc.c:231 Move the calls using &error_fatal which don't depend of input updated before realize() to init(). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Cédric Le Goater --- hw/arm/aspeed_soc.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c index 696c7fda14..debd7c8faa 100644 --- a/hw/arm/aspeed_soc.c +++ b/hw/arm/aspeed_soc.c @@ -183,6 +183,7 @@ static void aspeed_soc_init(Object *obj) snprintf(typename, sizeof(typename), "aspeed.spi%d-%s", i + 1, socname); sysbus_init_child_obj(obj, "spi[*]", OBJECT(&s->spi[i]), sizeof(s->spi[i]), typename); + object_property_set_int(OBJECT(&s->spi[i]), 1, "num-cs", &error_abort); } for (i = 0; i < sc->ehcis_num; i++) { @@ -360,10 +361,7 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) /* SPI */ for (i = 0; i < sc->spis_num; i++) { - object_property_set_int(OBJECT(&s->spi[i]), 1, "num-cs", &err); - object_property_set_bool(OBJECT(&s->spi[i]), true, "realized", - &local_err); - error_propagate(&err, local_err); + object_property_set_bool(OBJECT(&s->spi[i]), true, "realized", &err); if (err) { error_propagate(errp, err); return; From patchwork Mon Apr 6 17:46:56 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1266962 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amsat.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=mSQH5bdY; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48wyl65jxrz9sRR for ; Tue, 7 Apr 2020 03:51:14 +1000 (AEST) Received: from localhost ([::1]:35892 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jLVtw-0005pw-L4 for incoming@patchwork.ozlabs.org; Mon, 06 Apr 2020 13:51:12 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:35889) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jLVqs-0001cS-2s for qemu-devel@nongnu.org; Mon, 06 Apr 2020 13:48:03 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1jLVqn-0001bx-DV for qemu-devel@nongnu.org; Mon, 06 Apr 2020 13:48:02 -0400 Received: from mail-wm1-x332.google.com ([2a00:1450:4864:20::332]:34532) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1jLVqn-0001bU-81; Mon, 06 Apr 2020 13:47:57 -0400 Received: by mail-wm1-x332.google.com with SMTP id c195so139073wme.1; Mon, 06 Apr 2020 10:47:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=xfGcmES3nPX8YvO+/YU0EwpyXu9u+QJWTYG9rfArCpE=; b=mSQH5bdYJwZO43gz051i5YGQvv7jfuiRVqkOL0va9nYORTZVaZeSHTMTfs7AjdAEiA uzD1O2sYFsWAhRzUwefyD9H+uCwloAapePGsZc9bI0qQqZRaTp26x3HUBFWfMHVyPXVx 1h15gJrk5p3zF90+mue76guNwgtL38DTslpEUZASG4KQAiwAEbg1XksGXXjRfRDkobQW DVC7MyKKiVhdEe5DAxIj6sWn0qMhY6ZUsFeM3vQLvwucIMm8FaioDIvmMZypzA25d981 /vKZKDlE1km3FzFKazhiF+BWPiU4A3sQbTLAgQM3TK8t4hNG/JiOg8dO8FgDa/tXiDNU n49A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=xfGcmES3nPX8YvO+/YU0EwpyXu9u+QJWTYG9rfArCpE=; b=fg8YRbTR3a1SMDKQQADg3FZy2dcYiVz1d0XWlc6mdCLjQEbxhX/uZ+SCD1CZtJI/9S WcL6CkTrZ0clcmmt0DwGA2bv0rQbzMi0jOX0zjMxw88JoBCbFRnI1MbcITZ1oEDe+Gmx YxBviALW/13AhdtaQuxfg1d9tJiIFTjDSX/Ru96ByVSsRCJeHvYgNC11U2lZKndqv9jM KczubSXpcW/Z5fOSUEvFFq2f8Ki7SJtHF2+HWpCOKTNMmFLDfUntDZ7UVoxN6CXoPNQr mm5JplYyIhTF6deFpW3w9PHTr7gK7zw1rJ8Zl7gUuSfRIjo5SRc4Quo1Jruz7a0iPre/ aXTA== X-Gm-Message-State: AGi0PuZUan3UUShGBlhIDK5RVbDiBHDGZD5XYqJft9BVSkALgtQF9FcC I6sZWNnrDMpYtQFGm3aZPlnRyvUvhQI= X-Google-Smtp-Source: APiQypIpUgST85aW8J2H9SlKU4Lqx40BuTT/QiyG1Q0EViBSUycX0JBUuebvsyHIe3v8XfMWt/rrKg== X-Received: by 2002:a1c:a344:: with SMTP id m65mr205469wme.20.1586195276046; Mon, 06 Apr 2020 10:47:56 -0700 (PDT) Received: from x1w.redhat.com (116.red-83-42-57.dynamicip.rima-tde.net. [83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.47.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:47:55 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 07/54] hw/arm/aspeed_soc: Simplify use of Error* Date: Mon, 6 Apr 2020 19:46:56 +0200 Message-Id: <20200406174743.16956-8-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::332 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , Andrew Jeffery , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , "open list:ASPEED BMCs" , Joel Stanley , =?utf-8?q?C=C3=A9dric_Le_Goater?= Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" In the previous commit we noticed we don't need two different Error*, drop the one less used. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Cédric Le Goater --- hw/arm/aspeed_soc.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c index debd7c8faa..aa6d739ad0 100644 --- a/hw/arm/aspeed_soc.c +++ b/hw/arm/aspeed_soc.c @@ -234,7 +234,7 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) int i; AspeedSoCState *s = ASPEED_SOC(dev); AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s); - Error *err = NULL, *local_err = NULL; + Error *err = NULL; /* IO space */ create_unimplemented_device("aspeed_soc.io", sc->memmap[ASPEED_IOMEM], @@ -413,9 +413,12 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) qdev_set_nic_properties(DEVICE(&s->ftgmac100[i]), &nd_table[i]); object_property_set_bool(OBJECT(&s->ftgmac100[i]), true, "aspeed", &err); + if (err) { + error_propagate(errp, err); + return; + } object_property_set_bool(OBJECT(&s->ftgmac100[i]), true, "realized", - &local_err); - error_propagate(&err, local_err); + &err); if (err) { error_propagate(errp, err); return; From patchwork Mon Apr 6 17:46:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1266965 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amsat.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=IdbN0w1D; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48wymZ3mwMz9sRR for ; Tue, 7 Apr 2020 03:52:30 +1000 (AEST) Received: from localhost ([::1]:35916 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jLVvA-00005N-5c for incoming@patchwork.ozlabs.org; Mon, 06 Apr 2020 13:52:28 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:35878) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jLVqr-0001c4-CN for qemu-devel@nongnu.org; Mon, 06 Apr 2020 13:48:05 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1jLVqp-0001ib-9N for qemu-devel@nongnu.org; Mon, 06 Apr 2020 13:48:01 -0400 Received: from mail-wr1-x42f.google.com ([2a00:1450:4864:20::42f]:34486) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1jLVqp-0001eG-2n; Mon, 06 Apr 2020 13:47:59 -0400 Received: by mail-wr1-x42f.google.com with SMTP id 65so540387wrl.1; Mon, 06 Apr 2020 10:47:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=8naS2wy7z7r5ZHMslOR/F6A89KH9g2Da3djfcOFUQbw=; b=IdbN0w1DfyFRmQULHoZhV0M1iy18Px58Xe4QSa0+fV5j/PXebmm4iK0aPGHkG7QhHt 75WYS/AlPf9ngiydKa/rTdmkMFYPcVlSzH1fWv7gD9LQnEH6aC6bHjcTdrG76n3QqtCO S2u8cmvqj5Kj2GsWsmTDWKIgAPfJCAoMmjHSO83NsBEY4J+6GJ5riYheTxeLop8pdnH8 Her01QU6fJVAJmCa7n4Hwmv5RhVaFQYKcGFpc0ceNNQykLbvLNIJ+ovQJJ/TBan7xOvz 2xB6baViv8MUF2K2wAFaXctRTt+RhKRAKBv75omLW3kPGDlhECyK2MYylMHL/i7CycHP JdsA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=8naS2wy7z7r5ZHMslOR/F6A89KH9g2Da3djfcOFUQbw=; b=ClYKBfo9iKIctdKAaI6mnPIYsk998QmgkUb2iZkAVwimHgEotLZm2JiRfTgRbZSfjD PGtYXu8FJwTxe7lRAn6r2sfm3AmMxafmzn2ttCEAi4kdT/pW5fv1Vd7FDvYm+o2tyAns qqyWXC7UFLlMVA2gB/m8NHEfUhg1743HMQcT8BxAudpBUoB1uPWmhLx6vgphcF+qLCe/ SAeGT4L7X79nzQ/ORrYlAlN9SVbCkDg/y/mcciPD+RI4rhXn3zdnsUoOABDZNdqyyIBb UylXsO7enS59a1MuWuDANNVxANdHuD1wL8hq+4EUUn6VYOkNjyW4gHxxIg/85OegrELp AOGA== X-Gm-Message-State: AGi0PuZ9esMufHiZB38FSuxnk48nCVyBHBO+YM/MgryM7CI26NDUbmdS ktyNbi0hLcvr1SoRk6/bYwMKEm7tkCo= X-Google-Smtp-Source: APiQypLNVrNm3Y+tFshWdpmT7DwkfYpIh/cW8Dg+nNwb3DRU5oyXaYPC8HreEA9mSZphwgh2Sb9mBw== X-Received: by 2002:adf:a308:: with SMTP id c8mr390720wrb.302.1586195277554; Mon, 06 Apr 2020 10:47:57 -0700 (PDT) Received: from x1w.redhat.com (116.red-83-42-57.dynamicip.rima-tde.net. [83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.47.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:47:56 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 08/54] hw/arm/fsl-imx6: Simplify checks on 'smp_cpus' count Date: Mon, 6 Apr 2020 19:46:57 +0200 Message-Id: <20200406174743.16956-9-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42f X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , "open list:SABRELITE / i.MX6" , Jean-Christophe Dubois Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Coccinelle failed at processing this file: $ spatch ... --timeout 60 --sp-file \ scripts/coccinelle/simplify-init-realize-error_propagate.cocci HANDLING: ./hw/arm/fsl-imx6.c Fatal error: exception Coccinelle_modules.Common.Timeout While reviewing we notice the smp_cpus count is already limited by MachineClass::max_cpus: static void sabrelite_machine_init(MachineClass *mc) { mc->max_cpus = FSL_IMX6_NUM_CPUS; ... } So remove the check in realize(), but still assert in init(). Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/fsl-imx6.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c index 13f1bf23a6..3d37352b08 100644 --- a/hw/arm/fsl-imx6.c +++ b/hw/arm/fsl-imx6.c @@ -37,10 +37,12 @@ static void fsl_imx6_init(Object *obj) { MachineState *ms = MACHINE(qdev_get_machine()); + unsigned int smp_cpus = ms->smp.cpus; FslIMX6State *s = FSL_IMX6(obj); char name[NAME_SIZE]; int i; + assert(smp_cpus <= FSL_IMX6_NUM_CPUS); for (i = 0; i < MIN(ms->smp.cpus, FSL_IMX6_NUM_CPUS); i++) { snprintf(name, NAME_SIZE, "cpu%d", i); object_initialize_child(obj, name, &s->cpu[i], sizeof(s->cpu[i]), @@ -121,12 +123,6 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) Error *err = NULL; unsigned int smp_cpus = ms->smp.cpus; - if (smp_cpus > FSL_IMX6_NUM_CPUS) { - error_setg(errp, "%s: Only %d CPUs are supported (%d requested)", - TYPE_FSL_IMX6, FSL_IMX6_NUM_CPUS, smp_cpus); - return; - } - for (i = 0; i < smp_cpus; i++) { /* On uniprocessor, the CBAR is set to 0 */ From patchwork Mon Apr 6 17:46:58 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1266971 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amsat.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=X1KU2tXN; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48wyr91Wzkz9sR4 for ; Tue, 7 Apr 2020 03:55:37 +1000 (AEST) Received: from localhost ([::1]:35978 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jLVyB-0006v0-2p for incoming@patchwork.ozlabs.org; Mon, 06 Apr 2020 13:55:35 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:35905) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jLVqs-0001ds-Uz for qemu-devel@nongnu.org; Mon, 06 Apr 2020 13:48:05 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1jLVqr-0001rT-QH for qemu-devel@nongnu.org; Mon, 06 Apr 2020 13:48:02 -0400 Received: from mail-wr1-x443.google.com ([2a00:1450:4864:20::443]:42903) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1jLVqr-0001mQ-KH; Mon, 06 Apr 2020 13:48:01 -0400 Received: by mail-wr1-x443.google.com with SMTP id h15so476352wrx.9; Mon, 06 Apr 2020 10:48:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=6j0bhZZ4DXOIthIvcH8V/7teI/2Tb9x+JKEVdKazvPI=; b=X1KU2tXNDH5oKLXhUCQy2lQVeBbPbs/TJMa7hxWN5ICWvCYNdAPpAd/DFf0xuMWQG6 cwqzS1t6QC0JzX5vZ2/jT0sx3PT0WCZPz7/5FwWIbo46IoHrZlvJjnHOyS0FMMmmirpZ NaiYD78By1i2Dwa7U1ZuiWG5kF5dq19RWVIIvi5DwjGZQi87skGeSzKmAn6FsQXYXqvb Gt0YsY+Ugn+KgpbPqiaQqLrqZo0trPsylmt3W18y6H+Y2UmEZZLResC0IGTxMhw5BS0A IHyTK7PSeYtPRlpZSk4N3q7jqwWeOYYCCGoaRBU0hUuKl52jRK0XBJkB98lUr70kI+cR 69BA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=6j0bhZZ4DXOIthIvcH8V/7teI/2Tb9x+JKEVdKazvPI=; b=kTxjAJmuJH9jQJ6Sx19HZu8LjkdwF/g46txSK1ZOvOhXmEj9Fv8WVWn+3wrGcGyX8c GYR3bt0/QRqOR+Xte1sojLQRmNLtAdGX2WK+NynIRSN1XfEqsrIbZajAwideNl17c8E+ oc+1gkGqGdej/0gLGKkVMLl40G+DgOUHqwwE6N+wBzsrBW8zqk1JBYehwa0vqC6CDwYc ZeXHIs25aE+SbAHsH7THA/5NL1R/4AAaowaZd/rc+nhXBJtEzIz17cpIvKj+KbQTScn8 emLgo5k2klMeYEdiKtm/XQRXvTaF+AU8uIjbFaImXTuUde/SFe7+WKGhkJhq3KYTxC6a JNXg== X-Gm-Message-State: AGi0PuYDuBI/LthNS7hTzzxk5ow+322o0TQWI3H97Zhfw/+i+b/OmCU0 MBPoaVmKkjxoGlc/JNzvgh4+mhPOPi8= X-Google-Smtp-Source: APiQypLW/IYxXY+iRtT8LTwmBcdFXl7kw3iK4ji/0rTZf/nuBrGEucZybsqGwrOBwcACWlfU9qHrng== X-Received: by 2002:a5d:6104:: with SMTP id v4mr357482wrt.213.1586195278992; Mon, 06 Apr 2020 10:47:58 -0700 (PDT) Received: from x1w.redhat.com (116.red-83-42-57.dynamicip.rima-tde.net. [83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.47.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:47:58 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 09/54] hw/arm/fsl-imx6: Move some code from realize() to init() Date: Mon, 6 Apr 2020 19:46:58 +0200 Message-Id: <20200406174743.16956-10-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::443 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , "open list:SABRELITE / i.MX6" , Jean-Christophe Dubois Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Coccinelle failed at processing this file: $ spatch ... --timeout 60 --sp-file \ scripts/coccinelle/simplify-init-realize-error_propagate.cocci HANDLING: ./hw/arm/fsl-imx6.c Fatal error: exception Coccinelle_modules.Common.Timeout While reviewing we noticed some functions can be called at init() time, reducing the need to add extra Error checks at realize() time. Move them. The coccinelle script succeeds after this. Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/fsl-imx6.c | 47 +++++++++++++++++++++++------------------------ 1 file changed, 23 insertions(+), 24 deletions(-) diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c index 3d37352b08..6bf8aa0404 100644 --- a/hw/arm/fsl-imx6.c +++ b/hw/arm/fsl-imx6.c @@ -48,11 +48,30 @@ static void fsl_imx6_init(Object *obj) object_initialize_child(obj, name, &s->cpu[i], sizeof(s->cpu[i]), ARM_CPU_TYPE_NAME("cortex-a9"), &error_abort, NULL); + + /* On uniprocessor, the CBAR is set to 0 */ + if (smp_cpus > 1) { + object_property_set_int(OBJECT(&s->cpu[i]), FSL_IMX6_A9MPCORE_ADDR, + "reset-cbar", &error_abort); + } + + /* All CPU but CPU 0 start in power off mode */ + if (i) { + object_property_set_bool(OBJECT(&s->cpu[i]), true, + "start-powered-off", &error_abort); + } } sysbus_init_child_obj(obj, "a9mpcore", &s->a9mpcore, sizeof(s->a9mpcore), TYPE_A9MPCORE_PRIV); + object_property_set_int(OBJECT(&s->a9mpcore), smp_cpus, "num-cpu", + &error_abort); + + object_property_set_int(OBJECT(&s->a9mpcore), + FSL_IMX6_MAX_IRQ + GIC_INTERNAL, "num-irq", + &error_abort); + sysbus_init_child_obj(obj, "ccm", &s->ccm, sizeof(s->ccm), TYPE_IMX6_CCM); sysbus_init_child_obj(obj, "src", &s->src, sizeof(s->src), TYPE_IMX6_SRC); @@ -81,6 +100,10 @@ static void fsl_imx6_init(Object *obj) snprintf(name, NAME_SIZE, "gpio%d", i + 1); sysbus_init_child_obj(obj, name, &s->gpio[i], sizeof(s->gpio[i]), TYPE_IMX_GPIO); + object_property_set_bool(OBJECT(&s->gpio[i]), true, "has-edge-sel", + &error_abort); + object_property_set_bool(OBJECT(&s->gpio[i]), true, "has-upper-pin-irq", + &error_abort); } for (i = 0; i < FSL_IMX6_NUM_ESDHCS; i++) { @@ -124,19 +147,6 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) unsigned int smp_cpus = ms->smp.cpus; for (i = 0; i < smp_cpus; i++) { - - /* On uniprocessor, the CBAR is set to 0 */ - if (smp_cpus > 1) { - object_property_set_int(OBJECT(&s->cpu[i]), FSL_IMX6_A9MPCORE_ADDR, - "reset-cbar", &error_abort); - } - - /* All CPU but CPU 0 start in power off mode */ - if (i) { - object_property_set_bool(OBJECT(&s->cpu[i]), true, - "start-powered-off", &error_abort); - } - object_property_set_bool(OBJECT(&s->cpu[i]), true, "realized", &err); if (err) { error_propagate(errp, err); @@ -144,13 +154,6 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) } } - object_property_set_int(OBJECT(&s->a9mpcore), smp_cpus, "num-cpu", - &error_abort); - - object_property_set_int(OBJECT(&s->a9mpcore), - FSL_IMX6_MAX_IRQ + GIC_INTERNAL, "num-irq", - &error_abort); - object_property_set_bool(OBJECT(&s->a9mpcore), true, "realized", &err); if (err) { error_propagate(errp, err); @@ -310,10 +313,6 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) }, }; - object_property_set_bool(OBJECT(&s->gpio[i]), true, "has-edge-sel", - &error_abort); - object_property_set_bool(OBJECT(&s->gpio[i]), true, "has-upper-pin-irq", - &error_abort); object_property_set_bool(OBJECT(&s->gpio[i]), true, "realized", &err); if (err) { error_propagate(errp, err); From patchwork Mon Apr 6 17:46:59 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1266969 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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[83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.47.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:47:59 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 10/54] hw/arm/fsl-imx31: Move some code from realize() to init() Date: Mon, 6 Apr 2020 19:46:59 +0200 Message-Id: <20200406174743.16956-11-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::443 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , Peter Chubb , =?utf-8?q?Philippe_Mathieu-Da?= =?utf-8?q?ud=C3=A9?= , "open list:i.MX31 kzm" Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Coccinelle reported: $ spatch ... --timeout 60 --sp-file \ scripts/coccinelle/simplify-init-realize-error_propagate.cocci HANDLING: hw/arm/fsl-imx31.c >>> possible moves from fsl_imx31_init() to fsl_imx31_realize() in hw/arm/fsl-imx31.c:68 Move the calls using &error_abort which don't depend of input updated before realize() to init(). Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/fsl-imx31.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/arm/fsl-imx31.c b/hw/arm/fsl-imx31.c index 8472d2e911..61287e24f6 100644 --- a/hw/arm/fsl-imx31.c +++ b/hw/arm/fsl-imx31.c @@ -62,6 +62,8 @@ static void fsl_imx31_init(Object *obj) for (i = 0; i < FSL_IMX31_NUM_GPIOS; i++) { sysbus_init_child_obj(obj, "gpio[*]", &s->gpio[i], sizeof(s->gpio[i]), TYPE_IMX_GPIO); + object_property_set_bool(OBJECT(&s->gpio[i]), false, "has-edge-sel", + &error_abort); } } @@ -191,8 +193,6 @@ static void fsl_imx31_realize(DeviceState *dev, Error **errp) { FSL_IMX31_GPIO3_ADDR, FSL_IMX31_GPIO3_IRQ } }; - object_property_set_bool(OBJECT(&s->gpio[i]), false, "has-edge-sel", - &error_abort); object_property_set_bool(OBJECT(&s->gpio[i]), true, "realized", &err); if (err) { error_propagate(errp, err); From patchwork Mon Apr 6 17:47:00 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1266970 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amsat.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=c/n+hqSX; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48wypr4gjQz9sR4 for ; Tue, 7 Apr 2020 03:54:28 +1000 (AEST) Received: from localhost ([::1]:35950 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jLVx4-0004g2-LH for incoming@patchwork.ozlabs.org; Mon, 06 Apr 2020 13:54:26 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:35936) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jLVqu-0001gk-3j for qemu-devel@nongnu.org; Mon, 06 Apr 2020 13:48:09 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1jLVqs-0001uP-Uq for qemu-devel@nongnu.org; Mon, 06 Apr 2020 13:48:04 -0400 Received: from mail-wm1-x343.google.com ([2a00:1450:4864:20::343]:53244) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1jLVqs-0001rg-NK; Mon, 06 Apr 2020 13:48:02 -0400 Received: by mail-wm1-x343.google.com with SMTP id t203so295216wmt.2; Mon, 06 Apr 2020 10:48:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=rNOvzQC0gAZiW9IjgvdXICw1FeldG6faD6QdyriSpSA=; b=c/n+hqSXSD6F6qaxpMdMSonWyATO4kGyDsDvE11hkpNqZ0OPTKvxYdOVbUH3k5V2SS lED/ZjO82uWDhIadKnSNfPzHeHYQ97t0rVysBln+5mK6p6CnDQ23khn41btWsXbdOJw3 2yIuiacSdkmj8zgTb3LNK7J/L82w95dwpTlsVoC9ogTWXUgcE1kD7uVs/VeN4T7Ratt1 mzG3Sd8f1FZYj/OnB+yxNyI33xb/rRLtBLoTf+8cprwyiRKrhHJQfZ3Iq30fpSjUreJS Fw8UAB+rmF2PAfM8rauQHLYrp7UZ+6+Ec1yONYhC1mfx8Mv9axnQE1Y09snZ2q9T9EVR 8+1g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=rNOvzQC0gAZiW9IjgvdXICw1FeldG6faD6QdyriSpSA=; b=Y5gyDZM55u3xIKO9E90qCCP0F559maLu2DDwrBR+xDvFVHOcMwBNxd7s6r11cc+HHP JbFv7Ht50AFDTier3pICZ3DDi9mIpKqP+qtLT5spa8OyUndHhOleSwNbxzS01OFBKNX8 DHjLj1U0ONDl/lotFMxRnZ5GiyUNuEoqUKPNecr2Wbb09sxjuUxOk/1UbFzNodb4l4sl A6TpO5ZWNEda39t4PNdfJJU6xj9cUvFmQmDQDp2DeWkNelWup3xDFHSv7uJoedkMJ8Tt EgVF6C9I+P0l3IlSIH/r+lgnjJZgqH3OAALamA06bCC8Q7TPkyATe5ezNliZjTQ+KKeI eZ5w== X-Gm-Message-State: AGi0PubFUcoysPnqTqbK1BmqNvuGVQ5TZ23dgXPBX5o7T5AOXPcNOihD xCFtRgxKmjSEqulgLvSFkgxDVubKB+U= X-Google-Smtp-Source: APiQypL9/PAZAZx2YLBV7/WulVIyVHdmTkkoC6dnaM5jWrOOcO7PK46zPUuGlo7S9o1MUoqdwO1h3w== X-Received: by 2002:a7b:cb81:: with SMTP id m1mr171274wmi.1.1586195281403; Mon, 06 Apr 2020 10:48:01 -0700 (PDT) Received: from x1w.redhat.com (116.red-83-42-57.dynamicip.rima-tde.net. [83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.48.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:48:00 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 11/54] hw/arm/msf2-soc: Store MemoryRegion in MSF2State Date: Mon, 6 Apr 2020 19:47:00 +0200 Message-Id: <20200406174743.16956-12-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::343 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , "open list:SmartFusion2" , Subbaraya Sundeep Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Coccinelle reported: $ spatch ... --timeout 60 --sp-file \ scripts/coccinelle/simplify-init-realize-error_propagate.cocci HANDLING: ./hw/arm/msf2-soc.c >>> possible moves from m2sxxx_soc_initfn() to m2sxxx_soc_realize() in ./hw/arm/msf2-soc.c:86 While reviewing we notice storing the MemoryRegion in the device state, we'll be able to later automatically simplify the error propagation calls. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/arm/msf2-soc.h | 4 ++++ hw/arm/msf2-soc.c | 18 +++++++----------- 2 files changed, 11 insertions(+), 11 deletions(-) diff --git a/include/hw/arm/msf2-soc.h b/include/hw/arm/msf2-soc.h index 3cfe5c76ee..e4c5110036 100644 --- a/include/hw/arm/msf2-soc.h +++ b/include/hw/arm/msf2-soc.h @@ -50,6 +50,10 @@ typedef struct MSF2State { ARMv7MState armv7m; + MemoryRegion sram; + MemoryRegion nvm; + MemoryRegion nvm_alias; + char *cpu_type; char *part_name; uint64_t envm_size; diff --git a/hw/arm/msf2-soc.c b/hw/arm/msf2-soc.c index 588d643b8d..e448b0ab74 100644 --- a/hw/arm/msf2-soc.c +++ b/hw/arm/msf2-soc.c @@ -90,13 +90,9 @@ static void m2sxxx_soc_realize(DeviceState *dev_soc, Error **errp) SysBusDevice *busdev; Error *err = NULL; int i; - MemoryRegion *system_memory = get_system_memory(); - MemoryRegion *nvm = g_new(MemoryRegion, 1); - MemoryRegion *nvm_alias = g_new(MemoryRegion, 1); - MemoryRegion *sram = g_new(MemoryRegion, 1); - memory_region_init_rom(nvm, OBJECT(dev_soc), "MSF2.eNVM", s->envm_size, + memory_region_init_rom(&s->nvm, OBJECT(dev_soc), "MSF2.eNVM", s->envm_size, &error_fatal); /* * On power-on, the eNVM region 0x60000000 is automatically @@ -104,15 +100,15 @@ static void m2sxxx_soc_realize(DeviceState *dev_soc, Error **errp) * start address (0x0). We do not support remapping other eNVM, * eSRAM and DDR regions by guest(via Sysreg) currently. */ - memory_region_init_alias(nvm_alias, OBJECT(dev_soc), "MSF2.eNVM", nvm, 0, - s->envm_size); + memory_region_init_alias(&s->nvm_alias, OBJECT(dev_soc), "MSF2.eNVM", + &s->nvm, 0, s->envm_size); - memory_region_add_subregion(system_memory, ENVM_BASE_ADDRESS, nvm); - memory_region_add_subregion(system_memory, 0, nvm_alias); + memory_region_add_subregion(system_memory, ENVM_BASE_ADDRESS, &s->nvm); + memory_region_add_subregion(system_memory, 0, &s->nvm_alias); - memory_region_init_ram(sram, NULL, "MSF2.eSRAM", s->esram_size, + memory_region_init_ram(&s->sram, NULL, "MSF2.eSRAM", s->esram_size, &error_fatal); - memory_region_add_subregion(system_memory, SRAM_BASE_ADDRESS, sram); + memory_region_add_subregion(system_memory, SRAM_BASE_ADDRESS, &s->sram); armv7m = DEVICE(&s->armv7m); qdev_prop_set_uint32(armv7m, "num-irq", 81); From patchwork Mon Apr 6 17:47:01 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1266980 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amsat.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=YnlBvtsz; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48wyxx6bLQz9sR4 for ; Tue, 7 Apr 2020 04:00:37 +1000 (AEST) Received: from localhost ([::1]:36098 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jLW31-00079s-P7 for incoming@patchwork.ozlabs.org; Mon, 06 Apr 2020 14:00:35 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36153) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jLVr3-0001yN-41 for qemu-devel@nongnu.org; Mon, 06 Apr 2020 13:48:14 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1jLVqu-00023J-98 for qemu-devel@nongnu.org; Mon, 06 Apr 2020 13:48:13 -0400 Received: from mail-wr1-x42d.google.com ([2a00:1450:4864:20::42d]:40882) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1jLVqu-0001x3-2H; Mon, 06 Apr 2020 13:48:04 -0400 Received: by mail-wr1-x42d.google.com with SMTP id s8so485999wrt.7; Mon, 06 Apr 2020 10:48:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ACqwWM6q3w6eeeLf6eS/r0Fpb4qEkaBMb1O9yAVXZQo=; b=YnlBvtszUzDdb+icZKReBOOOFv0y6kc3QKAP+hS9DENTtSQ52gd5dGpP83znPnHzcA uV6RdSFmkila64rigN1j+TaMTrTjwErg9MX7TL2DhlnXV0tB8V/GXKMABWy0yQTJ6UIT pFMj2U1J7EsZXj5pwii6wtZab5Xd5LeWhU8BuyXH+rtBimXkg4wci7ZpXn83xwyVSTqa wmjBFsgXTjlrPsGl36usaWNEQ/CmFdWf/wH9ctIB4T+g6qBkmi+5WqS6rAqYO0lROSci 4i8rrGmZar8XKfhxF2J5pq91RELY3N9yEpsGZdEpYv1Hkb/v47LKRp2UeHIIw/qxYZwY j2Bw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=ACqwWM6q3w6eeeLf6eS/r0Fpb4qEkaBMb1O9yAVXZQo=; b=mlIdxf819pS+HLG60OApjJWtvpHvIXw2H6mqCstqZoZpTN08Js5WrVYLT8pEYVSfNW V9+layNmeKLJzTX3mLlPbAE1Rxc/b+daomCuDfWN3gkyedU4lOi9QUu4T0vw4tqrBo5B Wjk7/g5+XoJFTRaLjXYtqrN+sA3NhUmwQKhz+6YRSOSAIwj9eePC1u6UOwLd8sVxojX7 4NrbZuzEE9FIojCoQBkdLwC9mmIGYowVVqik9zHYwZgMnJpdlqqI2q8eni6MlSintzU7 kfbAlyUN+fpl/CnWH/rVUio2+kJCCm52YghBnmrB4VVOqbW0qJCWnjYDm1W3ydTmG0UK 7v/w== X-Gm-Message-State: AGi0PubA+IQoIIq6MDemv9tqhjJRsnFkrOIdIC9qczk0aVTU0BC1+ZCN lSn4pEkZAkWcjfcBHPZtpQh3CMLCuro= X-Google-Smtp-Source: APiQypI5qPfu9zlCCsgYeOd9oXnxsUMaKFlVxqollrYI+h70XiJmpExNDb7HscE6xSvZoEe+sSm4Iw== X-Received: by 2002:a5d:4649:: with SMTP id j9mr371222wrs.71.1586195282744; Mon, 06 Apr 2020 10:48:02 -0700 (PDT) Received: from x1w.redhat.com (116.red-83-42-57.dynamicip.rima-tde.net. [83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.48.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:48:02 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 12/54] hw/arm/stm32f205_soc: Store MemoryRegion in STM32F205State Date: Mon, 6 Apr 2020 19:47:01 +0200 Message-Id: <20200406174743.16956-13-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42d X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , "open list:STM32F205" , =?utf-8?q?Philippe_Mathi?= =?utf-8?b?ZXUtRGF1ZMOp?= , Alistair Francis Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Coccinelle reported: $ spatch ... --timeout 60 --sp-file \ scripts/coccinelle/simplify-init-realize-error_propagate.cocci HANDLING: ./hw/arm/stm32f205_soc.c >>> possible moves from stm32f205_soc_initfn() to stm32f205_soc_realize() in ./hw/arm/stm32f205_soc.c:83 While reviewing we notice storing the MemoryRegion in the device state, we'll be able to later automatically simplify the error propagation calls. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/arm/stm32f205_soc.h | 4 ++++ hw/arm/stm32f205_soc.c | 18 +++++++----------- 2 files changed, 11 insertions(+), 11 deletions(-) diff --git a/include/hw/arm/stm32f205_soc.h b/include/hw/arm/stm32f205_soc.h index 922a733f88..63e7e7c825 100644 --- a/include/hw/arm/stm32f205_soc.h +++ b/include/hw/arm/stm32f205_soc.h @@ -56,6 +56,10 @@ typedef struct STM32F205State { ARMv7MState armv7m; + MemoryRegion sram; + MemoryRegion flash; + MemoryRegion flash_alias; + STM32F2XXSyscfgState syscfg; STM32F2XXUsartState usart[STM_NUM_USARTS]; STM32F2XXTimerState timer[STM_NUM_TIMERS]; diff --git a/hw/arm/stm32f205_soc.c b/hw/arm/stm32f205_soc.c index 118c342559..42f4e44134 100644 --- a/hw/arm/stm32f205_soc.c +++ b/hw/arm/stm32f205_soc.c @@ -87,23 +87,19 @@ static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp) SysBusDevice *busdev; Error *err = NULL; int i; - MemoryRegion *system_memory = get_system_memory(); - MemoryRegion *sram = g_new(MemoryRegion, 1); - MemoryRegion *flash = g_new(MemoryRegion, 1); - MemoryRegion *flash_alias = g_new(MemoryRegion, 1); - memory_region_init_rom(flash, OBJECT(dev_soc), "STM32F205.flash", + memory_region_init_rom(&s->flash, OBJECT(dev_soc), "STM32F205.flash", FLASH_SIZE, &error_fatal); - memory_region_init_alias(flash_alias, OBJECT(dev_soc), - "STM32F205.flash.alias", flash, 0, FLASH_SIZE); + memory_region_init_alias(&s->flash_alias, OBJECT(dev_soc), + "STM32F205.flash.alias", &s->flash, 0, FLASH_SIZE); - memory_region_add_subregion(system_memory, FLASH_BASE_ADDRESS, flash); - memory_region_add_subregion(system_memory, 0, flash_alias); + memory_region_add_subregion(system_memory, FLASH_BASE_ADDRESS, &s->flash); + memory_region_add_subregion(system_memory, 0, &s->flash_alias); - memory_region_init_ram(sram, NULL, "STM32F205.sram", SRAM_SIZE, + memory_region_init_ram(&s->sram, NULL, "STM32F205.sram", SRAM_SIZE, &error_fatal); - memory_region_add_subregion(system_memory, SRAM_BASE_ADDRESS, sram); + memory_region_add_subregion(system_memory, SRAM_BASE_ADDRESS, &s->sram); armv7m = DEVICE(&s->armv7m); qdev_prop_set_uint32(armv7m, "num-irq", 96); From patchwork Mon Apr 6 17:47:02 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1266966 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amsat.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=nRVqn9rk; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48wymv5wVfz9sR4 for ; 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[83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.48.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:48:03 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 13/54] hw/arm/stm32f205_soc: Move some code from realize() to init() Date: Mon, 6 Apr 2020 19:47:02 +0200 Message-Id: <20200406174743.16956-14-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42a X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , "open list:STM32F205" , =?utf-8?q?Philippe_Mathi?= =?utf-8?b?ZXUtRGF1ZMOp?= , Alistair Francis Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Coccinelle reported: $ spatch ... --timeout 60 --sp-file \ scripts/coccinelle/simplify-init-realize-error_propagate.cocci HANDLING: ./hw/arm/stm32f205_soc.c >>> possible moves from stm32f205_soc_initfn() to stm32f205_soc_realize() in ./hw/arm/stm32f205_soc.c:83 Move the calls using &error_fatal which don't depend of input updated before realize() to init(). Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/stm32f205_soc.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/hw/arm/stm32f205_soc.c b/hw/arm/stm32f205_soc.c index 42f4e44134..76b0b0e9be 100644 --- a/hw/arm/stm32f205_soc.c +++ b/hw/arm/stm32f205_soc.c @@ -49,6 +49,7 @@ static const int spi_irq[STM_NUM_SPIS] = {35, 36, 51}; static void stm32f205_soc_initfn(Object *obj) { STM32F205State *s = STM32F205_SOC(obj); + MemoryRegion *system_memory = get_system_memory(); int i; sysbus_init_child_obj(obj, "armv7m", &s->armv7m, sizeof(s->armv7m), @@ -78,6 +79,14 @@ static void stm32f205_soc_initfn(Object *obj) sysbus_init_child_obj(obj, "spi[*]", &s->spi[i], sizeof(s->spi[i]), TYPE_STM32F2XX_SPI); } + + memory_region_init_ram(&s->sram, NULL, "STM32F205.sram", SRAM_SIZE, + &error_fatal); + memory_region_add_subregion(system_memory, SRAM_BASE_ADDRESS, &s->sram); + + memory_region_init_rom(&s->flash, obj, "STM32F205.flash", + FLASH_SIZE, &error_fatal); + memory_region_add_subregion(system_memory, FLASH_BASE_ADDRESS, &s->flash); } static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp) @@ -87,19 +96,10 @@ static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp) SysBusDevice *busdev; Error *err = NULL; int i; - MemoryRegion *system_memory = get_system_memory(); - memory_region_init_rom(&s->flash, OBJECT(dev_soc), "STM32F205.flash", - FLASH_SIZE, &error_fatal); memory_region_init_alias(&s->flash_alias, OBJECT(dev_soc), "STM32F205.flash.alias", &s->flash, 0, FLASH_SIZE); - - memory_region_add_subregion(system_memory, FLASH_BASE_ADDRESS, &s->flash); - memory_region_add_subregion(system_memory, 0, &s->flash_alias); - - memory_region_init_ram(&s->sram, NULL, "STM32F205.sram", SRAM_SIZE, - &error_fatal); - memory_region_add_subregion(system_memory, SRAM_BASE_ADDRESS, &s->sram); + memory_region_add_subregion(get_system_memory(), 0, &s->flash_alias); armv7m = DEVICE(&s->armv7m); qdev_prop_set_uint32(armv7m, "num-irq", 96); From patchwork Mon Apr 6 17:47:03 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1266974 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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[83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.48.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:48:04 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 14/54] hw/arm/xlnx-zynqmp: Use single propagate_error() call Date: Mon, 6 Apr 2020 19:47:03 +0200 Message-Id: <20200406174743.16956-15-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::443 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , Alistair Francis , =?utf-8?q?Philippe_Mathieu?= =?utf-8?q?-Daud=C3=A9?= , "open list:Xilinx ZynqMP" , "Edgar E. Iglesias" Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Coccinelle failed at processing this file: $ spatch ... --timeout 60 --sp-file \ scripts/coccinelle/simplify-init-realize-error_propagate.cocci HANDLING: ./hw/arm/xlnx-zynqmp.c EXN: Coccinelle_modules.Common.Timeout We are going to manually add the missing propagate_error() calls. As there are many Error* calls used, simplify by using an unique call to propagate_error(). Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/xlnx-zynqmp.c | 61 +++++++++++++++++--------------------------- 1 file changed, 23 insertions(+), 38 deletions(-) diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c index b84d153d56..43d57fa7de 100644 --- a/hw/arm/xlnx-zynqmp.c +++ b/hw/arm/xlnx-zynqmp.c @@ -385,15 +385,13 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) object_property_set_bool(OBJECT(&s->apu_cpu[i]), true, "realized", &err); if (err) { - error_propagate(errp, err); - return; + goto out_propagate_error; } } object_property_set_bool(OBJECT(&s->gic), true, "realized", &err); if (err) { - error_propagate(errp, err); - return; + goto out_propagate_error; } assert(ARRAY_SIZE(xlnx_zynqmp_gic_regions) == XLNX_ZYNQMP_GIC_REGIONS); @@ -462,8 +460,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) xlnx_zynqmp_create_rpu(ms, s, boot_cpu, &err); if (err) { - error_propagate(errp, err); - return; + goto out_propagate_error; } if (!s->boot_cpu_ptr) { @@ -488,8 +485,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) &error_abort); object_property_set_bool(OBJECT(&s->gem[i]), true, "realized", &err); if (err) { - error_propagate(errp, err); - return; + goto out_propagate_error; } sysbus_mmio_map(SYS_BUS_DEVICE(&s->gem[i]), 0, gem_addr[i]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->gem[i]), 0, @@ -500,8 +496,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) qdev_prop_set_chr(DEVICE(&s->uart[i]), "chardev", serial_hd(i)); object_property_set_bool(OBJECT(&s->uart[i]), true, "realized", &err); if (err) { - error_propagate(errp, err); - return; + goto out_propagate_error; } sysbus_mmio_map(SYS_BUS_DEVICE(&s->uart[i]), 0, uart_addr[i]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart[i]), 0, @@ -512,8 +507,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) &error_abort); object_property_set_bool(OBJECT(&s->sata), true, "realized", &err); if (err) { - error_propagate(errp, err); - return; + goto out_propagate_error; } sysbus_mmio_map(SYS_BUS_DEVICE(&s->sata), 0, SATA_ADDR); @@ -531,23 +525,19 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) */ object_property_set_uint(sdhci, 3, "sd-spec-version", &err); if (err) { - error_propagate(errp, err); - return; + goto out_propagate_error; } object_property_set_uint(sdhci, SDHCI_CAPABILITIES, "capareg", &err); if (err) { - error_propagate(errp, err); - return; + goto out_propagate_error; } object_property_set_uint(sdhci, UHS_I, "uhs", &err); if (err) { - error_propagate(errp, err); - return; + goto out_propagate_error; } object_property_set_bool(sdhci, true, "realized", &err); if (err) { - error_propagate(errp, err); - return; + goto out_propagate_error; } sysbus_mmio_map(sbd, 0, sdhci_addr[i]); sysbus_connect_irq(sbd, 0, gic_spi[sdhci_intr[i]]); @@ -564,8 +554,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) object_property_set_bool(OBJECT(&s->spi[i]), true, "realized", &err); if (err) { - error_propagate(errp, err); - return; + goto out_propagate_error; } sysbus_mmio_map(SYS_BUS_DEVICE(&s->spi[i]), 0, spi_addr[i]); @@ -582,8 +571,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) object_property_set_bool(OBJECT(&s->qspi), true, "realized", &err); if (err) { - error_propagate(errp, err); - return; + goto out_propagate_error; } sysbus_mmio_map(SYS_BUS_DEVICE(&s->qspi), 0, QSPI_ADDR); sysbus_mmio_map(SYS_BUS_DEVICE(&s->qspi), 1, LQSPI_ADDR); @@ -605,16 +593,14 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) object_property_set_bool(OBJECT(&s->dp), true, "realized", &err); if (err) { - error_propagate(errp, err); - return; + goto out_propagate_error; } sysbus_mmio_map(SYS_BUS_DEVICE(&s->dp), 0, DP_ADDR); sysbus_connect_irq(SYS_BUS_DEVICE(&s->dp), 0, gic_spi[DP_IRQ]); object_property_set_bool(OBJECT(&s->dpdma), true, "realized", &err); if (err) { - error_propagate(errp, err); - return; + goto out_propagate_error; } object_property_set_link(OBJECT(&s->dp), OBJECT(&s->dpdma), "dpdma", &error_abort); @@ -623,16 +609,14 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) object_property_set_bool(OBJECT(&s->ipi), true, "realized", &err); if (err) { - error_propagate(errp, err); - return; + goto out_propagate_error; } sysbus_mmio_map(SYS_BUS_DEVICE(&s->ipi), 0, IPI_ADDR); sysbus_connect_irq(SYS_BUS_DEVICE(&s->ipi), 0, gic_spi[IPI_IRQ]); object_property_set_bool(OBJECT(&s->rtc), true, "realized", &err); if (err) { - error_propagate(errp, err); - return; + goto out_propagate_error; } sysbus_mmio_map(SYS_BUS_DEVICE(&s->rtc), 0, RTC_ADDR); sysbus_connect_irq(SYS_BUS_DEVICE(&s->rtc), 0, gic_spi[RTC_IRQ]); @@ -640,13 +624,11 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) for (i = 0; i < XLNX_ZYNQMP_NUM_GDMA_CH; i++) { object_property_set_uint(OBJECT(&s->gdma[i]), 128, "bus-width", &err); if (err) { - error_propagate(errp, err); - return; + goto out_propagate_error; } object_property_set_bool(OBJECT(&s->gdma[i]), true, "realized", &err); if (err) { - error_propagate(errp, err); - return; + goto out_propagate_error; } sysbus_mmio_map(SYS_BUS_DEVICE(&s->gdma[i]), 0, gdma_ch_addr[i]); @@ -657,14 +639,17 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) for (i = 0; i < XLNX_ZYNQMP_NUM_ADMA_CH; i++) { object_property_set_bool(OBJECT(&s->adma[i]), true, "realized", &err); if (err) { - error_propagate(errp, err); - return; + goto out_propagate_error; } sysbus_mmio_map(SYS_BUS_DEVICE(&s->adma[i]), 0, adma_ch_addr[i]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->adma[i]), 0, gic_spi[adma_ch_intr[i]]); } + return; + +out_propagate_error: + error_propagate(errp, err); } static Property xlnx_zynqmp_props[] = { From patchwork Mon Apr 6 17:47:04 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1266983 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amsat.org Authentication-Results: ozlabs.org; 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[83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.48.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:48:06 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 15/54] hw/arm/xlnx-zynqmp: Split xlnx_zynqmp_create_rpu() as init + realize Date: Mon, 6 Apr 2020 19:47:04 +0200 Message-Id: <20200406174743.16956-16-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::442 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , Alistair Francis , =?utf-8?q?Philippe_Mathieu?= =?utf-8?q?-Daud=C3=A9?= , "open list:Xilinx ZynqMP" , "Edgar E. Iglesias" Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Coccinelle failed at processing this file: $ spatch ... --timeout 60 --sp-file \ scripts/coccinelle/simplify-init-realize-error_propagate.cocci HANDLING: ./hw/arm/xlnx-zynqmp.c EXN: Coccinelle_modules.Common.Timeout We are going to manually add the missing propagate_error() calls. Some functions can be called at init() time, reducing the need to add extra Error checks at realize() time. Split create_rpu() in init() and realize(). Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/xlnx-zynqmp.c | 45 +++++++++++++++++++++++++++----------------- 1 file changed, 28 insertions(+), 17 deletions(-) diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c index 43d57fa7de..457057198a 100644 --- a/hw/arm/xlnx-zynqmp.c +++ b/hw/arm/xlnx-zynqmp.c @@ -173,18 +173,9 @@ static inline int arm_gic_ppi_index(int cpu_nr, int ppi_index) return GIC_NUM_SPI_INTR + cpu_nr * GIC_INTERNAL + ppi_index; } -static void xlnx_zynqmp_create_rpu(MachineState *ms, XlnxZynqMPState *s, - const char *boot_cpu, Error **errp) +static void xlnx_zynqmp_rpu_init(XlnxZynqMPState *s, int num_rpus) { - Error *err = NULL; int i; - int num_rpus = MIN(ms->smp.cpus - XLNX_ZYNQMP_NUM_APU_CPUS, - XLNX_ZYNQMP_NUM_RPU_CPUS); - - if (num_rpus <= 0) { - /* Don't create rpu-cluster object if there's nothing to put in it */ - return; - } object_initialize_child(OBJECT(s), "rpu-cluster", &s->rpu_cluster, sizeof(s->rpu_cluster), TYPE_CPU_CLUSTER, @@ -192,13 +183,25 @@ static void xlnx_zynqmp_create_rpu(MachineState *ms, XlnxZynqMPState *s, qdev_prop_set_uint32(DEVICE(&s->rpu_cluster), "cluster-id", 1); for (i = 0; i < num_rpus; i++) { - char *name; - object_initialize_child(OBJECT(&s->rpu_cluster), "rpu-cpu[*]", &s->rpu_cpu[i], sizeof(s->rpu_cpu[i]), ARM_CPU_TYPE_NAME("cortex-r5f"), &error_abort, NULL); + object_property_set_bool(OBJECT(&s->rpu_cpu[i]), true, "reset-hivecs", + &error_abort); + } +} + +static void xlnx_zynqmp_rpu_realize(XlnxZynqMPState *s, int num_rpus, + const char *boot_cpu, Error **errp) +{ + Error *err = NULL; + int i; + + for (i = 0; i < num_rpus; i++) { + char *name; + name = object_get_canonical_path_component(OBJECT(&s->rpu_cpu[i])); if (strcmp(name, boot_cpu)) { /* Secondary CPUs start in PSCI powered-down state */ @@ -209,8 +212,6 @@ static void xlnx_zynqmp_create_rpu(MachineState *ms, XlnxZynqMPState *s, } g_free(name); - object_property_set_bool(OBJECT(&s->rpu_cpu[i]), true, "reset-hivecs", - &error_abort); object_property_set_bool(OBJECT(&s->rpu_cpu[i]), true, "realized", &err); if (err) { @@ -228,6 +229,8 @@ static void xlnx_zynqmp_init(Object *obj) XlnxZynqMPState *s = XLNX_ZYNQMP(obj); int i; int num_apus = MIN(ms->smp.cpus, XLNX_ZYNQMP_NUM_APU_CPUS); + int num_rpus = MIN(ms->smp.cpus - XLNX_ZYNQMP_NUM_APU_CPUS, + XLNX_ZYNQMP_NUM_RPU_CPUS); object_initialize_child(obj, "apu-cluster", &s->apu_cluster, sizeof(s->apu_cluster), TYPE_CPU_CLUSTER, @@ -290,6 +293,10 @@ static void xlnx_zynqmp_init(Object *obj) sysbus_init_child_obj(obj, "adma[*]", &s->adma[i], sizeof(s->adma[i]), TYPE_XLNX_ZDMA); } + + if (num_rpus > 0) { + xlnx_zynqmp_rpu_init(s, num_rpus); + } } static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) @@ -300,6 +307,8 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) uint8_t i; uint64_t ram_size; int num_apus = MIN(ms->smp.cpus, XLNX_ZYNQMP_NUM_APU_CPUS); + int num_rpus = MIN(ms->smp.cpus - XLNX_ZYNQMP_NUM_APU_CPUS, + XLNX_ZYNQMP_NUM_RPU_CPUS); const char *boot_cpu = s->boot_cpu ? s->boot_cpu : "apu-cpu[0]"; ram_addr_t ddr_low_size, ddr_high_size; qemu_irq gic_spi[GIC_NUM_SPI_INTR]; @@ -458,9 +467,11 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) "RPUs just use -smp 6."); } - xlnx_zynqmp_create_rpu(ms, s, boot_cpu, &err); - if (err) { - goto out_propagate_error; + if (num_rpus > 0) { + xlnx_zynqmp_rpu_realize(s, num_rpus, boot_cpu, &err); + if (err) { + goto out_propagate_error; + } } if (!s->boot_cpu_ptr) { From patchwork Mon Apr 6 17:47:05 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1266976 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amsat.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=lJezb71x; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48wyvC1fdqz9sRY for ; Tue, 7 Apr 2020 03:58:15 +1000 (AEST) Received: from localhost ([::1]:36048 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jLW0j-0003Sj-2q for incoming@patchwork.ozlabs.org; Mon, 06 Apr 2020 13:58:13 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36122) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jLVr2-0001vQ-0T for qemu-devel@nongnu.org; Mon, 06 Apr 2020 13:48:13 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1jLVqz-0002dU-O7 for qemu-devel@nongnu.org; Mon, 06 Apr 2020 13:48:11 -0400 Received: from mail-wr1-x444.google.com ([2a00:1450:4864:20::444]:39148) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1jLVqz-0002V2-HI; Mon, 06 Apr 2020 13:48:09 -0400 Received: by mail-wr1-x444.google.com with SMTP id p10so493725wrt.6; Mon, 06 Apr 2020 10:48:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=9GzJBcaH7YPzqJchPXzUGJQV7uPNUIzvdkgPb+3/qBw=; b=lJezb71x6OD7EoU5SBsLyeXUDP99ZBy0CoJ2JTT9wrKvQUrcAA+9t72QAzfSE1WKGY EuPlLcv0ZcepsfwePaaxGy+zU7JE2uUkM1GqwPcaDLqcCelTrOHmQNMqm2ei0ABRHkWt aKg7QHkbs0qjq8UVo6L8r1RZq+ZElSn6kIcFWnDMOKx0Io7ptetsDceQeD/ULVjwWjVl uUrUJrfxI1NG0HsZ1DS0n8pnfGvQV559182Rs9a0IsPAk4p8cgVKaU5LSLarEY9Vq255 aqLVBlzgTwXtNVaGTyW/y29r3kd0E1LhZROdcw105xJuLHfej+x9WsqQH6Jy7zHYNN5I 9S6Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=9GzJBcaH7YPzqJchPXzUGJQV7uPNUIzvdkgPb+3/qBw=; b=hGfi+fS7iNFWY8ks17ZVB5C7o+VGMDQYkkZwoaIcXLAh/QGOTYTtwWDg9c+jO+oGSQ Q9DWQQk1u9pN4WOZmAGhu9i+R+qCwM70hskqVG0o3vRFLizhEmnioHyq5atBAM3ldmzH PlFMpnaufNZ08FJg0HBQkG2SqsRIg928bpyDCn859KQ5TAp0hQFSWUTI9fFdD9mw/QQL 8+kNxIoiS7bXgJpjlacc3uQD4clyfAXysPN/sT4GX+QvJYv39mlR+d1KqJ/okIKJZ8NI eB3gQihMmTJ1h/hOcOKdVzMLfvjFnFETInJ68HZxCO5yxhNj4T3iz4IHMVId4wsIa6cq SSlw== X-Gm-Message-State: AGi0PuZxVKHjLHoq5WMjjVsqSB+7miYs6oUoDdHNfM3rq7UEwCa3Q8v4 z+HLZswk2xDR5B6Vd0gNav8jbEu1T2g= X-Google-Smtp-Source: APiQypKT8yu3DseEnPCJ1+pdq8XW7v+6zneWJaBf4wB7jVdEClEFcvHCrcRVbTpkWP/+nguC88Lzlw== X-Received: by 2002:adf:db4f:: with SMTP id f15mr362504wrj.95.1586195288048; Mon, 06 Apr 2020 10:48:08 -0700 (PDT) Received: from x1w.redhat.com (116.red-83-42-57.dynamicip.rima-tde.net. [83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.48.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:48:07 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 16/54] hw/arm/xlnx-zynqmp: Move some code from realize() to init() Date: Mon, 6 Apr 2020 19:47:05 +0200 Message-Id: <20200406174743.16956-17-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::444 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , Alistair Francis , =?utf-8?q?Philippe_Mathieu?= =?utf-8?q?-Daud=C3=A9?= , "open list:Xilinx ZynqMP" , "Edgar E. Iglesias" Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Coccinelle failed at processing this file: $ spatch ... --timeout 60 --sp-file \ scripts/coccinelle/simplify-init-realize-error_propagate.cocci HANDLING: ./hw/arm/xlnx-zynqmp.c EXN: Coccinelle_modules.Common.Timeout Move the calls using &error_abort which don't depend of input updated before realize() to init(). Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/xlnx-zynqmp.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c index 457057198a..5ec9c24ee7 100644 --- a/hw/arm/xlnx-zynqmp.c +++ b/hw/arm/xlnx-zynqmp.c @@ -242,6 +242,11 @@ static void xlnx_zynqmp_init(Object *obj) &s->apu_cpu[i], sizeof(s->apu_cpu[i]), ARM_CPU_TYPE_NAME("cortex-a53"), &error_abort, NULL); + + object_property_set_int(OBJECT(&s->apu_cpu[i]), QEMU_PSCI_CONDUIT_SMC, + "psci-conduit", &error_abort); + object_property_set_int(OBJECT(&s->apu_cpu[i]), GIC_BASE_ADDR, + "reset-cbar", &error_abort); } sysbus_init_child_obj(obj, "gic", &s->gic, sizeof(s->gic), @@ -250,6 +255,10 @@ static void xlnx_zynqmp_init(Object *obj) for (i = 0; i < XLNX_ZYNQMP_NUM_GEMS; i++) { sysbus_init_child_obj(obj, "gem[*]", &s->gem[i], sizeof(s->gem[i]), TYPE_CADENCE_GEM); + object_property_set_int(OBJECT(&s->gem[i]), GEM_REVISION, "revision", + &error_abort); + object_property_set_int(OBJECT(&s->gem[i]), 2, "num-priority-queues", + &error_abort); } for (i = 0; i < XLNX_ZYNQMP_NUM_UARTS; i++) { @@ -259,6 +268,8 @@ static void xlnx_zynqmp_init(Object *obj) sysbus_init_child_obj(obj, "sata", &s->sata, sizeof(s->sata), TYPE_SYSBUS_AHCI); + object_property_set_int(OBJECT(&s->sata), SATA_NUM_PORTS, "num-ports", + &error_abort); for (i = 0; i < XLNX_ZYNQMP_NUM_SDHCI; i++) { sysbus_init_child_obj(obj, "sdhci[*]", &s->sdhci[i], @@ -370,9 +381,6 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) for (i = 0; i < num_apus; i++) { char *name; - object_property_set_int(OBJECT(&s->apu_cpu[i]), QEMU_PSCI_CONDUIT_SMC, - "psci-conduit", &error_abort); - name = object_get_canonical_path_component(OBJECT(&s->apu_cpu[i])); if (strcmp(name, boot_cpu)) { /* Secondary CPUs start in PSCI powered-down state */ @@ -387,8 +395,6 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) s->secure, "has_el3", NULL); object_property_set_bool(OBJECT(&s->apu_cpu[i]), s->virt, "has_el2", NULL); - object_property_set_int(OBJECT(&s->apu_cpu[i]), GIC_BASE_ADDR, - "reset-cbar", &error_abort); object_property_set_int(OBJECT(&s->apu_cpu[i]), num_apus, "core-count", &error_abort); object_property_set_bool(OBJECT(&s->apu_cpu[i]), true, "realized", @@ -490,10 +496,6 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) qemu_check_nic_model(nd, TYPE_CADENCE_GEM); qdev_set_nic_properties(DEVICE(&s->gem[i]), nd); } - object_property_set_int(OBJECT(&s->gem[i]), GEM_REVISION, "revision", - &error_abort); - object_property_set_int(OBJECT(&s->gem[i]), 2, "num-priority-queues", - &error_abort); object_property_set_bool(OBJECT(&s->gem[i]), true, "realized", &err); if (err) { goto out_propagate_error; @@ -514,8 +516,6 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) gic_spi[uart_intr[i]]); } - object_property_set_int(OBJECT(&s->sata), SATA_NUM_PORTS, "num-ports", - &error_abort); object_property_set_bool(OBJECT(&s->sata), true, "realized", &err); if (err) { goto out_propagate_error; From patchwork Mon Apr 6 17:47:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1266987 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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[83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.48.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:48:08 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 17/54] hw/microblaze/xlnx-zynqmp-pmu: Move some code from realize() to init() Date: Mon, 6 Apr 2020 19:47:06 +0200 Message-Id: <20200406174743.16956-18-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::332 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , Alistair Francis , =?utf-8?q?Philippe_Mathieu?= =?utf-8?q?-Daud=C3=A9?= , "open list:Xilinx ZynqMP" , "Edgar E. Iglesias" Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Coccinelle reported: $ spatch ... --timeout 60 --sp-file \ scripts/coccinelle/simplify-init-realize-error_propagate.cocci HANDLING: ./hw/microblaze/xlnx-zynqmp-pmu.c >>> possible moves from xlnx_zynqmp_pmu_soc_init() to xlnx_zynqmp_pmu_soc_realize() in ./hw/microblaze/xlnx-zynqmp-pmu.c:79 Move the calls using &error_abort which don't depend of input updated before realize() to init(). Signed-off-by: Philippe Mathieu-Daudé --- hw/microblaze/xlnx-zynqmp-pmu.c | 46 ++++++++++++++++----------------- 1 file changed, 23 insertions(+), 23 deletions(-) diff --git a/hw/microblaze/xlnx-zynqmp-pmu.c b/hw/microblaze/xlnx-zynqmp-pmu.c index 028f31894d..2aa602cf85 100644 --- a/hw/microblaze/xlnx-zynqmp-pmu.c +++ b/hw/microblaze/xlnx-zynqmp-pmu.c @@ -63,24 +63,6 @@ static void xlnx_zynqmp_pmu_soc_init(Object *obj) object_initialize_child(obj, "pmu-cpu", &s->cpu, sizeof(s->cpu), TYPE_MICROBLAZE_CPU, &error_abort, NULL); - - sysbus_init_child_obj(obj, "intc", &s->intc, sizeof(s->intc), - TYPE_XLNX_PMU_IO_INTC); - - /* Create the IPI device */ - for (int i = 0; i < XLNX_ZYNQMP_PMU_NUM_IPIS; i++) { - char *name = g_strdup_printf("ipi%d", i); - sysbus_init_child_obj(obj, name, &s->ipi[i], - sizeof(XlnxZynqMPIPI), TYPE_XLNX_ZYNQMP_IPI); - g_free(name); - } -} - -static void xlnx_zynqmp_pmu_soc_realize(DeviceState *dev, Error **errp) -{ - XlnxZynqMPPMUSoCState *s = XLNX_ZYNQMP_PMU_SOC(dev); - Error *err = NULL; - object_property_set_uint(OBJECT(&s->cpu), XLNX_ZYNQMP_PMU_ROM_ADDR, "base-vectors", &error_abort); object_property_set_bool(OBJECT(&s->cpu), true, "use-stack-protection", @@ -99,18 +81,36 @@ static void xlnx_zynqmp_pmu_soc_realize(DeviceState *dev, Error **errp) object_property_set_str(OBJECT(&s->cpu), "8.40.b", "version", &error_abort); object_property_set_uint(OBJECT(&s->cpu), 0, "pvr", &error_abort); - object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err); - if (err) { - error_propagate(errp, err); - return; - } + sysbus_init_child_obj(obj, "intc", &s->intc, sizeof(s->intc), + TYPE_XLNX_PMU_IO_INTC); object_property_set_uint(OBJECT(&s->intc), 0x10, "intc-intr-size", &error_abort); object_property_set_uint(OBJECT(&s->intc), 0x0, "intc-level-edge", &error_abort); object_property_set_uint(OBJECT(&s->intc), 0xffff, "intc-positive", &error_abort); + + /* Create the IPI device */ + for (int i = 0; i < XLNX_ZYNQMP_PMU_NUM_IPIS; i++) { + char *name = g_strdup_printf("ipi%d", i); + sysbus_init_child_obj(obj, name, &s->ipi[i], + sizeof(XlnxZynqMPIPI), TYPE_XLNX_ZYNQMP_IPI); + g_free(name); + } +} + +static void xlnx_zynqmp_pmu_soc_realize(DeviceState *dev, Error **errp) +{ + XlnxZynqMPPMUSoCState *s = XLNX_ZYNQMP_PMU_SOC(dev); + Error *err = NULL; + + object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err); + if (err) { + error_propagate(errp, err); + return; + } + object_property_set_bool(OBJECT(&s->intc), true, "realized", &err); if (err) { error_propagate(errp, err); From patchwork Mon Apr 6 17:47:07 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1266973 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; 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[83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.48.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:48:10 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 18/54] hw/pci-host/pnv_phb3: Move some code from realize() to init() Date: Mon, 6 Apr 2020 19:47:07 +0200 Message-Id: <20200406174743.16956-19-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::444 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Coccinelle reported: $ spatch ... --timeout 60 --sp-file \ scripts/coccinelle/simplify-init-realize-error_propagate.cocci HANDLING: ./hw/pci-host/pnv_phb3.c >>> possible moves from pnv_phb3_instance_init() to pnv_phb3_realize() in ./hw/pci-host/pnv_phb3.c:992 Move the calls using &error_abort which don't depend of input updated before realize() to init(). Signed-off-by: Philippe Mathieu-Daudé --- hw/pci-host/pnv_phb3.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/hw/pci-host/pnv_phb3.c b/hw/pci-host/pnv_phb3.c index 74618fadf0..57d717ed23 100644 --- a/hw/pci-host/pnv_phb3.c +++ b/hw/pci-host/pnv_phb3.c @@ -970,6 +970,8 @@ static void pnv_phb3_instance_init(Object *obj) /* LSI sources */ object_initialize_child(obj, "lsi", &phb->lsis, sizeof(phb->lsis), TYPE_ICS, &error_abort, NULL); + object_property_set_int(OBJECT(&phb->lsis), PNV_PHB3_NUM_LSI, "nr-irqs", + &error_abort); /* Default init ... will be fixed by HW inits */ phb->lsis.offset = 0; @@ -977,6 +979,8 @@ static void pnv_phb3_instance_init(Object *obj) /* MSI sources */ object_initialize_child(obj, "msi", &phb->msis, sizeof(phb->msis), TYPE_PHB3_MSI, &error_abort, NULL); + object_property_set_int(OBJECT(&phb->msis), PHB3_MAX_MSI, "nr-irqs", + &error_abort); /* Power Bus Common Queue */ object_initialize_child(obj, "pbcq", &phb->pbcq, sizeof(phb->pbcq), @@ -1005,8 +1009,6 @@ static void pnv_phb3_realize(DeviceState *dev, Error **errp) /* LSI sources */ object_property_set_link(OBJECT(&phb->lsis), OBJECT(pnv), "xics", &error_abort); - object_property_set_int(OBJECT(&phb->lsis), PNV_PHB3_NUM_LSI, "nr-irqs", - &error_abort); object_property_set_bool(OBJECT(&phb->lsis), true, "realized", &local_err); if (local_err) { error_propagate(errp, local_err); @@ -1024,8 +1026,6 @@ static void pnv_phb3_realize(DeviceState *dev, Error **errp) &error_abort); object_property_set_link(OBJECT(&phb->msis), OBJECT(pnv), "xics", &error_abort); - object_property_set_int(OBJECT(&phb->msis), PHB3_MAX_MSI, "nr-irqs", - &error_abort); object_property_set_bool(OBJECT(&phb->msis), true, "realized", &local_err); if (local_err) { error_propagate(errp, local_err); From patchwork Mon Apr 6 17:47:08 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1266972 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; 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[83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.48.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:48:11 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 19/54] hw/riscv/sifive_e: Move some code from realize() to init() Date: Mon, 6 Apr 2020 19:47:08 +0200 Message-Id: <20200406174743.16956-20-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::444 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , "open list:RISC-V TCG CPUs" , Sagar Karandikar , Bastian Koppelmann , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Alistair Francis , Palmer Dabbelt Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Coccinelle reported: $ spatch ... --timeout 60 --sp-file \ scripts/coccinelle/simplify-init-realize-error_propagate.cocci HANDLING: ./hw/riscv/sifive_e.c >>> possible moves from riscv_sifive_e_soc_init() to riscv_sifive_e_soc_realize() in ./hw/riscv/sifive_e.c:135 Move the calls using &error_fatal which don't depend of input updated before realize() to init(). Signed-off-by: Philippe Mathieu-Daudé --- hw/riscv/sifive_e.c | 26 ++++++++++++++------------ 1 file changed, 14 insertions(+), 12 deletions(-) diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c index 646553a7c3..0be8b52147 100644 --- a/hw/riscv/sifive_e.c +++ b/hw/riscv/sifive_e.c @@ -118,7 +118,9 @@ static void riscv_sifive_e_init(MachineState *machine) static void riscv_sifive_e_soc_init(Object *obj) { MachineState *ms = MACHINE(qdev_get_machine()); + const struct MemmapEntry *memmap = sifive_e_memmap; SiFiveESoCState *s = RISCV_E_SOC(obj); + MemoryRegion *sys_mem = get_system_memory(); object_initialize_child(obj, "cpus", &s->cpus, sizeof(s->cpus), TYPE_RISCV_HART_ARRAY, @@ -130,6 +132,18 @@ static void riscv_sifive_e_soc_init(Object *obj) sysbus_init_child_obj(obj, "riscv.sifive.e.gpio0", &s->gpio, sizeof(s->gpio), TYPE_SIFIVE_GPIO); + + /* Mask ROM */ + memory_region_init_rom(&s->mask_rom, obj, "riscv.sifive.e.mrom", + memmap[SIFIVE_E_MROM].size, &error_fatal); + memory_region_add_subregion(sys_mem, + memmap[SIFIVE_E_MROM].base, &s->mask_rom); + + /* Flash memory */ + memory_region_init_rom(&s->xip_mem, obj, "riscv.sifive.e.xip", + memmap[SIFIVE_E_XIP].size, &error_fatal); + memory_region_add_subregion(sys_mem, memmap[SIFIVE_E_XIP].base, + &s->xip_mem); } static void riscv_sifive_e_soc_realize(DeviceState *dev, Error **errp) @@ -144,12 +158,6 @@ static void riscv_sifive_e_soc_realize(DeviceState *dev, Error **errp) object_property_set_bool(OBJECT(&s->cpus), true, "realized", &error_abort); - /* Mask ROM */ - memory_region_init_rom(&s->mask_rom, OBJECT(dev), "riscv.sifive.e.mrom", - memmap[SIFIVE_E_MROM].size, &error_fatal); - memory_region_add_subregion(sys_mem, - memmap[SIFIVE_E_MROM].base, &s->mask_rom); - /* MMIO */ s->plic = sifive_plic_create(memmap[SIFIVE_E_PLIC].base, (char *)SIFIVE_E_PLIC_HART_CONFIG, @@ -206,12 +214,6 @@ static void riscv_sifive_e_soc_realize(DeviceState *dev, Error **errp) memmap[SIFIVE_E_QSPI2].base, memmap[SIFIVE_E_QSPI2].size); create_unimplemented_device("riscv.sifive.e.pwm2", memmap[SIFIVE_E_PWM2].base, memmap[SIFIVE_E_PWM2].size); - - /* Flash memory */ - memory_region_init_rom(&s->xip_mem, OBJECT(dev), "riscv.sifive.e.xip", - memmap[SIFIVE_E_XIP].size, &error_fatal); - memory_region_add_subregion(sys_mem, memmap[SIFIVE_E_XIP].base, - &s->xip_mem); } static void riscv_sifive_e_machine_init(MachineClass *mc) From patchwork Mon Apr 6 17:47:09 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1266978 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amsat.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; 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[83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.48.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:48:12 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 20/54] hw/riscv/sifive_u: Use single type_init() Date: Mon, 6 Apr 2020 19:47:09 +0200 Message-Id: <20200406174743.16956-21-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42c X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , "open list:RISC-V TCG CPUs" , Sagar Karandikar , Bastian Koppelmann , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Alistair Francis , Palmer Dabbelt Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" We can use a single type_init() to call multiple type_register*(). Signed-off-by: Philippe Mathieu-Daudé --- hw/riscv/sifive_u.c | 12 +++--------- 1 file changed, 3 insertions(+), 9 deletions(-) diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index 998666c91f..9c90c94c33 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -601,13 +601,6 @@ static const TypeInfo riscv_sifive_u_soc_type_info = { .class_init = riscv_sifive_u_soc_class_init, }; -static void riscv_sifive_u_soc_register_types(void) -{ - type_register_static(&riscv_sifive_u_soc_type_info); -} - -type_init(riscv_sifive_u_soc_register_types) - static void riscv_sifive_u_machine_class_init(ObjectClass *oc, void *data) { MachineClass *mc = MACHINE_CLASS(oc); @@ -627,9 +620,10 @@ static const TypeInfo riscv_sifive_u_machine_typeinfo = { .instance_size = sizeof(SiFiveUState), }; -static void riscv_sifive_u_machine_init_register_types(void) +static void riscv_sifive_u_register_types(void) { + type_register_static(&riscv_sifive_u_soc_type_info); type_register_static(&riscv_sifive_u_machine_typeinfo); } -type_init(riscv_sifive_u_machine_init_register_types) +type_init(riscv_sifive_u_register_types) From patchwork Mon Apr 6 17:47:10 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1266991 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amsat.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=eaq++UwG; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48wz5C6jVGz9sR4 for ; Tue, 7 Apr 2020 04:06:55 +1000 (AEST) Received: from localhost ([::1]:36232 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jLW97-0001A8-Rw for incoming@patchwork.ozlabs.org; Mon, 06 Apr 2020 14:06:53 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36248) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jLVr7-00024l-8E for qemu-devel@nongnu.org; Mon, 06 Apr 2020 13:48:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1jLVr6-0002vC-3o for qemu-devel@nongnu.org; Mon, 06 Apr 2020 13:48:17 -0400 Received: from mail-wr1-x441.google.com ([2a00:1450:4864:20::441]:39147) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1jLVr5-0002re-TB; Mon, 06 Apr 2020 13:48:16 -0400 Received: by mail-wr1-x441.google.com with SMTP id p10so494113wrt.6; Mon, 06 Apr 2020 10:48:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=/+xpnZXxL3cFhRkJssEMl59sGjVJ9aCTEzd20s6bUS4=; b=eaq++UwGu8KUgl3mySdioEdAD0mg2PTD9IARIan+xzjwoJRkYjfin6NhIH/9wyXsMc Re9o2e437QZftUY+ur5i683wW6Hv34giVjvjpOgejbPMVX9G2rvTDTWAMAG69y2OTJfx LGnu66vWsWXzpoZ3YVqH8U4xHt2znQxCs2XChWLpf1uZNEBcZ9xEUNzOo+g2PnPXsy6K SMcxJGLScTW/jQTYe9jQE21to0ZrIh10QgCkNS6BwLEQyn+BR0MORufceAnWFuqcxYsJ QGyveLzdl8UtEN5lXzzYbvdIgM/Wg+O0V0oMjsntpxIpv1lI1OfDqYh1tmNDzwpwWEQ0 ugmA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=/+xpnZXxL3cFhRkJssEMl59sGjVJ9aCTEzd20s6bUS4=; b=INQ2buCoCEDWPGyoPP4tVjRZKZwBEP4QPZzR5mj3nV5A7mLDjXm8jvLGeHVyUpdDp1 nyj9xtwaFEvOSBkqajAxpq/+hpYQVSNiHiAOsj8an6lUSQUy1RSIET5t03aU30NfsMlz gOUqVLOwvJmjlqykMa70QIbZnj65UrHXVXJJM9tYlTfdHCXltDHTuZghjaHAveoTACL3 TLqa8VMBqzc6ObAc7KbLxxcIUysWrdCG7CrPKWJtCsypYadSTcIT7kDKgNWJEdoGN9EV A8+fjyxqQoAUKyBtJ1ElXgmxDmL2u24cPIZoquxo+E8GefPZ3APQT4AfluYW6KgX1KMm aLEg== X-Gm-Message-State: AGi0Pua7Zt/ve/e/7HG3Odull+k+IQrCxB7+aWvqFCi93+hTXVIDzXVP G+76f+yniW91Ak8tI2XhxZQbTV8/B68= X-Google-Smtp-Source: APiQypJr9DjAZxFDFzGBUYfzBedN9ES/AYALPRnFRLr8XWHw8mhrUxXjH0Ezu90khHWvlxInSofGWQ== X-Received: by 2002:adf:f68b:: with SMTP id v11mr354132wrp.270.1586195294649; Mon, 06 Apr 2020 10:48:14 -0700 (PDT) Received: from x1w.redhat.com (116.red-83-42-57.dynamicip.rima-tde.net. [83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.48.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:48:14 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 21/54] hw/riscv/sifive_u: Move some code from realize() to init() Date: Mon, 6 Apr 2020 19:47:10 +0200 Message-Id: <20200406174743.16956-22-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::441 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , "open list:RISC-V TCG CPUs" , Sagar Karandikar , Bastian Koppelmann , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Alistair Francis , Palmer Dabbelt Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Coccinelle reported: $ spatch ... --timeout 60 --sp-file \ scripts/coccinelle/simplify-init-realize-error_propagate.cocci HANDLING: ./hw/riscv/sifive_u.c >>> possible moves from riscv_sifive_u_soc_init() to riscv_sifive_u_soc_realize() in ./hw/riscv/sifive_u.c:473 Move the calls using &error_abort which don't depend of input updated before realize() to init(). Signed-off-by: Philippe Mathieu-Daudé --- hw/riscv/sifive_u.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index 9c90c94c33..754af19eef 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -441,6 +441,8 @@ static void riscv_sifive_u_soc_init(Object *obj) qdev_prop_set_uint32(DEVICE(&s->otp), "serial", OTP_SERIAL); sysbus_init_child_obj(obj, "gem", &s->gem, sizeof(s->gem), TYPE_CADENCE_GEM); + object_property_set_int(OBJECT(&s->gem), GEM_REVISION, "revision", + &error_abort); } static bool sifive_u_get_start_in_flash(Object *obj, Error **errp) @@ -569,8 +571,6 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp) qemu_check_nic_model(nd, TYPE_CADENCE_GEM); qdev_set_nic_properties(DEVICE(&s->gem), nd); } - object_property_set_int(OBJECT(&s->gem), GEM_REVISION, "revision", - &error_abort); object_property_set_bool(OBJECT(&s->gem), true, "realized", &err); if (err) { error_propagate(errp, err); From patchwork Mon Apr 6 17:47:11 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1266982 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amsat.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=A8RI1fJa; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48wyzd3hLHz9sR4 for ; Tue, 7 Apr 2020 04:02:05 +1000 (AEST) Received: from localhost ([::1]:36140 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jLW4R-0000zX-Dk for incoming@patchwork.ozlabs.org; Mon, 06 Apr 2020 14:02:03 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36275) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jLVr8-00027q-Nw for qemu-devel@nongnu.org; Mon, 06 Apr 2020 13:48:19 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1jLVr7-0002xn-J4 for qemu-devel@nongnu.org; Mon, 06 Apr 2020 13:48:18 -0400 Received: from mail-wr1-x444.google.com ([2a00:1450:4864:20::444]:33352) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1jLVr7-0002wW-C5; Mon, 06 Apr 2020 13:48:17 -0400 Received: by mail-wr1-x444.google.com with SMTP id a25so548699wrd.0; Mon, 06 Apr 2020 10:48:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Y8TMNAxjLNSnTnU3+gPKyE2L5mZZ/LKhb2zY67/m5zA=; b=A8RI1fJa5N2As+JM88HbJVWQjXlnCdQhclkmh8vVRIHWkoWJ7GI3OiWzoc1mi/OUgU QtnZgFvZbMsRfIkKX2eehVT2rNieMhyK5essYIprpsGAJ/+x3Tbvt87Ek2zkQtNdmfEp UO+xzaZwG6eCsN1kheuGRXvr9Jo0FIutTO+mFsajIbx5V7W9GFoP0LKJUDkzQLR0DLH4 WeK0yKWe13MOcreXM3aL3BtStTNvRwKoTyFFkCmn/LX06Nb4ztcTbetAQDA6/3Z8rwzL M0Ly2rpUzd+0VzoN4Vyc5pZMk4Ij/5hhkkHBU+l3vTpXBvRnOkh13afe4Q3KMHA1bXp9 68MQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=Y8TMNAxjLNSnTnU3+gPKyE2L5mZZ/LKhb2zY67/m5zA=; b=h6UTdIvrI/G+19O1hM7yU+jUEnKfI5B7lBISDVxmJCwqJkskkdCskrxgsTs4mFDvhO ggUs3R4dJrKlRHeIJ0Yhgarr8Yv0WUYDBJcwwfgOIwdSH7j36eQvn/1+SZn7Jq0vu+QF TN1MtHhTwmcXIZ7or81Dn74WoZJ3ElRiv+L8MSCsmuseBq6IOLP7LRwur5Rrno9f2az/ Z3X90s0UpHoYSFZaMyvO7lHBg797gEWGclkqTGRXaTw/6v1KPrPtbQnGsEARNfnYmhai 9BDO1ba1w8E6DTpgrYx2NoSbmkk6v/hmR332yOl+gnuE7jcS3FdCxlSXwykW/7hp8VOd qd7g== X-Gm-Message-State: AGi0PuaCZR+JNDMy9NnZNQ54Mvibee8VPM7c2ZVrQ1ApPc605dsfXE+B r9VWAqrkfyUKKofaqROis4F48e4qOqM= X-Google-Smtp-Source: APiQypJ1Kqv3bEdC1AwTIEXs6fBIhON/Uo5vx5juiPzowSuAp3eQWfGPP7CsHOU9sJdIYHgWNSCBKg== X-Received: by 2002:a5d:4649:: with SMTP id j9mr372161wrs.71.1586195296143; Mon, 06 Apr 2020 10:48:16 -0700 (PDT) Received: from x1w.redhat.com (116.red-83-42-57.dynamicip.rima-tde.net. [83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.48.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:48:15 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 22/54] hw/riscv/sifive_u: Store MemoryRegion in SiFiveUSoCState Date: Mon, 6 Apr 2020 19:47:11 +0200 Message-Id: <20200406174743.16956-23-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::444 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , "open list:RISC-V TCG CPUs" , Sagar Karandikar , Bastian Koppelmann , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Alistair Francis , Palmer Dabbelt Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Coccinelle reported: $ spatch ... --timeout 60 --sp-file \ scripts/coccinelle/simplify-init-realize-error_propagate.cocci HANDLING: ./hw/riscv/sifive_u.c >>> possible moves from riscv_sifive_u_soc_init() to riscv_sifive_u_soc_realize() in ./hw/riscv/sifive_u.c:473 While reviewing we notice storing the MemoryRegion in the device state, we'll be able to later automatically simplify the error propagation calls. Signed-off-by: Philippe Mathieu-Daudé --- include/hw/riscv/sifive_u.h | 2 ++ hw/riscv/sifive_u.c | 10 ++++------ 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/include/hw/riscv/sifive_u.h b/include/hw/riscv/sifive_u.h index 82667b5746..254c6a64f8 100644 --- a/include/hw/riscv/sifive_u.h +++ b/include/hw/riscv/sifive_u.h @@ -42,6 +42,8 @@ typedef struct SiFiveUSoCState { SiFiveUPRCIState prci; SiFiveUOTPState otp; CadenceGEMState gem; + MemoryRegion mask_rom; + MemoryRegion l2lim_mem; } SiFiveUSoCState; #define TYPE_RISCV_U_MACHINE MACHINE_TYPE_NAME("sifive_u") diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index 754af19eef..96177c1977 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -478,8 +478,6 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp) SiFiveUSoCState *s = RISCV_U_SOC(dev); const struct MemmapEntry *memmap = sifive_u_memmap; MemoryRegion *system_memory = get_system_memory(); - MemoryRegion *mask_rom = g_new(MemoryRegion, 1); - MemoryRegion *l2lim_mem = g_new(MemoryRegion, 1); qemu_irq plic_gpios[SIFIVE_U_PLIC_NUM_SOURCES]; char *plic_hart_config; size_t plic_hart_config_len; @@ -503,10 +501,10 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp) &error_abort); /* boot rom */ - memory_region_init_rom(mask_rom, OBJECT(dev), "riscv.sifive.u.mrom", + memory_region_init_rom(&s->mask_rom, OBJECT(dev), "riscv.sifive.u.mrom", memmap[SIFIVE_U_MROM].size, &error_fatal); memory_region_add_subregion(system_memory, memmap[SIFIVE_U_MROM].base, - mask_rom); + &s->mask_rom); /* * Add L2-LIM at reset size. @@ -517,10 +515,10 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp) * leave it enabled all the time. This won't break anything, but will be * too generous to misbehaving guests. */ - memory_region_init_ram(l2lim_mem, NULL, "riscv.sifive.u.l2lim", + memory_region_init_ram(&s->l2lim_mem, NULL, "riscv.sifive.u.l2lim", memmap[SIFIVE_U_L2LIM].size, &error_fatal); memory_region_add_subregion(system_memory, memmap[SIFIVE_U_L2LIM].base, - l2lim_mem); + &s->l2lim_mem); /* create PLIC hart topology configuration string */ plic_hart_config_len = (strlen(SIFIVE_U_PLIC_HART_CONFIG) + 1) * From patchwork Mon Apr 6 17:47:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1266986 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amsat.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=WOTaXd6c; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48wz2k3Rypz9sR4 for ; Tue, 7 Apr 2020 04:04:46 +1000 (AEST) Received: from localhost ([::1]:36182 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jLW72-0004yT-8c for incoming@patchwork.ozlabs.org; Mon, 06 Apr 2020 14:04:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36326) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jLVrA-0002Bh-K8 for qemu-devel@nongnu.org; Mon, 06 Apr 2020 13:48:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1jLVr9-00033M-AU for qemu-devel@nongnu.org; Mon, 06 Apr 2020 13:48:20 -0400 Received: from mail-wm1-x344.google.com ([2a00:1450:4864:20::344]:35064) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1jLVr9-00030u-34; Mon, 06 Apr 2020 13:48:19 -0400 Received: by mail-wm1-x344.google.com with SMTP id i19so335183wmb.0; Mon, 06 Apr 2020 10:48:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=aQ0X+HWMU9WGFg41OMAjP3yVb6N0PLiNzSrYmZnrIlE=; b=WOTaXd6c0yFH3nRGwJqIsFagkG/NlFGCO7DTapLUpuB8LaGYgMpoSA/Ev1/6NUN+FX z1bw38/aezftn+wQhL8wIh0rqSJmSSiCLusI8siyYDGD0K4nSfnCLbqoA+MxAGVkuYwW qqzZJgo210pou7zm7hO8TyEnE4hGBAueHUAAYT86AJCuKqCPwH8ZU4NhXBzWG7+N1G6M ymFRtLb3Gr+32RfzR9+iPB/zg3kfBGPUP4/OJMEhdtmgTFYcbjOzbRvZhUGGd7aYRx+E hVg8rkzGC079C0yYFyeSIS8sREVqmzvCx3qDnmk5VSVeh5Crl366UWD5fiwyXCJJ83qQ 6cHQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=aQ0X+HWMU9WGFg41OMAjP3yVb6N0PLiNzSrYmZnrIlE=; b=QJGxVClMvG7K2lAzFZ7U1gURrZ7FMlNNYLLaN223PAwFSWpghyJBz5BpSatvQzgiH/ JtDfS5hYTSRmzYWcQhtwj9++SuqdoKaTEYktTGPRvWhro8fcfjr11dVJR9TIKKW5sPPJ U8wbuFzuu/VX9uafgos0f9O+5qQMiCRfRKf0Gx6an5vjtb4EYe7UFgCp9LbIgmATt4ps Ra6q7elig7WVLbJEFlCzk4GgnmQZOyxnih52Oswwh9EOCoi1iLE07c9aQMZFMVt5TDzc yL08KrtWBiPi+B6c2EJfoidOf0Z3aohumP5r/vRdZKMtvR9lv4CWrYwW4aBN4JvWotPd E/DA== X-Gm-Message-State: AGi0PuaztUFxva73RbMTLeDa39ddnX6ivA2D/QjEP553bWuHDyriU6An 1FiH4nFM8U+WUpIYtkjVHLOiZmA1GR4= X-Google-Smtp-Source: APiQypJVnY1Bhnwe9G/r2C1COEiB/B0AzO9H4ebeQzlrZvXb5tAJpTTQOHDEPyTUULcHFKsU31pcVw== X-Received: by 2002:a7b:c148:: with SMTP id z8mr475442wmi.31.1586195297775; Mon, 06 Apr 2020 10:48:17 -0700 (PDT) Received: from x1w.redhat.com (116.red-83-42-57.dynamicip.rima-tde.net. [83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.48.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:48:17 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 23/54] hw/riscv/sifive_u: Move some code from realize() to init() Date: Mon, 6 Apr 2020 19:47:12 +0200 Message-Id: <20200406174743.16956-24-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::344 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , "open list:RISC-V TCG CPUs" , Sagar Karandikar , Bastian Koppelmann , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Alistair Francis , Palmer Dabbelt Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Coccinelle reported: $ spatch ... --timeout 60 --sp-file \ scripts/coccinelle/simplify-init-realize-error_propagate.cocci HANDLING: ./hw/riscv/sifive_u.c >>> possible moves from riscv_sifive_u_soc_init() to riscv_sifive_u_soc_realize() in ./hw/riscv/sifive_u.c:473 Move the calls using &error_abort which don't depend of input updated before realize() to init(). Signed-off-by: Philippe Mathieu-Daudé --- hw/riscv/sifive_u.c | 42 ++++++++++++++++++++++-------------------- 1 file changed, 22 insertions(+), 20 deletions(-) diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index 96177c1977..7bf1f30a35 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -406,6 +406,8 @@ static void riscv_sifive_u_init(MachineState *machine) static void riscv_sifive_u_soc_init(Object *obj) { MachineState *ms = MACHINE(qdev_get_machine()); + const struct MemmapEntry *memmap = sifive_u_memmap; + MemoryRegion *system_memory = get_system_memory(); SiFiveUSoCState *s = RISCV_U_SOC(obj); object_initialize_child(obj, "e-cluster", &s->e_cluster, @@ -443,6 +445,26 @@ static void riscv_sifive_u_soc_init(Object *obj) TYPE_CADENCE_GEM); object_property_set_int(OBJECT(&s->gem), GEM_REVISION, "revision", &error_abort); + + /* boot rom */ + memory_region_init_rom(&s->mask_rom, obj, "riscv.sifive.u.mrom", + memmap[SIFIVE_U_MROM].size, &error_fatal); + memory_region_add_subregion(system_memory, memmap[SIFIVE_U_MROM].base, + &s->mask_rom); + + /* + * Add L2-LIM at reset size. + * This should be reduced in size as the L2 Cache Controller WayEnable + * register is incremented. Unfortunately I don't see a nice (or any) way + * to handle reducing or blocking out the L2 LIM while still allowing it + * be re returned to all enabled after a reset. For the time being, just + * leave it enabled all the time. This won't break anything, but will be + * too generous to misbehaving guests. + */ + memory_region_init_ram(&s->l2lim_mem, NULL, "riscv.sifive.u.l2lim", + memmap[SIFIVE_U_L2LIM].size, &error_fatal); + memory_region_add_subregion(system_memory, memmap[SIFIVE_U_L2LIM].base, + &s->l2lim_mem); } static bool sifive_u_get_start_in_flash(Object *obj, Error **errp) @@ -500,26 +522,6 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp) object_property_set_bool(OBJECT(&s->u_cluster), true, "realized", &error_abort); - /* boot rom */ - memory_region_init_rom(&s->mask_rom, OBJECT(dev), "riscv.sifive.u.mrom", - memmap[SIFIVE_U_MROM].size, &error_fatal); - memory_region_add_subregion(system_memory, memmap[SIFIVE_U_MROM].base, - &s->mask_rom); - - /* - * Add L2-LIM at reset size. - * This should be reduced in size as the L2 Cache Controller WayEnable - * register is incremented. Unfortunately I don't see a nice (or any) way - * to handle reducing or blocking out the L2 LIM while still allowing it - * be re returned to all enabled after a reset. For the time being, just - * leave it enabled all the time. This won't break anything, but will be - * too generous to misbehaving guests. - */ - memory_region_init_ram(&s->l2lim_mem, NULL, "riscv.sifive.u.l2lim", - memmap[SIFIVE_U_L2LIM].size, &error_fatal); - memory_region_add_subregion(system_memory, memmap[SIFIVE_U_L2LIM].base, - &s->l2lim_mem); - /* create PLIC hart topology configuration string */ plic_hart_config_len = (strlen(SIFIVE_U_PLIC_HART_CONFIG) + 1) * ms->smp.cpus; From patchwork Mon Apr 6 17:47:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1266977 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amsat.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=r9V51Y1x; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48wyvK3l6Pz9sR4 for ; Tue, 7 Apr 2020 03:58:21 +1000 (AEST) Received: from localhost ([::1]:36056 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jLW0p-0003ln-Dt for incoming@patchwork.ozlabs.org; Mon, 06 Apr 2020 13:58:19 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36377) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jLVrF-0002IR-UY for qemu-devel@nongnu.org; Mon, 06 Apr 2020 13:48:27 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1jLVrA-00036k-Ha for qemu-devel@nongnu.org; Mon, 06 Apr 2020 13:48:25 -0400 Received: from mail-wm1-x342.google.com ([2a00:1450:4864:20::342]:54705) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1jLVrA-00033j-Ao; Mon, 06 Apr 2020 13:48:20 -0400 Received: by mail-wm1-x342.google.com with SMTP id h2so283112wmb.4; Mon, 06 Apr 2020 10:48:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=n53pt0qup4Bja42ysNmHw44EY6rNqSSO2uSNuR4e+2E=; b=r9V51Y1xouns4swlMGeNtpuxw+oQavIJ/c9mpdu2LCGIbVrGK1kRlGdNoixeGzATtE UWGY4aI4RIc1AzBg5KEUzySGBSELe6AAoS+vPZeFgqmS2uw5AREWo9H8NySwQbOXDPUd zrKRiclIwWnQuK2WASc4pf/9X9JzkGAQWMrHaSonCSDB3FrR+KRUBfisyJsnaDbvJ28T WZ3HsobJok8RaVMknOCwZPowiC5PIV4iQaiUREOh++wY4FzqJSvJu/lbHdty63aVdXpc 8fn27fKfdmBe51TJA0IXrasNmP3zKtFBJaTQMWDagGNwEKyiPpnyGFjWpQ06J01Odo7s lrsw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=n53pt0qup4Bja42ysNmHw44EY6rNqSSO2uSNuR4e+2E=; b=pCT2owFhmfi8920C+ME2qnfPegX34pJ7f+H1uwPM8OFbR9CShuvOXe0K9gAd7qYhc5 1anJfbeP1ldPbrr7J/9fllYttfQP6tdINzzB3UnT5vDdlvd+l4UWMyKofFBK2H/bSwT2 EvS5sGVjZR71YBMWEmfpdWhnwE1DSGw4smzP8vcUUsLoSUMqp4DIke95kmS9c5xuLevT YIG+QOqQPGB1eh1w5OvqDvqjptFN7ivfzbThAuVn4u/Biu3w9AfjF2JexCNmMAsCEIbK PjXKFpwxpG+LeNum7YE2Uml3Okn1wxF+UpTsN8vREeVxpXF90CfWFqY8jZntpJ7AcJaX ePdA== X-Gm-Message-State: AGi0PuYGCvkHKXaNP7G2YRITRbFBOZPePA++ayqqiG0l/yQJeGDlzoYB 9sZspp8BBaTgJSfCeGPppdUh/o+wtpQ= X-Google-Smtp-Source: APiQypIuiPc2GUAaxQjcigKrXvSPriurNaUO+3xMcESy5OJB7RM1rwN+sb5yoML4b63vYmiMCYPbkA== X-Received: by 2002:a1c:a344:: with SMTP id m65mr206848wme.20.1586195299094; Mon, 06 Apr 2020 10:48:19 -0700 (PDT) Received: from x1w.redhat.com (116.red-83-42-57.dynamicip.rima-tde.net. [83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.48.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:48:18 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 24/54] hw/riscv/sifive_u: Rename MachineClass::init() Date: Mon, 6 Apr 2020 19:47:13 +0200 Message-Id: <20200406174743.16956-25-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::342 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , "open list:RISC-V TCG CPUs" , Sagar Karandikar , Bastian Koppelmann , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Alistair Francis , Palmer Dabbelt Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" As there already is the riscv_sifive_u_soc_init() method, rename riscv_sifive_u_init() as riscv_sifive_u_machine_init(). Signed-off-by: Philippe Mathieu-Daudé --- hw/riscv/sifive_u.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index 7bf1f30a35..e13ab34de4 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -312,7 +312,7 @@ static void create_fdt(SiFiveUState *s, const struct MemmapEntry *memmap, g_free(nodename); } -static void riscv_sifive_u_init(MachineState *machine) +static void riscv_sifive_u_machine_init(MachineState *machine) { const struct MemmapEntry *memmap = sifive_u_memmap; SiFiveUState *s = RISCV_U_MACHINE(machine); @@ -606,7 +606,7 @@ static void riscv_sifive_u_machine_class_init(ObjectClass *oc, void *data) MachineClass *mc = MACHINE_CLASS(oc); mc->desc = "RISC-V Board compatible with SiFive U SDK"; - mc->init = riscv_sifive_u_init; + mc->init = riscv_sifive_u_machine_init; mc->max_cpus = SIFIVE_U_MANAGEMENT_CPU_COUNT + SIFIVE_U_COMPUTE_CPU_COUNT; mc->min_cpus = SIFIVE_U_MANAGEMENT_CPU_COUNT + 1; mc->default_cpus = mc->min_cpus; From patchwork Mon Apr 6 17:47:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1266994 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amsat.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=ok4WPrVU; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48wz7R2ZKrz9sRR for ; Tue, 7 Apr 2020 04:08:51 +1000 (AEST) Received: from localhost ([::1]:36270 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jLWAy-0004dz-W1 for incoming@patchwork.ozlabs.org; Mon, 06 Apr 2020 14:08:49 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36354) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jLVrD-0002FC-R0 for qemu-devel@nongnu.org; Mon, 06 Apr 2020 13:48:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1jLVrB-00037s-MD for qemu-devel@nongnu.org; Mon, 06 Apr 2020 13:48:23 -0400 Received: from mail-wm1-x329.google.com ([2a00:1450:4864:20::329]:40470) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1jLVrB-00037R-GR for qemu-devel@nongnu.org; Mon, 06 Apr 2020 13:48:21 -0400 Received: by mail-wm1-x329.google.com with SMTP id a81so298429wmf.5 for ; Mon, 06 Apr 2020 10:48:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=YhVPUQsfht6jA/IUTaj+buf6eqXAxfk/bBYv1XmJLk4=; b=ok4WPrVUixwIKypERf9YDPnea3W9Jvy7sanmZCZ+u9uMZMV0TH+h1feoKfAQYSCia8 aKVETMkgPqRtKV8RFGFlosxY5dcheaR53J56AWxRC+WN8A2DzL6MTUDRuuMODdrknKxK bkXjAganl6WsOl5iBU3GAo2UTdCjldIL9JyeYnAdSoKtfpDVoQHIv9HGCfqJa0pL4MJC di1OSYsrTpiRA3X91/YG7grAFgRt4Ocxk4utXW4ouE/YOrZs/ujnjPs7o5WYSfHRanD9 0JX2VpHs8JBQ/kzOLblGZ4T0vl8nH9zO8XN4QGAU4pnURoHNxmrmuNxEaVdtzWAcd40y xoNg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=YhVPUQsfht6jA/IUTaj+buf6eqXAxfk/bBYv1XmJLk4=; b=XoTDMhSTbm/02aSi04JEye4G4VXFWMOTjXquHkIK80FCTVBSNl2Fc19espPZAQ3g8e 3HUejHi4IvD9Gp9vbSeEOw3vHNdXLNLn6aQHPJ3fd14kqOVzzlGlsyJ22cMElBwRyqFO /eCdhZo+Wqy0aZnelAUHtQc0N0VMxto/QkRwOhpsNOq1TwoD9tmFh7o4lFp5xLBOhciF S6sElYLcana5yf+B4PE7ML+BIag8ld8lLR/QUnz90OKImy5BTqIWkGB9b2RPELSsc8le oV/QnEow+kLEjW6ECbYvE3nS9Y0/U/BdfFtaR3jt29eLNKkj6Zt+bQU4uPx6faQlprpI F12Q== X-Gm-Message-State: AGi0PubeyU5zwUG3WHhtwqdD2blOBR9NRKSeRTW4X/320flWE3JS2xuX MocstZZTa0j0gB4iRbrXCgPxjN+NPNg= X-Google-Smtp-Source: APiQypIiSUddRW6GrDP1x9LqwJu4HPIC+MyntKbNyZdQRmc6Zn7xN1OrxmXLbGwi5yjCUEDF0VqzBQ== X-Received: by 2002:a1c:4d13:: with SMTP id o19mr205798wmh.82.1586195300185; Mon, 06 Apr 2020 10:48:20 -0700 (PDT) Received: from x1w.redhat.com (116.red-83-42-57.dynamicip.rima-tde.net. [83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.48.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:48:19 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 25/54] scripts/coccinelle: Catch missing error_propagate() calls in realize() Date: Mon, 6 Apr 2020 19:47:14 +0200 Message-Id: <20200406174743.16956-26-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::329 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" In some DeviceClass::realize() while we can propagate errors to the caller, we forgot to do so. Add a Coccinelle patch to automatically add the missing code. Inspired-by: Peter Maydell Signed-off-by: Philippe Mathieu-Daudé --- .../use-error_propagate-in-realize.cocci | 54 +++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 55 insertions(+) create mode 100644 scripts/coccinelle/use-error_propagate-in-realize.cocci diff --git a/scripts/coccinelle/use-error_propagate-in-realize.cocci b/scripts/coccinelle/use-error_propagate-in-realize.cocci new file mode 100644 index 0000000000..7b59277a50 --- /dev/null +++ b/scripts/coccinelle/use-error_propagate-in-realize.cocci @@ -0,0 +1,54 @@ +// Add missing error-propagation code in DeviceClass::realize() +// +// Copyright: (C) 2020 Philippe Mathieu-Daudé +// This work is licensed under the terms of the GNU GPLv2 or later. +// +// spatch \ +// --macro-file scripts/cocci-macro-file.h --include-headers \ +// --sp-file scripts/coccinelle/use-error_abort-in-instance_init.cocci \ +// --keep-comments --timeout 60 --in-place +// +// Inspired by https://www.mail-archive.com/qemu-devel@nongnu.org/msg691638.html + + +@ match_class_init @ +TypeInfo info; +identifier class_initfn; +@@ + info.class_init = class_initfn; + + +@ match_realize @ +identifier match_class_init.class_initfn; +DeviceClass *dc; +identifier realizefn; +@@ +void class_initfn(...) +{ + ... + dc->realize = realizefn; + ... +} + + +@ propagate_in_realize @ +identifier match_realize.realizefn; +identifier err; +identifier errp; +identifier func_with_errp; +symbol error_abort, error_fatal; +@@ +void realizefn(..., Error **errp) +{ + ... + Error *err = NULL; + <+... + func_with_errp(..., +- \(&error_abort\|&error_fatal\)); ++ &err); ++ if (err) { ++ error_propagate(errp, err); ++ return; ++ } + ...+> +} diff --git a/MAINTAINERS b/MAINTAINERS index d06ffeddd5..7b58f02efb 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2059,6 +2059,7 @@ F: scripts/coccinelle/error_propagate_null.cocci F: scripts/coccinelle/remove_local_err.cocci F: scripts/coccinelle/simplify-init-realize-error_propagate.cocci F: scripts/coccinelle/use-error_fatal.cocci +F: scripts/coccinelle/use-error_propagate-in-realize.cocci GDB stub M: Alex Bennée From patchwork Mon Apr 6 17:47:15 2020 Content-Type: text/plain; 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[83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.48.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:48:20 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 26/54] hw/arm/fsl-imx: Add missing error-propagation code Date: Mon, 6 Apr 2020 19:47:15 +0200 Message-Id: <20200406174743.16956-27-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::329 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , "open list:i.MX25 PDK" , Jean-Christophe Dubois Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Patch created mechanically by running: $ spatch \ --macro-file scripts/cocci-macro-file.h --include-headers \ --sp-file scripts/coccinelle/use-error_propagate-in-realize.cocci \ --keep-comments --smpl-spacing --in-place --dir hw Reviewed-by: Peter Maydell Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/fsl-imx25.c | 6 +++++- hw/arm/fsl-imx6.c | 18 +++++++++++++++--- 2 files changed, 20 insertions(+), 4 deletions(-) diff --git a/hw/arm/fsl-imx25.c b/hw/arm/fsl-imx25.c index 6f1a82ce3d..3d87fe867e 100644 --- a/hw/arm/fsl-imx25.c +++ b/hw/arm/fsl-imx25.c @@ -295,7 +295,11 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp) }; object_property_set_bool(OBJECT(&s->usb[i]), true, "realized", - &error_abort); + &err); + if (err) { + error_propagate(errp, err); + return; + } sysbus_mmio_map(SYS_BUS_DEVICE(&s->usb[i]), 0, usb_table[i].addr); sysbus_connect_irq(SYS_BUS_DEVICE(&s->usb[i]), 0, qdev_get_gpio_in(DEVICE(&s->avic), diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c index 6bf8aa0404..b3cef5bb57 100644 --- a/hw/arm/fsl-imx6.c +++ b/hw/arm/fsl-imx6.c @@ -359,7 +359,11 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) /* USB */ for (i = 0; i < FSL_IMX6_NUM_USB_PHYS; i++) { object_property_set_bool(OBJECT(&s->usbphy[i]), true, "realized", - &error_abort); + &err); + if (err) { + error_propagate(errp, err); + return; + } sysbus_mmio_map(SYS_BUS_DEVICE(&s->usbphy[i]), 0, FSL_IMX6_USBPHY1_ADDR + i * 0x1000); } @@ -372,7 +376,11 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) }; object_property_set_bool(OBJECT(&s->usb[i]), true, "realized", - &error_abort); + &err); + if (err) { + error_propagate(errp, err); + return; + } sysbus_mmio_map(SYS_BUS_DEVICE(&s->usb[i]), 0, FSL_IMX6_USBOH3_USB_ADDR + i * 0x200); sysbus_connect_irq(SYS_BUS_DEVICE(&s->usb[i]), 0, @@ -430,7 +438,11 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) }; object_property_set_bool(OBJECT(&s->wdt[i]), true, "realized", - &error_abort); + &err); + if (err) { + error_propagate(errp, err); + return; + } sysbus_mmio_map(SYS_BUS_DEVICE(&s->wdt[i]), 0, FSL_IMX6_WDOGn_ADDR[i]); } From patchwork Mon Apr 6 17:47:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1266985 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; 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[83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.48.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:48:22 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 27/54] hw/arm/stm32f*05_soc: Add missing error-propagation code Date: Mon, 6 Apr 2020 19:47:16 +0200 Message-Id: <20200406174743.16956-28-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42b X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , Alistair Francis , =?utf-8?q?Philippe_Mathieu?= =?utf-8?q?-Daud=C3=A9?= , "open list:STM32F205" , Alistair Francis Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Patch created mechanically by running: $ spatch \ --macro-file scripts/cocci-macro-file.h --include-headers \ --sp-file scripts/coccinelle/use-error_propagate-in-realize.cocci \ --keep-comments --smpl-spacing --in-place --dir hw Reviewed-by: Alistair Francis Reviewed-by: Peter Maydell Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/stm32f205_soc.c | 6 +++++- hw/arm/stm32f405_soc.c | 6 +++++- 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/hw/arm/stm32f205_soc.c b/hw/arm/stm32f205_soc.c index 76b0b0e9be..b1be4fde40 100644 --- a/hw/arm/stm32f205_soc.c +++ b/hw/arm/stm32f205_soc.c @@ -106,7 +106,11 @@ static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp) qdev_prop_set_string(armv7m, "cpu-type", s->cpu_type); qdev_prop_set_bit(armv7m, "enable-bitband", true); object_property_set_link(OBJECT(&s->armv7m), OBJECT(get_system_memory()), - "memory", &error_abort); + "memory", &err); + if (err) { + error_propagate(errp, err); + return; + } object_property_set_bool(OBJECT(&s->armv7m), true, "realized", &err); if (err != NULL) { error_propagate(errp, err); diff --git a/hw/arm/stm32f405_soc.c b/hw/arm/stm32f405_soc.c index 4f10ce6176..2b8a84a695 100644 --- a/hw/arm/stm32f405_soc.c +++ b/hw/arm/stm32f405_soc.c @@ -121,7 +121,11 @@ static void stm32f405_soc_realize(DeviceState *dev_soc, Error **errp) qdev_prop_set_string(armv7m, "cpu-type", s->cpu_type); qdev_prop_set_bit(armv7m, "enable-bitband", true); object_property_set_link(OBJECT(&s->armv7m), OBJECT(system_memory), - "memory", &error_abort); + "memory", &err); + if (err) { + error_propagate(errp, err); + return; + } object_property_set_bool(OBJECT(&s->armv7m), true, "realized", &err); if (err != NULL) { error_propagate(errp, err); From patchwork Mon Apr 6 17:47:17 2020 Content-Type: text/plain; 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[83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.48.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:48:23 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 28/54] hw/arm/aspeed: Add missing error-propagation code Date: Mon, 6 Apr 2020 19:47:17 +0200 Message-Id: <20200406174743.16956-29-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::435 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , Andrew Jeffery , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , "open list:ASPEED BMCs" , Joel Stanley , =?utf-8?q?C=C3=A9dric_Le_Goater?= Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Patch created mechanically by running: $ spatch \ --macro-file scripts/cocci-macro-file.h --include-headers \ --sp-file scripts/coccinelle/use-error_propagate-in-realize.cocci \ --keep-comments --smpl-spacing --in-place --dir hw Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Cédric Le Goater --- hw/arm/aspeed_ast2600.c | 36 ++++++++++++++++++++++++++++++------ hw/arm/aspeed_soc.c | 12 ++++++++++-- 2 files changed, 40 insertions(+), 8 deletions(-) diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c index c8e0171824..d810df928c 100644 --- a/hw/arm/aspeed_ast2600.c +++ b/hw/arm/aspeed_ast2600.c @@ -277,7 +277,11 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) if (s->num_cpus > 1) { object_property_set_int(OBJECT(&s->cpu[i]), ASPEED_A7MPCORE_ADDR, - "reset-cbar", &error_abort); + "reset-cbar", &err); + if (err) { + error_propagate(errp, err); + return; + } } /* * TODO: the secondary CPUs are started and a boot helper @@ -293,10 +297,18 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) /* A7MPCORE */ object_property_set_int(OBJECT(&s->a7mpcore), s->num_cpus, "num-cpu", - &error_abort); + &err); + if (err) { + error_propagate(errp, err); + return; + } object_property_set_bool(OBJECT(&s->a7mpcore), true, "realized", - &error_abort); + &err); + if (err) { + error_propagate(errp, err); + return; + } sysbus_mmio_map(SYS_BUS_DEVICE(&s->a7mpcore), 0, ASPEED_A7MPCORE_ADDR); for (i = 0; i < s->num_cpus; i++) { @@ -343,7 +355,11 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) /* Timer */ object_property_set_link(OBJECT(&s->timerctrl), - OBJECT(&s->scu), "scu", &error_abort); + OBJECT(&s->scu), "scu", &err); + if (err) { + error_propagate(errp, err); + return; + } object_property_set_bool(OBJECT(&s->timerctrl), true, "realized", &err); if (err) { error_propagate(errp, err); @@ -459,7 +475,11 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) AspeedWDTClass *awc = ASPEED_WDT_GET_CLASS(&s->wdt[i]); object_property_set_link(OBJECT(&s->wdt[i]), - OBJECT(&s->scu), "scu", &error_abort); + OBJECT(&s->scu), "scu", &err); + if (err) { + error_propagate(errp, err); + return; + } object_property_set_bool(OBJECT(&s->wdt[i]), true, "realized", &err); if (err) { error_propagate(errp, err); @@ -490,7 +510,11 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp) aspeed_soc_get_irq(s, ASPEED_ETH1 + i)); object_property_set_link(OBJECT(&s->mii[i]), OBJECT(&s->ftgmac100[i]), - "nic", &error_abort); + "nic", &err); + if (err) { + error_propagate(errp, err); + return; + } object_property_set_bool(OBJECT(&s->mii[i]), true, "realized", &err); if (err) { diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c index aa6d739ad0..5f90215187 100644 --- a/hw/arm/aspeed_soc.c +++ b/hw/arm/aspeed_soc.c @@ -301,7 +301,11 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) /* Timer */ object_property_set_link(OBJECT(&s->timerctrl), - OBJECT(&s->scu), "scu", &error_abort); + OBJECT(&s->scu), "scu", &err); + if (err) { + error_propagate(errp, err); + return; + } object_property_set_bool(OBJECT(&s->timerctrl), true, "realized", &err); if (err) { error_propagate(errp, err); @@ -398,7 +402,11 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) AspeedWDTClass *awc = ASPEED_WDT_GET_CLASS(&s->wdt[i]); object_property_set_link(OBJECT(&s->wdt[i]), - OBJECT(&s->scu), "scu", &error_abort); + OBJECT(&s->scu), "scu", &err); + if (err) { + error_propagate(errp, err); + return; + } object_property_set_bool(OBJECT(&s->wdt[i]), true, "realized", &err); if (err) { error_propagate(errp, err); From patchwork Mon Apr 6 17:47:18 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1266990 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; 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[83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.48.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:48:25 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 29/54] hw/arm/allwinner-a10: Add missing error-propagation code Date: Mon, 6 Apr 2020 19:47:18 +0200 Message-Id: <20200406174743.16956-30-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::342 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Beniamino Galvani , Peter Maydell , Vladimir Sementsov-Ogievskiy , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , "open list:Allwinner-a10" Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Patch created mechanically by running: $ spatch \ --macro-file scripts/cocci-macro-file.h --include-headers \ --sp-file scripts/coccinelle/use-error_propagate-in-realize.cocci \ --keep-comments --smpl-spacing --in-place --dir hw Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/allwinner-a10.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/hw/arm/allwinner-a10.c b/hw/arm/allwinner-a10.c index f41395734a..db70aa2b88 100644 --- a/hw/arm/allwinner-a10.c +++ b/hw/arm/allwinner-a10.c @@ -158,14 +158,22 @@ static void aw_a10_realize(DeviceState *dev, Error **errp) for (i = 0; i < AW_A10_NUM_USB; i++) { object_property_set_bool(OBJECT(&s->ehci[i]), true, "realized", - &error_fatal); + &err); + if (err) { + error_propagate(errp, err); + return; + } sysbus_mmio_map(SYS_BUS_DEVICE(&s->ehci[i]), 0, AW_A10_EHCI_BASE + i * 0x8000); sysbus_connect_irq(SYS_BUS_DEVICE(&s->ehci[i]), 0, qdev_get_gpio_in(dev, 39 + i)); object_property_set_bool(OBJECT(&s->ohci[i]), true, "realized", - &error_fatal); + &err); + if (err) { + error_propagate(errp, err); + return; + } sysbus_mmio_map(SYS_BUS_DEVICE(&s->ohci[i]), 0, AW_A10_OHCI_BASE + i * 0x8000); sysbus_connect_irq(SYS_BUS_DEVICE(&s->ohci[i]), 0, @@ -178,7 +186,11 @@ static void aw_a10_realize(DeviceState *dev, Error **errp) sysbus_mmio_map(SYS_BUS_DEVICE(&s->mmc0), 0, AW_A10_MMC0_BASE); sysbus_connect_irq(SYS_BUS_DEVICE(&s->mmc0), 0, qdev_get_gpio_in(dev, 32)); object_property_add_alias(OBJECT(s), "sd-bus", OBJECT(&s->mmc0), - "sd-bus", &error_abort); + "sd-bus", &err); + if (err) { + error_propagate(errp, err); + return; + } /* RTC */ qdev_init_nofail(DEVICE(&s->rtc)); From patchwork Mon Apr 6 17:47:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1267001 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amsat.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=EXiwzYrX; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48wzCv1G6Pz9sR4 for ; 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[83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.48.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:48:26 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 30/54] hw/arm/msf2-soc: Add missing error-propagation code Date: Mon, 6 Apr 2020 19:47:19 +0200 Message-Id: <20200406174743.16956-31-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::343 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , "open list:SmartFusion2" , Subbaraya Sundeep Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Patch created mechanically by running: $ spatch \ --macro-file scripts/cocci-macro-file.h --include-headers \ --sp-file scripts/coccinelle/use-error_propagate-in-realize.cocci \ --keep-comments --smpl-spacing --in-place --dir hw Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/msf2-soc.c | 24 ++++++++++++++++++++---- 1 file changed, 20 insertions(+), 4 deletions(-) diff --git a/hw/arm/msf2-soc.c b/hw/arm/msf2-soc.c index e448b0ab74..7619e71cfa 100644 --- a/hw/arm/msf2-soc.c +++ b/hw/arm/msf2-soc.c @@ -93,7 +93,11 @@ static void m2sxxx_soc_realize(DeviceState *dev_soc, Error **errp) MemoryRegion *system_memory = get_system_memory(); memory_region_init_rom(&s->nvm, OBJECT(dev_soc), "MSF2.eNVM", s->envm_size, - &error_fatal); + &err); + if (err) { + error_propagate(errp, err); + return; + } /* * On power-on, the eNVM region 0x60000000 is automatically * remapped to the Cortex-M3 processor executable region @@ -107,7 +111,11 @@ static void m2sxxx_soc_realize(DeviceState *dev_soc, Error **errp) memory_region_add_subregion(system_memory, 0, &s->nvm_alias); memory_region_init_ram(&s->sram, NULL, "MSF2.eSRAM", s->esram_size, - &error_fatal); + &err); + if (err) { + error_propagate(errp, err); + return; + } memory_region_add_subregion(system_memory, SRAM_BASE_ADDRESS, &s->sram); armv7m = DEVICE(&s->armv7m); @@ -115,7 +123,11 @@ static void m2sxxx_soc_realize(DeviceState *dev_soc, Error **errp) qdev_prop_set_string(armv7m, "cpu-type", s->cpu_type); qdev_prop_set_bit(armv7m, "enable-bitband", true); object_property_set_link(OBJECT(&s->armv7m), OBJECT(get_system_memory()), - "memory", &error_abort); + "memory", &err); + if (err) { + error_propagate(errp, err); + return; + } object_property_set_bool(OBJECT(&s->armv7m), true, "realized", &err); if (err != NULL) { error_propagate(errp, err); @@ -184,8 +196,12 @@ static void m2sxxx_soc_realize(DeviceState *dev_soc, Error **errp) bus_name = g_strdup_printf("spi%d", i); object_property_add_alias(OBJECT(s), bus_name, OBJECT(&s->spi[i]), "spi", - &error_abort); + &err); g_free(bus_name); + if (err) { + error_propagate(errp, err); + return; + } } /* Below devices are not modelled yet. */ From patchwork Mon Apr 6 17:47:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1267002 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; 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[83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.48.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:48:28 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 31/54] hw/riscv/sifive: Add missing error-propagation code Date: Mon, 6 Apr 2020 19:47:20 +0200 Message-Id: <20200406174743.16956-32-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42a X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , "open list:RISC-V TCG CPUs" , Sagar Karandikar , Bastian Koppelmann , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Alistair Francis , Palmer Dabbelt Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Patch created mechanically by running: $ spatch \ --macro-file scripts/cocci-macro-file.h --include-headers \ --sp-file scripts/coccinelle/use-error_propagate-in-realize.cocci \ --keep-comments --smpl-spacing --in-place --dir hw Signed-off-by: Philippe Mathieu-Daudé --- hw/riscv/sifive_e.c | 6 +++++- hw/riscv/sifive_u.c | 24 ++++++++++++++++++++---- 2 files changed, 25 insertions(+), 5 deletions(-) diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c index 0be8b52147..6d4e141ff7 100644 --- a/hw/riscv/sifive_e.c +++ b/hw/riscv/sifive_e.c @@ -156,7 +156,11 @@ static void riscv_sifive_e_soc_realize(DeviceState *dev, Error **errp) MemoryRegion *sys_mem = get_system_memory(); object_property_set_bool(OBJECT(&s->cpus), true, "realized", - &error_abort); + &err); + if (err) { + error_propagate(errp, err); + return; + } /* MMIO */ s->plic = sifive_plic_create(memmap[SIFIVE_E_PLIC].base, diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index e13ab34de4..b07526aba1 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -508,9 +508,17 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp) NICInfo *nd = &nd_table[0]; object_property_set_bool(OBJECT(&s->e_cpus), true, "realized", - &error_abort); + &err); + if (err) { + error_propagate(errp, err); + return; + } object_property_set_bool(OBJECT(&s->u_cpus), true, "realized", - &error_abort); + &err); + if (err) { + error_propagate(errp, err); + return; + } /* * The cluster must be realized after the RISC-V hart array container, * as the container's CPU object is only created on realize, and the @@ -518,9 +526,17 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp) * cluster is realized. */ object_property_set_bool(OBJECT(&s->e_cluster), true, "realized", - &error_abort); + &err); + if (err) { + error_propagate(errp, err); + return; + } object_property_set_bool(OBJECT(&s->u_cluster), true, "realized", - &error_abort); + &err); + if (err) { + error_propagate(errp, err); + return; + } /* create PLIC hart topology configuration string */ plic_hart_config_len = (strlen(SIFIVE_U_PLIC_HART_CONFIG) + 1) * From patchwork Mon Apr 6 17:47:21 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1267004 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amsat.org Authentication-Results: ozlabs.org; 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[83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.48.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:48:29 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 32/54] hw/arm/armv7m: Add missing error-propagation code Date: Mon, 6 Apr 2020 19:47:21 +0200 Message-Id: <20200406174743.16956-33-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42a X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , "open list:ARM TCG CPUs" Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Patch created mechanically by running: $ spatch \ --macro-file scripts/cocci-macro-file.h --include-headers \ --sp-file scripts/coccinelle/use-error_propagate-in-realize.cocci \ --keep-comments --smpl-spacing --in-place --dir hw Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/armv7m.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c index 7531b97ccd..249a7605f6 100644 --- a/hw/arm/armv7m.c +++ b/hw/arm/armv7m.c @@ -168,7 +168,11 @@ static void armv7m_realize(DeviceState *dev, Error **errp) } object_property_set_link(OBJECT(s->cpu), OBJECT(&s->container), "memory", - &error_abort); + &err); + if (err) { + error_propagate(errp, err); + return; + } if (object_property_find(OBJECT(s->cpu), "idau", NULL)) { object_property_set_link(OBJECT(s->cpu), s->idau, "idau", &err); if (err != NULL) { @@ -256,7 +260,11 @@ static void armv7m_realize(DeviceState *dev, Error **errp) return; } object_property_set_link(obj, OBJECT(s->board_memory), - "source-memory", &error_abort); + "source-memory", &err); + if (err) { + error_propagate(errp, err); + return; + } object_property_set_bool(obj, true, "realized", &err); if (err != NULL) { error_propagate(errp, err); From patchwork Mon Apr 6 17:47:22 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1266995 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; 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[83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.48.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:48:30 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 33/54] hw/intc/arm_gicv3_its_kvm: Add missing error-propagation code Date: Mon, 6 Apr 2020 19:47:22 +0200 Message-Id: <20200406174743.16956-34-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::442 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , "open list:ARM cores" Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Patch created mechanically by running: $ spatch \ --macro-file scripts/cocci-macro-file.h --include-headers \ --sp-file scripts/coccinelle/use-error_propagate-in-realize.cocci \ --keep-comments --smpl-spacing --in-place --dir hw Signed-off-by: Philippe Mathieu-Daudé --- hw/intc/arm_gicv3_its_kvm.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/hw/intc/arm_gicv3_its_kvm.c b/hw/intc/arm_gicv3_its_kvm.c index ad0ebabc87..3d2c4e22f5 100644 --- a/hw/intc/arm_gicv3_its_kvm.c +++ b/hw/intc/arm_gicv3_its_kvm.c @@ -101,7 +101,11 @@ static void kvm_arm_its_realize(DeviceState *dev, Error **errp) /* explicit init of the ITS */ kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_CTRL, - KVM_DEV_ARM_VGIC_CTRL_INIT, NULL, true, &error_abort); + KVM_DEV_ARM_VGIC_CTRL_INIT, NULL, true, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } /* register the base address */ kvm_arm_register_device(&s->iomem_its_cntrl, -1, KVM_DEV_ARM_VGIC_GRP_ADDR, From patchwork Mon Apr 6 17:47:23 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1267005 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amsat.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=d6VmOd2k; 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[83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.48.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:48:32 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 34/54] hw/microblaze/xlnx-zynqmp-pmu: Add missing error-propagation code Date: Mon, 6 Apr 2020 19:47:23 +0200 Message-Id: <20200406174743.16956-35-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::344 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , Alistair Francis , =?utf-8?q?Philippe_Mathieu?= =?utf-8?q?-Daud=C3=A9?= , "open list:Xilinx ZynqMP" , "Edgar E. Iglesias" Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Patch created mechanically by running: $ spatch \ --macro-file scripts/cocci-macro-file.h --include-headers \ --sp-file scripts/coccinelle/use-error_propagate-in-realize.cocci \ --keep-comments --smpl-spacing --in-place --dir hw Signed-off-by: Philippe Mathieu-Daudé --- hw/microblaze/xlnx-zynqmp-pmu.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/hw/microblaze/xlnx-zynqmp-pmu.c b/hw/microblaze/xlnx-zynqmp-pmu.c index 2aa602cf85..4ecbea7fdc 100644 --- a/hw/microblaze/xlnx-zynqmp-pmu.c +++ b/hw/microblaze/xlnx-zynqmp-pmu.c @@ -123,7 +123,11 @@ static void xlnx_zynqmp_pmu_soc_realize(DeviceState *dev, Error **errp) /* Connect the IPI device */ for (int i = 0; i < XLNX_ZYNQMP_PMU_NUM_IPIS; i++) { object_property_set_bool(OBJECT(&s->ipi[i]), true, "realized", - &error_abort); + &err); + if (err) { + error_propagate(errp, err); + return; + } sysbus_mmio_map(SYS_BUS_DEVICE(&s->ipi[i]), 0, ipi_addr[i]); sysbus_connect_irq(SYS_BUS_DEVICE(&s->ipi[i]), 0, qdev_get_gpio_in(DEVICE(&s->intc), ipi_irq[i])); From patchwork Mon Apr 6 17:47:24 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1266981 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amsat.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=F8ja9Qu2; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48wyyY36S2z9sRR for ; Tue, 7 Apr 2020 04:01:09 +1000 (AEST) Received: from localhost ([::1]:36124 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jLW3X-0007xg-98 for incoming@patchwork.ozlabs.org; Mon, 06 Apr 2020 14:01:07 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36726) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jLVrZ-0002kM-UK for qemu-devel@nongnu.org; Mon, 06 Apr 2020 13:48:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1jLVrO-0003Mc-Rg for qemu-devel@nongnu.org; Mon, 06 Apr 2020 13:48:44 -0400 Received: from mail-wr1-x42c.google.com ([2a00:1450:4864:20::42c]:34488) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1jLVrO-0003M2-Ls for qemu-devel@nongnu.org; Mon, 06 Apr 2020 13:48:34 -0400 Received: by mail-wr1-x42c.google.com with SMTP id 65so542897wrl.1 for ; Mon, 06 Apr 2020 10:48:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=+bsGyQcFnOKVG+Bd26nlz77NXbYaghgLj/LaGKCq2kg=; b=F8ja9Qu2fuEWoUyu5PPqgzA621ECwiPvYGvFj9QanTVML124/cbNkFFYz1x4dn1Tyj xGLiLK2IHuaR8NZv0BBEtw6WVS1Ob5UT3egtR5czRsDs+l/bg39Nw/AxSYXuk7JIyaAs +C/9A3uFcAHDqZ7sFSHpj21AdzOx0hSNzT+kWcfkTkUT4xyQ8q9QDM1OzgvPuSsYdSLS tI9Y8F2sVffYWuplQbzJ687UsbbU9fhQxSCoZowdzW06jseisLZq4MNXL8oMFT1cSl7I RAFIu7d80RlPP95avzXNhSjkk2qLPHICYPyu3kqeTdhdh9dupbpkawZooRLAFaWsIITp WRhg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=+bsGyQcFnOKVG+Bd26nlz77NXbYaghgLj/LaGKCq2kg=; b=qvkbLJDqGIHEoA9AMZeClgOSarOKe7bz4/JPqcLYIK2ycXsqh6gBefSWQqBPGy+fx8 GQpEsmVkuZE4BfEQKByjyzWlfeLhKY6rkC2bIDwPRYnTPtsg8ivSOzxYv6w2ebhYrZzL Fy3mNjfRRgiAug9gjTNC0hVPwsaPgPAy+ObS/iosuRBKaYVFpuFGfdL90vbzeY3ukLrR XDL8NRPcysaSuo3Ts3or1yOz+Z4VRfP2/IHId4Vft05CqG7dzwM8n7IxzlMj3KgHRKtG v7D8G+FRifcsCT3cyG/G7DL2OLcIOSnRt5EJq5T4lXPw2RsvVJBUeHmC9JZqMClIB4LC wiZA== X-Gm-Message-State: AGi0PuYA63XFCfz9dh6EeR1orAjpSBALe87uCoclrRyspsMCBBPuq2/w +yIocd6wg4LUKA9sE+c+06Wky/fWGT8= X-Google-Smtp-Source: APiQypJ+MA+ozQQxEbfMdnMsywDvTlsML4uX/3y31XTgjbuC3dW6JpMXY9TPDpDSwL0c5LusmCaKhQ== X-Received: by 2002:a5d:4e03:: with SMTP id p3mr349359wrt.408.1586195313605; Mon, 06 Apr 2020 10:48:33 -0700 (PDT) Received: from x1w.redhat.com (116.red-83-42-57.dynamicip.rima-tde.net. [83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.48.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:48:33 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 35/54] hw/pci-host/pnv_phb3: Add missing error-propagation code Date: Mon, 6 Apr 2020 19:47:24 +0200 Message-Id: <20200406174743.16956-36-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42c X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Patch created mechanically by running: $ spatch \ --macro-file scripts/cocci-macro-file.h --include-headers \ --sp-file scripts/coccinelle/use-error_propagate-in-realize.cocci \ --keep-comments --smpl-spacing --in-place --dir hw Signed-off-by: Philippe Mathieu-Daudé --- hw/pci-host/pnv_phb3.c | 24 ++++++++++++++++++++---- 1 file changed, 20 insertions(+), 4 deletions(-) diff --git a/hw/pci-host/pnv_phb3.c b/hw/pci-host/pnv_phb3.c index 57d717ed23..a9029f5a02 100644 --- a/hw/pci-host/pnv_phb3.c +++ b/hw/pci-host/pnv_phb3.c @@ -1008,7 +1008,11 @@ static void pnv_phb3_realize(DeviceState *dev, Error **errp) /* LSI sources */ object_property_set_link(OBJECT(&phb->lsis), OBJECT(pnv), "xics", - &error_abort); + &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } object_property_set_bool(OBJECT(&phb->lsis), true, "realized", &local_err); if (local_err) { error_propagate(errp, local_err); @@ -1023,9 +1027,17 @@ static void pnv_phb3_realize(DeviceState *dev, Error **errp) /* MSI sources */ object_property_set_link(OBJECT(&phb->msis), OBJECT(phb), "phb", - &error_abort); + &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } object_property_set_link(OBJECT(&phb->msis), OBJECT(pnv), "xics", - &error_abort); + &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } object_property_set_bool(OBJECT(&phb->msis), true, "realized", &local_err); if (local_err) { error_propagate(errp, local_err); @@ -1034,7 +1046,11 @@ static void pnv_phb3_realize(DeviceState *dev, Error **errp) /* Power Bus Common Queue */ object_property_set_link(OBJECT(&phb->pbcq), OBJECT(phb), "phb", - &error_abort); + &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } object_property_set_bool(OBJECT(&phb->pbcq), true, "realized", &local_err); if (local_err) { error_propagate(errp, local_err); From patchwork Mon Apr 6 17:47:25 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1267008 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amsat.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=ePE6RsG1; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48wzN548PBz9sRf for ; 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[83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.48.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:48:34 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 36/54] hw/block/onenand: Add missing error-propagation code Date: Mon, 6 Apr 2020 19:47:25 +0200 Message-Id: <20200406174743.16956-37-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::331 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kevin Wolf , Peter Maydell , Vladimir Sementsov-Ogievskiy , "open list:Block layer core" , =?utf-8?q?Philippe_Ma?= =?utf-8?q?thieu-Daud=C3=A9?= , Max Reitz Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Patch created mechanically by running: $ spatch \ --macro-file scripts/cocci-macro-file.h --include-headers \ --sp-file scripts/coccinelle/use-error_propagate-in-realize.cocci \ --keep-comments --smpl-spacing --in-place --dir hw Signed-off-by: Philippe Mathieu-Daudé --- hw/block/onenand.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/hw/block/onenand.c b/hw/block/onenand.c index 898ac563a3..1f68dba28b 100644 --- a/hw/block/onenand.c +++ b/hw/block/onenand.c @@ -810,7 +810,11 @@ static void onenand_realize(DeviceState *dev, Error **errp) s->otp = memset(g_malloc((64 + 2) << PAGE_SHIFT), 0xff, (64 + 2) << PAGE_SHIFT); memory_region_init_ram_nomigrate(&s->ram, OBJECT(s), "onenand.ram", - 0xc000 << s->shift, &error_fatal); + 0xc000 << s->shift, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } vmstate_register_ram_global(&s->ram); ram = memory_region_get_ram_ptr(&s->ram); s->boot[0] = ram + (0x0000 << s->shift); From patchwork Mon Apr 6 17:47:26 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1266998 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amsat.org Authentication-Results: ozlabs.org; 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[83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.48.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:48:35 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 37/54] scripts/coccinelle: Add script to catch missing error_propagate() calls Date: Mon, 6 Apr 2020 19:47:26 +0200 Message-Id: <20200406174743.16956-38-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::434 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" In some places in we put an error into a local Error*, but forget to check for failure and pass it back to the caller. Add a Coccinelle patch to catch automatically add the missing code. Inspired-by: Peter Maydell Signed-off-by: Philippe Mathieu-Daudé --- .../add-missing-error_propagate.cocci | 30 +++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 31 insertions(+) create mode 100644 scripts/coccinelle/add-missing-error_propagate.cocci diff --git a/scripts/coccinelle/add-missing-error_propagate.cocci b/scripts/coccinelle/add-missing-error_propagate.cocci new file mode 100644 index 0000000000..7991c9e2c2 --- /dev/null +++ b/scripts/coccinelle/add-missing-error_propagate.cocci @@ -0,0 +1,30 @@ +// Add missing error-propagation code where caller provide a Error* argument +// +// Copyright: (C) 2020 Philippe Mathieu-Daudé +// This work is licensed under the terms of the GNU GPLv2 or later. +// +// spatch \ +// --macro-file scripts/cocci-macro-file.h --include-headers \ +// --sp-file scripts/coccinelle/add-missing-error_propagate.cocci \ +// --keep-comments --in-place +// +// Inspired by https://www.mail-archive.com/qemu-devel@nongnu.org/msg691638.html + + +@ add_missing_error_propagate @ +typedef Error; +Error *local_err; +identifier func, errp, errfunc1, errfunc2; +@@ +func(..., Error **errp) +{ + <... + errfunc1(..., &local_err); ++ if (local_err) { ++ error_propagate(errp, local_err); ++ return; ++ } + ... when != local_err + errfunc2(..., &local_err); + ...> +} diff --git a/MAINTAINERS b/MAINTAINERS index 7b58f02efb..14de2a31dc 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2053,6 +2053,7 @@ F: include/qemu/error-report.h F: qapi/error.json F: util/error.c F: util/qemu-error.c +F: scripts/coccinelle/add-missing-error_propagate.cocci F: scripts/coccinelle/err-bad-newline.cocci F: scripts/coccinelle/error-use-after-free.cocci F: scripts/coccinelle/error_propagate_null.cocci From patchwork Mon Apr 6 17:47:27 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1266996 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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[83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.48.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:48:37 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 38/54] hw/arm/bcm2835_peripherals: Add missing error-propagation code Date: Mon, 6 Apr 2020 19:47:27 +0200 Message-Id: <20200406174743.16956-39-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::329 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Andrew Baumann , "open list:Raspberry Pi" , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Patch created mechanically by running: $ spatch \ --macro-file scripts/cocci-macro-file.h --include-headers \ --sp-file scripts/coccinelle/object_property_missing_error_propagate.cocci \ --keep-comments --smpl-spacing --in-place --dir hw Reviewed-by: Peter Maydell Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/bcm2835_peripherals.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/hw/arm/bcm2835_peripherals.c b/hw/arm/bcm2835_peripherals.c index edcaa4916d..a111e91069 100644 --- a/hw/arm/bcm2835_peripherals.c +++ b/hw/arm/bcm2835_peripherals.c @@ -289,8 +289,16 @@ static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp) * SD3.0_Host_AHB_eMMC4.4_Usersguide_ver5.9_jan11_10.pdf */ object_property_set_uint(OBJECT(&s->sdhci), 3, "sd-spec-version", &err); + if (err) { + error_propagate(errp, err); + return; + } object_property_set_uint(OBJECT(&s->sdhci), BCM2835_SDHC_CAPAREG, "capareg", &err); + if (err) { + error_propagate(errp, err); + return; + } object_property_set_bool(OBJECT(&s->sdhci), true, "pending-insert-quirk", &err); if (err) { From patchwork Mon Apr 6 17:47:28 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1266992 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amsat.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; 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[83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.48.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:48:38 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 39/54] hw/arm/fsl-imx: Add missing error-propagation code Date: Mon, 6 Apr 2020 19:47:28 +0200 Message-Id: <20200406174743.16956-40-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42a X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , "open list:i.MX25 PDK" , Jean-Christophe Dubois Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Patch created mechanically by running: $ spatch \ --macro-file scripts/cocci-macro-file.h --include-headers \ --sp-file scripts/coccinelle/object_property_missing_error_propagate.cocci \ --keep-comments --smpl-spacing --in-place --dir hw Reviewed-by: Peter Maydell Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/fsl-imx25.c | 8 ++++++++ hw/arm/fsl-imx6.c | 8 ++++++++ 2 files changed, 16 insertions(+) diff --git a/hw/arm/fsl-imx25.c b/hw/arm/fsl-imx25.c index 3d87fe867e..69d8645dcd 100644 --- a/hw/arm/fsl-imx25.c +++ b/hw/arm/fsl-imx25.c @@ -271,8 +271,16 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp) object_property_set_uint(OBJECT(&s->esdhc[i]), 2, "sd-spec-version", &err); + if (err) { + error_propagate(errp, err); + return; + } object_property_set_uint(OBJECT(&s->esdhc[i]), IMX25_ESDHC_CAPABILITIES, "capareg", &err); + if (err) { + error_propagate(errp, err); + return; + } object_property_set_bool(OBJECT(&s->esdhc[i]), true, "realized", &err); if (err) { error_propagate(errp, err); diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c index b3cef5bb57..c254294a70 100644 --- a/hw/arm/fsl-imx6.c +++ b/hw/arm/fsl-imx6.c @@ -343,8 +343,16 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp) /* UHS-I SDIO3.0 SDR104 1.8V ADMA */ object_property_set_uint(OBJECT(&s->esdhc[i]), 3, "sd-spec-version", &err); + if (err) { + error_propagate(errp, err); + return; + } object_property_set_uint(OBJECT(&s->esdhc[i]), IMX6_ESDHC_CAPABILITIES, "capareg", &err); + if (err) { + error_propagate(errp, err); + return; + } object_property_set_bool(OBJECT(&s->esdhc[i]), true, "realized", &err); if (err) { error_propagate(errp, err); From patchwork Mon Apr 6 17:47:29 2020 Content-Type: text/plain; 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[83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.48.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:48:40 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 40/54] hw/arm/stm32fx05_soc: Add missing error-propagation code Date: Mon, 6 Apr 2020 19:47:29 +0200 Message-Id: <20200406174743.16956-41-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32d X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , Alistair Francis , =?utf-8?q?Philippe_Mathieu?= =?utf-8?q?-Daud=C3=A9?= , "open list:STM32F205" , Alistair Francis Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Patch created mechanically by running: $ spatch \ --macro-file scripts/cocci-macro-file.h --include-headers \ --sp-file scripts/coccinelle/object_property_missing_error_propagate.cocci \ --keep-comments --smpl-spacing --in-place --dir hw Reviewed-by: Alistair Francis Reviewed-by: Peter Maydell Signed-off-by: Philippe Mathieu-Daudé --- hw/arm/stm32f205_soc.c | 4 ++++ hw/arm/stm32f405_soc.c | 4 ++++ 2 files changed, 8 insertions(+) diff --git a/hw/arm/stm32f205_soc.c b/hw/arm/stm32f205_soc.c index b1be4fde40..fba18bc204 100644 --- a/hw/arm/stm32f205_soc.c +++ b/hw/arm/stm32f205_soc.c @@ -159,6 +159,10 @@ static void stm32f205_soc_realize(DeviceState *dev_soc, Error **errp) /* ADC 1 to 3 */ object_property_set_int(OBJECT(s->adc_irqs), STM_NUM_ADCS, "num-lines", &err); + if (err) { + error_propagate(errp, err); + return; + } object_property_set_bool(OBJECT(s->adc_irqs), true, "realized", &err); if (err != NULL) { error_propagate(errp, err); diff --git a/hw/arm/stm32f405_soc.c b/hw/arm/stm32f405_soc.c index 2b8a84a695..6db77d296b 100644 --- a/hw/arm/stm32f405_soc.c +++ b/hw/arm/stm32f405_soc.c @@ -181,6 +181,10 @@ static void stm32f405_soc_realize(DeviceState *dev_soc, Error **errp) } object_property_set_int(OBJECT(&s->adc_irqs), STM_NUM_ADCS, "num-lines", &err); + if (err) { + error_propagate(errp, err); + return; + } object_property_set_bool(OBJECT(&s->adc_irqs), true, "realized", &err); if (err != NULL) { error_propagate(errp, err); From patchwork Mon Apr 6 17:47:30 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1267015 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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[83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.48.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:48:41 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 41/54] hw/dma/xilinx_axidma: Add missing error-propagation code Date: Mon, 6 Apr 2020 19:47:30 +0200 Message-Id: <20200406174743.16956-42-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::341 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , Alistair Francis , =?utf-8?q?Philippe_Mathieu?= =?utf-8?q?-Daud=C3=A9?= , "open list:Xilinx Zynq" , Alistair Francis , "Edgar E. Iglesias" Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Patch created mechanically by running: $ spatch \ --macro-file scripts/cocci-macro-file.h --include-headers \ --sp-file scripts/coccinelle/object_property_missing_error_propagate.cocci \ --keep-comments --smpl-spacing --dir hw Then review showed this file has a 'xilinx_axidma_realize_fail' label that calls error_propagate(). Updated the patch to use the label. Reviewed-by: Alistair Francis Signed-off-by: Philippe Mathieu-Daudé --- v2: New cocci patch generated both transformations (Peter noticed v1 only catched one) --- hw/dma/xilinx_axidma.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/hw/dma/xilinx_axidma.c b/hw/dma/xilinx_axidma.c index 018f36991b..2d36346319 100644 --- a/hw/dma/xilinx_axidma.c +++ b/hw/dma/xilinx_axidma.c @@ -531,6 +531,9 @@ static void xilinx_axidma_realize(DeviceState *dev, Error **errp) object_property_allow_set_link, OBJ_PROP_LINK_STRONG, &local_err); + if (local_err) { + goto xilinx_axidma_realize_fail; + } object_property_add_link(OBJECT(cs), "dma", TYPE_XILINX_AXI_DMA, (Object **)&cs->dma, object_property_allow_set_link, @@ -540,6 +543,9 @@ static void xilinx_axidma_realize(DeviceState *dev, Error **errp) goto xilinx_axidma_realize_fail; } object_property_set_link(OBJECT(ds), OBJECT(s), "dma", &local_err); + if (local_err) { + goto xilinx_axidma_realize_fail; + } object_property_set_link(OBJECT(cs), OBJECT(s), "dma", &local_err); if (local_err) { goto xilinx_axidma_realize_fail; From patchwork Mon Apr 6 17:47:31 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1267017 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amsat.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=IdEZqOgz; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48wzTM3Hn3z9sRY for ; Tue, 7 Apr 2020 04:24:22 +1000 (AEST) Received: from localhost ([::1]:36632 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jLWPz-0004tT-Uu for incoming@patchwork.ozlabs.org; Mon, 06 Apr 2020 14:24:19 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36770) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jLVrc-0002p2-GG for qemu-devel@nongnu.org; Mon, 06 Apr 2020 13:48:55 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1jLVra-0003VP-FH for qemu-devel@nongnu.org; Mon, 06 Apr 2020 13:48:48 -0400 Received: from mail-wm1-x336.google.com ([2a00:1450:4864:20::336]:33434) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1jLVra-0003UH-95 for qemu-devel@nongnu.org; Mon, 06 Apr 2020 13:48:46 -0400 Received: by mail-wm1-x336.google.com with SMTP id g21so583566wmh.0 for ; Mon, 06 Apr 2020 10:48:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=IyfLiNmZozxtS04NjEv2J1qw63HPdKKGf5spfnd6BGI=; b=IdEZqOgzaQWe76xUqago30NbmRj+8VcwpL9v1NBW565wc1cTJVYJ+izVUIhY37sYN9 /Wa3hwd6sJHx85GlPWR8AvkBUruqUL91haKYEiXU1q/Wi1bLDlQuHCVwMZYGdfqx+6ak rItgrVCHK5jc/o4v9str7JP719aDoxC5L0T0COtkTyx9pU7MYcULu09mvi3vQb5FOOj0 wsMaWdU7YcL1zzoG30lSyOIo66UZTFuXeKZWwP7SZZZHJAXdT93hDkZSiQV973rkdXYc Zwdc78nTH9sDW/OAdbGpWvneTW+b03IxUbKvkHMWSo7kazS8L8cKnuPHfGZF1H0IE29d 4IRg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=IyfLiNmZozxtS04NjEv2J1qw63HPdKKGf5spfnd6BGI=; b=YdHPxxhu4Ig2FZNR77SMWhKbfBtiOvYhtMDEMm3CFr5MOeO3rBDtE0AU7Wa/EvLmYY ZC8p8NhEOWymvMVzb6e1VAMDmNbSx2Yj6vbH0rraKz1ZooIOKAK//9CMXeSJypkOq1/a VfBEYtH7d26JLESYvixuWhmq728aMZbFnmhy9foyRIRD5fux+aZIDFElYBwTnG6FdUZF iGj2pgACFRDWWgj4FfYOuRh387VcWm2wQmUZTowHaNTkSx1q4Jp/Enq24IZCBWcLFkIA Sc9SavAYkMtgENLy7rVuP5gWM6WNd80LshJB41Vdhkv/52XH9iCCSjBEy/0mCtF3UQfH 66DA== X-Gm-Message-State: AGi0Puah24iEXY0RGwOJnsCc0XW8uKqQYHnwzUUr1qdCuk9PSWZP8g1b kiotqZnN2taLBqDTJTkNxfoj6sGQ9Nk= X-Google-Smtp-Source: APiQypL1LibcRLYgfmY7gkmLVbaoNkncQeEZHskUhYK3Vo+SD3g3KrUppL6T4aLYDNg0lO7ZcIKbFA== X-Received: by 2002:a1c:6503:: with SMTP id z3mr527237wmb.92.1586195325141; Mon, 06 Apr 2020 10:48:45 -0700 (PDT) Received: from x1w.redhat.com (116.red-83-42-57.dynamicip.rima-tde.net. [83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.48.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:48:44 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 42/54] hw/i386/x86: Add missing error-propagation code Date: Mon, 6 Apr 2020 19:47:31 +0200 Message-Id: <20200406174743.16956-43-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::336 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , Eduardo Habkost , "Michael S. Tsirkin" , =?utf-8?q?Philippe_Mathieu-Dau?= =?utf-8?b?ZMOp?= , Paolo Bonzini , Richard Henderson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Running the coccinelle script: $ spatch \ --macro-file scripts/cocci-macro-file.h --include-headers \ --sp-file scripts/coccinelle/object_property_missing_error_propagate.cocci \ --keep-comments --smpl-spacing --dir hw inserted a block after object_property_set_uint("apic-id") which calls error_propagate() and return. Thanksfully code review noticed returning here would skip the 'object_unref(cpu)' call. Manually fix the error propagation code by adding a label to the existing call. Reported-by: Peter Maydell Signed-off-by: Philippe Mathieu-Daudé --- hw/i386/x86.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/hw/i386/x86.c b/hw/i386/x86.c index b82770024c..ec807ce94f 100644 --- a/hw/i386/x86.c +++ b/hw/i386/x86.c @@ -124,8 +124,12 @@ void x86_cpu_new(X86MachineState *x86ms, int64_t apic_id, Error **errp) cpu = object_new(MACHINE(x86ms)->cpu_type); object_property_set_uint(cpu, apic_id, "apic-id", &local_err); + if (local_err) { + goto out; + } object_property_set_bool(cpu, true, "realized", &local_err); +out: object_unref(cpu); error_propagate(errp, local_err); } From patchwork Mon Apr 6 17:47:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1267022 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amsat.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=YDE3vpKx; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48wzXF4L0Tz9sR4 for ; Tue, 7 Apr 2020 04:26:53 +1000 (AEST) Received: from localhost ([::1]:36696 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jLWSR-0008WM-H3 for incoming@patchwork.ozlabs.org; Mon, 06 Apr 2020 14:26:51 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36838) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jLVrh-0002xG-9Q for qemu-devel@nongnu.org; Mon, 06 Apr 2020 13:49:03 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1jLVrc-0003WQ-D9 for qemu-devel@nongnu.org; Mon, 06 Apr 2020 13:48:53 -0400 Received: from mail-wm1-x333.google.com ([2a00:1450:4864:20::333]:36755) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1jLVrc-0003W8-74 for qemu-devel@nongnu.org; Mon, 06 Apr 2020 13:48:48 -0400 Received: by mail-wm1-x333.google.com with SMTP id d202so328157wmd.1 for ; Mon, 06 Apr 2020 10:48:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=PEHTVvrf5Pm+Jom3wPMXvD0+JJqVe46WaOi392HQB5U=; b=YDE3vpKxS1ahS6WZQYGQ5BsbWpk/jT6NYHZajiT55etah2+eqvbEwZPEpBKC597ynI BRXH4eSKfiMD1xwJwhvG7wc/xDVFIFpy/LYXt2SFRH5i9wbNFooEA0BAL4XsZbiol5sv PN2+xMNKX+u8uuDePIKN2d8taA2+cxXIgSAlX1RZszCIZaReHSnAMoQGf0c+z9ESWGRm 8klfG4CpUeoux7/+RXBscbYCNDj9Wp0HbG9A5OSeqQ51IWriNbIZxfu7dzK1RQ5/HTRo A9H9Eb7nLhIOIP3GNybzWApI6mFLFX3IK8evK8Wd3SCgM4qMlTDeiOccYDSfd3d5EGiQ ktqw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=PEHTVvrf5Pm+Jom3wPMXvD0+JJqVe46WaOi392HQB5U=; b=V9/Y9e13/C/txVR4+8RQn7PtkRY2V8EQHDXwqZj1LtwUS3Pa0b2cLImlNQ6HBI19L2 fpxqLirl+6npFmvFPgBPuoiihzfmjexyzqpDbXmoEYDoAuC/dpcgS93yWZnSl8z9YyWD PnKX5DwtHCTlWK3stQger/9whgL4SIKfR7kmC4RNc0wUO+dBTO9ZsTMlOR4GZUpDptcO +UxoMDKd3WF7HZpbZC8hKSXF8uuZyv0VnDO55+rNjcBZXM0PyBERZTHDEIWMHfwKQ0j3 8axY1X5uK1W/ewDnocCgrjj/JT3aH5Mj9Tfv07dcNwARUxurefxfQRsQy81m50j7FBMA WxHQ== X-Gm-Message-State: AGi0PuZPafucs+Fr334isEAF5g8Wja+UV/QUwmuy5KNFSONysGOsv/7b zeqOtm8lvp8OTisKgDru5xPxBppXgjQ= X-Google-Smtp-Source: APiQypJDVOA05tidm3PgFhJNZMnKiQoCASE2z/ozeyeGOArqYGwv1eqTooLnfg7fJsZQZckhholW2Q== X-Received: by 2002:a1c:c302:: with SMTP id t2mr160254wmf.85.1586195326597; Mon, 06 Apr 2020 10:48:46 -0700 (PDT) Received: from x1w.redhat.com (116.red-83-42-57.dynamicip.rima-tde.net. [83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.48.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:48:45 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 43/54] hw/mips/cps: Add missing error-propagation code Date: Mon, 6 Apr 2020 19:47:32 +0200 Message-Id: <20200406174743.16956-44-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::333 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aleksandar Markovic , Aleksandar Rikalo , Aurelien Jarno Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Patch created mechanically by running: $ spatch \ --macro-file scripts/cocci-macro-file.h --include-headers \ --sp-file scripts/coccinelle/object_property_missing_error_propagate.cocci \ --keep-comments --smpl-spacing --in-place --dir hw Unfortunately the cocci script doesn't properly patch trailing error_propagate() block and emitted duplicate if() block statements. These 3 blocks were manually removed. Reviewed-by: Aleksandar Markovic Signed-off-by: Philippe Mathieu-Daudé --- hw/mips/cps.c | 48 ++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/hw/mips/cps.c b/hw/mips/cps.c index 92b9b1a5f6..18943b64e0 100644 --- a/hw/mips/cps.c +++ b/hw/mips/cps.c @@ -102,9 +102,21 @@ static void mips_cps_realize(DeviceState *dev, Error **errp) sysbus_init_child_obj(OBJECT(dev), "itu", &s->itu, sizeof(s->itu), TYPE_MIPS_ITU); object_property_set_int(OBJECT(&s->itu), 16, "num-fifo", &err); + if (err) { + error_propagate(errp, err); + return; + } object_property_set_int(OBJECT(&s->itu), 16, "num-semaphores", &err); + if (err) { + error_propagate(errp, err); + return; + } object_property_set_bool(OBJECT(&s->itu), saar_present, "saar-present", &err); + if (err) { + error_propagate(errp, err); + return; + } if (saar_present) { s->itu.saar = &env->CP0_SAAR; } @@ -122,7 +134,15 @@ static void mips_cps_realize(DeviceState *dev, Error **errp) sysbus_init_child_obj(OBJECT(dev), "cpc", &s->cpc, sizeof(s->cpc), TYPE_MIPS_CPC); object_property_set_int(OBJECT(&s->cpc), s->num_vp, "num-vp", &err); + if (err) { + error_propagate(errp, err); + return; + } object_property_set_int(OBJECT(&s->cpc), 1, "vp-start-running", &err); + if (err) { + error_propagate(errp, err); + return; + } object_property_set_bool(OBJECT(&s->cpc), true, "realized", &err); if (err != NULL) { error_propagate(errp, err); @@ -136,7 +156,15 @@ static void mips_cps_realize(DeviceState *dev, Error **errp) sysbus_init_child_obj(OBJECT(dev), "gic", &s->gic, sizeof(s->gic), TYPE_MIPS_GIC); object_property_set_int(OBJECT(&s->gic), s->num_vp, "num-vp", &err); + if (err) { + error_propagate(errp, err); + return; + } object_property_set_int(OBJECT(&s->gic), 128, "num-irq", &err); + if (err) { + error_propagate(errp, err); + return; + } object_property_set_bool(OBJECT(&s->gic), true, "realized", &err); if (err != NULL) { error_propagate(errp, err); @@ -152,10 +180,30 @@ static void mips_cps_realize(DeviceState *dev, Error **errp) sysbus_init_child_obj(OBJECT(dev), "gcr", &s->gcr, sizeof(s->gcr), TYPE_MIPS_GCR); object_property_set_int(OBJECT(&s->gcr), s->num_vp, "num-vp", &err); + if (err) { + error_propagate(errp, err); + return; + } object_property_set_int(OBJECT(&s->gcr), 0x800, "gcr-rev", &err); + if (err) { + error_propagate(errp, err); + return; + } object_property_set_int(OBJECT(&s->gcr), gcr_base, "gcr-base", &err); + if (err) { + error_propagate(errp, err); + return; + } object_property_set_link(OBJECT(&s->gcr), OBJECT(&s->gic.mr), "gic", &err); + if (err) { + error_propagate(errp, err); + return; + } object_property_set_link(OBJECT(&s->gcr), OBJECT(&s->cpc.mr), "cpc", &err); + if (err) { + error_propagate(errp, err); + return; + } object_property_set_bool(OBJECT(&s->gcr), true, "realized", &err); if (err != NULL) { error_propagate(errp, err); From patchwork Mon Apr 6 17:47:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1267003 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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[83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.48.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:48:47 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 44/54] hw/misc/macio/macio: Add missing error-propagation code Date: Mon, 6 Apr 2020 19:47:33 +0200 Message-Id: <20200406174743.16956-45-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::333 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , Mark Cave-Ayland , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , "open list:Old World g3beige" , David Gibson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Patch created mechanically by running: $ spatch \ --macro-file scripts/cocci-macro-file.h --include-headers \ --sp-file scripts/coccinelle/object_property_missing_error_propagate.cocci \ --keep-comments --smpl-spacing --dir hw Reviewed-by: David Gibson Acked-by: David Gibson Reviewed-by: Peter Maydell Signed-off-by: Philippe Mathieu-Daudé --- hw/misc/macio/macio.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/hw/misc/macio/macio.c b/hw/misc/macio/macio.c index 79222192e8..fffb64a7d5 100644 --- a/hw/misc/macio/macio.c +++ b/hw/misc/macio/macio.c @@ -348,6 +348,10 @@ static void macio_newworld_realize(PCIDevice *d, Error **errp) memory_region_add_subregion(&s->bar, 0x50, sysbus_mmio_get_region(sysbus_dev, 0)); object_property_set_bool(OBJECT(&ns->gpio), true, "realized", &err); + if (err) { + error_propagate(errp, err); + return; + } /* PMU */ object_initialize_child(OBJECT(s), "pmu", &s->pmu, sizeof(s->pmu), From patchwork Mon Apr 6 17:47:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1266993 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amsat.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=DgZX+/Th; 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[83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.48.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:48:49 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 45/54] hw/net/xilinx_axienet: Add missing error-propagation code Date: Mon, 6 Apr 2020 19:47:34 +0200 Message-Id: <20200406174743.16956-46-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::444 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , Jason Wang , Alistair Francis , =?utf-8?q?Philippe_Mathieu?= =?utf-8?q?-Daud=C3=A9?= , "open list:Xilinx Zynq" , Alistair Francis , "Edgar E. Iglesias" Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Patch created mechanically by running: $ spatch \ --macro-file scripts/cocci-macro-file.h --include-headers \ --sp-file scripts/coccinelle/object_property_missing_error_propagate.cocci \ --keep-comments --smpl-spacing --dir hw Then review showed this file has a 'xilinx_enet_realize_fail' label that calls error_propagate(). Updated the patch to use the label. Reviewed-by: Alistair Francis Signed-off-by: Philippe Mathieu-Daudé --- v2: New cocci patch generated both transformations (Peter noticed v1 only catched one) --- hw/net/xilinx_axienet.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/hw/net/xilinx_axienet.c b/hw/net/xilinx_axienet.c index 704788811a..db2c675b16 100644 --- a/hw/net/xilinx_axienet.c +++ b/hw/net/xilinx_axienet.c @@ -958,6 +958,9 @@ static void xilinx_enet_realize(DeviceState *dev, Error **errp) object_property_allow_set_link, OBJ_PROP_LINK_STRONG, &local_err); + if (local_err) { + goto xilinx_enet_realize_fail; + } object_property_add_link(OBJECT(cs), "enet", "xlnx.axi-ethernet", (Object **) &cs->enet, object_property_allow_set_link, @@ -967,6 +970,9 @@ static void xilinx_enet_realize(DeviceState *dev, Error **errp) goto xilinx_enet_realize_fail; } object_property_set_link(OBJECT(ds), OBJECT(s), "enet", &local_err); + if (local_err) { + goto xilinx_enet_realize_fail; + } object_property_set_link(OBJECT(cs), OBJECT(s), "enet", &local_err); if (local_err) { goto xilinx_enet_realize_fail; From patchwork Mon Apr 6 17:47:35 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1266989 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amsat.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=qgInzE9D; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48wz4b3Ywhz9sR4 for ; Tue, 7 Apr 2020 04:06:23 +1000 (AEST) Received: from localhost ([::1]:36220 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jLW8b-0008Lx-BD for incoming@patchwork.ozlabs.org; Mon, 06 Apr 2020 14:06:21 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36868) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jLVrj-00032f-NJ for qemu-devel@nongnu.org; Mon, 06 Apr 2020 13:48:56 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1jLVri-0003aa-Nc for qemu-devel@nongnu.org; Mon, 06 Apr 2020 13:48:55 -0400 Received: from mail-wr1-x435.google.com ([2a00:1450:4864:20::435]:42847) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1jLVri-0003a7-Hm; Mon, 06 Apr 2020 13:48:54 -0400 Received: by mail-wr1-x435.google.com with SMTP id h15so479930wrx.9; Mon, 06 Apr 2020 10:48:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=yVPysyauLZ9816b43kjwmsf3uNlRLSQxh41Q/NDSUAk=; b=qgInzE9DuiBq83mdV005JH1bGJ40enGk4b8J/HhxDzlszjkSL3mnUEB2gLzjZLAcZH JWdNgjTz1rca1kwfV97GbN0y/kNmyGg+nuO448OJE15oh2BJUCvL0BdUEC9LllDm1sFT qdPCmUIVGQP+wMArcy5Mo3RG7RXR9SuIeuqn+aBqFrzy/6Ki0VHf/4DLpEa7WMBR61Yk y40E2eqFe1ZVAtFqwMRv+V+OUHDt/D4luA7ufnIR5ORxQkNFOT1x3HaK/NcauAScxhED oZWaMJu0wPAEpUOVMJLg9veCrYuhAMzv0vFRJ3f3TKkG1aE7wqvwkSxw9RygKUIQIuf4 41VA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=yVPysyauLZ9816b43kjwmsf3uNlRLSQxh41Q/NDSUAk=; b=G/xAR9vvyRlrGxCAtgt7louPIpYDf0Yk8IQJ6F9fcY1t2X/ecQogIeeoA3ZS1MTZTY aNSn08OjaAtIVfmHqmQzaQHTQDxZe49D6Tmq9GfBezTn0jfS1qNrjdMe/srvXkHCPlON zxsEYTmNdVJGzso7zdUmGiEVzzkIcdLRh5klDIvQg3Gkka4MVT50xsJyMOKvJZ2e8q/b ITBN3125mZHWn/obpYTLY8/sNvpIphTk/ljIxCMbylqayaVriARDOg45EZ/fAEO8s2/o Gw8xuVIQa1+tX90EzOpqpKDMFjDCGeGt8wv16SlNfXGAiiOXywaUN0Ad4j8VRqVz4v0Z eX+Q== X-Gm-Message-State: AGi0PuYlRRce75eiYN0jzwL/h+gKXiM0TzXi4qoR0bl+x8AYxhFadxZr JLOSWTootQvrTtaKqjGrMK/BaduwCZA= X-Google-Smtp-Source: APiQypLFxeR4+SkELFoJnRLU9Hm6BZnfmxGevkXCmHCwi/bjnyYbt2YU8n12D92EDgdM/KiDr3pGGg== X-Received: by 2002:a5d:464a:: with SMTP id j10mr349757wrs.3.1586195333447; Mon, 06 Apr 2020 10:48:53 -0700 (PDT) Received: from x1w.redhat.com (116.red-83-42-57.dynamicip.rima-tde.net. [83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.48.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:48:51 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 46/54] hw/riscv/sifive_u: Add missing error-propagation code Date: Mon, 6 Apr 2020 19:47:35 +0200 Message-Id: <20200406174743.16956-47-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::435 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , "open list:RISC-V TCG CPUs" , Sagar Karandikar , Bastian Koppelmann , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Palmer Dabbelt , Alistair Francis Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Patch created mechanically by running: $ spatch \ --macro-file scripts/cocci-macro-file.h --include-headers \ --sp-file scripts/coccinelle/object_property_missing_error_propagate.cocci \ --keep-comments --smpl-spacing --dir hw Reviewed-by: Alistair Francis Reviewed-by: Peter Maydell Signed-off-by: Philippe Mathieu-Daudé --- hw/riscv/sifive_u.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index b07526aba1..b6c27bc970 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -574,9 +574,17 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp) SIFIVE_SIP_BASE, SIFIVE_TIMECMP_BASE, SIFIVE_TIME_BASE, false); object_property_set_bool(OBJECT(&s->prci), true, "realized", &err); + if (err) { + error_propagate(errp, err); + return; + } sysbus_mmio_map(SYS_BUS_DEVICE(&s->prci), 0, memmap[SIFIVE_U_PRCI].base); object_property_set_bool(OBJECT(&s->otp), true, "realized", &err); + if (err) { + error_propagate(errp, err); + return; + } sysbus_mmio_map(SYS_BUS_DEVICE(&s->otp), 0, memmap[SIFIVE_U_OTP].base); for (i = 0; i < SIFIVE_U_PLIC_NUM_SOURCES; i++) { From patchwork Mon Apr 6 17:47:36 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1267000 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; 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[83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.48.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:48:54 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 47/54] hw/sd/milkymist-memcard: Add missing error-propagation code Date: Mon, 6 Apr 2020 19:47:36 +0200 Message-Id: <20200406174743.16956-48-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::435 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Michael Walle , Vladimir Sementsov-Ogievskiy , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Patch created mechanically by running: $ spatch \ --macro-file scripts/cocci-macro-file.h --include-headers \ --sp-file scripts/coccinelle/object_property_missing_error_propagate.cocci \ --keep-comments --smpl-spacing --dir hw Signed-off-by: Philippe Mathieu-Daudé --- hw/sd/milkymist-memcard.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/hw/sd/milkymist-memcard.c b/hw/sd/milkymist-memcard.c index 926e1af475..87294c1b71 100644 --- a/hw/sd/milkymist-memcard.c +++ b/hw/sd/milkymist-memcard.c @@ -280,6 +280,10 @@ static void milkymist_memcard_realize(DeviceState *dev, Error **errp) blk = dinfo ? blk_by_legacy_dinfo(dinfo) : NULL; carddev = qdev_create(BUS(&s->sdbus), TYPE_SD_CARD); qdev_prop_set_drive(carddev, "drive", blk, &err); + if (err) { + error_propagate(errp, err); + return; + } object_property_set_bool(OBJECT(carddev), true, "realized", &err); if (err) { error_setg(errp, "failed to init SD card: %s", error_get_pretty(err)); From patchwork Mon Apr 6 17:47:37 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1267020 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amsat.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=mNgL36Vb; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48wzVp0hxpz9sRR for ; Tue, 7 Apr 2020 04:25:37 +1000 (AEST) Received: from localhost ([::1]:36672 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jLWRC-0006fz-TO for incoming@patchwork.ozlabs.org; Mon, 06 Apr 2020 14:25:34 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36904) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jLVrm-00035e-FR for qemu-devel@nongnu.org; Mon, 06 Apr 2020 13:48:59 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1jLVrl-0003cC-8r for qemu-devel@nongnu.org; Mon, 06 Apr 2020 13:48:58 -0400 Received: from mail-wm1-x32e.google.com ([2a00:1450:4864:20::32e]:38918) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1jLVrl-0003bo-2f for qemu-devel@nongnu.org; Mon, 06 Apr 2020 13:48:57 -0400 Received: by mail-wm1-x32e.google.com with SMTP id y20so309000wma.4 for ; Mon, 06 Apr 2020 10:48:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=+cshPsuV+p8IWnAz7VC2hUR8PIasPI419EzyAajDQQE=; b=mNgL36Vb89yMQ5n8Ku7zfqfPAxnaWgJRgbgA0rF+/hj6UudBNa+dz0UuOcxcJlM4F+ fZwhsg6c1KnDO4hlVVdrWRQv5xUc2jV+co7WWAS/I+OnIMYITjtEsQr98nnSuwZoReCK wXoybjOyOeLAiQOcNCSvWWyoZCoUf9lkJI3OGE1im+YMB9yLxeeptse1sAIRH++BrvCm 7oIWQHeimeXrmXLe7rAWg1Bv7zKMmvdyzkfKw8lKtNG2AHyArKxEN5YIvFQ4KgEe9wqA O7nF86CTESy6KrZK3rUdMnS/qdMvLZKrJImhs1Q/GtwL2CvygNWMAwPjh9AzVYvHOwoa AvIA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=+cshPsuV+p8IWnAz7VC2hUR8PIasPI419EzyAajDQQE=; b=mknuzEXaqvwJfzWFY7BJBDNJllcBcfBoCILOBnC4ePpH+/7ie6q+aFvTuxUJp/Yqq/ Ot6+0R+dHLAIxgiDqZJLUJcTQATGHxWZx3cABnoe+YR45eIcUM7Ez4V58o2dKlcCI/kw GvciFX8NF1eL4KYEeQFrTu7LRNt1isPziCkXT86m6etCJcdTBmstxGZ6GyR3wpNw+hWe EjCQUtKuLZIyujEvcOO+Hh0AojWWfwR9yuGQLKIJG/ZP1vek8ewFvkzYumbq2/7yWLjt kUM/uNMehNMM5JiwG3p6WKKjNcwR5jCbPVb+0vtJviYrdXBAttkn0Wb6q+18mNMuap6n J1yA== X-Gm-Message-State: AGi0PuZk4PJ3jsxQu99bNHE+hBoTM9xWhHnUcAZX26bRXPMrWoNGAWxo xRF5COZIHAJ2sEhtujQkPFBlv3gAP58= X-Google-Smtp-Source: APiQypKUaK6m68AfwdJGTHp2tkQjoZ+Jd58PLCxSSes/kO6DaxxU1osQdDWF8je6BdRnKZV7I656gw== X-Received: by 2002:a1c:1f8e:: with SMTP id f136mr175199wmf.166.1586195335715; Mon, 06 Apr 2020 10:48:55 -0700 (PDT) Received: from x1w.redhat.com (116.red-83-42-57.dynamicip.rima-tde.net. [83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.48.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:48:55 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 48/54] scripts/coccinelle: Use &error_abort in TypeInfo::instance_init() Date: Mon, 6 Apr 2020 19:47:37 +0200 Message-Id: <20200406174743.16956-49-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32e X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" The instance_init() calls are not suppose to fail. Add a Coccinelle script to use &error_abort instead of ignoring errors by using a NULL Error*. Signed-off-by: Philippe Mathieu-Daudé --- .../use-error_abort-in-instance_init.cocci | 52 +++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 53 insertions(+) create mode 100644 scripts/coccinelle/use-error_abort-in-instance_init.cocci diff --git a/scripts/coccinelle/use-error_abort-in-instance_init.cocci b/scripts/coccinelle/use-error_abort-in-instance_init.cocci new file mode 100644 index 0000000000..8302d74a0c --- /dev/null +++ b/scripts/coccinelle/use-error_abort-in-instance_init.cocci @@ -0,0 +1,52 @@ +// Use &error_abort in TypeInfo::instance_init() +// +// Copyright: (C) 2020 Philippe Mathieu-Daudé +// This work is licensed under the terms of the GNU GPLv2 or later. +// +// spatch \ +// --macro-file scripts/cocci-macro-file.h --include-headers \ +// --sp-file scripts/coccinelle/use-error_abort-in-instance_init.cocci \ +// --keep-comments --in-place +// +// Inspired by https://www.mail-archive.com/qemu-devel@nongnu.org/msg692500.html +// and https://www.mail-archive.com/qemu-devel@nongnu.org/msg693637.html + + +@ has_qapi_error @ +@@ + #include "qapi/error.h" + + +@ match_instance_init @ +TypeInfo info; +identifier instance_initfn; +@@ + info.instance_init = instance_initfn; + + +@ use_error_abort @ +identifier match_instance_init.instance_initfn; +identifier func_with_error; +expression parentobj, propname, childobj, size, type, errp; +position pos; +@@ +void instance_initfn(...) +{ + <+... +( + object_initialize_child(parentobj, propname, + childobj, size, type, + errp, NULL); +| + func_with_error@pos(..., +- NULL); ++ &error_abort); +) + ...+> +} + + +@script:python depends on use_error_abort && !has_qapi_error@ +p << use_error_abort.pos; +@@ +print('[[manual edit required, %s misses #include "qapi/error.h"]]' % p[0].file) diff --git a/MAINTAINERS b/MAINTAINERS index 14de2a31dc..ae71a0a4b0 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2059,6 +2059,7 @@ F: scripts/coccinelle/error-use-after-free.cocci F: scripts/coccinelle/error_propagate_null.cocci F: scripts/coccinelle/remove_local_err.cocci F: scripts/coccinelle/simplify-init-realize-error_propagate.cocci +F: scripts/coccinelle/use-error_abort-in-instance_init.cocci F: scripts/coccinelle/use-error_fatal.cocci F: scripts/coccinelle/use-error_propagate-in-realize.cocci From patchwork Mon Apr 6 17:47:38 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1267012 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amsat.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=jJniLMMS; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48wzR6664Nz9sR4 for ; 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[83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.48.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:48:59 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 49/54] various: Use &error_abort in instance_init() Date: Mon, 6 Apr 2020 19:47:38 +0200 Message-Id: <20200406174743.16956-50-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::436 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Fam Zheng , Peter Maydell , Sagar Karandikar , "Michael S. Tsirkin" , Jason Wang , Mark Cave-Ayland , Gerd Hoffmann , "Edgar E. Iglesias" , Jiri Slaby , Li Zhijian , "open list:Floppy" , David Hildenbrand , Halil Pasic , Christian Borntraeger , "Gonglei \(Arei\)" , =?utf-8?q?Herv=C3=A9_Poussineau?= , Joel Stanley , "open list:Old World g3beige" , Richard Henderson , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Laurent Vivier , Eric Farman , Eduardo Habkost , Amit Shah , Alistair Francis , "open list:S390 Virtio-ccw" , "open list:Raspberry Pi" , =?utf-8?q?C=C3=A9dric?= =?utf-8?q?_Le_Goater?= , Stefan Hajnoczi , Igor Mammedov , "open list:RISC-V TCG CPUs" , John Snow , David Gibson , Kevin Wolf , Vladimir Sementsov-Ogievskiy , =?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , Xiao Guangrong , Andrew Jeffery , Cornelia Huck , =?utf-8?q?Phili?= =?utf-8?q?ppe_Mathieu-Daud=C3=A9?= , Andrew Baumann , Max Reitz , Zhang Chen , Palmer Dabbelt , Bastian Koppelmann , Paolo Bonzini Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Patch created mechanically by running: $ spatch \ --macro-file scripts/cocci-macro-file.h \ --include-headers --keep-comments --in-place \ --sp-file \ scripts/coccinelle/use-error_abort-in-instance_init.cocci Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Cédric Le Goater Acked-by: Cornelia Huck --- backends/cryptodev-vhost-user.c | 2 +- backends/rng-egd.c | 2 +- backends/rng-random.c | 2 +- backends/vhost-user.c | 3 ++- hw/arm/bcm2835_peripherals.c | 6 ++++-- hw/arm/vexpress.c | 8 ++++---- hw/arm/xlnx-zcu102.c | 8 ++++---- hw/block/fdc.c | 4 ++-- hw/block/vhost-user-blk.c | 2 +- hw/block/virtio-blk.c | 2 +- hw/core/machine.c | 6 +++--- hw/cpu/core.c | 4 ++-- hw/display/vga-pci.c | 7 +++++-- hw/display/xlnx_dp.c | 4 ++-- hw/dma/sparc32_dma.c | 2 +- hw/gpio/aspeed_gpio.c | 2 +- hw/ide/macio.c | 4 +++- hw/ide/qdev.c | 4 ++-- hw/intc/apic_common.c | 2 +- hw/mem/nvdimm.c | 4 ++-- hw/misc/aspeed_sdmc.c | 2 +- hw/misc/edu.c | 3 ++- hw/misc/macio/macio.c | 4 ++-- hw/misc/macio/pmu.c | 3 ++- hw/misc/pca9552.c | 2 +- hw/misc/tmp105.c | 2 +- hw/misc/tmp421.c | 8 ++++---- hw/net/e1000.c | 3 ++- hw/net/lance.c | 3 ++- hw/net/lasi_i82596.c | 3 ++- hw/net/ne2000-isa.c | 4 ++-- hw/net/spapr_llan.c | 2 +- hw/net/virtio-net.c | 2 +- hw/pci-host/grackle.c | 2 +- hw/pci-host/i440fx.c | 8 ++++---- hw/pci-host/prep.c | 2 +- hw/pci-host/q35.c | 23 ++++++++++++++--------- hw/pci-host/sabre.c | 3 ++- hw/pci-host/uninorth.c | 9 +++++---- hw/pcmcia/pxa2xx.c | 3 ++- hw/ppc/spapr_drc.c | 6 +++--- hw/ppc/spapr_rng.c | 2 +- hw/riscv/sifive_u.c | 4 ++-- hw/s390x/event-facility.c | 6 +++--- hw/s390x/s390-ccw.c | 2 +- hw/s390x/s390-skeys.c | 4 ++-- hw/s390x/s390-stattrib.c | 4 ++-- hw/s390x/sclp.c | 2 +- hw/scsi/scsi-bus.c | 2 +- hw/ssi/xilinx_spips.c | 2 +- hw/usb/bus.c | 4 ++-- hw/usb/dev-network.c | 2 +- hw/usb/dev-storage.c | 4 ++-- hw/usb/host-libusb.c | 2 +- hw/usb/redirect.c | 2 +- hw/virtio/virtio-balloon.c | 4 ++-- net/dump.c | 4 ++-- net/filter-buffer.c | 2 +- net/filter-mirror.c | 10 +++++----- net/filter-rewriter.c | 3 ++- target/arm/cpu64.c | 4 ++-- target/i386/cpu.c | 23 ++++++++++++++--------- target/s390x/cpu.c | 3 ++- tests/check-qom-proplist.c | 7 ++++--- tests/test-qdev-global-props.c | 4 ++-- 65 files changed, 155 insertions(+), 126 deletions(-) diff --git a/backends/cryptodev-vhost-user.c b/backends/cryptodev-vhost-user.c index 6edada8e9e..2fb28c13ac 100644 --- a/backends/cryptodev-vhost-user.c +++ b/backends/cryptodev-vhost-user.c @@ -341,7 +341,7 @@ static void cryptodev_vhost_user_instance_int(Object *obj) object_property_add_str(obj, "chardev", cryptodev_vhost_user_get_chardev, cryptodev_vhost_user_set_chardev, - NULL); + &error_abort); } static void cryptodev_vhost_user_finalize(Object *obj) diff --git a/backends/rng-egd.c b/backends/rng-egd.c index e380519408..58fb73f03a 100644 --- a/backends/rng-egd.c +++ b/backends/rng-egd.c @@ -139,7 +139,7 @@ static void rng_egd_init(Object *obj) { object_property_add_str(obj, "chardev", rng_egd_get_chardev, rng_egd_set_chardev, - NULL); + &error_abort); } static void rng_egd_finalize(Object *obj) diff --git a/backends/rng-random.c b/backends/rng-random.c index a810581393..6429276a95 100644 --- a/backends/rng-random.c +++ b/backends/rng-random.c @@ -111,7 +111,7 @@ static void rng_random_init(Object *obj) object_property_add_str(obj, "filename", rng_random_get_filename, rng_random_set_filename, - NULL); + &error_abort); s->filename = g_strdup("/dev/urandom"); s->fd = -1; diff --git a/backends/vhost-user.c b/backends/vhost-user.c index 2bf3406525..491da81653 100644 --- a/backends/vhost-user.c +++ b/backends/vhost-user.c @@ -177,7 +177,8 @@ static char *get_chardev(Object *obj, Error **errp) static void vhost_user_backend_init(Object *obj) { - object_property_add_str(obj, "chardev", get_chardev, set_chardev, NULL); + object_property_add_str(obj, "chardev", get_chardev, set_chardev, + &error_abort); } static void vhost_user_backend_finalize(Object *obj) diff --git a/hw/arm/bcm2835_peripherals.c b/hw/arm/bcm2835_peripherals.c index a111e91069..201123dd05 100644 --- a/hw/arm/bcm2835_peripherals.c +++ b/hw/arm/bcm2835_peripherals.c @@ -43,12 +43,14 @@ static void bcm2835_peripherals_init(Object *obj) /* Memory region for peripheral devices, which we export to our parent */ memory_region_init(&s->peri_mr, obj,"bcm2835-peripherals", 0x1000000); - object_property_add_child(obj, "peripheral-io", OBJECT(&s->peri_mr), NULL); + object_property_add_child(obj, "peripheral-io", OBJECT(&s->peri_mr), + &error_abort); sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->peri_mr); /* Internal memory region for peripheral bus addresses (not exported) */ memory_region_init(&s->gpu_bus_mr, obj, "bcm2835-gpu", (uint64_t)1 << 32); - object_property_add_child(obj, "gpu-bus", OBJECT(&s->gpu_bus_mr), NULL); + object_property_add_child(obj, "gpu-bus", OBJECT(&s->gpu_bus_mr), + &error_abort); /* Internal memory region for request/response communication with * mailbox-addressable peripherals (not exported) diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c index ed683eeea5..7f79c4eb13 100644 --- a/hw/arm/vexpress.c +++ b/hw/arm/vexpress.c @@ -749,11 +749,11 @@ static void vexpress_instance_init(Object *obj) /* EL3 is enabled by default on vexpress */ vms->secure = true; object_property_add_bool(obj, "secure", vexpress_get_secure, - vexpress_set_secure, NULL); + vexpress_set_secure, &error_abort); object_property_set_description(obj, "secure", "Set on/off to enable/disable the ARM " "Security Extensions (TrustZone)", - NULL); + &error_abort); } static void vexpress_a15_instance_init(Object *obj) @@ -766,12 +766,12 @@ static void vexpress_a15_instance_init(Object *obj) */ vms->virt = true; object_property_add_bool(obj, "virtualization", vexpress_get_virt, - vexpress_set_virt, NULL); + vexpress_set_virt, &error_abort); object_property_set_description(obj, "virtualization", "Set on/off to enable/disable the ARM " "Virtualization Extensions " "(defaults to same as 'secure')", - NULL); + &error_abort); } static void vexpress_a9_instance_init(Object *obj) diff --git a/hw/arm/xlnx-zcu102.c b/hw/arm/xlnx-zcu102.c index bd645ad818..e4d233ec58 100644 --- a/hw/arm/xlnx-zcu102.c +++ b/hw/arm/xlnx-zcu102.c @@ -178,21 +178,21 @@ static void xlnx_zcu102_machine_instance_init(Object *obj) /* Default to secure mode being disabled */ s->secure = false; object_property_add_bool(obj, "secure", zcu102_get_secure, - zcu102_set_secure, NULL); + zcu102_set_secure, &error_abort); object_property_set_description(obj, "secure", "Set on/off to enable/disable the ARM " "Security Extensions (TrustZone)", - NULL); + &error_abort); /* Default to virt (EL2) being disabled */ s->virt = false; object_property_add_bool(obj, "virtualization", zcu102_get_virt, - zcu102_set_virt, NULL); + zcu102_set_virt, &error_abort); object_property_set_description(obj, "virtualization", "Set on/off to enable/disable emulating a " "guest CPU which implements the ARM " "Virtualization Extensions", - NULL); + &error_abort); } static void xlnx_zcu102_machine_class_init(ObjectClass *oc, void *data) diff --git a/hw/block/fdc.c b/hw/block/fdc.c index 33bc9e2f92..29b499260d 100644 --- a/hw/block/fdc.c +++ b/hw/block/fdc.c @@ -2812,10 +2812,10 @@ static void isabus_fdc_instance_init(Object *obj) device_add_bootindex_property(obj, &isa->bootindexA, "bootindexA", "/floppy@0", - DEVICE(obj), NULL); + DEVICE(obj), &error_abort); device_add_bootindex_property(obj, &isa->bootindexB, "bootindexB", "/floppy@1", - DEVICE(obj), NULL); + DEVICE(obj), &error_abort); } static const TypeInfo isa_fdc_info = { diff --git a/hw/block/vhost-user-blk.c b/hw/block/vhost-user-blk.c index 17df5338e7..22ddccefce 100644 --- a/hw/block/vhost-user-blk.c +++ b/hw/block/vhost-user-blk.c @@ -477,7 +477,7 @@ static void vhost_user_blk_instance_init(Object *obj) VHostUserBlk *s = VHOST_USER_BLK(obj); device_add_bootindex_property(obj, &s->bootindex, "bootindex", - "/disk@0,0", DEVICE(obj), NULL); + "/disk@0,0", DEVICE(obj), &error_abort); } static const VMStateDescription vmstate_vhost_user_blk = { diff --git a/hw/block/virtio-blk.c b/hw/block/virtio-blk.c index 97ba8a2187..5af420fd15 100644 --- a/hw/block/virtio-blk.c +++ b/hw/block/virtio-blk.c @@ -1248,7 +1248,7 @@ static void virtio_blk_instance_init(Object *obj) device_add_bootindex_property(obj, &s->conf.conf.bootindex, "bootindex", "/disk@0,0", - DEVICE(obj), NULL); + DEVICE(obj), &error_abort); } static const VMStateDescription vmstate_virtio_blk = { diff --git a/hw/core/machine.c b/hw/core/machine.c index de0c425605..6c114cdd6b 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -894,7 +894,7 @@ static void machine_initfn(Object *obj) &error_abort); object_property_set_description(obj, "nvdimm", "Set on/off to enable/disable " - "NVDIMM instantiation", NULL); + "NVDIMM instantiation", &error_abort); object_property_add_str(obj, "nvdimm-persistence", machine_get_nvdimm_persistence, @@ -903,7 +903,7 @@ static void machine_initfn(Object *obj) object_property_set_description(obj, "nvdimm-persistence", "Set NVDIMM persistence" "Valid values are cpu, mem-ctrl", - NULL); + &error_abort); } if (mc->cpu_index_to_instance_props && mc->get_default_cpu_node_id) { @@ -914,7 +914,7 @@ static void machine_initfn(Object *obj) object_property_set_description(obj, "hmat", "Set on/off to enable/disable " "ACPI Heterogeneous Memory Attribute " - "Table (HMAT)", NULL); + "Table (HMAT)", &error_abort); } object_property_add_str(obj, "memory-backend", diff --git a/hw/cpu/core.c b/hw/cpu/core.c index 9874c5c870..aa0040f8e6 100644 --- a/hw/cpu/core.c +++ b/hw/cpu/core.c @@ -76,9 +76,9 @@ static void cpu_core_instance_init(Object *obj) CPUCore *core = CPU_CORE(obj); object_property_add(obj, "core-id", "int", core_prop_get_core_id, - core_prop_set_core_id, NULL, NULL, NULL); + core_prop_set_core_id, NULL, NULL, &error_abort); object_property_add(obj, "nr-threads", "int", core_prop_get_nr_threads, - core_prop_set_nr_threads, NULL, NULL, NULL); + core_prop_set_nr_threads, NULL, NULL, &error_abort); core->nr_threads = ms->smp.threads; } diff --git a/hw/display/vga-pci.c b/hw/display/vga-pci.c index 6b9db86e36..423943bd35 100644 --- a/hw/display/vga-pci.c +++ b/hw/display/vga-pci.c @@ -25,6 +25,7 @@ */ #include "qemu/osdep.h" +#include "qapi/error.h" #include "hw/pci/pci.h" #include "hw/qdev-properties.h" #include "migration/vmstate.h" @@ -270,7 +271,8 @@ static void pci_std_vga_init(Object *obj) { /* Expose framebuffer byteorder via QOM */ object_property_add_bool(obj, "big-endian-framebuffer", - vga_get_big_endian_fb, vga_set_big_endian_fb, NULL); + vga_get_big_endian_fb, vga_set_big_endian_fb, + &error_abort); } static void pci_secondary_vga_realize(PCIDevice *dev, Error **errp) @@ -321,7 +323,8 @@ static void pci_secondary_vga_init(Object *obj) { /* Expose framebuffer byteorder via QOM */ object_property_add_bool(obj, "big-endian-framebuffer", - vga_get_big_endian_fb, vga_set_big_endian_fb, NULL); + vga_get_big_endian_fb, vga_set_big_endian_fb, + &error_abort); } static void pci_secondary_vga_reset(DeviceState *dev) diff --git a/hw/display/xlnx_dp.c b/hw/display/xlnx_dp.c index 7058443797..af5958d256 100644 --- a/hw/display/xlnx_dp.c +++ b/hw/display/xlnx_dp.c @@ -1249,11 +1249,11 @@ static void xlnx_dp_init(Object *obj) * Initialize DPCD and EDID.. */ s->dpcd = DPCD(aux_create_slave(s->aux_bus, "dpcd")); - object_property_add_child(OBJECT(s), "dpcd", OBJECT(s->dpcd), NULL); + object_property_add_child(OBJECT(s), "dpcd", OBJECT(s->dpcd), &error_abort); s->edid = I2CDDC(qdev_create(BUS(aux_get_i2c_bus(s->aux_bus)), "i2c-ddc")); i2c_set_slave_address(I2C_SLAVE(s->edid), 0x50); - object_property_add_child(OBJECT(s), "edid", OBJECT(s->edid), NULL); + object_property_add_child(OBJECT(s), "edid", OBJECT(s->edid), &error_abort); fifo8_create(&s->rx_fifo, 16); fifo8_create(&s->tx_fifo, 16); diff --git a/hw/dma/sparc32_dma.c b/hw/dma/sparc32_dma.c index 3e4da0c47f..cd751b6d63 100644 --- a/hw/dma/sparc32_dma.c +++ b/hw/dma/sparc32_dma.c @@ -264,7 +264,7 @@ static void sparc32_dma_device_init(Object *obj) object_property_add_link(OBJECT(dev), "iommu", TYPE_SUN4M_IOMMU, (Object **) &s->iommu, qdev_prop_allow_set_link_before_realize, - 0, NULL); + 0, &error_abort); qdev_init_gpio_in(dev, dma_set_irq, 1); qdev_init_gpio_out(dev, s->gpio, 2); diff --git a/hw/gpio/aspeed_gpio.c b/hw/gpio/aspeed_gpio.c index e52fcfd9a0..8aed5c4583 100644 --- a/hw/gpio/aspeed_gpio.c +++ b/hw/gpio/aspeed_gpio.c @@ -873,7 +873,7 @@ static void aspeed_gpio_init(Object *obj) name = g_strdup_printf("gpio%s%d", props->group_label[group_idx], pin_idx % GPIOS_PER_GROUP); object_property_add(obj, name, "bool", aspeed_gpio_get_pin, - aspeed_gpio_set_pin, NULL, NULL, NULL); + aspeed_gpio_set_pin, NULL, NULL, &error_abort); g_free(name); } } diff --git a/hw/ide/macio.c b/hw/ide/macio.c index a9f25e5d02..c4e20a246f 100644 --- a/hw/ide/macio.c +++ b/hw/ide/macio.c @@ -24,6 +24,7 @@ */ #include "qemu/osdep.h" +#include "qapi/error.h" #include "hw/ppc/mac.h" #include "hw/ppc/mac_dbdma.h" #include "hw/qdev-properties.h" @@ -459,7 +460,8 @@ static void macio_ide_initfn(Object *obj) object_property_add_link(obj, "dbdma", TYPE_MAC_DBDMA, (Object **) &s->dbdma, - qdev_prop_allow_set_link_before_realize, 0, NULL); + qdev_prop_allow_set_link_before_realize, 0, + &error_abort); } static Property macio_ide_properties[] = { diff --git a/hw/ide/qdev.c b/hw/ide/qdev.c index c22afdb8ee..a25c424bdf 100644 --- a/hw/ide/qdev.c +++ b/hw/ide/qdev.c @@ -266,8 +266,8 @@ static void ide_dev_instance_init(Object *obj) { object_property_add(obj, "bootindex", "int32", ide_dev_get_bootindex, - ide_dev_set_bootindex, NULL, NULL, NULL); - object_property_set_int(obj, -1, "bootindex", NULL); + ide_dev_set_bootindex, NULL, NULL, &error_abort); + object_property_set_int(obj, -1, "bootindex", &error_abort); } static void ide_hd_realize(IDEDevice *dev, Error **errp) diff --git a/hw/intc/apic_common.c b/hw/intc/apic_common.c index 9ec0f2deb2..710deed276 100644 --- a/hw/intc/apic_common.c +++ b/hw/intc/apic_common.c @@ -445,7 +445,7 @@ static void apic_common_initfn(Object *obj) s->id = s->initial_apic_id = -1; object_property_add(obj, "id", "uint32", apic_common_get_id, - apic_common_set_id, NULL, NULL, NULL); + apic_common_set_id, NULL, NULL, &error_abort); } static void apic_common_class_init(ObjectClass *klass, void *data) diff --git a/hw/mem/nvdimm.c b/hw/mem/nvdimm.c index 8e426d24bb..be9f145dfd 100644 --- a/hw/mem/nvdimm.c +++ b/hw/mem/nvdimm.c @@ -110,10 +110,10 @@ static void nvdimm_init(Object *obj) { object_property_add(obj, NVDIMM_LABEL_SIZE_PROP, "int", nvdimm_get_label_size, nvdimm_set_label_size, NULL, - NULL, NULL); + NULL, &error_abort); object_property_add(obj, NVDIMM_UUID_PROP, "QemuUUID", nvdimm_get_uuid, - nvdimm_set_uuid, NULL, NULL, NULL); + nvdimm_set_uuid, NULL, NULL, &error_abort); } static void nvdimm_finalize(Object *obj) diff --git a/hw/misc/aspeed_sdmc.c b/hw/misc/aspeed_sdmc.c index 7b466bf19a..6154cd23d8 100644 --- a/hw/misc/aspeed_sdmc.c +++ b/hw/misc/aspeed_sdmc.c @@ -255,7 +255,7 @@ static void aspeed_sdmc_initfn(Object *obj) { object_property_add(obj, "ram-size", "int", aspeed_sdmc_get_ram_size, aspeed_sdmc_set_ram_size, - NULL, NULL, NULL); + NULL, NULL, &error_abort); } static void aspeed_sdmc_realize(DeviceState *dev, Error **errp) diff --git a/hw/misc/edu.c b/hw/misc/edu.c index ff10f5b794..9ecbfc767b 100644 --- a/hw/misc/edu.c +++ b/hw/misc/edu.c @@ -23,6 +23,7 @@ */ #include "qemu/osdep.h" +#include "qapi/error.h" #include "qemu/units.h" #include "hw/pci/pci.h" #include "hw/hw.h" @@ -403,7 +404,7 @@ static void edu_instance_init(Object *obj) edu->dma_mask = (1UL << 28) - 1; object_property_add_uint64_ptr(obj, "dma_mask", &edu->dma_mask, OBJ_PROP_FLAG_READWRITE, - NULL); + &error_abort); } static void edu_class_init(ObjectClass *class, void *data) diff --git a/hw/misc/macio/macio.c b/hw/misc/macio/macio.c index fffb64a7d5..3c40256ae5 100644 --- a/hw/misc/macio/macio.c +++ b/hw/misc/macio/macio.c @@ -241,7 +241,7 @@ static void macio_oldworld_init(Object *obj) object_property_add_link(obj, "pic", TYPE_HEATHROW, (Object **) &os->pic, qdev_prop_allow_set_link_before_realize, - 0, NULL); + 0, &error_abort); macio_init_child_obj(s, "cuda", &s->cuda, sizeof(s->cuda), TYPE_CUDA); @@ -401,7 +401,7 @@ static void macio_newworld_init(Object *obj) object_property_add_link(obj, "pic", TYPE_OPENPIC, (Object **) &ns->pic, qdev_prop_allow_set_link_before_realize, - 0, NULL); + 0, &error_abort); macio_init_child_obj(s, "gpio", &ns->gpio, sizeof(ns->gpio), TYPE_MACIO_GPIO); diff --git a/hw/misc/macio/pmu.c b/hw/misc/macio/pmu.c index b8466a4a3f..22b380e2fd 100644 --- a/hw/misc/macio/pmu.c +++ b/hw/misc/macio/pmu.c @@ -30,6 +30,7 @@ #include "qemu/osdep.h" #include "qemu-common.h" +#include "qapi/error.h" #include "hw/ppc/mac.h" #include "hw/qdev-properties.h" #include "migration/vmstate.h" @@ -773,7 +774,7 @@ static void pmu_init(Object *obj) object_property_add_link(obj, "gpio", TYPE_MACIO_GPIO, (Object **) &s->gpio, qdev_prop_allow_set_link_before_realize, - 0, NULL); + 0, &error_abort); sysbus_init_child_obj(obj, "mos6522-pmu", &s->mos6522_pmu, sizeof(s->mos6522_pmu), TYPE_MOS6522_PMU); diff --git a/hw/misc/pca9552.c b/hw/misc/pca9552.c index efd961e041..9abb84cb24 100644 --- a/hw/misc/pca9552.c +++ b/hw/misc/pca9552.c @@ -298,7 +298,7 @@ static void pca9552_initfn(Object *obj) name = g_strdup_printf("led%d", led); object_property_add(obj, name, "bool", pca9552_get_led, pca9552_set_led, - NULL, NULL, NULL); + NULL, NULL, &error_abort); g_free(name); } } diff --git a/hw/misc/tmp105.c b/hw/misc/tmp105.c index 75ddad3a12..e3e1f03e51 100644 --- a/hw/misc/tmp105.c +++ b/hw/misc/tmp105.c @@ -245,7 +245,7 @@ static void tmp105_initfn(Object *obj) { object_property_add(obj, "temperature", "int", tmp105_get_temperature, - tmp105_set_temperature, NULL, NULL, NULL); + tmp105_set_temperature, NULL, NULL, &error_abort); } static void tmp105_class_init(ObjectClass *klass, void *data) diff --git a/hw/misc/tmp421.c b/hw/misc/tmp421.c index c0bc150bca..a49835f6b6 100644 --- a/hw/misc/tmp421.c +++ b/hw/misc/tmp421.c @@ -347,16 +347,16 @@ static void tmp421_initfn(Object *obj) { object_property_add(obj, "temperature0", "int", tmp421_get_temperature, - tmp421_set_temperature, NULL, NULL, NULL); + tmp421_set_temperature, NULL, NULL, &error_abort); object_property_add(obj, "temperature1", "int", tmp421_get_temperature, - tmp421_set_temperature, NULL, NULL, NULL); + tmp421_set_temperature, NULL, NULL, &error_abort); object_property_add(obj, "temperature2", "int", tmp421_get_temperature, - tmp421_set_temperature, NULL, NULL, NULL); + tmp421_set_temperature, NULL, NULL, &error_abort); object_property_add(obj, "temperature3", "int", tmp421_get_temperature, - tmp421_set_temperature, NULL, NULL, NULL); + tmp421_set_temperature, NULL, NULL, &error_abort); } static void tmp421_class_init(ObjectClass *klass, void *data) diff --git a/hw/net/e1000.c b/hw/net/e1000.c index 2a69eee63f..6b76e71e4c 100644 --- a/hw/net/e1000.c +++ b/hw/net/e1000.c @@ -26,6 +26,7 @@ #include "qemu/osdep.h" +#include "qapi/error.h" #include "hw/pci/pci.h" #include "hw/qdev-properties.h" #include "migration/vmstate.h" @@ -1774,7 +1775,7 @@ static void e1000_instance_init(Object *obj) E1000State *n = E1000(obj); device_add_bootindex_property(obj, &n->conf.bootindex, "bootindex", "/ethernet-phy@0", - DEVICE(n), NULL); + DEVICE(n), &error_abort); } static const TypeInfo e1000_base_info = { diff --git a/hw/net/lance.c b/hw/net/lance.c index 688724db0b..436a40225b 100644 --- a/hw/net/lance.c +++ b/hw/net/lance.c @@ -38,6 +38,7 @@ #include "qemu/osdep.h" #include "qemu/module.h" #include "qemu/timer.h" +#include "qapi/error.h" #include "hw/sparc/sparc32_dma.h" #include "migration/vmstate.h" #include "hw/net/lance.h" @@ -134,7 +135,7 @@ static void lance_instance_init(Object *obj) device_add_bootindex_property(obj, &s->conf.bootindex, "bootindex", "/ethernet-phy@0", - DEVICE(obj), NULL); + DEVICE(obj), &error_abort); } static Property lance_properties[] = { diff --git a/hw/net/lasi_i82596.c b/hw/net/lasi_i82596.c index 52637a562d..7c7e9f3366 100644 --- a/hw/net/lasi_i82596.c +++ b/hw/net/lasi_i82596.c @@ -11,6 +11,7 @@ */ #include "qemu/osdep.h" +#include "qapi/error.h" #include "qemu/timer.h" #include "hw/sysbus.h" #include "net/eth.h" @@ -152,7 +153,7 @@ static void lasi_82596_instance_init(Object *obj) device_add_bootindex_property(obj, &s->conf.bootindex, "bootindex", "/ethernet-phy@0", - DEVICE(obj), NULL); + DEVICE(obj), &error_abort); } static Property lasi_82596_properties[] = { diff --git a/hw/net/ne2000-isa.c b/hw/net/ne2000-isa.c index e744eff153..fece06c59f 100644 --- a/hw/net/ne2000-isa.c +++ b/hw/net/ne2000-isa.c @@ -133,8 +133,8 @@ static void isa_ne2000_instance_init(Object *obj) { object_property_add(obj, "bootindex", "int32", isa_ne2000_get_bootindex, - isa_ne2000_set_bootindex, NULL, NULL, NULL); - object_property_set_int(obj, -1, "bootindex", NULL); + isa_ne2000_set_bootindex, NULL, NULL, &error_abort); + object_property_set_int(obj, -1, "bootindex", &error_abort); } static const TypeInfo ne2000_isa_info = { .name = TYPE_ISA_NE2000, diff --git a/hw/net/spapr_llan.c b/hw/net/spapr_llan.c index a2377025a7..047acab431 100644 --- a/hw/net/spapr_llan.c +++ b/hw/net/spapr_llan.c @@ -340,7 +340,7 @@ static void spapr_vlan_instance_init(Object *obj) device_add_bootindex_property(obj, &dev->nicconf.bootindex, "bootindex", "", - DEVICE(dev), NULL); + DEVICE(dev), &error_abort); if (dev->compat_flags & SPAPRVLAN_FLAG_RX_BUF_POOLS) { for (i = 0; i < RX_MAX_POOLS; i++) { diff --git a/hw/net/virtio-net.c b/hw/net/virtio-net.c index eddfa7f923..ba93984c6d 100644 --- a/hw/net/virtio-net.c +++ b/hw/net/virtio-net.c @@ -3122,7 +3122,7 @@ static void virtio_net_instance_init(Object *obj) n->config_size = sizeof(struct virtio_net_config); device_add_bootindex_property(obj, &n->nic_conf.bootindex, "bootindex", "/ethernet-phy@0", - DEVICE(n), NULL); + DEVICE(n), &error_abort); } static int virtio_net_pre_save(void *opaque) diff --git a/hw/pci-host/grackle.c b/hw/pci-host/grackle.c index 24ccdf6ceb..89e37c4bf8 100644 --- a/hw/pci-host/grackle.c +++ b/hw/pci-host/grackle.c @@ -109,7 +109,7 @@ static void grackle_init(Object *obj) object_property_add_link(obj, "pic", TYPE_HEATHROW, (Object **) &s->pic, qdev_prop_allow_set_link_before_realize, - 0, NULL); + 0, &error_abort); sysbus_init_mmio(sbd, &phb->conf_mem); sysbus_init_mmio(sbd, &phb->data_mem); diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c index d980c97049..512ff600a6 100644 --- a/hw/pci-host/i440fx.c +++ b/hw/pci-host/i440fx.c @@ -212,19 +212,19 @@ static void i440fx_pcihost_initfn(Object *obj) object_property_add(obj, PCI_HOST_PROP_PCI_HOLE_START, "uint32", i440fx_pcihost_get_pci_hole_start, - NULL, NULL, NULL, NULL); + NULL, NULL, NULL, &error_abort); object_property_add(obj, PCI_HOST_PROP_PCI_HOLE_END, "uint32", i440fx_pcihost_get_pci_hole_end, - NULL, NULL, NULL, NULL); + NULL, NULL, NULL, &error_abort); object_property_add(obj, PCI_HOST_PROP_PCI_HOLE64_START, "uint64", i440fx_pcihost_get_pci_hole64_start, - NULL, NULL, NULL, NULL); + NULL, NULL, NULL, &error_abort); object_property_add(obj, PCI_HOST_PROP_PCI_HOLE64_END, "uint64", i440fx_pcihost_get_pci_hole64_end, - NULL, NULL, NULL, NULL); + NULL, NULL, NULL, &error_abort); } static void i440fx_pcihost_realize(DeviceState *dev, Error **errp) diff --git a/hw/pci-host/prep.c b/hw/pci-host/prep.c index 1a02e9a670..22dc3bd033 100644 --- a/hw/pci-host/prep.c +++ b/hw/pci-host/prep.c @@ -311,7 +311,7 @@ static void raven_pcihost_initfn(Object *obj) pci_dev = DEVICE(&s->pci_dev); qdev_set_parent_bus(pci_dev, BUS(&s->pci_bus)); object_property_set_int(OBJECT(&s->pci_dev), PCI_DEVFN(0, 0), "addr", - NULL); + &error_abort); qdev_prop_set_bit(pci_dev, "multifunction", false); } diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index 2bbc90b28f..f05fbae3c9 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -222,38 +222,43 @@ static void q35_host_initfn(Object *obj) Q35_PCI_HOST_HOLE64_SIZE_DEFAULT); object_property_add(obj, PCI_HOST_PROP_PCI_HOLE_START, "uint32", q35_host_get_pci_hole_start, - NULL, NULL, NULL, NULL); + NULL, NULL, NULL, &error_abort); object_property_add(obj, PCI_HOST_PROP_PCI_HOLE_END, "uint32", q35_host_get_pci_hole_end, - NULL, NULL, NULL, NULL); + NULL, NULL, NULL, &error_abort); object_property_add(obj, PCI_HOST_PROP_PCI_HOLE64_START, "uint64", q35_host_get_pci_hole64_start, - NULL, NULL, NULL, NULL); + NULL, NULL, NULL, &error_abort); object_property_add(obj, PCI_HOST_PROP_PCI_HOLE64_END, "uint64", q35_host_get_pci_hole64_end, - NULL, NULL, NULL, NULL); + NULL, NULL, NULL, &error_abort); object_property_add_uint64_ptr(obj, PCIE_HOST_MCFG_SIZE, - &pehb->size, OBJ_PROP_FLAG_READ, NULL); + &pehb->size, OBJ_PROP_FLAG_READ, + &error_abort); object_property_add_link(obj, MCH_HOST_PROP_RAM_MEM, TYPE_MEMORY_REGION, (Object **) &s->mch.ram_memory, - qdev_prop_allow_set_link_before_realize, 0, NULL); + qdev_prop_allow_set_link_before_realize, 0, + &error_abort); object_property_add_link(obj, MCH_HOST_PROP_PCI_MEM, TYPE_MEMORY_REGION, (Object **) &s->mch.pci_address_space, - qdev_prop_allow_set_link_before_realize, 0, NULL); + qdev_prop_allow_set_link_before_realize, 0, + &error_abort); object_property_add_link(obj, MCH_HOST_PROP_SYSTEM_MEM, TYPE_MEMORY_REGION, (Object **) &s->mch.system_memory, - qdev_prop_allow_set_link_before_realize, 0, NULL); + qdev_prop_allow_set_link_before_realize, 0, + &error_abort); object_property_add_link(obj, MCH_HOST_PROP_IO_MEM, TYPE_MEMORY_REGION, (Object **) &s->mch.address_space_io, - qdev_prop_allow_set_link_before_realize, 0, NULL); + qdev_prop_allow_set_link_before_realize, 0, + &error_abort); } static const TypeInfo q35_host_info = { diff --git a/hw/pci-host/sabre.c b/hw/pci-host/sabre.c index 2b8503b709..b02c56def5 100644 --- a/hw/pci-host/sabre.c +++ b/hw/pci-host/sabre.c @@ -25,6 +25,7 @@ */ #include "qemu/osdep.h" +#include "qapi/error.h" #include "hw/sysbus.h" #include "hw/pci/pci.h" #include "hw/pci/pci_host.h" @@ -442,7 +443,7 @@ static void sabre_init(Object *obj) object_property_add_link(obj, "iommu", TYPE_SUN4U_IOMMU, (Object **) &s->iommu, qdev_prop_allow_set_link_before_realize, - 0, NULL); + 0, &error_abort); /* sabre_config */ memory_region_init_io(&s->sabre_config, OBJECT(s), &sabre_config_ops, s, diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c index cf70b76fe2..14e619d1d3 100644 --- a/hw/pci-host/uninorth.c +++ b/hw/pci-host/uninorth.c @@ -23,6 +23,7 @@ */ #include "qemu/osdep.h" +#include "qapi/error.h" #include "hw/irq.h" #include "hw/ppc/mac.h" #include "hw/qdev-properties.h" @@ -175,7 +176,7 @@ static void pci_unin_main_init(Object *obj) object_property_add_link(obj, "pic", TYPE_OPENPIC, (Object **) &s->pic, qdev_prop_allow_set_link_before_realize, - 0, NULL); + 0, &error_abort); sysbus_init_mmio(sbd, &h->conf_mem); sysbus_init_mmio(sbd, &h->data_mem); @@ -223,7 +224,7 @@ static void pci_u3_agp_init(Object *obj) object_property_add_link(obj, "pic", TYPE_OPENPIC, (Object **) &s->pic, qdev_prop_allow_set_link_before_realize, - 0, NULL); + 0, &error_abort); sysbus_init_mmio(sbd, &h->conf_mem); sysbus_init_mmio(sbd, &h->data_mem); @@ -262,7 +263,7 @@ static void pci_unin_agp_init(Object *obj) object_property_add_link(obj, "pic", TYPE_OPENPIC, (Object **) &s->pic, qdev_prop_allow_set_link_before_realize, - 0, NULL); + 0, &error_abort); sysbus_init_mmio(sbd, &h->conf_mem); sysbus_init_mmio(sbd, &h->data_mem); @@ -299,7 +300,7 @@ static void pci_unin_internal_init(Object *obj) object_property_add_link(obj, "pic", TYPE_OPENPIC, (Object **) &s->pic, qdev_prop_allow_set_link_before_realize, - 0, NULL); + 0, &error_abort); sysbus_init_mmio(sbd, &h->conf_mem); sysbus_init_mmio(sbd, &h->data_mem); diff --git a/hw/pcmcia/pxa2xx.c b/hw/pcmcia/pxa2xx.c index 14e4dfe8b1..c0d2bf4c9a 100644 --- a/hw/pcmcia/pxa2xx.c +++ b/hw/pcmcia/pxa2xx.c @@ -11,6 +11,7 @@ */ #include "qemu/osdep.h" +#include "qapi/error.h" #include "hw/irq.h" #include "hw/sysbus.h" #include "qemu/module.h" @@ -189,7 +190,7 @@ static void pxa2xx_pcmcia_initfn(Object *obj) object_property_add_link(obj, "card", TYPE_PCMCIA_CARD, (Object **)&s->card, NULL, /* read-only property */ - 0, NULL); + 0, &error_abort); } /* Insert a new card into a slot */ diff --git a/hw/ppc/spapr_drc.c b/hw/ppc/spapr_drc.c index 47e6bb12f9..5537468e20 100644 --- a/hw/ppc/spapr_drc.c +++ b/hw/ppc/spapr_drc.c @@ -584,11 +584,11 @@ static void spapr_dr_connector_instance_init(Object *obj) SpaprDrcClass *drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc); object_property_add_uint32_ptr(obj, "id", &drc->id, OBJ_PROP_FLAG_READ, - NULL); + &error_abort); object_property_add(obj, "index", "uint32", prop_get_index, - NULL, NULL, NULL, NULL); + NULL, NULL, NULL, &error_abort); object_property_add(obj, "fdt", "struct", prop_get_fdt, - NULL, NULL, NULL, NULL); + NULL, NULL, NULL, &error_abort); drc->state = drck->empty_state; } diff --git a/hw/ppc/spapr_rng.c b/hw/ppc/spapr_rng.c index e8e8d65ec0..e82b0db598 100644 --- a/hw/ppc/spapr_rng.c +++ b/hw/ppc/spapr_rng.c @@ -104,7 +104,7 @@ static void spapr_rng_instance_init(Object *obj) object_property_set_description(obj, "rng", "ID of the random number generator backend", - NULL); + &error_abort); } static void spapr_rng_realize(DeviceState *dev, Error **errp) diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index b6c27bc970..6fda0db71e 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -487,11 +487,11 @@ static void riscv_sifive_u_machine_instance_init(Object *obj) s->start_in_flash = false; object_property_add_bool(obj, "start-in-flash", sifive_u_get_start_in_flash, - sifive_u_set_start_in_flash, NULL); + sifive_u_set_start_in_flash, &error_abort); object_property_set_description(obj, "start-in-flash", "Set on to tell QEMU's ROM to jump to " "flash. Otherwise QEMU will jump to DRAM", - NULL); + &error_abort); } static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp) diff --git a/hw/s390x/event-facility.c b/hw/s390x/event-facility.c index 9d6972afa8..a1c555fb84 100644 --- a/hw/s390x/event-facility.c +++ b/hw/s390x/event-facility.c @@ -449,18 +449,18 @@ static void init_event_facility(Object *obj) event_facility->allow_all_mask_sizes = true; object_property_add_bool(obj, "allow_all_mask_sizes", sclp_event_get_allow_all_mask_sizes, - sclp_event_set_allow_all_mask_sizes, NULL); + sclp_event_set_allow_all_mask_sizes, &error_abort); /* Spawn a new bus for SCLP events */ qbus_create_inplace(&event_facility->sbus, sizeof(event_facility->sbus), TYPE_SCLP_EVENTS_BUS, sdev, NULL); new = object_new(TYPE_SCLP_QUIESCE); - object_property_add_child(obj, TYPE_SCLP_QUIESCE, new, NULL); + object_property_add_child(obj, TYPE_SCLP_QUIESCE, new, &error_abort); object_unref(new); qdev_set_parent_bus(DEVICE(new), BUS(&event_facility->sbus)); new = object_new(TYPE_SCLP_CPU_HOTPLUG); - object_property_add_child(obj, TYPE_SCLP_CPU_HOTPLUG, new, NULL); + object_property_add_child(obj, TYPE_SCLP_CPU_HOTPLUG, new, &error_abort); object_unref(new); qdev_set_parent_bus(DEVICE(new), BUS(&event_facility->sbus)); /* the facility will automatically realize the devices via the bus */ diff --git a/hw/s390x/s390-ccw.c b/hw/s390x/s390-ccw.c index 0c5a5b60bd..f67306de13 100644 --- a/hw/s390x/s390-ccw.c +++ b/hw/s390x/s390-ccw.c @@ -151,7 +151,7 @@ static void s390_ccw_instance_init(Object *obj) S390CCWDevice *dev = S390_CCW_DEVICE(obj); device_add_bootindex_property(obj, &dev->bootindex, "bootindex", - "/disk@0,0", DEVICE(obj), NULL); + "/disk@0,0", DEVICE(obj), &error_abort); } static void s390_ccw_class_init(ObjectClass *klass, void *data) diff --git a/hw/s390x/s390-skeys.c b/hw/s390x/s390-skeys.c index a9a4ae7b39..8dbb0eb48a 100644 --- a/hw/s390x/s390-skeys.c +++ b/hw/s390x/s390-skeys.c @@ -400,8 +400,8 @@ static void s390_skeys_instance_init(Object *obj) { object_property_add_bool(obj, "migration-enabled", s390_skeys_get_migration_enabled, - s390_skeys_set_migration_enabled, NULL); - object_property_set_bool(obj, true, "migration-enabled", NULL); + s390_skeys_set_migration_enabled, &error_abort); + object_property_set_bool(obj, true, "migration-enabled", &error_abort); } static void s390_skeys_class_init(ObjectClass *oc, void *data) diff --git a/hw/s390x/s390-stattrib.c b/hw/s390x/s390-stattrib.c index 58121b9f68..f73139c939 100644 --- a/hw/s390x/s390-stattrib.c +++ b/hw/s390x/s390-stattrib.c @@ -387,8 +387,8 @@ static void s390_stattrib_instance_init(Object *obj) object_property_add_bool(obj, "migration-enabled", s390_stattrib_get_migration_enabled, - s390_stattrib_set_migration_enabled, NULL); - object_property_set_bool(obj, true, "migration-enabled", NULL); + s390_stattrib_set_migration_enabled, &error_abort); + object_property_set_bool(obj, true, "migration-enabled", &error_abort); sas->migration_cur_gfn = 0; } diff --git a/hw/s390x/sclp.c b/hw/s390x/sclp.c index f0c35aa57a..dbfa4c8514 100644 --- a/hw/s390x/sclp.c +++ b/hw/s390x/sclp.c @@ -349,7 +349,7 @@ static void sclp_init(Object *obj) Object *new; new = object_new(TYPE_SCLP_EVENT_FACILITY); - object_property_add_child(obj, TYPE_SCLP_EVENT_FACILITY, new, NULL); + object_property_add_child(obj, TYPE_SCLP_EVENT_FACILITY, new, &error_abort); object_unref(new); sclp->event_facility = EVENT_FACILITY(new); diff --git a/hw/scsi/scsi-bus.c b/hw/scsi/scsi-bus.c index 1c980cab38..339635d99e 100644 --- a/hw/scsi/scsi-bus.c +++ b/hw/scsi/scsi-bus.c @@ -1738,7 +1738,7 @@ static void scsi_dev_instance_init(Object *obj) device_add_bootindex_property(obj, &s->conf.bootindex, "bootindex", NULL, - &s->qdev, NULL); + &s->qdev, &error_abort); } static const TypeInfo scsi_device_type_info = { diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c index c57850a505..15f9c0c188 100644 --- a/hw/ssi/xilinx_spips.c +++ b/hw/ssi/xilinx_spips.c @@ -1361,7 +1361,7 @@ static void xlnx_zynqmp_qspips_init(Object *obj) (Object **)&rq->dma, object_property_allow_set_link, OBJ_PROP_LINK_STRONG, - NULL); + &error_abort); } static int xilinx_spips_post_load(void *opaque, int version_id) diff --git a/hw/usb/bus.c b/hw/usb/bus.c index c9a390063f..c076d2d436 100644 --- a/hw/usb/bus.c +++ b/hw/usb/bus.c @@ -754,11 +754,11 @@ static void usb_device_instance_init(Object *obj) if (klass->attached_settable) { object_property_add_bool(obj, "attached", usb_get_attached, usb_set_attached, - NULL); + &error_abort); } else { object_property_add_bool(obj, "attached", usb_get_attached, NULL, - NULL); + &error_abort); } } diff --git a/hw/usb/dev-network.c b/hw/usb/dev-network.c index 6210427544..d56b9c4ad0 100644 --- a/hw/usb/dev-network.c +++ b/hw/usb/dev-network.c @@ -1381,7 +1381,7 @@ static void usb_net_instance_init(Object *obj) device_add_bootindex_property(obj, &s->conf.bootindex, "bootindex", "/ethernet-phy@0", - &dev->qdev, NULL); + &dev->qdev, &error_abort); } static const VMStateDescription vmstate_usb_net = { diff --git a/hw/usb/dev-storage.c b/hw/usb/dev-storage.c index 5c4b57b06b..6e8d1fbd60 100644 --- a/hw/usb/dev-storage.c +++ b/hw/usb/dev-storage.c @@ -753,8 +753,8 @@ static void usb_msd_instance_init(Object *obj) { object_property_add(obj, "bootindex", "int32", usb_msd_get_bootindex, - usb_msd_set_bootindex, NULL, NULL, NULL); - object_property_set_int(obj, -1, "bootindex", NULL); + usb_msd_set_bootindex, NULL, NULL, &error_abort); + object_property_set_int(obj, -1, "bootindex", &error_abort); } static void usb_msd_class_bot_initfn(ObjectClass *klass, void *data) diff --git a/hw/usb/host-libusb.c b/hw/usb/host-libusb.c index 2ac7a936fb..a25b590dde 100644 --- a/hw/usb/host-libusb.c +++ b/hw/usb/host-libusb.c @@ -1101,7 +1101,7 @@ static void usb_host_instance_init(Object *obj) device_add_bootindex_property(obj, &s->bootindex, "bootindex", NULL, - &udev->qdev, NULL); + &udev->qdev, &error_abort); } static void usb_host_unrealize(USBDevice *udev, Error **errp) diff --git a/hw/usb/redirect.c b/hw/usb/redirect.c index 45d8b76218..f1fe21e1a4 100644 --- a/hw/usb/redirect.c +++ b/hw/usb/redirect.c @@ -2595,7 +2595,7 @@ static void usbredir_instance_init(Object *obj) device_add_bootindex_property(obj, &dev->bootindex, "bootindex", NULL, - &udev->qdev, NULL); + &udev->qdev, &error_abort); } static const TypeInfo usbredir_dev_info = { diff --git a/hw/virtio/virtio-balloon.c b/hw/virtio/virtio-balloon.c index a4729f7fc9..d528cf5de7 100644 --- a/hw/virtio/virtio-balloon.c +++ b/hw/virtio/virtio-balloon.c @@ -893,12 +893,12 @@ static void virtio_balloon_instance_init(Object *obj) VirtIOBalloon *s = VIRTIO_BALLOON(obj); object_property_add(obj, "guest-stats", "guest statistics", - balloon_stats_get_all, NULL, NULL, s, NULL); + balloon_stats_get_all, NULL, NULL, s, &error_abort); object_property_add(obj, "guest-stats-polling-interval", "int", balloon_stats_get_poll_interval, balloon_stats_set_poll_interval, - NULL, s, NULL); + NULL, s, &error_abort); } static const VMStateDescription vmstate_virtio_balloon = { diff --git a/net/dump.c b/net/dump.c index 23b3628dde..ea738ff7c3 100644 --- a/net/dump.c +++ b/net/dump.c @@ -232,9 +232,9 @@ static void filter_dump_instance_init(Object *obj) nfds->maxlen = 65536; object_property_add(obj, "maxlen", "uint32", filter_dump_get_maxlen, - filter_dump_set_maxlen, NULL, NULL, NULL); + filter_dump_set_maxlen, NULL, NULL, &error_abort); object_property_add_str(obj, "file", file_dump_get_filename, - file_dump_set_filename, NULL); + file_dump_set_filename, &error_abort); } static void filter_dump_instance_finalize(Object *obj) diff --git a/net/filter-buffer.c b/net/filter-buffer.c index 12e0254287..b9fa2d5c57 100644 --- a/net/filter-buffer.c +++ b/net/filter-buffer.c @@ -192,7 +192,7 @@ static void filter_buffer_init(Object *obj) { object_property_add(obj, "interval", "uint32", filter_buffer_get_interval, - filter_buffer_set_interval, NULL, NULL, NULL); + filter_buffer_set_interval, NULL, NULL, &error_abort); } static const TypeInfo filter_buffer_info = { diff --git a/net/filter-mirror.c b/net/filter-mirror.c index d83e815545..3893dd299c 100644 --- a/net/filter-mirror.c +++ b/net/filter-mirror.c @@ -392,12 +392,12 @@ static void filter_mirror_init(Object *obj) MirrorState *s = FILTER_MIRROR(obj); object_property_add_str(obj, "outdev", filter_mirror_get_outdev, - filter_mirror_set_outdev, NULL); + filter_mirror_set_outdev, &error_abort); s->vnet_hdr = false; object_property_add_bool(obj, "vnet_hdr_support", filter_mirror_get_vnet_hdr, - filter_mirror_set_vnet_hdr, NULL); + filter_mirror_set_vnet_hdr, &error_abort); } static void filter_redirector_init(Object *obj) @@ -405,14 +405,14 @@ static void filter_redirector_init(Object *obj) MirrorState *s = FILTER_REDIRECTOR(obj); object_property_add_str(obj, "indev", filter_redirector_get_indev, - filter_redirector_set_indev, NULL); + filter_redirector_set_indev, &error_abort); object_property_add_str(obj, "outdev", filter_redirector_get_outdev, - filter_redirector_set_outdev, NULL); + filter_redirector_set_outdev, &error_abort); s->vnet_hdr = false; object_property_add_bool(obj, "vnet_hdr_support", filter_redirector_get_vnet_hdr, - filter_redirector_set_vnet_hdr, NULL); + filter_redirector_set_vnet_hdr, &error_abort); } static void filter_mirror_fini(Object *obj) diff --git a/net/filter-rewriter.c b/net/filter-rewriter.c index 31da08a2f4..7d713c7193 100644 --- a/net/filter-rewriter.c +++ b/net/filter-rewriter.c @@ -10,6 +10,7 @@ */ #include "qemu/osdep.h" +#include "qapi/error.h" #include "trace.h" #include "colo.h" #include "net/filter.h" @@ -413,7 +414,7 @@ static void filter_rewriter_init(Object *obj) s->failover_mode = FAILOVER_MODE_OFF; object_property_add_bool(obj, "vnet_hdr_support", filter_rewriter_get_vnet_hdr, - filter_rewriter_set_vnet_hdr, NULL); + filter_rewriter_set_vnet_hdr, &error_abort); } static void colo_rewriter_class_init(ObjectClass *oc, void *data) diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index 62d36f9e8d..6a0a668e17 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -782,11 +782,11 @@ static void aarch64_cpu_set_aarch64(Object *obj, bool value, Error **errp) static void aarch64_cpu_initfn(Object *obj) { object_property_add_bool(obj, "aarch64", aarch64_cpu_get_aarch64, - aarch64_cpu_set_aarch64, NULL); + aarch64_cpu_set_aarch64, &error_abort); object_property_set_description(obj, "aarch64", "Set on/off to enable/disable aarch64 " "execution state ", - NULL); + &error_abort); } static void aarch64_cpu_finalizefn(Object *obj) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 9c256ab159..f5795788bb 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -6905,28 +6905,32 @@ static void x86_cpu_initfn(Object *obj) object_property_add(obj, "family", "int", x86_cpuid_version_get_family, - x86_cpuid_version_set_family, NULL, NULL, NULL); + x86_cpuid_version_set_family, NULL, NULL, + &error_abort); object_property_add(obj, "model", "int", x86_cpuid_version_get_model, - x86_cpuid_version_set_model, NULL, NULL, NULL); + x86_cpuid_version_set_model, NULL, NULL, + &error_abort); object_property_add(obj, "stepping", "int", x86_cpuid_version_get_stepping, - x86_cpuid_version_set_stepping, NULL, NULL, NULL); + x86_cpuid_version_set_stepping, NULL, NULL, + &error_abort); object_property_add_str(obj, "vendor", x86_cpuid_get_vendor, - x86_cpuid_set_vendor, NULL); + x86_cpuid_set_vendor, &error_abort); object_property_add_str(obj, "model-id", x86_cpuid_get_model_id, - x86_cpuid_set_model_id, NULL); + x86_cpuid_set_model_id, &error_abort); object_property_add(obj, "tsc-frequency", "int", x86_cpuid_get_tsc_freq, - x86_cpuid_set_tsc_freq, NULL, NULL, NULL); + x86_cpuid_set_tsc_freq, NULL, NULL, &error_abort); object_property_add(obj, "feature-words", "X86CPUFeatureWordInfo", x86_cpu_get_feature_words, - NULL, NULL, (void *)env->features, NULL); + NULL, NULL, (void *)env->features, &error_abort); object_property_add(obj, "filtered-features", "X86CPUFeatureWordInfo", x86_cpu_get_feature_words, - NULL, NULL, (void *)cpu->filtered_features, NULL); + NULL, NULL, (void *)cpu->filtered_features, + &error_abort); /* * The "unavailable-features" property has the same semantics as * CpuDefinitionInfo.unavailable-features on the "query-cpu-definitions" @@ -6938,7 +6942,8 @@ static void x86_cpu_initfn(Object *obj) NULL, NULL, NULL, &error_abort); object_property_add(obj, "crash-information", "GuestPanicInformation", - x86_cpu_get_crash_info_qom, NULL, NULL, NULL, NULL); + x86_cpu_get_crash_info_qom, NULL, NULL, NULL, + &error_abort); for (w = 0; w < FEATURE_WORDS; w++) { int bitnr; diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index 427a46e3e1..1ae550867e 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -287,7 +287,8 @@ static void s390_cpu_initfn(Object *obj) cs->halted = 1; cs->exception_index = EXCP_HLT; object_property_add(obj, "crash-information", "GuestPanicInformation", - s390_cpu_get_crash_info_qom, NULL, NULL, NULL, NULL); + s390_cpu_get_crash_info_qom, NULL, NULL, NULL, + &error_abort); s390_cpu_model_register_props(obj); #if !defined(CONFIG_USER_ONLY) cpu->env.tod_timer = diff --git a/tests/check-qom-proplist.c b/tests/check-qom-proplist.c index a8b2958e6e..999eb1ce40 100644 --- a/tests/check-qom-proplist.c +++ b/tests/check-qom-proplist.c @@ -255,13 +255,14 @@ static void dummy_dev_init(Object *obj) DummyBus *bus = DUMMY_BUS(object_new(TYPE_DUMMY_BUS)); DummyBackend *backend = DUMMY_BACKEND(object_new(TYPE_DUMMY_BACKEND)); - object_property_add_child(obj, "bus", OBJECT(bus), NULL); + object_property_add_child(obj, "bus", OBJECT(bus), &error_abort); dev->bus = bus; - object_property_add_child(OBJECT(bus), "backend", OBJECT(backend), NULL); + object_property_add_child(OBJECT(bus), "backend", OBJECT(backend), + &error_abort); bus->backend = backend; object_property_add_link(obj, "backend", TYPE_DUMMY_BACKEND, - (Object **)&bus->backend, NULL, 0, NULL); + (Object **)&bus->backend, NULL, 0, &error_abort); } static void dummy_dev_unparent(Object *obj) diff --git a/tests/test-qdev-global-props.c b/tests/test-qdev-global-props.c index 270c690479..09315f412c 100644 --- a/tests/test-qdev-global-props.c +++ b/tests/test-qdev-global-props.c @@ -151,9 +151,9 @@ static void prop2_accessor(Object *obj, Visitor *v, const char *name, static void dynamic_instance_init(Object *obj) { object_property_add(obj, "prop1", "uint32", prop1_accessor, prop1_accessor, - NULL, NULL, NULL); + NULL, NULL, &error_abort); object_property_add(obj, "prop2", "uint32", prop2_accessor, prop2_accessor, - NULL, NULL, NULL); + NULL, NULL, &error_abort); } static void dynamic_class_init(ObjectClass *oc, void *data) From patchwork Mon Apr 6 17:47:39 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1267025 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amsat.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=mogyeRr9; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48wzbH5DLfz9sR4 for ; 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[83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.49.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:49:01 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 50/54] scripts/coccinelle: Find eventually missing error_propagate() calls Date: Mon, 6 Apr 2020 19:47:39 +0200 Message-Id: <20200406174743.16956-51-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::42f X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" In some places in we put an error into a local Error*, but forget to use it. Add a Coccinelle patch to find such cases and report them. Inspired-by: Peter Maydell Signed-off-by: Philippe Mathieu-Daudé --- .../find-missing-error_propagate.cocci | 53 +++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 54 insertions(+) create mode 100644 scripts/coccinelle/find-missing-error_propagate.cocci diff --git a/scripts/coccinelle/find-missing-error_propagate.cocci b/scripts/coccinelle/find-missing-error_propagate.cocci new file mode 100644 index 0000000000..8b75b37b64 --- /dev/null +++ b/scripts/coccinelle/find-missing-error_propagate.cocci @@ -0,0 +1,53 @@ +// Find places likely missing error-propagation code, but code is too +// complex for automatic transformation, so manual analysis is required. +// +// Copyright: (C) 2020 Philippe Mathieu-Daudé +// This work is licensed under the terms of the GNU GPLv2 or later. +// +// spatch \ +// --macro-file scripts/cocci-macro-file.h --include-headers \ +// --sp-file scripts/coccinelle/find-missing-error_propagate.cocci +// +// Inspired by https://www.mail-archive.com/qemu-devel@nongnu.org/msg691638.html + + +// First match two subsequent calls using local Error* +// in function provided a Error** argument +// +@discard_func_with_errp_argument@ +typedef Error; +Error *local_err; +identifier func, errp, errfunc1, errfunc2; +@@ +void func(..., Error **errp) +{ + <+... + errfunc1(..., &local_err); + ... when != local_err // local_err is not used between the calls + errfunc2(..., &local_err); + ...+> +} + + +// Again, match two subsequent calls using local Error* +// but ignoring within functions provided a Error** argument +// +@manual depends on never discard_func_with_errp_argument@ +Error *local_err; +identifier errfunc1, errfunc2; +position p; +@@ + errfunc1@p(..., &local_err); + ... when != local_err + errfunc2(..., &local_err); + + +// As it is likely too complex to transform, report the hit +// +@script:python@ +f << manual.errfunc1; +p << manual.p; +@@ +print("[[manual check required: " + "error_propagate() might be missing in {}() {}:{}:{}]]".format( + f, p[0].file, p[0].line, p[0].column)) diff --git a/MAINTAINERS b/MAINTAINERS index ae71a0a4b0..29d29461f3 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2057,6 +2057,7 @@ F: scripts/coccinelle/add-missing-error_propagate.cocci F: scripts/coccinelle/err-bad-newline.cocci F: scripts/coccinelle/error-use-after-free.cocci F: scripts/coccinelle/error_propagate_null.cocci +F: scripts/coccinelle/find-missing-error_propagate.cocci F: scripts/coccinelle/remove_local_err.cocci F: scripts/coccinelle/simplify-init-realize-error_propagate.cocci F: scripts/coccinelle/use-error_abort-in-instance_init.cocci From patchwork Mon Apr 6 17:47:40 2020 Content-Type: text/plain; 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[83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.49.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:49:03 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 51/54] migration/colo: Add missing error-propagation code Date: Mon, 6 Apr 2020 19:47:40 +0200 Message-Id: <20200406174743.16956-52-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32c X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , Hailiang Zhang , Juan Quintela , "Dr. David Alan Gilbert" , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Running the coccinelle script produced: $ spatch \ --macro-file scripts/cocci-macro-file.h --include-headers \ --sp-file scripts/coccinelle/find-missing-error_propagate.cocci \ --keep-comments --smpl-spacing --dir . HANDLING: ./migration/colo.c [[manual check required: error_propagate() might be missing in migrate_set_block_enabled() ./migration/colo.c:439:4]] Add the missing error_propagate() after review. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Juan Quintela --- migration/colo.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/migration/colo.c b/migration/colo.c index a54ac84f41..57b2adb0cc 100644 --- a/migration/colo.c +++ b/migration/colo.c @@ -437,6 +437,9 @@ static int colo_do_checkpoint_transaction(MigrationState *s, /* Disable block migration */ migrate_set_block_enabled(false, &local_err); + if (local_err) { + goto out; + } qemu_mutex_lock_iothread(); #ifdef CONFIG_REPLICATION From patchwork Mon Apr 6 17:47:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1267023 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=amsat.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=erhUWpe1; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48wzYV6rqTz9sR4 for ; Tue, 7 Apr 2020 04:27:58 +1000 (AEST) Received: from localhost ([::1]:36722 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jLWTU-00025G-Tu for incoming@patchwork.ozlabs.org; Mon, 06 Apr 2020 14:27:56 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36985) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jLVrv-0003MW-Tc for qemu-devel@nongnu.org; Mon, 06 Apr 2020 13:49:08 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1jLVru-0003hN-Tw for qemu-devel@nongnu.org; Mon, 06 Apr 2020 13:49:07 -0400 Received: from mail-wm1-x32e.google.com ([2a00:1450:4864:20::32e]:50953) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1jLVru-0003hD-Nx for qemu-devel@nongnu.org; Mon, 06 Apr 2020 13:49:06 -0400 Received: by mail-wm1-x32e.google.com with SMTP id x25so310806wmc.0 for ; Mon, 06 Apr 2020 10:49:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=UhAVvFgdKZItMBK76DLdu4ImD7RTe3y+DxnwlUR9418=; b=erhUWpe1r5OrzZAZS3568gwuSau77naxoYiRUacT+l+Kd6DCznye/Ya6spptunKb5R nGHRssRHsRgTNm+E45sboaWQGaW5v6HVGitSejSPg+9az35wrfxMDIa4xnJ+YXppATQM gQ4cBgIItMRYsL36CwPCgCWNnp0hN+kGZZevMKKAL3o/0alAT33FlXWHvHqTWFc00n1y k59EhsMT1pfUc3vXle36Dvgu7zcwAb417fsQTqk1KmGlsthfabreoYmGcyo3D8udB7ix fbuldLvOj6ezr88zoe/OdCRq7SIAIPcOBH2OJfiWgpK9GXJh7PngkY/34gUB4NqOcpvg wC5w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=UhAVvFgdKZItMBK76DLdu4ImD7RTe3y+DxnwlUR9418=; b=gYSFuhepv+bVLM5wn4x6rTgFsUmaQ7jOJE9uhPuYu2ljmuZF92vKIQGSIYqnAym/ym jBVOA7GdG0CpogH0FapnuZGH4bnEMphMUVB0U4hepK1cDAgU9O2TVOpuGoBaVFie6FfW M8ALwGoRyQKrS54+mXZY5YrohOfiaYdvxj4ik3nSp1G3X6ld/805Or50NdV5cURl9LxR GOoVI4Xvh57KSTvwwrBcGtTObvCPal1bDHgSsdimA7yGTQ/SGXldz4zA6x/o+48Cy1qv znd6hI4y58Jyq9JE6vBfT1onj6x7eHVHsefetGNU7oaHEDQwhmFAlDbKbpM8UdQQ/Php 53KQ== X-Gm-Message-State: AGi0Pub5sgulR6XkDNHhxfjY/Mq8I+Demv8FjwYAX0U3AIALYUaLYDoh 0SS4f/j4nURSdMYVXtKpi60o4xBS7N0= X-Google-Smtp-Source: APiQypI5nPOkHdW0N0VZ2hUui5w7DAreNFAdJZUfZNiYnGczZ5nS1YnDDexYYmbQyfMY0c6W6gzJZw== X-Received: by 2002:a1c:7216:: with SMTP id n22mr473022wmc.41.1586195345565; Mon, 06 Apr 2020 10:49:05 -0700 (PDT) Received: from x1w.redhat.com (116.red-83-42-57.dynamicip.rima-tde.net. [83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.49.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:49:05 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 52/54] hw/mips/boston: Add missing error-propagation code Date: Mon, 6 Apr 2020 19:47:41 +0200 Message-Id: <20200406174743.16956-53-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::32e X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , Paul Burton , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?b?w6k=?= , Aleksandar Markovic , Aleksandar Rikalo , Aurelien Jarno Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Running the coccinelle script produced: $ spatch \ --macro-file scripts/cocci-macro-file.h --include-headers \ --sp-file scripts/coccinelle/find-missing-error_propagate.cocci \ --keep-comments --smpl-spacing --dir . HANDLING: ./hw/mips/boston.c [[manual check required: error_propagate() might be missing in object_property_set_int() ./hw/mips/boston.c:462:4]] [[manual check required: error_propagate() might be missing in object_property_set_str() ./hw/mips/boston.c:460:4]] Since the uses are inside a MachineClass::init() function, directly use &error_fatal instead of error_propagate(). Reviewed-by: Peter Maydell Reviewed-by: Aleksandar Markovic Signed-off-by: Philippe Mathieu-Daudé --- hw/mips/boston.c | 17 ++++++----------- 1 file changed, 6 insertions(+), 11 deletions(-) diff --git a/hw/mips/boston.c b/hw/mips/boston.c index 98ecd25e8e..2e821ca7d6 100644 --- a/hw/mips/boston.c +++ b/hw/mips/boston.c @@ -426,7 +426,6 @@ static void boston_mach_init(MachineState *machine) { DeviceState *dev; BostonState *s; - Error *err = NULL; MemoryRegion *flash, *ddr_low_alias, *lcd, *platreg; MemoryRegion *sys_mem = get_system_memory(); XilinxPCIEHost *pcie2; @@ -458,19 +457,15 @@ static void boston_mach_init(MachineState *machine) sysbus_init_child_obj(OBJECT(machine), "cps", OBJECT(&s->cps), sizeof(s->cps), TYPE_MIPS_CPS); object_property_set_str(OBJECT(&s->cps), machine->cpu_type, "cpu-type", - &err); - object_property_set_int(OBJECT(&s->cps), machine->smp.cpus, "num-vp", &err); - object_property_set_bool(OBJECT(&s->cps), true, "realized", &err); - - if (err != NULL) { - error_report("%s", error_get_pretty(err)); - exit(1); - } - + &error_fatal); + object_property_set_int(OBJECT(&s->cps), machine->smp.cpus, "num-vp", + &error_fatal); + object_property_set_bool(OBJECT(&s->cps), true, "realized", &error_fatal); sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->cps), 0, 0, 1); flash = g_new(MemoryRegion, 1); - memory_region_init_rom(flash, NULL, "boston.flash", 128 * MiB, &err); + memory_region_init_rom(flash, NULL, "boston.flash", 128 * MiB, + &error_fatal); memory_region_add_subregion_overlap(sys_mem, 0x18000000, flash, 0); memory_region_add_subregion_overlap(sys_mem, 0x80000000, machine->ram, 0); From patchwork Mon Apr 6 17:47:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1266997 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; 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[83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.49.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:49:06 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 53/54] hw/mips/mips_malta: Add missing error-propagation code Date: Mon, 6 Apr 2020 19:47:42 +0200 Message-Id: <20200406174743.16956-54-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::342 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aleksandar Markovic , Aleksandar Rikalo , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Running the coccinelle script produced: $ spatch \ --macro-file scripts/cocci-macro-file.h --include-headers \ --sp-file scripts/coccinelle/find-missing-error_propagate.cocci \ --keep-comments --smpl-spacing --dir . HANDLING: ./hw/mips/mips_malta.c [[manual check required: error_propagate() might be missing in object_property_set_int() ./hw/mips/mips_malta.c:1193:4]] [[manual check required: error_propagate() might be missing in object_property_set_str() ./hw/mips/mips_malta.c:1192:4]] Add the missing error_propagate() after review by adding a Error* parameter to create_cps(). Reviewed-by: Peter Maydell Reviewed-by: Aleksandar Markovic Signed-off-by: Philippe Mathieu-Daudé --- hw/mips/mips_malta.c | 19 ++++++++++++++----- 1 file changed, 14 insertions(+), 5 deletions(-) diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c index e4c4de1b4e..8d43cfd41b 100644 --- a/hw/mips/mips_malta.c +++ b/hw/mips/mips_malta.c @@ -1183,18 +1183,27 @@ static void create_cpu_without_cps(MachineState *ms, } static void create_cps(MachineState *ms, MaltaState *s, - qemu_irq *cbus_irq, qemu_irq *i8259_irq) + qemu_irq *cbus_irq, qemu_irq *i8259_irq, + Error **errp) { Error *err = NULL; sysbus_init_child_obj(OBJECT(s), "cps", OBJECT(&s->cps), sizeof(s->cps), TYPE_MIPS_CPS); object_property_set_str(OBJECT(&s->cps), ms->cpu_type, "cpu-type", &err); + if (err) { + error_propagate(errp, err); + return; + } object_property_set_int(OBJECT(&s->cps), ms->smp.cpus, "num-vp", &err); + if (err) { + error_propagate(errp, err); + return; + } object_property_set_bool(OBJECT(&s->cps), true, "realized", &err); - if (err != NULL) { - error_report("%s", error_get_pretty(err)); - exit(1); + if (err) { + error_propagate(errp, err); + return; } sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->cps), 0, 0, 1); @@ -1207,7 +1216,7 @@ static void mips_create_cpu(MachineState *ms, MaltaState *s, qemu_irq *cbus_irq, qemu_irq *i8259_irq) { if ((ms->smp.cpus > 1) && cpu_supports_cps_smp(ms->cpu_type)) { - create_cps(ms, s, cbus_irq, i8259_irq); + create_cps(ms, s, cbus_irq, i8259_irq, &error_fatal); } else { create_cpu_without_cps(ms, cbus_irq, i8259_irq); } From patchwork Mon Apr 6 17:47:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 1267009 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; 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[83.42.57.116]) by smtp.gmail.com with ESMTPSA id a67sm364880wmc.30.2020.04.06.10.49.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Apr 2020 10:49:07 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Markus Armbruster Subject: [PATCH-for-5.1 v2 54/54] qga/commands-win32: Add missing error-propagation code Date: Mon, 6 Apr 2020 19:47:43 +0200 Message-Id: <20200406174743.16956-55-f4bug@amsat.org> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200406174743.16956-1-f4bug@amsat.org> References: <20200406174743.16956-1-f4bug@amsat.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::333 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Vladimir Sementsov-Ogievskiy , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Michael Roth Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Running the coccinelle script produced: $ spatch \ --macro-file scripts/cocci-macro-file.h --include-headers \ --sp-file scripts/coccinelle/find-missing-error_propagate.cocci \ --keep-comments --smpl-spacing --dir . HANDLING: ./qga/commands-win32.c [[manual check required: error_propagate() might be missing in acquire_privilege() ./qga/commands-win32.c:1344:4]] [[manual check required: error_propagate() might be missing in acquire_privilege() ./qga/commands-win32.c:1360:4]] [[manual check required: error_propagate() might be missing in check_suspend_mode() ./qga/commands-win32.c:1343:4]] [[manual check required: error_propagate() might be missing in check_suspend_mode() ./qga/commands-win32.c:1359:4]] Add the missing error_propagate() after review. Signed-off-by: Philippe Mathieu-Daudé --- qga/commands-win32.c | 26 ++++++++++++++++++-------- 1 file changed, 18 insertions(+), 8 deletions(-) diff --git a/qga/commands-win32.c b/qga/commands-win32.c index b49920e201..8b66098056 100644 --- a/qga/commands-win32.c +++ b/qga/commands-win32.c @@ -1341,13 +1341,18 @@ void qmp_guest_suspend_disk(Error **errp) *mode = GUEST_SUSPEND_MODE_DISK; check_suspend_mode(*mode, &local_err); + if (local_err) { + goto out; + } acquire_privilege(SE_SHUTDOWN_NAME, &local_err); + if (local_err) { + goto out; + } execute_async(do_suspend, mode, &local_err); - if (local_err) { - error_propagate(errp, local_err); - g_free(mode); - } +out: + error_propagate(errp, local_err); + g_free(mode); } void qmp_guest_suspend_ram(Error **errp) @@ -1357,13 +1362,18 @@ void qmp_guest_suspend_ram(Error **errp) *mode = GUEST_SUSPEND_MODE_RAM; check_suspend_mode(*mode, &local_err); + if (local_err) { + goto out; + } acquire_privilege(SE_SHUTDOWN_NAME, &local_err); + if (local_err) { + goto out; + } execute_async(do_suspend, mode, &local_err); - if (local_err) { - error_propagate(errp, local_err); - g_free(mode); - } +out: + error_propagate(errp, local_err); + g_free(mode); } void qmp_guest_suspend_hybrid(Error **errp)