From patchwork Tue Dec 5 11:47:26 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= X-Patchwork-Id: 844706 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3yrg4K3kPgz9s71 for ; Tue, 5 Dec 2017 22:48:33 +1100 (AEDT) Received: from localhost ([::1]:48019 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eMBiB-0006XV-GL for incoming@patchwork.ozlabs.org; Tue, 05 Dec 2017 06:48:31 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45757) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eMBhQ-0006Qc-H4 for qemu-devel@nongnu.org; Tue, 05 Dec 2017 06:47:45 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eMBhP-0005eb-9N for qemu-devel@nongnu.org; Tue, 05 Dec 2017 06:47:44 -0500 Received: from mx1.redhat.com ([209.132.183.28]:37880) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eMBhP-0005eD-0g for qemu-devel@nongnu.org; Tue, 05 Dec 2017 06:47:43 -0500 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 1FDE961B8F; Tue, 5 Dec 2017 11:47:42 +0000 (UTC) Received: from localhost (ovpn-112-65.ams2.redhat.com [10.36.112.65]) by smtp.corp.redhat.com (Postfix) with ESMTP id 8880F187BD; Tue, 5 Dec 2017 11:47:36 +0000 (UTC) From: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= To: linux-kernel@vger.kernel.org Date: Tue, 5 Dec 2017 12:47:26 +0100 Message-Id: <20171205114729.10089-2-marcandre.lureau@redhat.com> In-Reply-To: <20171205114729.10089-1-marcandre.lureau@redhat.com> References: <20171205114729.10089-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.39]); Tue, 05 Dec 2017 11:47:42 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v9 1/4] fw_cfg: add DMA register X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: bhe@redhat.com, mst@redhat.com, somlo@cmu.edu, qemu-devel@nongnu.org, xiaolong.ye@intel.com, =?utf-8?q?Marc-Andr=C3=A9_Lureau?= Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Add an optional kernel module (or command line) parameter using the following syntax: [qemu_fw_cfg.]ioport=@[::[:]] or [qemu_fw_cfg.]mmio=@[::[:]] and initializes the register address using given or default offset. Signed-off-by: Marc-André Lureau Reviewed-by: Gabriel Somlo --- drivers/firmware/qemu_fw_cfg.c | 53 ++++++++++++++++++++++++++++++++---------- 1 file changed, 41 insertions(+), 12 deletions(-) diff --git a/drivers/firmware/qemu_fw_cfg.c b/drivers/firmware/qemu_fw_cfg.c index deb483064f53..740df0df2260 100644 --- a/drivers/firmware/qemu_fw_cfg.c +++ b/drivers/firmware/qemu_fw_cfg.c @@ -10,20 +10,21 @@ * and select subsets of aarch64), a Device Tree node (on arm), or using * a kernel module (or command line) parameter with the following syntax: * - * [qemu_fw_cfg.]ioport=@[::] + * [qemu_fw_cfg.]ioport=@[::[:]] * or - * [qemu_fw_cfg.]mmio=@[::] + * [qemu_fw_cfg.]mmio=@[::[:]] * * where: * := size of ioport or mmio range * := physical base address of ioport or mmio range * := (optional) offset of control register * := (optional) offset of data register + * := (optional) offset of dma register * * e.g.: - * qemu_fw_cfg.ioport=2@0x510:0:1 (the default on x86) + * qemu_fw_cfg.ioport=12@0x510:0:1:4 (the default on x86) * or - * qemu_fw_cfg.mmio=0xA@0x9020000:8:0 (the default on arm) + * qemu_fw_cfg.mmio=16@0x9020000:8:0:16 (the default on arm) */ #include @@ -63,6 +64,7 @@ static resource_size_t fw_cfg_p_size; static void __iomem *fw_cfg_dev_base; static void __iomem *fw_cfg_reg_ctrl; static void __iomem *fw_cfg_reg_data; +static void __iomem *fw_cfg_reg_dma; /* atomic access to fw_cfg device (potentially slow i/o, so using mutex) */ static DEFINE_MUTEX(fw_cfg_dev_lock); @@ -118,12 +120,14 @@ static void fw_cfg_io_cleanup(void) # if (defined(CONFIG_ARM) || defined(CONFIG_ARM64)) # define FW_CFG_CTRL_OFF 0x08 # define FW_CFG_DATA_OFF 0x00 +# define FW_CFG_DMA_OFF 0x10 # elif (defined(CONFIG_PPC_PMAC) || defined(CONFIG_SPARC32)) /* ppc/mac,sun4m */ # define FW_CFG_CTRL_OFF 0x00 # define FW_CFG_DATA_OFF 0x02 # elif (defined(CONFIG_X86) || defined(CONFIG_SPARC64)) /* x86, sun4u */ # define FW_CFG_CTRL_OFF 0x00 # define FW_CFG_DATA_OFF 0x01 +# define FW_CFG_DMA_OFF 0x04 # else # error "QEMU FW_CFG not available on this architecture!" # endif @@ -133,7 +137,7 @@ static void fw_cfg_io_cleanup(void) static int fw_cfg_do_platform_probe(struct platform_device *pdev) { char sig[FW_CFG_SIG_SIZE]; - struct resource *range, *ctrl, *data; + struct resource *range, *ctrl, *data, *dma; /* acquire i/o range details */ fw_cfg_is_mmio = false; @@ -170,6 +174,7 @@ static int fw_cfg_do_platform_probe(struct platform_device *pdev) /* were custom register offsets provided (e.g. on the command line)? */ ctrl = platform_get_resource_byname(pdev, IORESOURCE_REG, "ctrl"); data = platform_get_resource_byname(pdev, IORESOURCE_REG, "data"); + dma = platform_get_resource_byname(pdev, IORESOURCE_REG, "dma"); if (ctrl && data) { fw_cfg_reg_ctrl = fw_cfg_dev_base + ctrl->start; fw_cfg_reg_data = fw_cfg_dev_base + data->start; @@ -179,6 +184,13 @@ static int fw_cfg_do_platform_probe(struct platform_device *pdev) fw_cfg_reg_data = fw_cfg_dev_base + FW_CFG_DATA_OFF; } + if (dma) + fw_cfg_reg_dma = fw_cfg_dev_base + dma->start; +#ifdef FW_CFG_DMA_OFF + else + fw_cfg_reg_dma = fw_cfg_dev_base + FW_CFG_DMA_OFF; +#endif + /* verify fw_cfg device signature */ fw_cfg_read_blob(FW_CFG_SIGNATURE, sig, 0, FW_CFG_SIG_SIZE); if (memcmp(sig, "QEMU", FW_CFG_SIG_SIZE) != 0) { @@ -629,6 +641,7 @@ static struct platform_device *fw_cfg_cmdline_dev; /* use special scanf/printf modifier for phys_addr_t, resource_size_t */ #define PH_ADDR_SCAN_FMT "@%" __PHYS_ADDR_PREFIX "i%n" \ ":%" __PHYS_ADDR_PREFIX "i" \ + ":%" __PHYS_ADDR_PREFIX "i%n" \ ":%" __PHYS_ADDR_PREFIX "i%n" #define PH_ADDR_PR_1_FMT "0x%" __PHYS_ADDR_PREFIX "x@" \ @@ -638,12 +651,15 @@ static struct platform_device *fw_cfg_cmdline_dev; ":%" __PHYS_ADDR_PREFIX "u" \ ":%" __PHYS_ADDR_PREFIX "u" +#define PH_ADDR_PR_4_FMT PH_ADDR_PR_3_FMT \ + ":%" __PHYS_ADDR_PREFIX "u" + static int fw_cfg_cmdline_set(const char *arg, const struct kernel_param *kp) { - struct resource res[3] = {}; + struct resource res[4] = {}; char *str; phys_addr_t base; - resource_size_t size, ctrl_off, data_off; + resource_size_t size, ctrl_off, data_off, dma_off; int processed, consumed = 0; /* only one fw_cfg device can exist system-wide, so if one @@ -659,19 +675,20 @@ static int fw_cfg_cmdline_set(const char *arg, const struct kernel_param *kp) /* consume "" portion of command line argument */ size = memparse(arg, &str); - /* get "@[::]" chunks */ + /* get "@[::[:]]" chunks */ processed = sscanf(str, PH_ADDR_SCAN_FMT, &base, &consumed, - &ctrl_off, &data_off, &consumed); + &ctrl_off, &data_off, &consumed, + &dma_off, &consumed); - /* sscanf() must process precisely 1 or 3 chunks: + /* sscanf() must process precisely 1, 3 or 4 chunks: * is mandatory, optionally followed by - * and ; + * and , and ; * there must be no extra characters after the last chunk, * so str[consumed] must be '\0'. */ if (str[consumed] || - (processed != 1 && processed != 3)) + (processed != 1 && processed != 3 && processed != 4)) return -EINVAL; res[0].start = base; @@ -688,6 +705,11 @@ static int fw_cfg_cmdline_set(const char *arg, const struct kernel_param *kp) res[2].start = data_off; res[2].flags = IORESOURCE_REG; } + if (processed > 3) { + res[3].name = "dma"; + res[3].start = dma_off; + res[3].flags = IORESOURCE_REG; + } /* "processed" happens to nicely match the number of resources * we need to pass in to this platform device. @@ -722,6 +744,13 @@ static int fw_cfg_cmdline_get(char *buf, const struct kernel_param *kp) fw_cfg_cmdline_dev->resource[0].start, fw_cfg_cmdline_dev->resource[1].start, fw_cfg_cmdline_dev->resource[2].start); + case 4: + return snprintf(buf, PAGE_SIZE, PH_ADDR_PR_4_FMT, + resource_size(&fw_cfg_cmdline_dev->resource[0]), + fw_cfg_cmdline_dev->resource[0].start, + fw_cfg_cmdline_dev->resource[1].start, + fw_cfg_cmdline_dev->resource[2].start, + fw_cfg_cmdline_dev->resource[3].start); } /* Should never get here */ From patchwork Tue Dec 5 11:47:27 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= X-Patchwork-Id: 844707 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3yrg4W4YbBz9t9t for ; Tue, 5 Dec 2017 22:48:43 +1100 (AEDT) Received: from localhost ([::1]:48020 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eMBiL-0006bS-GR for incoming@patchwork.ozlabs.org; Tue, 05 Dec 2017 06:48:41 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45785) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eMBhT-0006X5-4G for qemu-devel@nongnu.org; Tue, 05 Dec 2017 06:47:52 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eMBhR-0005gg-Ik for qemu-devel@nongnu.org; Tue, 05 Dec 2017 06:47:47 -0500 Received: from mx1.redhat.com ([209.132.183.28]:37930) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eMBhR-0005ff-9r for qemu-devel@nongnu.org; Tue, 05 Dec 2017 06:47:45 -0500 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 67F7F61D22; Tue, 5 Dec 2017 11:47:44 +0000 (UTC) Received: from localhost (ovpn-112-65.ams2.redhat.com [10.36.112.65]) by smtp.corp.redhat.com (Postfix) with ESMTP id BE21017C2A; Tue, 5 Dec 2017 11:47:43 +0000 (UTC) From: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= To: linux-kernel@vger.kernel.org Date: Tue, 5 Dec 2017 12:47:27 +0100 Message-Id: <20171205114729.10089-3-marcandre.lureau@redhat.com> In-Reply-To: <20171205114729.10089-1-marcandre.lureau@redhat.com> References: <20171205114729.10089-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.39]); Tue, 05 Dec 2017 11:47:44 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v9 2/4] fw_cfg: do DMA read operation X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: bhe@redhat.com, mst@redhat.com, somlo@cmu.edu, qemu-devel@nongnu.org, xiaolong.ye@intel.com, =?utf-8?q?Marc-Andr=C3=A9_Lureau?= Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Modify fw_cfg_read_blob() to use DMA if the device supports it. Return errors, because the operation may fail. The DMA operation is expected to run synchronously with today qemu, but the specification states that it may become async, so we run "control" field check in a loop for eventual changes. We may want to switch all the *buf addresses to use only kmalloc'ed buffers (instead of using stack/image addresses with dma=false). Signed-off-by: Marc-André Lureau --- drivers/firmware/qemu_fw_cfg.c | 161 ++++++++++++++++++++++++++++++++++++----- 1 file changed, 141 insertions(+), 20 deletions(-) diff --git a/drivers/firmware/qemu_fw_cfg.c b/drivers/firmware/qemu_fw_cfg.c index 740df0df2260..e261d9254b29 100644 --- a/drivers/firmware/qemu_fw_cfg.c +++ b/drivers/firmware/qemu_fw_cfg.c @@ -33,6 +33,8 @@ #include #include #include +#include +#include MODULE_AUTHOR("Gabriel L. Somlo "); MODULE_DESCRIPTION("QEMU fw_cfg sysfs support"); @@ -43,12 +45,22 @@ MODULE_LICENSE("GPL"); #define FW_CFG_ID 0x01 #define FW_CFG_FILE_DIR 0x19 +#define FW_CFG_VERSION_DMA 0x02 +#define FW_CFG_DMA_CTL_ERROR 0x01 +#define FW_CFG_DMA_CTL_READ 0x02 +#define FW_CFG_DMA_CTL_SKIP 0x04 +#define FW_CFG_DMA_CTL_SELECT 0x08 +#define FW_CFG_DMA_CTL_WRITE 0x10 + /* size in bytes of fw_cfg signature */ #define FW_CFG_SIG_SIZE 4 /* fw_cfg "file name" is up to 56 characters (including terminating nul) */ #define FW_CFG_MAX_FILE_PATH 56 +/* fw_cfg revision attribute, in /sys/firmware/qemu_fw_cfg top-level dir. */ +static u32 fw_cfg_rev; + /* fw_cfg file directory entry type */ struct fw_cfg_file { u32 size; @@ -57,6 +69,12 @@ struct fw_cfg_file { char name[FW_CFG_MAX_FILE_PATH]; }; +struct fw_cfg_dma { + u32 control; + u32 length; + u64 address; +} __packed; + /* fw_cfg device i/o register addresses */ static bool fw_cfg_is_mmio; static phys_addr_t fw_cfg_p_base; @@ -75,12 +93,88 @@ static inline u16 fw_cfg_sel_endianness(u16 key) return fw_cfg_is_mmio ? cpu_to_be16(key) : cpu_to_le16(key); } +static inline bool fw_cfg_dma_enabled(void) +{ + return fw_cfg_rev & FW_CFG_VERSION_DMA && fw_cfg_reg_dma; +} + +/* qemu fw_cfg device is sync today, but spec says it may become async */ +static void fw_cfg_wait_for_control(struct device *dev, + struct fw_cfg_dma *d, dma_addr_t dma) +{ + do { + dma_sync_single_for_cpu(dev, dma, sizeof(*d), DMA_FROM_DEVICE); + if ((be32_to_cpu(d->control) & ~FW_CFG_DMA_CTL_ERROR) == 0) + return; + + usleep_range(50, 100); + } while (true); +} + +static ssize_t fw_cfg_dma_transfer(struct device *dev, + void *address, u32 length, u32 control) +{ + dma_addr_t dma_addr = 0; + struct fw_cfg_dma *d = NULL; + dma_addr_t dma; + ssize_t ret = length; + enum dma_data_direction dir = + (control & FW_CFG_DMA_CTL_READ ? DMA_FROM_DEVICE : 0); + + if (address && length) { + dma_addr = dma_map_single(dev, address, length, dir); + if (dma_mapping_error(dev, dma_addr)) { + WARN(1, "%s: failed to map address\n", __func__); + return -EFAULT; + } + } + + d = kmalloc(sizeof(*d), GFP_KERNEL); + if (!d) { + ret = -ENOMEM; + goto end; + } + + *d = (struct fw_cfg_dma) { + .address = cpu_to_be64(dma_addr), + .length = cpu_to_be32(length), + .control = cpu_to_be32(control) + }; + + dma = dma_map_single(dev, d, sizeof(*d), DMA_BIDIRECTIONAL); + if (dma_mapping_error(dev, dma)) { + WARN(1, "%s: failed to map fw_cfg_dma\n", __func__); + ret = -EFAULT; + goto end; + } + + iowrite32be((u64)dma >> 32, fw_cfg_reg_dma); + iowrite32be(dma, fw_cfg_reg_dma + 4); + + fw_cfg_wait_for_control(dev, d, dma); + + if (be32_to_cpu(d->control) & FW_CFG_DMA_CTL_ERROR) { + ret = -EIO; + } + + dma_unmap_single(dev, dma, sizeof(*d), DMA_BIDIRECTIONAL); + +end: + kfree(d); + if (dma_addr) + dma_unmap_single(dev, dma_addr, length, dir); + + return ret; +} + /* read chunk of given fw_cfg blob (caller responsible for sanity-check) */ -static inline void fw_cfg_read_blob(u16 key, - void *buf, loff_t pos, size_t count) +static ssize_t fw_cfg_read_blob(struct device *dev, u16 key, + void *buf, loff_t pos, size_t count, + bool dma) { u32 glk = -1U; acpi_status status; + ssize_t ret = count; /* If we have ACPI, ensure mutual exclusion against any potential * device access by the firmware, e.g. via AML methods: @@ -90,17 +184,36 @@ static inline void fw_cfg_read_blob(u16 key, /* Should never get here */ WARN(1, "fw_cfg_read_blob: Failed to lock ACPI!\n"); memset(buf, 0, count); - return; + return -EINVAL; } mutex_lock(&fw_cfg_dev_lock); - iowrite16(fw_cfg_sel_endianness(key), fw_cfg_reg_ctrl); - while (pos-- > 0) - ioread8(fw_cfg_reg_data); - ioread8_rep(fw_cfg_reg_data, buf, count); + if (dma && fw_cfg_dma_enabled()) { + if (pos == 0) { + ret = fw_cfg_dma_transfer(dev, buf, count, key << 16 + | FW_CFG_DMA_CTL_SELECT + | FW_CFG_DMA_CTL_READ); + } else { + iowrite16(fw_cfg_sel_endianness(key), fw_cfg_reg_ctrl); + ret = fw_cfg_dma_transfer(dev, NULL, pos, FW_CFG_DMA_CTL_SKIP); + if (ret < 0) + goto end; + ret = fw_cfg_dma_transfer(dev, buf, count, + FW_CFG_DMA_CTL_READ); + } + } else { + iowrite16(fw_cfg_sel_endianness(key), fw_cfg_reg_ctrl); + while (pos-- > 0) + ioread8(fw_cfg_reg_data); + ioread8_rep(fw_cfg_reg_data, buf, count); + } + +end: mutex_unlock(&fw_cfg_dev_lock); acpi_release_global_lock(glk); + + return ret; } /* clean up fw_cfg device i/o */ @@ -192,7 +305,7 @@ static int fw_cfg_do_platform_probe(struct platform_device *pdev) #endif /* verify fw_cfg device signature */ - fw_cfg_read_blob(FW_CFG_SIGNATURE, sig, 0, FW_CFG_SIG_SIZE); + fw_cfg_read_blob(&pdev->dev, FW_CFG_SIGNATURE, sig, 0, FW_CFG_SIG_SIZE, false); if (memcmp(sig, "QEMU", FW_CFG_SIG_SIZE) != 0) { fw_cfg_io_cleanup(); return -ENODEV; @@ -201,9 +314,6 @@ static int fw_cfg_do_platform_probe(struct platform_device *pdev) return 0; } -/* fw_cfg revision attribute, in /sys/firmware/qemu_fw_cfg top-level dir. */ -static u32 fw_cfg_rev; - static ssize_t fw_cfg_showrev(struct kobject *k, struct attribute *a, char *buf) { return sprintf(buf, "%u\n", fw_cfg_rev); @@ -222,6 +332,7 @@ struct fw_cfg_sysfs_entry { struct kobject kobj; struct fw_cfg_file f; struct list_head list; + struct device *dev; }; /* get fw_cfg_sysfs_entry from kobject member */ @@ -344,6 +455,7 @@ static ssize_t fw_cfg_sysfs_read_raw(struct file *filp, struct kobject *kobj, char *buf, loff_t pos, size_t count) { struct fw_cfg_sysfs_entry *entry = to_entry(kobj); + struct device *dev = entry->dev; if (pos > entry->f.size) return -EINVAL; @@ -351,8 +463,7 @@ static ssize_t fw_cfg_sysfs_read_raw(struct file *filp, struct kobject *kobj, if (count > entry->f.size - pos) count = entry->f.size - pos; - fw_cfg_read_blob(entry->f.select, buf, pos, count); - return count; + return fw_cfg_read_blob(dev, entry->f.select, buf, pos, count, true); } static struct bin_attribute fw_cfg_sysfs_attr_raw = { @@ -459,7 +570,7 @@ static struct kobject *fw_cfg_sel_ko; static struct kset *fw_cfg_fname_kset; /* register an individual fw_cfg file */ -static int fw_cfg_register_file(const struct fw_cfg_file *f) +static int fw_cfg_register_file(struct device *dev, const struct fw_cfg_file *f) { int err; struct fw_cfg_sysfs_entry *entry; @@ -471,6 +582,7 @@ static int fw_cfg_register_file(const struct fw_cfg_file *f) /* set file entry information */ memcpy(&entry->f, f, sizeof(struct fw_cfg_file)); + entry->dev = dev; /* register entry under "/sys/firmware/qemu_fw_cfg/by_key/" */ err = kobject_init_and_add(&entry->kobj, &fw_cfg_sysfs_entry_ktype, @@ -498,14 +610,14 @@ static int fw_cfg_register_file(const struct fw_cfg_file *f) } /* iterate over all fw_cfg directory entries, registering each one */ -static int fw_cfg_register_dir_entries(void) +static int fw_cfg_register_dir_entries(struct device *dev) { int ret = 0; u32 count, i; struct fw_cfg_file *dir; size_t dir_size; - fw_cfg_read_blob(FW_CFG_FILE_DIR, &count, 0, sizeof(count)); + fw_cfg_read_blob(dev, FW_CFG_FILE_DIR, &count, 0, sizeof(count), false); count = be32_to_cpu(count); dir_size = count * sizeof(struct fw_cfg_file); @@ -513,12 +625,12 @@ static int fw_cfg_register_dir_entries(void) if (!dir) return -ENOMEM; - fw_cfg_read_blob(FW_CFG_FILE_DIR, dir, sizeof(count), dir_size); + fw_cfg_read_blob(dev, FW_CFG_FILE_DIR, dir, sizeof(count), dir_size, true); for (i = 0; i < count; i++) { dir[i].size = be32_to_cpu(dir[i].size); dir[i].select = be16_to_cpu(dir[i].select); - ret = fw_cfg_register_file(&dir[i]); + ret = fw_cfg_register_file(dev, &dir[i]); if (ret) break; } @@ -562,14 +674,23 @@ static int fw_cfg_sysfs_probe(struct platform_device *pdev) goto err_probe; /* get revision number, add matching top-level attribute */ - fw_cfg_read_blob(FW_CFG_ID, &fw_cfg_rev, 0, sizeof(fw_cfg_rev)); + fw_cfg_read_blob(&pdev->dev, FW_CFG_ID, &fw_cfg_rev, 0, sizeof(fw_cfg_rev), false); fw_cfg_rev = le32_to_cpu(fw_cfg_rev); err = sysfs_create_file(fw_cfg_top_ko, &fw_cfg_rev_attr.attr); if (err) goto err_rev; + if (fw_cfg_dma_enabled()) { + err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); + if (err) + err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); + if (err) { + fw_cfg_rev &= ~FW_CFG_VERSION_DMA; + WARN(1, "%s: failed to setup DMA, disabled.\n", __func__); + } + } /* process fw_cfg file directory entry, registering each file */ - err = fw_cfg_register_dir_entries(); + err = fw_cfg_register_dir_entries(&pdev->dev); if (err) goto err_dir; From patchwork Tue Dec 5 11:47:28 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= X-Patchwork-Id: 844710 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3yrg7K0Bpmz9s71 for ; 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Tue, 5 Dec 2017 11:47:53 +0000 (UTC) Received: from localhost (ovpn-112-65.ams2.redhat.com [10.36.112.65]) by smtp.corp.redhat.com (Postfix) with ESMTP id 0B1D16025B; Tue, 5 Dec 2017 11:47:45 +0000 (UTC) From: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= To: linux-kernel@vger.kernel.org Date: Tue, 5 Dec 2017 12:47:28 +0100 Message-Id: <20171205114729.10089-4-marcandre.lureau@redhat.com> In-Reply-To: <20171205114729.10089-1-marcandre.lureau@redhat.com> References: <20171205114729.10089-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.38]); Tue, 05 Dec 2017 11:47:53 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v9 3/4] crash: export paddr_vmcoreinfo_note() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Tony Luck , bhe@redhat.com, mst@redhat.com, somlo@cmu.edu, qemu-devel@nongnu.org, xiaolong.ye@intel.com, Hari Bathini , =?utf-8?q?Marc-Andr=C3=A9_Lure?= =?utf-8?q?au?= , Andrew Morton , Dave Young , Vivek Goyal Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" The following patch is going to use the symbol from the fw_cfg module, to call the function and write the note location details in the vmcoreinfo entry, so qemu can produce dumps with the vmcoreinfo note. CC: Andrew Morton CC: Baoquan He CC: Dave Young CC: Dave Young CC: Hari Bathini CC: Tony Luck CC: Vivek Goyal Signed-off-by: Marc-André Lureau Acked-by: Gabriel Somlo --- kernel/crash_core.c | 1 + 1 file changed, 1 insertion(+) diff --git a/kernel/crash_core.c b/kernel/crash_core.c index b3663896278e..2394f0501c65 100644 --- a/kernel/crash_core.c +++ b/kernel/crash_core.c @@ -376,6 +376,7 @@ phys_addr_t __weak paddr_vmcoreinfo_note(void) { return __pa(vmcoreinfo_note); } +EXPORT_SYMBOL(paddr_vmcoreinfo_note); static int __init crash_save_vmcoreinfo_init(void) { From patchwork Tue Dec 5 11:47:29 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= X-Patchwork-Id: 844709 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3yrg7B6Fc4z9s71 for ; Tue, 5 Dec 2017 22:51:02 +1100 (AEDT) Received: from localhost ([::1]:48034 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eMBka-00006p-Uk for incoming@patchwork.ozlabs.org; Tue, 05 Dec 2017 06:51:00 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45861) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eMBhe-0006fT-0d for qemu-devel@nongnu.org; Tue, 05 Dec 2017 06:47:59 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eMBhc-0005o8-Tv for qemu-devel@nongnu.org; Tue, 05 Dec 2017 06:47:58 -0500 Received: from mx1.redhat.com ([209.132.183.28]:37124) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eMBhc-0005ni-Lc for qemu-devel@nongnu.org; Tue, 05 Dec 2017 06:47:56 -0500 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 911F8C01A662; Tue, 5 Dec 2017 11:47:55 +0000 (UTC) Received: from localhost (ovpn-112-65.ams2.redhat.com [10.36.112.65]) by smtp.corp.redhat.com (Postfix) with ESMTP id E059C619C6; Tue, 5 Dec 2017 11:47:54 +0000 (UTC) From: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= To: linux-kernel@vger.kernel.org Date: Tue, 5 Dec 2017 12:47:29 +0100 Message-Id: <20171205114729.10089-5-marcandre.lureau@redhat.com> In-Reply-To: <20171205114729.10089-1-marcandre.lureau@redhat.com> References: <20171205114729.10089-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.31]); Tue, 05 Dec 2017 11:47:55 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v9 4/4] fw_cfg: write vmcoreinfo details X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: bhe@redhat.com, mst@redhat.com, somlo@cmu.edu, qemu-devel@nongnu.org, xiaolong.ye@intel.com, =?utf-8?q?Marc-Andr=C3=A9_Lureau?= Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" If the "etc/vmcoreinfo" fw_cfg file is present and we are not running the kdump kernel, write the addr/size of the vmcoreinfo ELF note. Signed-off-by: Marc-André Lureau Reviewed-by: Gabriel Somlo --- drivers/firmware/qemu_fw_cfg.c | 82 +++++++++++++++++++++++++++++++++++++++++- 1 file changed, 81 insertions(+), 1 deletion(-) diff --git a/drivers/firmware/qemu_fw_cfg.c b/drivers/firmware/qemu_fw_cfg.c index e261d9254b29..61af1c0a640d 100644 --- a/drivers/firmware/qemu_fw_cfg.c +++ b/drivers/firmware/qemu_fw_cfg.c @@ -35,6 +35,8 @@ #include #include #include +#include +#include MODULE_AUTHOR("Gabriel L. Somlo "); MODULE_DESCRIPTION("QEMU fw_cfg sysfs support"); @@ -58,6 +60,8 @@ MODULE_LICENSE("GPL"); /* fw_cfg "file name" is up to 56 characters (including terminating nul) */ #define FW_CFG_MAX_FILE_PATH 56 +#define VMCOREINFO_FORMAT_ELF 0x1 + /* fw_cfg revision attribute, in /sys/firmware/qemu_fw_cfg top-level dir. */ static u32 fw_cfg_rev; @@ -119,7 +123,8 @@ static ssize_t fw_cfg_dma_transfer(struct device *dev, dma_addr_t dma; ssize_t ret = length; enum dma_data_direction dir = - (control & FW_CFG_DMA_CTL_READ ? DMA_FROM_DEVICE : 0); + (control & FW_CFG_DMA_CTL_READ ? DMA_FROM_DEVICE : 0) | + (control & FW_CFG_DMA_CTL_WRITE ? DMA_TO_DEVICE : 0); if (address && length) { dma_addr = dma_map_single(dev, address, length, dir); @@ -216,6 +221,48 @@ static ssize_t fw_cfg_read_blob(struct device *dev, u16 key, return ret; } +#ifdef CONFIG_CRASH_CORE +/* write chunk of given fw_cfg blob (caller responsible for sanity-check) */ +static ssize_t fw_cfg_write_blob(struct device *dev, u16 key, + void *buf, loff_t pos, size_t count) +{ + u32 glk = -1U; + acpi_status status; + ssize_t ret = count; + + /* If we have ACPI, ensure mutual exclusion against any potential + * device access by the firmware, e.g. via AML methods: + */ + status = acpi_acquire_global_lock(ACPI_WAIT_FOREVER, &glk); + if (ACPI_FAILURE(status) && status != AE_NOT_CONFIGURED) { + /* Should never get here */ + WARN(1, "%s: Failed to lock ACPI!\n", __func__); + memset(buf, 0, count); + return -EINVAL; + } + + mutex_lock(&fw_cfg_dev_lock); + if (pos == 0) { + ret = fw_cfg_dma_transfer(dev, buf, count, key << 16 + | FW_CFG_DMA_CTL_SELECT + | FW_CFG_DMA_CTL_WRITE); + } else { + iowrite16(fw_cfg_sel_endianness(key), fw_cfg_reg_ctrl); + ret = fw_cfg_dma_transfer(dev, NULL, pos, FW_CFG_DMA_CTL_SKIP); + if (ret < 0) + goto end; + ret = fw_cfg_dma_transfer(dev, buf, count, FW_CFG_DMA_CTL_WRITE); + } + +end: + mutex_unlock(&fw_cfg_dev_lock); + + acpi_release_global_lock(glk); + + return ret; +} +#endif /* CONFIG_CRASH_CORE */ + /* clean up fw_cfg device i/o */ static void fw_cfg_io_cleanup(void) { @@ -335,6 +382,32 @@ struct fw_cfg_sysfs_entry { struct device *dev; }; +#ifdef CONFIG_CRASH_CORE +static ssize_t write_vmcoreinfo(struct device *dev, const struct fw_cfg_file *f) +{ + struct vmci { + __le16 host_format; + __le16 guest_format; + __le32 size; + __le64 paddr; + } __packed; + static struct vmci data; + ssize_t ret; + + data = (struct vmci) { + .guest_format = cpu_to_le16(VMCOREINFO_FORMAT_ELF), + .size = cpu_to_le32(VMCOREINFO_NOTE_SIZE), + .paddr = cpu_to_le64(paddr_vmcoreinfo_note()) + }; + /* spare ourself reading host format support for now since we + * don't know what else to format - host may ignore ours + */ + ret = fw_cfg_write_blob(dev, f->select, &data, 0, sizeof(struct vmci)); + + return ret; +} +#endif /* CONFIG_CRASH_CORE */ + /* get fw_cfg_sysfs_entry from kobject member */ static inline struct fw_cfg_sysfs_entry *to_entry(struct kobject *kobj) { @@ -575,6 +648,13 @@ static int fw_cfg_register_file(struct device *dev, const struct fw_cfg_file *f) int err; struct fw_cfg_sysfs_entry *entry; +#ifdef CONFIG_CRASH_CORE + if (strcmp(f->name, "etc/vmcoreinfo") == 0 && !is_kdump_kernel()) { + if (write_vmcoreinfo(dev, f) < 0) + pr_warn("fw_cfg: failed to write vmcoreinfo"); + } +#endif + /* allocate new entry */ entry = kzalloc(sizeof(*entry), GFP_KERNEL); if (!entry)