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[178.255.168.35]) by smtp.gmail.com with ESMTPSA id o133sm3913970wme.35.2020.03.24.04.24.02 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 24 Mar 2020 04:24:02 -0700 (PDT) From: Michal Simek To: u-boot@lists.denx.de, git@xilinx.com Subject: [PATCH] serial: zynq: Change uart initialization logic Date: Tue, 24 Mar 2020 12:23:58 +0100 Message-Id: <2d7b6fd6549eb7348e01fd204eaaf4fca524b766.1585049036.git.michal.simek@xilinx.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.2 at phobos.denx.de X-Virus-Status: Clean The commit a673025535ae ("serial: zynq: Initialize uart only before relocation") introduced code which detects relocation which is working for single uart instance. With multiple instances in place there is a need to enable and setup every instance. That's why detect if TX is enabled. If it is then don't initialize uart again. In post probe setbrg is called to setup baudrate but values should be the same. As a side effect of this change is that DECLARE_GLOBAL_DATA_PTR can be removed completely. Signed-off-by: Michal Simek --- drivers/serial/serial_zynq.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/serial/serial_zynq.c b/drivers/serial/serial_zynq.c index e4e4c3928582..0dd6cec82a65 100644 --- a/drivers/serial/serial_zynq.c +++ b/drivers/serial/serial_zynq.c @@ -17,8 +17,6 @@ #include #include -DECLARE_GLOBAL_DATA_PTR; - #define ZYNQ_UART_SR_TXACTIVE BIT(11) /* TX active */ #define ZYNQ_UART_SR_TXFULL BIT(4) /* TX FIFO full */ #define ZYNQ_UART_SR_RXEMPTY BIT(1) /* RX FIFO empty */ @@ -45,7 +43,7 @@ struct zynq_uart_platdata { struct uart_zynq *regs; }; -/* Set up the baud rate in gd struct */ +/* Set up the baud rate */ static void _uart_zynq_serial_setbrg(struct uart_zynq *regs, unsigned long clock, unsigned long baud) { @@ -140,9 +138,12 @@ static int zynq_serial_setbrg(struct udevice *dev, int baudrate) static int zynq_serial_probe(struct udevice *dev) { struct zynq_uart_platdata *platdata = dev_get_platdata(dev); + struct uart_zynq *regs = platdata->regs; + u32 val; - /* No need to reinitialize the UART after relocation */ - if (gd->flags & GD_FLG_RELOC) + /* No need to reinitialize the UART if TX already enabled */ + val = readl(®s->control); + if (val & ZYNQ_UART_CR_TX_EN) return 0; _uart_zynq_serial_init(platdata->regs);