From patchwork Fri Dec 1 15:53:40 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christophe Lombard X-Patchwork-Id: 843560 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3ypJkw06cfz9s9Y for ; Sat, 2 Dec 2017 02:55:20 +1100 (AEDT) Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3ypJkv5PnLzDsQc for ; Sat, 2 Dec 2017 02:55:19 +1100 (AEDT) X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=linux.vnet.ibm.com (client-ip=148.163.156.1; helo=mx0a-001b2d01.pphosted.com; envelope-from=clombard@linux.vnet.ibm.com; receiver=) Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3ypJj966cgzDsTf for ; Sat, 2 Dec 2017 02:53:49 +1100 (AEDT) Received: from pps.filterd (m0098393.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id vB1FqxV7145215 for ; Fri, 1 Dec 2017 10:53:47 -0500 Received: from e06smtp12.uk.ibm.com (e06smtp12.uk.ibm.com [195.75.94.108]) by mx0a-001b2d01.pphosted.com with ESMTP id 2ek7serjs6-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Fri, 01 Dec 2017 10:53:46 -0500 Received: from localhost by e06smtp12.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Fri, 1 Dec 2017 15:53:42 -0000 Received: from d06av25.portsmouth.uk.ibm.com (d06av25.portsmouth.uk.ibm.com [9.149.105.61]) by b06cxnps4076.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id vB1FrfcT40108048; Fri, 1 Dec 2017 15:53:41 GMT Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id F30BE11C04C; Fri, 1 Dec 2017 15:48:12 +0000 (GMT) Received: from d06av25.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id AF6EE11C050; Fri, 1 Dec 2017 15:48:12 +0000 (GMT) Received: from lombard-w520.nice-meridia.fr.ibm.com (unknown [9.134.171.23]) by d06av25.portsmouth.uk.ibm.com (Postfix) with ESMTP; Fri, 1 Dec 2017 15:48:12 +0000 (GMT) From: Christophe Lombard To: linuxppc-dev@lists.ozlabs.org, fbarrat@linux.vnet.ibm.com, vaibhav@linux.vnet.ibm.com, andrew.donnellan@au1.ibm.com Subject: [PATCH V2] cxl: Add support for ASB_Notify on POWER9 Date: Fri, 1 Dec 2017 16:53:40 +0100 X-Mailer: git-send-email 2.7.4 X-TM-AS-GCONF: 00 x-cbid: 17120115-0008-0000-0000-000004B1E3C7 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17120115-0009-0000-0000-00001E44CDF7 Message-Id: <1512143620-31330-1-git-send-email-clombard@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-12-01_04:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1011 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1712010182 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.24 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" The POWER9 core supports a new feature: ASB_Notify which requires the support of the Special Purpose Register: TIDR. The ASB_Notify command, generated by the AFU, will attempt to wake-up the host thread identified by the particular LPID:PID:TID. This patch assign a unique TIDR (thread id) for the current thread which will be used in the process element entry. A next patch will handle a new kind of "compatible" property in the device-tree (PHB DT node) indicating which version of CAPI and which features are supported. Signed-off-by: Christophe Lombard Reviewed-by: Philippe Bergheaud --- Changelog[v2] - Rebased to latest upstream. - Updated the ioctl interface. - Added a checking to allow updating the TIDR if a P9 chip is present. --- arch/powerpc/kernel/process.c | 2 ++ drivers/misc/cxl/api.c | 9 +++++++++ drivers/misc/cxl/context.c | 26 ++++++++++++++++++++++++++ drivers/misc/cxl/cxl.h | 4 ++++ drivers/misc/cxl/cxllib.c | 2 +- drivers/misc/cxl/file.c | 24 ++++++++++++++++++++++++ drivers/misc/cxl/native.c | 2 +- include/uapi/misc/cxl.h | 17 ++++++++++++++++- 8 files changed, 83 insertions(+), 3 deletions(-) diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c index bfdd783..b3489ab 100644 --- a/arch/powerpc/kernel/process.c +++ b/arch/powerpc/kernel/process.c @@ -1738,6 +1738,7 @@ int copy_thread(unsigned long clone_flags, unsigned long usp, kregs->nip = ppc_function_entry(f); return 0; } +EXPORT_SYMBOL_GPL(clear_thread_tidr); /* * Set up a thread for executing a new program @@ -1913,6 +1914,7 @@ int set_fpexc_mode(struct task_struct *tsk, unsigned int val) | tsk->thread.fpexc_mode; return 0; } +EXPORT_SYMBOL_GPL(set_thread_tidr); int get_fpexc_mode(struct task_struct *tsk, unsigned long adr) { diff --git a/drivers/misc/cxl/api.c b/drivers/misc/cxl/api.c index 7c11bad..605272c 100644 --- a/drivers/misc/cxl/api.c +++ b/drivers/misc/cxl/api.c @@ -684,3 +684,12 @@ void _cxl_cx4_teardown_msi_irqs(struct pci_dev *pdev) } } /* Exported via cxl_base */ + +int cxl_thread_tidr(struct cxl_context *ctx, u64 flags) +{ + if (!ctx) + return -EINVAL; + + return cxl_context_thread_tidr(ctx, flags); +} +EXPORT_SYMBOL_GPL(cxl_thread_tidr); diff --git a/drivers/misc/cxl/context.c b/drivers/misc/cxl/context.c index 12a41b2..14e1a51 100644 --- a/drivers/misc/cxl/context.c +++ b/drivers/misc/cxl/context.c @@ -22,6 +22,7 @@ #include #include #include +#include #include "cxl.h" @@ -42,6 +43,7 @@ int cxl_context_init(struct cxl_context *ctx, struct cxl_afu *afu, bool master) ctx->afu = afu; ctx->master = master; + ctx->tid = 0; ctx->pid = NULL; /* Set in start work ioctl */ mutex_init(&ctx->mapping_lock); ctx->mapping = NULL; @@ -362,3 +364,27 @@ void cxl_context_mm_count_put(struct cxl_context *ctx) if (ctx->mm) mmdrop(ctx->mm); } + +int cxl_context_thread_tidr(struct cxl_context *ctx, u64 flags) +{ + int rc = 0; + + if (!cxl_is_power9()) + return -ENODEV; + + /* Clear any TIDR value assigned to the current thread */ + if (flags == CXL_THREAD_TID_CLEAN) { + clear_thread_tidr(current); + ctx->tid = 0; + } + + /* Assign a unique TIDR (thread id) for the current thread */ + if (flags == CXL_THREAD_TID_ASSIGN) { + rc = set_thread_tidr(current); + if (!rc) + ctx->tid = current->thread.tidr; + } + pr_devel("%s: current tidr: %d\n", __func__, ctx->tid); + + return rc; +} diff --git a/drivers/misc/cxl/cxl.h b/drivers/misc/cxl/cxl.h index e46a406..e372291 100644 --- a/drivers/misc/cxl/cxl.h +++ b/drivers/misc/cxl/cxl.h @@ -561,6 +561,7 @@ struct cxl_context { unsigned int sst_size, sst_lru; wait_queue_head_t wq; + u32 tid; /* use mm context associated with this pid for ds faults */ struct pid *pid; spinlock_t lock; /* Protects pending_irq_mask, pending_fault and fault_addr */ @@ -1169,4 +1170,7 @@ void cxl_context_mm_count_get(struct cxl_context *ctx); /* Decrements the reference count to "struct mm_struct" */ void cxl_context_mm_count_put(struct cxl_context *ctx); +/* Handles an unique TIDR (thread id) for the current thread */ +int cxl_context_thread_tidr(struct cxl_context *ctx, u64 flags); + #endif diff --git a/drivers/misc/cxl/cxllib.c b/drivers/misc/cxl/cxllib.c index dc9bc18..126d988 100644 --- a/drivers/misc/cxl/cxllib.c +++ b/drivers/misc/cxl/cxllib.c @@ -202,7 +202,7 @@ int cxllib_get_PE_attributes(struct task_struct *task, } else { attr->pid = 0; } - attr->tid = 0; + attr->tid = current->thread.tidr; return 0; } EXPORT_SYMBOL_GPL(cxllib_get_PE_attributes); diff --git a/drivers/misc/cxl/file.c b/drivers/misc/cxl/file.c index 76c0b0c..c9c79a9 100644 --- a/drivers/misc/cxl/file.c +++ b/drivers/misc/cxl/file.c @@ -300,6 +300,28 @@ static long afu_ioctl_get_afu_id(struct cxl_context *ctx, return 0; } +static long afu_ioctl_thread_tidr(struct cxl_context *ctx, + struct cxl_ttid __user *uthreadtid) +{ + struct cxl_ttid threadtid = { 0 }; + int rc; + + if (copy_from_user(&threadtid, uthreadtid, sizeof(threadtid))) + return -EFAULT; + + rc = cxl_context_thread_tidr(ctx, threadtid.flags); + if (rc) + goto out; + + threadtid.tid = ctx->tid; + if (copy_to_user(uthreadtid, &threadtid, sizeof(threadtid))) + return -EFAULT; + + rc = 0; +out: + return rc; +} + long afu_ioctl(struct file *file, unsigned int cmd, unsigned long arg) { struct cxl_context *ctx = file->private_data; @@ -319,6 +341,8 @@ long afu_ioctl(struct file *file, unsigned int cmd, unsigned long arg) case CXL_IOCTL_GET_AFU_ID: return afu_ioctl_get_afu_id(ctx, (struct cxl_afu_id __user *) arg); + case CXL_IOCTL_THREAD_TID: + return afu_ioctl_thread_tidr(ctx, (struct cxl_ttid __user *)arg); } return -EINVAL; } diff --git a/drivers/misc/cxl/native.c b/drivers/misc/cxl/native.c index 02b6b45..657c4a9 100644 --- a/drivers/misc/cxl/native.c +++ b/drivers/misc/cxl/native.c @@ -673,7 +673,7 @@ static int process_element_entry_psl9(struct cxl_context *ctx, u64 wed, u64 amr) pid = ctx->mm->context.id; } - ctx->elem->common.tid = 0; + ctx->elem->common.tid = cpu_to_be32(ctx->tid); ctx->elem->common.pid = cpu_to_be32(pid); ctx->elem->sr = cpu_to_be64(calculate_sr(ctx)); diff --git a/include/uapi/misc/cxl.h b/include/uapi/misc/cxl.h index 49e8fd0..e703597 100644 --- a/include/uapi/misc/cxl.h +++ b/include/uapi/misc/cxl.h @@ -76,12 +76,27 @@ struct cxl_adapter_image { __u64 reserved4; }; +struct cxl_ttid { + __u64 flags; + __u64 tid; + __u64 reserved1; + __u64 reserved2; + __u64 reserved3; + __u64 reserved4; + __u64 reserved5; + __u64 reserved6; +}; + +#define CXL_THREAD_TID_CLEAN 0x0000000000000001ULL +#define CXL_THREAD_TID_ASSIGN 0x0000000000000002ULL + /* ioctl numbers */ #define CXL_MAGIC 0xCA /* AFU devices */ #define CXL_IOCTL_START_WORK _IOW(CXL_MAGIC, 0x00, struct cxl_ioctl_start_work) #define CXL_IOCTL_GET_PROCESS_ELEMENT _IOR(CXL_MAGIC, 0x01, __u32) -#define CXL_IOCTL_GET_AFU_ID _IOR(CXL_MAGIC, 0x02, struct cxl_afu_id) +#define CXL_IOCTL_GET_AFU_ID _IOR(CXL_MAGIC, 0x02, struct cxl_afu_id) +#define CXL_IOCTL_THREAD_TID _IOW(CXL_MAGIC, 0x03, struct cxl_ttid) /* adapter devices */ #define CXL_IOCTL_DOWNLOAD_IMAGE _IOW(CXL_MAGIC, 0x0A, struct cxl_adapter_image) #define CXL_IOCTL_VALIDATE_IMAGE _IOW(CXL_MAGIC, 0x0B, struct cxl_adapter_image)