From patchwork Tue Mar 3 16:00:25 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Grygorii Strashko X-Patchwork-Id: 1248487 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.a=rsa-sha256 header.s=ti-com-17Q1 header.b=rovcN5zt; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 48X1vS62pdz9sRN for ; Wed, 4 Mar 2020 03:00:52 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730127AbgCCQAt (ORCPT ); Tue, 3 Mar 2020 11:00:49 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:56256 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729449AbgCCQAs (ORCPT ); Tue, 3 Mar 2020 11:00:48 -0500 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 023G0ijo021709; Tue, 3 Mar 2020 10:00:44 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1583251244; bh=zFr5F9I7jfe0+E2ZyaA/hVidefazQ482jhqXNOfG3xs=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=rovcN5zt5ecBCH+T0uQeP4lQ7Ne3X7H/Hy7LUb3MV3kKqCISUj4WGdvqWETpLoGdK AOxZVVl4As2zguTFccd7gpWjLB023mHv2d2cynLBYa7Yo1vRoM121J9Re91EsVMuMS RkffBSZs4A6LD/ZS9yyvY/yRjIo4CPJoDLpaeU3g= Received: from DLEE105.ent.ti.com (dlee105.ent.ti.com [157.170.170.35]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 023G0i6E085803 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 3 Mar 2020 10:00:44 -0600 Received: from DLEE110.ent.ti.com (157.170.170.21) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Tue, 3 Mar 2020 10:00:44 -0600 Received: from localhost.localdomain (10.64.41.19) by DLEE110.ent.ti.com (157.170.170.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Tue, 3 Mar 2020 10:00:44 -0600 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by localhost.localdomain (8.15.2/8.15.2) with ESMTP id 023G0hwq030116; Tue, 3 Mar 2020 10:00:44 -0600 From: Grygorii Strashko To: Murali Karicheri , Kishon Vijay Abraham I , Tero Kristo , "David S . Miller" CC: Sekhar Nori , Rob Herring , netdev , , , Grygorii Strashko Subject: [for-next PATCH v2 1/5] phy: ti: gmii-sel: simplify config dependencies between net drivers and gmii phy Date: Tue, 3 Mar 2020 18:00:25 +0200 Message-ID: <20200303160029.345-2-grygorii.strashko@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200303160029.345-1-grygorii.strashko@ti.com> References: <20200303160029.345-1-grygorii.strashko@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org The phy-gmii-sel can be only auto selected in Kconfig and now the pretty complex Kconfig dependencies are defined for phy-gmii-sel driver, which also need to be updated every time phy-gmii-sel is re-used for any new networking driver. Simplify Kconfig definition for phy-gmii-sel PHY driver - drop all dependencies and from networking drivers and rely on using 'imply PHY_TI_GMII_SEL' in Kconfig definitions for networking drivers instead. Signed-off-by: Grygorii Strashko --- drivers/net/ethernet/ti/Kconfig | 1 + drivers/phy/ti/Kconfig | 3 --- 2 files changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/net/ethernet/ti/Kconfig b/drivers/net/ethernet/ti/Kconfig index bf98e0fa7d8b..8a6ca16eee3b 100644 --- a/drivers/net/ethernet/ti/Kconfig +++ b/drivers/net/ethernet/ti/Kconfig @@ -53,6 +53,7 @@ config TI_CPSW select MFD_SYSCON select PAGE_POOL select REGMAP + imply PHY_TI_GMII_SEL ---help--- This driver supports TI's CPSW Ethernet Switch. diff --git a/drivers/phy/ti/Kconfig b/drivers/phy/ti/Kconfig index 6dbe9d0b9ff3..15a3bcf32308 100644 --- a/drivers/phy/ti/Kconfig +++ b/drivers/phy/ti/Kconfig @@ -106,11 +106,8 @@ config TWL4030_USB config PHY_TI_GMII_SEL tristate - default y if TI_CPSW=y || TI_CPSW_SWITCHDEV=y - depends on TI_CPSW || TI_CPSW_SWITCHDEV || COMPILE_TEST select GENERIC_PHY select REGMAP - default m help This driver supports configuring of the TI CPSW Port mode depending on the Ethernet PHY connected to the CPSW Port. From patchwork Tue Mar 3 16:00:26 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Grygorii Strashko X-Patchwork-Id: 1248488 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.a=rsa-sha256 header.s=ti-com-17Q1 header.b=sOIG1o9G; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 48X1vX2JN6z9sRN for ; Wed, 4 Mar 2020 03:00:56 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730186AbgCCQAw (ORCPT ); Tue, 3 Mar 2020 11:00:52 -0500 Received: from lelv0143.ext.ti.com ([198.47.23.248]:54078 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729543AbgCCQAt (ORCPT ); Tue, 3 Mar 2020 11:00:49 -0500 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 023G0kC9091121; Tue, 3 Mar 2020 10:00:46 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1583251246; bh=oehu8Dp5oKYIE3wzZN60BoP+9zoo0QNkg4JLEASppoM=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=sOIG1o9G2U58Z90c2BjeCbnkGgxAigmJUGefa2FO/qyUrv/YQ7M/LQlCce3SiRrhC s9ybkO3NUkC/mVLzJn6OGTDO0gI5PrOUYhO7ZCSDZKisIaL8G+Gtw+3HwSu4lD/T5R aAcP+SDwKV4wXjLTB9OaFxtR8T8TFz6IHWVkSNgM= Received: from DFLE103.ent.ti.com (dfle103.ent.ti.com [10.64.6.24]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTP id 023G0kXn104100; Tue, 3 Mar 2020 10:00:46 -0600 Received: from DFLE112.ent.ti.com (10.64.6.33) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Tue, 3 Mar 2020 10:00:45 -0600 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Tue, 3 Mar 2020 10:00:46 -0600 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 023G0jLL126279; Tue, 3 Mar 2020 10:00:45 -0600 From: Grygorii Strashko To: Murali Karicheri , Kishon Vijay Abraham I , Tero Kristo , "David S . Miller" CC: Sekhar Nori , Rob Herring , netdev , , , Grygorii Strashko Subject: [for-next PATCH v2 2/5] dt-bindings: phy: ti: gmii-sel: add support for am654x/j721e soc Date: Tue, 3 Mar 2020 18:00:26 +0200 Message-ID: <20200303160029.345-3-grygorii.strashko@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200303160029.345-1-grygorii.strashko@ti.com> References: <20200303160029.345-1-grygorii.strashko@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org TI AM654x/J721E SoCs have the same PHY interface selection mechanism for CPSWx subsystem as TI SoCs (AM3/4/5/DRA7), but registers and bit-fields placement is different. This patch adds corresponding compatible strings to enable support for TI AM654x/J721E SoCs. Signed-off-by: Grygorii Strashko Acked-by: Rob Herring --- Documentation/devicetree/bindings/phy/ti-phy-gmii-sel.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/phy/ti-phy-gmii-sel.txt b/Documentation/devicetree/bindings/phy/ti-phy-gmii-sel.txt index 50ce9ae0f7a5..83b78c1c0644 100644 --- a/Documentation/devicetree/bindings/phy/ti-phy-gmii-sel.txt +++ b/Documentation/devicetree/bindings/phy/ti-phy-gmii-sel.txt @@ -40,6 +40,7 @@ Required properties: "ti,dra7xx-phy-gmii-sel" for dra7xx/am57xx platform "ti,am43xx-phy-gmii-sel" for am43xx platform "ti,dm814-phy-gmii-sel" for dm814x platform + "ti,am654-phy-gmii-sel" for AM654x/J721E platform - reg : Address and length of the register set for the device - #phy-cells : must be 2. cell 1 - CPSW port number (starting from 1) From patchwork Tue Mar 3 16:00:27 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Grygorii Strashko X-Patchwork-Id: 1248490 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.a=rsa-sha256 header.s=ti-com-17Q1 header.b=ShAiFsCU; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 48X1vl18pYz9sSN for ; Wed, 4 Mar 2020 03:01:07 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730319AbgCCQBE (ORCPT ); Tue, 3 Mar 2020 11:01:04 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:56276 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729753AbgCCQAz (ORCPT ); Tue, 3 Mar 2020 11:00:55 -0500 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 023G0rbT021754; Tue, 3 Mar 2020 10:00:53 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1583251253; bh=YfMSLkRxRKJplFUcpQZy4kjKb3RQ87tY18eRNwti45I=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=ShAiFsCUF/kYe7x1cksGs/+5FX8lkZWZBBCXTrB/LRtHzAexJTyvHOSIf49HchdB4 FuIWspdIVRouJdn6aLyW738m9k4Y933DFQnHG60CkWF2dWU5Ph56fudQW/UPQyWYRM dRC/Fb0gigqebzgxgdBXwqpzN2Ga8gmfRQeD+FyU= Received: from DLEE104.ent.ti.com (dlee104.ent.ti.com [157.170.170.34]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 023G0qnJ056564 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 3 Mar 2020 10:00:53 -0600 Received: from DLEE114.ent.ti.com (157.170.170.25) by DLEE104.ent.ti.com (157.170.170.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Tue, 3 Mar 2020 10:00:52 -0600 Received: from localhost.localdomain (10.64.41.19) by DLEE114.ent.ti.com (157.170.170.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Tue, 3 Mar 2020 10:00:52 -0600 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by localhost.localdomain (8.15.2/8.15.2) with ESMTP id 023G0pwg030261; Tue, 3 Mar 2020 10:00:52 -0600 From: Grygorii Strashko To: Murali Karicheri , Kishon Vijay Abraham I , Tero Kristo , "David S . Miller" CC: Sekhar Nori , Rob Herring , netdev , , , Grygorii Strashko Subject: [for-next PATCH v2 3/5] phy: ti: gmii-sel: add support for am654x/j721e soc Date: Tue, 3 Mar 2020 18:00:27 +0200 Message-ID: <20200303160029.345-4-grygorii.strashko@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200303160029.345-1-grygorii.strashko@ti.com> References: <20200303160029.345-1-grygorii.strashko@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org TI AM654x/J721E SoCs have the same PHY interface selection mechanism for CPSWx subsystem as TI SoCs (AM3/4/5/DRA7), but registers and bit-fields placement is different. This patch adds corresponding support for TI AM654x/J721E SoCs PHY interface selection. Signed-off-by: Grygorii Strashko --- drivers/phy/ti/phy-gmii-sel.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/drivers/phy/ti/phy-gmii-sel.c b/drivers/phy/ti/phy-gmii-sel.c index 1c536fc03c83..7edd5c3bc536 100644 --- a/drivers/phy/ti/phy-gmii-sel.c +++ b/drivers/phy/ti/phy-gmii-sel.c @@ -170,6 +170,21 @@ struct phy_gmii_sel_soc_data phy_gmii_sel_soc_dm814 = { .regfields = phy_gmii_sel_fields_am33xx, }; +static const +struct reg_field phy_gmii_sel_fields_am654[][PHY_GMII_SEL_LAST] = { + { + [PHY_GMII_SEL_PORT_MODE] = REG_FIELD(0x4040, 0, 1), + [PHY_GMII_SEL_RGMII_ID_MODE] = REG_FIELD((~0), 0, 0), + [PHY_GMII_SEL_RMII_IO_CLK_EN] = REG_FIELD((~0), 0, 0), + }, +}; + +static const +struct phy_gmii_sel_soc_data phy_gmii_sel_soc_am654 = { + .num_ports = 1, + .regfields = phy_gmii_sel_fields_am654, +}; + static const struct of_device_id phy_gmii_sel_id_table[] = { { .compatible = "ti,am3352-phy-gmii-sel", @@ -187,6 +202,10 @@ static const struct of_device_id phy_gmii_sel_id_table[] = { .compatible = "ti,dm814-phy-gmii-sel", .data = &phy_gmii_sel_soc_dm814, }, + { + .compatible = "ti,am654-phy-gmii-sel", + .data = &phy_gmii_sel_soc_am654, + }, {} }; MODULE_DEVICE_TABLE(of, phy_gmii_sel_id_table); From patchwork Tue Mar 3 16:00:28 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Grygorii Strashko X-Patchwork-Id: 1248489 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.a=rsa-sha256 header.s=ti-com-17Q1 header.b=xlZ08eoA; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 48X1vd5PM9z9sRY for ; Wed, 4 Mar 2020 03:01:01 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730279AbgCCQA6 (ORCPT ); Tue, 3 Mar 2020 11:00:58 -0500 Received: from lelv0143.ext.ti.com ([198.47.23.248]:54088 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730231AbgCCQA5 (ORCPT ); Tue, 3 Mar 2020 11:00:57 -0500 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 023G0sEw091146; Tue, 3 Mar 2020 10:00:54 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1583251254; bh=ZX0fu9+zyF8t2TW5DPMYzhJ+OA/XTXXhf31q+Y4WDUA=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=xlZ08eoA7A+iM8ArQl+yOPobs6ri7VPqee2WgyeMfA5MfK+0Kk3VDVI/Y/GIKQdtz q2CNoUvPc5Ggp0ZKSx8+0JTYLV5ilkCB/Pd0pW6QC4QSa/cL4tmdnWXL4TEvMdOcs7 69unDaqwGp3PuVh40t/24vKiCln7rBS9UzoYpIwI= Received: from DFLE115.ent.ti.com (dfle115.ent.ti.com [10.64.6.36]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 023G0sxA056579 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 3 Mar 2020 10:00:54 -0600 Received: from DFLE103.ent.ti.com (10.64.6.24) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Tue, 3 Mar 2020 10:00:54 -0600 Received: from localhost.localdomain (10.64.41.19) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Tue, 3 Mar 2020 10:00:54 -0600 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by localhost.localdomain (8.15.2/8.15.2) with ESMTP id 023G0rBt030282; Tue, 3 Mar 2020 10:00:53 -0600 From: Grygorii Strashko To: Murali Karicheri , Kishon Vijay Abraham I , Tero Kristo , "David S . Miller" CC: Sekhar Nori , Rob Herring , netdev , , , Grygorii Strashko Subject: [for-next PATCH v2 4/5] arm64: dts: ti: k3-am65-mcu: add phy-gmii-sel node Date: Tue, 3 Mar 2020 18:00:28 +0200 Message-ID: <20200303160029.345-5-grygorii.strashko@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200303160029.345-1-grygorii.strashko@ti.com> References: <20200303160029.345-1-grygorii.strashko@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Add DT node for the TI AM65x SoC phy-gmii-sel PHY required for Ethernet ports mode selection. Signed-off-by: Grygorii Strashko --- arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi index 92629cbdc184..ad89f93f30e5 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi @@ -12,6 +12,12 @@ #address-cells = <1>; #size-cells = <1>; ranges = <0x0 0x0 0x40f00000 0x20000>; + + phy_gmii_sel: phy@4040 { + compatible = "ti,am654-phy-gmii-sel"; + reg = <0x4040 0x4>; + #phy-cells = <1>; + }; }; mcu_uart0: serial@40a00000 { From patchwork Tue Mar 3 16:00:29 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Grygorii Strashko X-Patchwork-Id: 1248491 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming-netdev@ozlabs.org Delivered-To: patchwork-incoming-netdev@ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=netdev-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.a=rsa-sha256 header.s=ti-com-17Q1 header.b=oGAEoToA; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 48X1vr08Dxz9sRR for ; Wed, 4 Mar 2020 03:01:12 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730333AbgCCQBI (ORCPT ); Tue, 3 Mar 2020 11:01:08 -0500 Received: from lelv0142.ext.ti.com ([198.47.23.249]:56898 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730197AbgCCQBD (ORCPT ); Tue, 3 Mar 2020 11:01:03 -0500 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 023G110K087011; Tue, 3 Mar 2020 10:01:01 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1583251261; bh=kMGzEG3llNgQuXMud+pl3UcHifoB2y/ZMOSZK0Quy3A=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=oGAEoToAiFkyZqc9hJqPrWskitemoDFntb6OHwV4d93i6/+EiiyNNFMMsHH6GmTYs KmI+Wunoslp9I4+cxYcPReqI0wu/2feH/q197LNsthIPIeC63TaI/lQ3/Unt2kbFpr DbVAUti+oLQbJsbGC9Rj3U7gycRuNdkjszCHsS18= Received: from DFLE104.ent.ti.com (dfle104.ent.ti.com [10.64.6.25]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 023G119P112162 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 3 Mar 2020 10:01:01 -0600 Received: from DFLE114.ent.ti.com (10.64.6.35) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Tue, 3 Mar 2020 10:01:00 -0600 Received: from localhost.localdomain (10.64.41.19) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Tue, 3 Mar 2020 10:01:01 -0600 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by localhost.localdomain (8.15.2/8.15.2) with ESMTP id 023G10jb030402; Tue, 3 Mar 2020 10:01:00 -0600 From: Grygorii Strashko To: Murali Karicheri , Kishon Vijay Abraham I , Tero Kristo , "David S . Miller" CC: Sekhar Nori , Rob Herring , netdev , , , Grygorii Strashko Subject: [for-next PATCH v2 5/5] arm64: dts: ti: k3-j721e-mcu: add scm node and phy-gmii-sel nodes Date: Tue, 3 Mar 2020 18:00:29 +0200 Message-ID: <20200303160029.345-6-grygorii.strashko@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200303160029.345-1-grygorii.strashko@ti.com> References: <20200303160029.345-1-grygorii.strashko@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Add DT node for MCU System Control module DT node and DT node for the TI J721E SoC phy-gmii-sel PHY required for Ethernet ports mode selection. Signed-off-by: Grygorii Strashko --- arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi index 16c874bfd49a..6f961d5f077a 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi @@ -34,6 +34,20 @@ }; }; + mcu_conf: syscon@40f00000 { + compatible = "syscon", "simple-mfd"; + reg = <0x0 0x40f00000 0x0 0x20000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0x40f00000 0x20000>; + + phy_gmii_sel: phy@4040 { + compatible = "ti,am654-phy-gmii-sel"; + reg = <0x4040 0x4>; + #phy-cells = <1>; + }; + }; + wkup_pmx0: pinmux@4301c000 { compatible = "pinctrl-single"; /* Proxy 0 addressing */