From patchwork Mon Feb 24 22:40:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 1243674 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=hsDvzxEI; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 48RHDK4gZdz9sRl for ; Tue, 25 Feb 2020 09:44:01 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728177AbgBXWmh (ORCPT ); Mon, 24 Feb 2020 17:42:37 -0500 Received: from mail-lf1-f65.google.com ([209.85.167.65]:39794 "EHLO mail-lf1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727976AbgBXWmh (ORCPT ); Mon, 24 Feb 2020 17:42:37 -0500 Received: by mail-lf1-f65.google.com with SMTP id n30so7250233lfh.6; Mon, 24 Feb 2020 14:42:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=7nkAq5GfDlPZXykqJhY6isdTe+F5tuToLJNPg+hqtHo=; b=hsDvzxEIXKi4FCYfJ+ZLDZvH+mO5gpla9lgaqgwCyubD5j1EFvFa4tU8W4A4hDIoQk wG0OZ/NNTuhpGZSWv2pgrhYTXAWLizcWgpnKFwzGRi812pEuunDzPgsZ+HAZPj4DhWU+ uoR1UfzWpfmgXR6LOXTOWEkwidUdizHBP6htjShFLM5/scmf1G8aKvKiWaFq4BLJ8RZo SRtRWqBunY83Ubn08d2lFVWLeL7pmb/vMAUHl9x+opS7bECRvdrrNhFpQmIRq85kFFZy e1jAifEZe7EsFWtx9tTlFNTt8xW0VPv+Xqh0BrXJD9EbkgJrJNNK+NF47ginS/Pfmddh hzdA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=7nkAq5GfDlPZXykqJhY6isdTe+F5tuToLJNPg+hqtHo=; b=os2yXgEE5c0N+RNVVvrCaU+NKm4cGc//wYnm/hIXilAHEtRoVFB+7oLlDaYvH904Wk xGDWdQZXixuYLfO2mW0yHVncSVsvDA/7WPw8HiLnJ5o6lu2EMf4coWQLpyYP2I9oifRj oEhkp8pUkEZLIpXgaa3h3AlQoFW0KHu7KAQFcPj+e2RYji9ztcf5Mo/FuxsNS2zv1RCz KeCvALyomXMY+/zUoU1lSAzBKOnlzlVj89qxfrCjLjOXrCTg8/kyCbkEI7LuzeTF5Mwq pfS6c7xGHhQWsUljodHsDD0uifdgQI+xAp27mzT8m7nKF3Jq7OAhsp+5rwpwCAR5tqvM 8SHA== X-Gm-Message-State: APjAAAVAyHPqQ7RY2uEHH3kkVgbvP0p846iagzEKt0ShWrXTkRFsLPU6 k1iu8tNj7Uw5yj/yFrYzOQk= X-Google-Smtp-Source: APXvYqyWxyrGGjB38rrxlxmx71Ht5tQ+diDjSZVo+lOGG4jypLBemdCB7MVBd0yPrQFDFq4AqnoA+g== X-Received: by 2002:a19:ee0a:: with SMTP id g10mr9964294lfb.182.1582584154684; Mon, 24 Feb 2020 14:42:34 -0800 (PST) Received: from localhost.localdomain (79-139-233-37.dynamic.spd-mgts.ru. [79.139.233.37]) by smtp.gmail.com with ESMTPSA id j7sm6264833lfh.25.2020.02.24.14.42.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 24 Feb 2020 14:42:34 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano , =?utf-8?q?Micha=C5=82_Miro?= =?utf-8?b?c8WCYXc=?= , Jasper Korten , David Heidelberg , Peter Geis , Nicolas Chauvet Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v11 01/17] ARM: tegra: Compile sleep-tegra20/30.S unconditionally Date: Tue, 25 Feb 2020 01:40:41 +0300 Message-Id: <20200224224057.21877-2-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20200224224057.21877-1-digetx@gmail.com> References: <20200224224057.21877-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org The sleep-tegra*.S provides functionality required for suspend/resume and CPU hotplugging. The new unified CPUIDLE driver will support multiple hardware generations starting from Terga20 and ending with Tegra124, the driver will utilize functions that are provided by the assembly and thus it is cleaner to compile that code without any build-dependencies in order to avoid churning with #ifdef's. Acked-by: Peter De Schrijver Tested-by: Peter Geis Tested-by: Jasper Korten Tested-by: David Heidelberg Tested-by: Nicolas Chauvet Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/Makefile | 6 ++---- arch/arm/mach-tegra/sleep.h | 2 -- 2 files changed, 2 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile index 6c1dff2eccc2..965862608ff6 100644 --- a/arch/arm/mach-tegra/Makefile +++ b/arch/arm/mach-tegra/Makefile @@ -8,13 +8,13 @@ obj-y += reset.o obj-y += reset-handler.o obj-y += sleep.o obj-y += tegra.o +obj-y += sleep-tegra20.o +obj-y += sleep-tegra30.o obj-$(CONFIG_CPU_IDLE) += cpuidle.o -obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += sleep-tegra20.o obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += pm-tegra20.o ifeq ($(CONFIG_CPU_IDLE),y) obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += cpuidle-tegra20.o endif -obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += sleep-tegra30.o obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += pm-tegra30.o ifeq ($(CONFIG_CPU_IDLE),y) obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += cpuidle-tegra30.o @@ -22,12 +22,10 @@ endif obj-$(CONFIG_SMP) += platsmp.o obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o -obj-$(CONFIG_ARCH_TEGRA_114_SOC) += sleep-tegra30.o obj-$(CONFIG_ARCH_TEGRA_114_SOC) += pm-tegra30.o ifeq ($(CONFIG_CPU_IDLE),y) obj-$(CONFIG_ARCH_TEGRA_114_SOC) += cpuidle-tegra114.o endif -obj-$(CONFIG_ARCH_TEGRA_124_SOC) += sleep-tegra30.o obj-$(CONFIG_ARCH_TEGRA_124_SOC) += pm-tegra30.o ifeq ($(CONFIG_CPU_IDLE),y) obj-$(CONFIG_ARCH_TEGRA_124_SOC) += cpuidle-tegra114.o diff --git a/arch/arm/mach-tegra/sleep.h b/arch/arm/mach-tegra/sleep.h index 78ef32a907c8..63e2205cbc82 100644 --- a/arch/arm/mach-tegra/sleep.h +++ b/arch/arm/mach-tegra/sleep.h @@ -120,10 +120,8 @@ void tegra_resume(void); int tegra_sleep_cpu_finish(unsigned long); void tegra_disable_clean_inv_dcache(u32 flag); -#ifdef CONFIG_HOTPLUG_CPU void tegra20_hotplug_shutdown(void); void tegra30_hotplug_shutdown(void); -#endif void tegra20_cpu_shutdown(int cpu); int tegra20_cpu_is_resettable_soon(void); From patchwork Mon Feb 24 22:40:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 1243673 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=mxDlH6Ly; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 48RHDD5zFjz9sRt for ; Tue, 25 Feb 2020 09:43:56 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727976AbgBXWmi (ORCPT ); Mon, 24 Feb 2020 17:42:38 -0500 Received: from mail-lf1-f67.google.com ([209.85.167.67]:34022 "EHLO mail-lf1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727670AbgBXWmi (ORCPT ); Mon, 24 Feb 2020 17:42:38 -0500 Received: by mail-lf1-f67.google.com with SMTP id l18so8090345lfc.1; Mon, 24 Feb 2020 14:42:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=b03TRFQ9QN9uhCU3mXS9EkQey+lE2Pt2IOy2EIPzQuM=; b=mxDlH6Lyrfi2/G/Bw2296CEMHOAkxAfb8ZGuFLGkbZYXCbSpDKazBfmqpBMSdJyg69 NYwwkoUCJpwlnyIHiaVhnPCLwwhuHfUY+qujASryWO0n4kNstg3doN6HAMRp6Bz98Hzk Ay/ds3kl5Tzyi5Zo0j1Xk9C2DGSXJnoSmU9IxeLP36iwfK1jAsOzBVUswS3uTT/a+J1r JkYGgjRjfPfXdfqHhUXa1uF/pjlLr+OuIHTUh0N4rIZJ4OqzfLOXelsaEeiZ+mv/IDLL 4Ycgde278nTpQOvG3574JNAdPTe70wWWkDRUqnSpbuVaKRIUBwemdIl/4kD3V4NT7I4e QD6g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=b03TRFQ9QN9uhCU3mXS9EkQey+lE2Pt2IOy2EIPzQuM=; b=qMew/mxKs0G6uBqahCVSb0umbNpHr6KNRxlB2EuR1Nd9F60O4KXlit6nsd65Bz58OQ rHiWmr5VuxcD57wXkyewgvu6g1Q2rllRNcHcAnNzcXIf9o1Vw1N/I7NRLBAIpDN1/HZ6 cyCO6FdY5+I9JjVw8Y3eozMZCecJSh4awEuVn6+nC+UXrUCyY1IaR6ax7JiT5OI5W8dC 7ogwyxLksCPZ2f9rd6kNaAGffnZuSUEFrXOijRbwLj8DDqgNvlPPXRIITA/qsLQME3/Y WhqXPJAGFDKOSZcMEzsRF05bQh+qg3Mmyk3wl+jZPwX7dDXfP70JD58HF4o2z7fx8wFo Bfnw== X-Gm-Message-State: APjAAAXYosQ1vAIGff8z5k3irc/ivIWeNLlNASJBvb9p2LW4MJN7H+We VH1Q9D+4qviJgmpqZEdP1I4= X-Google-Smtp-Source: APXvYqwCQm9EZ60/Re6nbi2dVA0+hwHW7+b9xcpHVtXq6tF2ZqWD44cVlR7FD+FbegAhbbKIbXx2yg== X-Received: by 2002:ac2:4857:: with SMTP id 23mr2748151lfy.200.1582584155714; Mon, 24 Feb 2020 14:42:35 -0800 (PST) Received: from localhost.localdomain (79-139-233-37.dynamic.spd-mgts.ru. [79.139.233.37]) by smtp.gmail.com with ESMTPSA id j7sm6264833lfh.25.2020.02.24.14.42.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 24 Feb 2020 14:42:35 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano , =?utf-8?q?Micha=C5=82_Miro?= =?utf-8?b?c8WCYXc=?= , Jasper Korten , David Heidelberg , Peter Geis , Nicolas Chauvet Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v11 02/17] ARM: tegra: Add tegra_pm_park_secondary_cpu() Date: Tue, 25 Feb 2020 01:40:42 +0300 Message-Id: <20200224224057.21877-3-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20200224224057.21877-1-digetx@gmail.com> References: <20200224224057.21877-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org This function resembles tegra_cpu_die() of the hotplug code, but this variant is more suitable to be used for CPU PM because it's made specifically to be used by cpu_suspend(). In short this function puts secondary CPU offline, it will be used by the new CPUIDLE driver. Acked-by: Peter De Schrijver Tested-by: Peter Geis Tested-by: Jasper Korten Tested-by: David Heidelberg Tested-by: Nicolas Chauvet Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/pm.c | 14 ++++++++++++++ arch/arm/mach-tegra/pm.h | 5 +++++ 2 files changed, 19 insertions(+) diff --git a/arch/arm/mach-tegra/pm.c b/arch/arm/mach-tegra/pm.c index 3cab81b82866..f5ff3dd1dd81 100644 --- a/arch/arm/mach-tegra/pm.c +++ b/arch/arm/mach-tegra/pm.c @@ -436,4 +436,18 @@ void __init tegra_init_suspend(void) suspend_set_ops(&tegra_suspend_ops); } + +int tegra_pm_park_secondary_cpu(unsigned long cpu) +{ + if (cpu > 0) { + tegra_disable_clean_inv_dcache(TEGRA_FLUSH_CACHE_LOUIS); + + if (tegra_get_chip_id() == TEGRA20) + tegra20_hotplug_shutdown(); + else + tegra30_hotplug_shutdown(); + } + + return -EINVAL; +} #endif diff --git a/arch/arm/mach-tegra/pm.h b/arch/arm/mach-tegra/pm.h index 569151b3edc0..9a790f00237f 100644 --- a/arch/arm/mach-tegra/pm.h +++ b/arch/arm/mach-tegra/pm.h @@ -31,8 +31,13 @@ extern void (*tegra_tear_down_cpu)(void); #ifdef CONFIG_PM_SLEEP void tegra_init_suspend(void); +int tegra_pm_park_secondary_cpu(unsigned long cpu); #else static inline void tegra_init_suspend(void) {} +static inline int tegra_pm_park_secondary_cpu(unsigned long cpu) +{ + return -ENOTSUPP; +} #endif #endif /* _MACH_TEGRA_PM_H_ */ From patchwork Mon Feb 24 22:40:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 1243649 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=TZmqCiX9; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 48RHBs6PQqz9sRG for ; Tue, 25 Feb 2020 09:42:45 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728287AbgBXWml (ORCPT ); Mon, 24 Feb 2020 17:42:41 -0500 Received: from mail-lj1-f195.google.com ([209.85.208.195]:34387 "EHLO mail-lj1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728252AbgBXWmk (ORCPT ); Mon, 24 Feb 2020 17:42:40 -0500 Received: by mail-lj1-f195.google.com with SMTP id x7so11931376ljc.1; Mon, 24 Feb 2020 14:42:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=7AozxVcf4z3lR4PhMChIwEqbPYX2I7+7XNxt3upJgkk=; b=TZmqCiX9jNY0graP91I/sg+619FlMZZWAm0MGPIiimL4yC0DFbTwS47mN4uIDQfifQ /9AyNigmmDdyI+2rgQx4cTNrald7XMnBSWEpYtOaEWWNn5n/qVuweI7Apyeq+LOshFW4 Q01uGg9r3PFTn9YWIyAsDaH46MEaz8IsNzP5VwDj2qNb3hi/O4FACLQVlWj5FpJ5z4qg TOMq9Jx0bYBgdFOibvcACJ2tVwNytCUiMLK4V7oY4vclGuVvBwtLKiDEwLtwV7Oa7BaV YDaQq7TRlzEi0FjjZrDiqMjW+hfLOlmREzftGQ7r/qIAjodUm+euQA97aM4M6SiuE4l8 4O2Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=7AozxVcf4z3lR4PhMChIwEqbPYX2I7+7XNxt3upJgkk=; b=lVX/5l+BZIB8IMtzEowk8QDYVkXZHRIIGi+6ebT64DD7oqtCNpUv/Tp6wjO7ua5I1r 3CKFtX12cQE7VUjJ8CUFvuP2Y3OBZT8x8GpAlrwwgSxzcJY0WRyYv+5ZucJtm5dV2Y+G 4S2zEtyXizLUBa9/i0OWGrNexEpmuO/ZZslFCUXEdgnT/ZjnpC+7e2lZlUAAG+tfkAkl S0kZoHx61Qk95nOws1KtkX4r2KJCkPVQPW8vE1Tb2f/l4STz2JgAJAC9Y6z1BLI4yznz 6K7GKjBLZ+k6i8MJDyDjOLfmYlTVWJjqbzzYh/sZvNZ6i3+nuc9SxEe5i1GSwMpothfn 6I0g== X-Gm-Message-State: APjAAAWBCm++92/xQDnJudNREe1geKI4oQTWLag1C0NYJ+/jgE0V9fHT T2u024synpWh7QqqcHcR8RQ35kuh X-Google-Smtp-Source: APXvYqyEca+W0+H1zhkU8+hTgRZ8GfivB5rcANthdoaSYtjyHbaksihdieXUzpibOmUuQTXZ0Lypkg== X-Received: by 2002:a2e:b0e3:: with SMTP id h3mr30666360ljl.56.1582584156954; Mon, 24 Feb 2020 14:42:36 -0800 (PST) Received: from localhost.localdomain (79-139-233-37.dynamic.spd-mgts.ru. [79.139.233.37]) by smtp.gmail.com with ESMTPSA id j7sm6264833lfh.25.2020.02.24.14.42.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 24 Feb 2020 14:42:36 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano , =?utf-8?q?Micha=C5=82_Miro?= =?utf-8?b?c8WCYXc=?= , Jasper Korten , David Heidelberg , Peter Geis , Nicolas Chauvet Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v11 03/17] ARM: tegra: Remove pen-locking from cpuidle-tegra20 Date: Tue, 25 Feb 2020 01:40:43 +0300 Message-Id: <20200224224057.21877-4-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20200224224057.21877-1-digetx@gmail.com> References: <20200224224057.21877-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Pen-locking is meant to block CPU0 if CPU1 wakes up during of entering into LP2 because of some interrupt firing up, preventing unnecessary LP2 enter that will be resumed immediately. Apparently this case doesn't happen often in practice, I checked how often it takes place and found that after ~20 hours of browsing web, managing email, watching videos and idling (15+ hours) there is only a dozen of early LP2 entering abortions and they all happened while device was idling. Thus let's remove the pen-locking and make LP2 entering uninterruptible, simplifying code quite a lot. This will also become very handy for the upcoming unified cpuidle driver, allowing to have a common LP2 code-path across of different hardware generations. Acked-by: Peter De Schrijver Tested-by: Peter Geis Tested-by: Jasper Korten Tested-by: David Heidelberg Tested-by: Nicolas Chauvet Acked-by: Daniel Lezcano Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/cpuidle-tegra20.c | 45 +------ arch/arm/mach-tegra/pm.c | 7 -- arch/arm/mach-tegra/pm.h | 1 - arch/arm/mach-tegra/reset-handler.S | 11 -- arch/arm/mach-tegra/reset.h | 9 +- arch/arm/mach-tegra/sleep-tegra20.S | 170 -------------------------- arch/arm/mach-tegra/sleep.h | 12 -- 7 files changed, 4 insertions(+), 251 deletions(-) diff --git a/arch/arm/mach-tegra/cpuidle-tegra20.c b/arch/arm/mach-tegra/cpuidle-tegra20.c index 69f3fa270fbe..78c20025dcfe 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra20.c +++ b/arch/arm/mach-tegra/cpuidle-tegra20.c @@ -65,28 +65,8 @@ static struct cpuidle_driver tegra_idle_driver = { #ifdef CONFIG_PM_SLEEP #ifdef CONFIG_SMP -static int tegra20_reset_sleeping_cpu_1(void) -{ - int ret = 0; - - tegra_pen_lock(); - - if (readb(tegra20_cpu1_resettable_status) == CPU_RESETTABLE) - tegra20_cpu_shutdown(1); - else - ret = -EINVAL; - - tegra_pen_unlock(); - - return ret; -} - static void tegra20_wake_cpu1_from_reset(void) { - tegra_pen_lock(); - - tegra20_cpu_clear_resettable(); - /* enable cpu clock on cpu */ tegra_enable_cpu_clock(1); @@ -95,39 +75,20 @@ static void tegra20_wake_cpu1_from_reset(void) /* unhalt the cpu */ flowctrl_write_cpu_halt(1, 0); - - tegra_pen_unlock(); -} - -static int tegra20_reset_cpu_1(void) -{ - if (!cpu_online(1) || !tegra20_reset_sleeping_cpu_1()) - return 0; - - tegra20_wake_cpu1_from_reset(); - return -EBUSY; } #else static inline void tegra20_wake_cpu1_from_reset(void) { } - -static inline int tegra20_reset_cpu_1(void) -{ - return 0; -} #endif static bool tegra20_cpu_cluster_power_down(struct cpuidle_device *dev, struct cpuidle_driver *drv, int index) { - while (tegra20_cpu_is_resettable_soon()) + while (!tegra_cpu_rail_off_ready()) cpu_relax(); - if (tegra20_reset_cpu_1() || !tegra_cpu_rail_off_ready()) - return false; - tegra_idle_lp2_last(); if (cpu_online(1)) @@ -141,9 +102,7 @@ static bool tegra20_idle_enter_lp2_cpu_1(struct cpuidle_device *dev, struct cpuidle_driver *drv, int index) { - cpu_suspend(0, tegra20_sleep_cpu_secondary_finish); - - tegra20_cpu_clear_resettable(); + cpu_suspend(dev->cpu, tegra_pm_park_secondary_cpu); return true; } diff --git a/arch/arm/mach-tegra/pm.c b/arch/arm/mach-tegra/pm.c index f5ff3dd1dd81..1ff499068bb1 100644 --- a/arch/arm/mach-tegra/pm.c +++ b/arch/arm/mach-tegra/pm.c @@ -137,18 +137,11 @@ bool tegra_set_cpu_in_lp2(void) if ((phy_cpu_id == 0) && cpumask_equal(cpu_lp2_mask, cpu_online_mask)) last_cpu = true; - else if (tegra_get_chip_id() == TEGRA20 && phy_cpu_id == 1) - tegra20_cpu_set_resettable_soon(); spin_unlock(&tegra_lp2_lock); return last_cpu; } -int tegra_cpu_do_idle(void) -{ - return cpu_do_idle(); -} - static int tegra_sleep_cpu(unsigned long v2p) { /* diff --git a/arch/arm/mach-tegra/pm.h b/arch/arm/mach-tegra/pm.h index 9a790f00237f..b9cc12222bb1 100644 --- a/arch/arm/mach-tegra/pm.h +++ b/arch/arm/mach-tegra/pm.h @@ -25,7 +25,6 @@ void tegra30_sleep_core_init(void); void tegra_clear_cpu_in_lp2(void); bool tegra_set_cpu_in_lp2(void); -int tegra_cpu_do_idle(void); void tegra_idle_lp2_last(void); extern void (*tegra_tear_down_cpu)(void); diff --git a/arch/arm/mach-tegra/reset-handler.S b/arch/arm/mach-tegra/reset-handler.S index e3f34815c9da..53123ae4ac3b 100644 --- a/arch/arm/mach-tegra/reset-handler.S +++ b/arch/arm/mach-tegra/reset-handler.S @@ -183,17 +183,6 @@ after_errata: bleq __die @ CPU not present (to OS) #endif -#ifdef CONFIG_ARCH_TEGRA_2x_SOC - /* Are we on Tegra20? */ - cmp r6, #TEGRA20 - bne 1f - /* If not CPU0, don't let CPU0 reset CPU1 now that CPU1 is coming up. */ - mov r0, #CPU_NOT_RESETTABLE - cmp r10, #0 - strbne r0, [r12, #RESET_DATA(RESETTABLE_STATUS)] -1: -#endif - /* Waking up from LP1? */ ldr r8, [r12, #RESET_DATA(MASK_LP1)] tst r8, r11 @ if in_lp1 diff --git a/arch/arm/mach-tegra/reset.h b/arch/arm/mach-tegra/reset.h index a4cfc08159f6..51265592cb1a 100644 --- a/arch/arm/mach-tegra/reset.h +++ b/arch/arm/mach-tegra/reset.h @@ -16,9 +16,8 @@ #define TEGRA_RESET_STARTUP_SECONDARY 3 #define TEGRA_RESET_STARTUP_LP2 4 #define TEGRA_RESET_STARTUP_LP1 5 -#define TEGRA_RESET_RESETTABLE_STATUS 6 -#define TEGRA_RESET_TF_PRESENT 7 -#define TEGRA_RESET_DATA_SIZE 8 +#define TEGRA_RESET_TF_PRESENT 6 +#define TEGRA_RESET_DATA_SIZE 7 #define RESET_DATA(x) ((TEGRA_RESET_##x)*4) @@ -42,10 +41,6 @@ void __tegra_cpu_reset_handler_end(void); (IO_ADDRESS(TEGRA_IRAM_BASE + TEGRA_IRAM_RESET_HANDLER_OFFSET + \ ((u32)&__tegra_cpu_reset_handler_data[TEGRA_RESET_MASK_LP2] - \ (u32)__tegra_cpu_reset_handler_start))) -#define tegra20_cpu1_resettable_status \ - (IO_ADDRESS(TEGRA_IRAM_BASE + TEGRA_IRAM_RESET_HANDLER_OFFSET + \ - ((u32)&__tegra_cpu_reset_handler_data[TEGRA_RESET_RESETTABLE_STATUS] - \ - (u32)__tegra_cpu_reset_handler_start))) #endif #define tegra_cpu_reset_handler_offset \ diff --git a/arch/arm/mach-tegra/sleep-tegra20.S b/arch/arm/mach-tegra/sleep-tegra20.S index 9a89f30d53ca..0e00ba8cf646 100644 --- a/arch/arm/mach-tegra/sleep-tegra20.S +++ b/arch/arm/mach-tegra/sleep-tegra20.S @@ -43,9 +43,6 @@ #define APB_MISC_XM2CFGCPADCTRL2 0x8e4 #define APB_MISC_XM2CFGDPADCTRL2 0x8e8 -#define __tegra20_cpu1_resettable_status_offset \ - (__tegra_cpu_reset_handler_data_offset + RESET_DATA(RESETTABLE_STATUS)) - .macro pll_enable, rd, r_car_base, pll_base ldr \rd, [\r_car_base, #\pll_base] tst \rd, #(1 << 30) @@ -90,10 +87,6 @@ ENDPROC(tegra20_hotplug_shutdown) ENTRY(tegra20_cpu_shutdown) cmp r0, #0 reteq lr @ must not be called for CPU 0 - mov32 r1, TEGRA_IRAM_RESET_BASE_VIRT - ldr r2, =__tegra20_cpu1_resettable_status_offset - mov r12, #CPU_RESETTABLE - strb r12, [r1, r2] cpu_to_halt_reg r1, r0 ldr r3, =TEGRA_FLOW_CTRL_VIRT @@ -116,107 +109,6 @@ ENDPROC(tegra20_cpu_shutdown) #endif #ifdef CONFIG_PM_SLEEP -/* - * tegra_pen_lock - * - * spinlock implementation with no atomic test-and-set and no coherence - * using Peterson's algorithm on strongly-ordered registers - * used to synchronize a cpu waking up from wfi with entering lp2 on idle - * - * The reference link of Peterson's algorithm: - * http://en.wikipedia.org/wiki/Peterson's_algorithm - * - * SCRATCH37 = r1 = !turn (inverted from Peterson's algorithm) - * on cpu 0: - * r2 = flag[0] (in SCRATCH38) - * r3 = flag[1] (in SCRATCH39) - * on cpu1: - * r2 = flag[1] (in SCRATCH39) - * r3 = flag[0] (in SCRATCH38) - * - * must be called with MMU on - * corrupts r0-r3, r12 - */ -ENTRY(tegra_pen_lock) - mov32 r3, TEGRA_PMC_VIRT - cpu_id r0 - add r1, r3, #PMC_SCRATCH37 - cmp r0, #0 - addeq r2, r3, #PMC_SCRATCH38 - addeq r3, r3, #PMC_SCRATCH39 - addne r2, r3, #PMC_SCRATCH39 - addne r3, r3, #PMC_SCRATCH38 - - mov r12, #1 - str r12, [r2] @ flag[cpu] = 1 - dsb - str r12, [r1] @ !turn = cpu -1: dsb - ldr r12, [r3] - cmp r12, #1 @ flag[!cpu] == 1? - ldreq r12, [r1] - cmpeq r12, r0 @ !turn == cpu? - beq 1b @ while !turn == cpu && flag[!cpu] == 1 - - ret lr @ locked -ENDPROC(tegra_pen_lock) - -ENTRY(tegra_pen_unlock) - dsb - mov32 r3, TEGRA_PMC_VIRT - cpu_id r0 - cmp r0, #0 - addeq r2, r3, #PMC_SCRATCH38 - addne r2, r3, #PMC_SCRATCH39 - mov r12, #0 - str r12, [r2] - ret lr -ENDPROC(tegra_pen_unlock) - -/* - * tegra20_cpu_clear_resettable(void) - * - * Called to clear the "resettable soon" flag in IRAM variable when - * it is expected that the secondary CPU will be idle soon. - */ -ENTRY(tegra20_cpu_clear_resettable) - mov32 r1, TEGRA_IRAM_RESET_BASE_VIRT - ldr r2, =__tegra20_cpu1_resettable_status_offset - mov r12, #CPU_NOT_RESETTABLE - strb r12, [r1, r2] - ret lr -ENDPROC(tegra20_cpu_clear_resettable) - -/* - * tegra20_cpu_set_resettable_soon(void) - * - * Called to set the "resettable soon" flag in IRAM variable when - * it is expected that the secondary CPU will be idle soon. - */ -ENTRY(tegra20_cpu_set_resettable_soon) - mov32 r1, TEGRA_IRAM_RESET_BASE_VIRT - ldr r2, =__tegra20_cpu1_resettable_status_offset - mov r12, #CPU_RESETTABLE_SOON - strb r12, [r1, r2] - ret lr -ENDPROC(tegra20_cpu_set_resettable_soon) - -/* - * tegra20_cpu_is_resettable_soon(void) - * - * Returns true if the "resettable soon" flag in IRAM variable has been - * set because it is expected that the secondary CPU will be idle soon. - */ -ENTRY(tegra20_cpu_is_resettable_soon) - mov32 r1, TEGRA_IRAM_RESET_BASE_VIRT - ldr r2, =__tegra20_cpu1_resettable_status_offset - ldrb r12, [r1, r2] - cmp r12, #CPU_RESETTABLE_SOON - moveq r0, #1 - movne r0, #0 - ret lr -ENDPROC(tegra20_cpu_is_resettable_soon) - /* * tegra20_sleep_core_finish(unsigned long v2p) * @@ -242,68 +134,6 @@ ENTRY(tegra20_sleep_core_finish) ret r3 ENDPROC(tegra20_sleep_core_finish) -/* - * tegra20_sleep_cpu_secondary_finish(unsigned long v2p) - * - * Enters WFI on secondary CPU by exiting coherency. - */ -ENTRY(tegra20_sleep_cpu_secondary_finish) - stmfd sp!, {r4-r11, lr} - - mrc p15, 0, r11, c1, c0, 1 @ save actlr before exiting coherency - - /* Flush and disable the L1 data cache */ - mov r0, #TEGRA_FLUSH_CACHE_LOUIS - bl tegra_disable_clean_inv_dcache - - mov32 r0, TEGRA_IRAM_RESET_BASE_VIRT - ldr r4, =__tegra20_cpu1_resettable_status_offset - mov r3, #CPU_RESETTABLE - strb r3, [r0, r4] - - bl tegra_cpu_do_idle - - /* - * cpu may be reset while in wfi, which will return through - * tegra_resume to cpu_resume - * or interrupt may wake wfi, which will return here - * cpu state is unchanged - MMU is on, cache is on, coherency - * is off, and the data cache is off - * - * r11 contains the original actlr - */ - - bl tegra_pen_lock - - mov32 r0, TEGRA_IRAM_RESET_BASE_VIRT - ldr r4, =__tegra20_cpu1_resettable_status_offset - mov r3, #CPU_NOT_RESETTABLE - strb r3, [r0, r4] - - bl tegra_pen_unlock - - /* Re-enable the data cache */ - mrc p15, 0, r10, c1, c0, 0 - orr r10, r10, #CR_C - mcr p15, 0, r10, c1, c0, 0 - isb - - mcr p15, 0, r11, c1, c0, 1 @ reenable coherency - - /* Invalidate the TLBs & BTAC */ - mov r1, #0 - mcr p15, 0, r1, c8, c3, 0 @ invalidate shared TLBs - mcr p15, 0, r1, c7, c1, 6 @ invalidate shared BTAC - dsb - isb - - /* the cpu was running with coherency disabled, - * caches may be out of date */ - bl v7_flush_kern_cache_louis - - ldmfd sp!, {r4 - r11, pc} -ENDPROC(tegra20_sleep_cpu_secondary_finish) - /* * tegra20_tear_down_cpu * diff --git a/arch/arm/mach-tegra/sleep.h b/arch/arm/mach-tegra/sleep.h index 63e2205cbc82..4978def9db46 100644 --- a/arch/arm/mach-tegra/sleep.h +++ b/arch/arm/mach-tegra/sleep.h @@ -114,8 +114,6 @@ .endm #else -void tegra_pen_lock(void); -void tegra_pen_unlock(void); void tegra_resume(void); int tegra_sleep_cpu_finish(unsigned long); void tegra_disable_clean_inv_dcache(u32 flag); @@ -123,16 +121,6 @@ void tegra_disable_clean_inv_dcache(u32 flag); void tegra20_hotplug_shutdown(void); void tegra30_hotplug_shutdown(void); -void tegra20_cpu_shutdown(int cpu); -int tegra20_cpu_is_resettable_soon(void); -void tegra20_cpu_clear_resettable(void); -#ifdef CONFIG_ARCH_TEGRA_2x_SOC -void tegra20_cpu_set_resettable_soon(void); -#else -static inline void tegra20_cpu_set_resettable_soon(void) {} -#endif - -int tegra20_sleep_cpu_secondary_finish(unsigned long); void tegra20_tear_down_cpu(void); int tegra30_sleep_cpu_secondary_finish(unsigned long); void tegra30_tear_down_cpu(void); From patchwork Mon Feb 24 22:40:44 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 1243650 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=I5uPYDpp; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 48RHBt5KMfz9sRJ for ; Tue, 25 Feb 2020 09:42:46 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728328AbgBXWmp (ORCPT ); Mon, 24 Feb 2020 17:42:45 -0500 Received: from mail-lj1-f195.google.com ([209.85.208.195]:40590 "EHLO mail-lj1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727670AbgBXWml (ORCPT ); Mon, 24 Feb 2020 17:42:41 -0500 Received: by mail-lj1-f195.google.com with SMTP id n18so11912169ljo.7; Mon, 24 Feb 2020 14:42:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=fzb7X22illlIkju4bJ0sIfeS5WftdhpmfPjs+AMAHow=; b=I5uPYDppjA9/zyA3J3PL3y/rsEiL2v1Sdb3iScd6Y7bzMifw29aYoUYRLSjIa94ifC EtOIvw61OfUCRLFuyh30Ga2G68OfR19HhYfkjyl36GjzB/f28DUkFV6lem1HEpSfuNH2 A10TCHEw/yZwYlsb/pnza7u7oBcKgXpx3vRB0PtY2pXIoiUSRIwGQAWBHe4kvdg+mcOg NOVCSe9c0sqk5kwdOhIgumdSs1B7rmaPambx9XZZ6n4/FLclXfbeoD/bCP9hLzdix6E8 hzVid6SDQba66V1PEQZjRYNNNI08Wbh5muo1azq9mHTu6Co+0aeBNVbOp615qAs6tHub XPuA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=fzb7X22illlIkju4bJ0sIfeS5WftdhpmfPjs+AMAHow=; b=VKNTMQU2segN3Fhzum02KHfPHpExRoGO4ehD5c/UUOy5ofcfK5nlVccsiFKU5RNwX/ gZY97qUrXuKpyTdpyZOmrZzdwmSaR1Yzqo4Db9GJRYuwuMCml+no2MaApj5bIuD+fU3Z dts1ex+tpz9sa+5eJALj8hh6BNIaApg2IUcevOd3eF9Qt3O+TVYc1pVAF0ijsjdzuq0i gpFBmHKHl0xXPzJ2EtWKqe/XR7TCnlUidaHjprXe4YTSdu6pT8/VAkRqNt+u12gjLt6E 3xdtCNPCddVWOtAl1w319f7u4Rgq06D/A6MMbyPGIevrR1bAB/7LXkDEVKrKdSch57XI +8CQ== X-Gm-Message-State: APjAAAWCgd7mc6krEA360Bo9pNBLj8pF7sUMmPsR2vrJVC7t6eG3ymPN c6ufnBlWluoxOSF0QgEKyaU= X-Google-Smtp-Source: APXvYqz00pGKlK71RLFRjPhRaguvsSX05mJG5vChPsrF3TYAU6uQj297KcuJSYpgapmCeICOnXWYdw== X-Received: by 2002:a2e:9587:: with SMTP id w7mr31341311ljh.42.1582584158316; Mon, 24 Feb 2020 14:42:38 -0800 (PST) Received: from localhost.localdomain (79-139-233-37.dynamic.spd-mgts.ru. [79.139.233.37]) by smtp.gmail.com with ESMTPSA id j7sm6264833lfh.25.2020.02.24.14.42.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 24 Feb 2020 14:42:37 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano , =?utf-8?q?Micha=C5=82_Miro?= =?utf-8?b?c8WCYXc=?= , Jasper Korten , David Heidelberg , Peter Geis , Nicolas Chauvet Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v11 04/17] ARM: tegra: Change tegra_set_cpu_in_lp2() type to void Date: Tue, 25 Feb 2020 01:40:44 +0300 Message-Id: <20200224224057.21877-5-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20200224224057.21877-1-digetx@gmail.com> References: <20200224224057.21877-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org The Tegra30 CPUIDLE driver has intention to check whether primary CPU was the last CPU that entered LP2 (CC6) idle-state, but that functionality never got utilized because driver never supported the CC6 state for the case where any secondary CPU is online. The new cpuidle driver will properly support CC6 on Tegra30, including the case where secondary CPUs are online, and that knowledge about what CPUs entered into CC6 won't be needed at all because new driver will use different approach by making use of the coupled idle-state and explicitly parking secondary CPUs before entering into CC6. Thus this patch is just a minor cleanup change. Acked-by: Peter De Schrijver Tested-by: Peter Geis Tested-by: Jasper Korten Tested-by: David Heidelberg Tested-by: Nicolas Chauvet Acked-by: Daniel Lezcano Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/cpuidle-tegra30.c | 14 ++++---------- arch/arm/mach-tegra/pm.c | 8 +------- arch/arm/mach-tegra/pm.h | 2 +- 3 files changed, 6 insertions(+), 18 deletions(-) diff --git a/arch/arm/mach-tegra/cpuidle-tegra30.c b/arch/arm/mach-tegra/cpuidle-tegra30.c index c6128526877d..a3ce8dabfe18 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra30.c +++ b/arch/arm/mach-tegra/cpuidle-tegra30.c @@ -98,22 +98,16 @@ static int tegra30_idle_lp2(struct cpuidle_device *dev, int index) { bool entered_lp2 = false; - bool last_cpu; local_fiq_disable(); - last_cpu = tegra_set_cpu_in_lp2(); + tegra_set_cpu_in_lp2(); cpu_pm_enter(); - if (dev->cpu == 0) { - if (last_cpu) - entered_lp2 = tegra30_cpu_cluster_power_down(dev, drv, - index); - else - cpu_do_idle(); - } else { + if (dev->cpu == 0) + entered_lp2 = tegra30_cpu_cluster_power_down(dev, drv, index); + else entered_lp2 = tegra30_cpu_core_power_down(dev, drv, index); - } cpu_pm_exit(); tegra_clear_cpu_in_lp2(); diff --git a/arch/arm/mach-tegra/pm.c b/arch/arm/mach-tegra/pm.c index 1ff499068bb1..a72f9a2d3cb7 100644 --- a/arch/arm/mach-tegra/pm.c +++ b/arch/arm/mach-tegra/pm.c @@ -123,11 +123,9 @@ void tegra_clear_cpu_in_lp2(void) spin_unlock(&tegra_lp2_lock); } -bool tegra_set_cpu_in_lp2(void) +void tegra_set_cpu_in_lp2(void) { int phy_cpu_id = cpu_logical_map(smp_processor_id()); - bool last_cpu = false; - cpumask_t *cpu_lp2_mask = tegra_cpu_lp2_mask; u32 *cpu_in_lp2 = tegra_cpu_lp2_mask; spin_lock(&tegra_lp2_lock); @@ -135,11 +133,7 @@ bool tegra_set_cpu_in_lp2(void) BUG_ON((*cpu_in_lp2 & BIT(phy_cpu_id))); *cpu_in_lp2 |= BIT(phy_cpu_id); - if ((phy_cpu_id == 0) && cpumask_equal(cpu_lp2_mask, cpu_online_mask)) - last_cpu = true; - spin_unlock(&tegra_lp2_lock); - return last_cpu; } static int tegra_sleep_cpu(unsigned long v2p) diff --git a/arch/arm/mach-tegra/pm.h b/arch/arm/mach-tegra/pm.h index b9cc12222bb1..2c294f6365c0 100644 --- a/arch/arm/mach-tegra/pm.h +++ b/arch/arm/mach-tegra/pm.h @@ -24,7 +24,7 @@ void tegra30_lp1_iram_hook(void); void tegra30_sleep_core_init(void); void tegra_clear_cpu_in_lp2(void); -bool tegra_set_cpu_in_lp2(void); +void tegra_set_cpu_in_lp2(void); void tegra_idle_lp2_last(void); extern void (*tegra_tear_down_cpu)(void); From patchwork Mon Feb 24 22:40:45 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 1243667 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=VTWpPhMP; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 48RHCl1r2Cz9sRs for ; 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[79.139.233.37]) by smtp.gmail.com with ESMTPSA id j7sm6264833lfh.25.2020.02.24.14.42.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 24 Feb 2020 14:42:38 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano , =?utf-8?q?Micha=C5=82_Miro?= =?utf-8?b?c8WCYXc=?= , Jasper Korten , David Heidelberg , Peter Geis , Nicolas Chauvet Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v11 05/17] ARM: tegra: Propagate error from tegra_idle_lp2_last() Date: Tue, 25 Feb 2020 01:40:45 +0300 Message-Id: <20200224224057.21877-6-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20200224224057.21877-1-digetx@gmail.com> References: <20200224224057.21877-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Technically cpu_suspend() may fail and it's never good to lose information about failure. For example things like cpuidle core could correctly sample idling time in the case of failure. Acked-by: Peter De Schrijver Tested-by: Peter Geis Tested-by: Jasper Korten Tested-by: David Heidelberg Tested-by: Nicolas Chauvet Acked-by: Daniel Lezcano Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/cpuidle-tegra20.c | 6 ++++-- arch/arm/mach-tegra/cpuidle-tegra30.c | 4 +--- arch/arm/mach-tegra/pm.c | 8 ++++++-- arch/arm/mach-tegra/pm.h | 2 +- 4 files changed, 12 insertions(+), 8 deletions(-) diff --git a/arch/arm/mach-tegra/cpuidle-tegra20.c b/arch/arm/mach-tegra/cpuidle-tegra20.c index 78c20025dcfe..b3087ece9421 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra20.c +++ b/arch/arm/mach-tegra/cpuidle-tegra20.c @@ -86,15 +86,17 @@ static bool tegra20_cpu_cluster_power_down(struct cpuidle_device *dev, struct cpuidle_driver *drv, int index) { + bool ret; + while (!tegra_cpu_rail_off_ready()) cpu_relax(); - tegra_idle_lp2_last(); + ret = !tegra_idle_lp2_last(); if (cpu_online(1)) tegra20_wake_cpu1_from_reset(); - return true; + return ret; } #ifdef CONFIG_SMP diff --git a/arch/arm/mach-tegra/cpuidle-tegra30.c b/arch/arm/mach-tegra/cpuidle-tegra30.c index a3ce8dabfe18..17cbd118abee 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra30.c +++ b/arch/arm/mach-tegra/cpuidle-tegra30.c @@ -68,9 +68,7 @@ static bool tegra30_cpu_cluster_power_down(struct cpuidle_device *dev, return false; } - tegra_idle_lp2_last(); - - return true; + return !tegra_idle_lp2_last(); } #ifdef CONFIG_SMP diff --git a/arch/arm/mach-tegra/pm.c b/arch/arm/mach-tegra/pm.c index a72f9a2d3cb7..a094acaca307 100644 --- a/arch/arm/mach-tegra/pm.c +++ b/arch/arm/mach-tegra/pm.c @@ -189,14 +189,16 @@ static void tegra_pm_set(enum tegra_suspend_mode mode) tegra_pmc_enter_suspend_mode(mode); } -void tegra_idle_lp2_last(void) +int tegra_idle_lp2_last(void) { + int err; + tegra_pm_set(TEGRA_SUSPEND_LP2); cpu_cluster_pm_enter(); suspend_cpu_complex(); - cpu_suspend(PHYS_OFFSET - PAGE_OFFSET, &tegra_sleep_cpu); + err = cpu_suspend(PHYS_OFFSET - PAGE_OFFSET, &tegra_sleep_cpu); /* * Resume L2 cache if it wasn't re-enabled early during resume, @@ -208,6 +210,8 @@ void tegra_idle_lp2_last(void) restore_cpu_complex(); cpu_cluster_pm_exit(); + + return err; } enum tegra_suspend_mode tegra_pm_validate_suspend_mode( diff --git a/arch/arm/mach-tegra/pm.h b/arch/arm/mach-tegra/pm.h index 2c294f6365c0..7d72f31dee77 100644 --- a/arch/arm/mach-tegra/pm.h +++ b/arch/arm/mach-tegra/pm.h @@ -25,7 +25,7 @@ void tegra30_sleep_core_init(void); void tegra_clear_cpu_in_lp2(void); void tegra_set_cpu_in_lp2(void); -void tegra_idle_lp2_last(void); +int tegra_idle_lp2_last(void); extern void (*tegra_tear_down_cpu)(void); #ifdef CONFIG_PM_SLEEP From patchwork Mon Feb 24 22:40:46 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 1243670 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=KArzp0kX; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 48RHDC1GbVz9sRG for ; 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[79.139.233.37]) by smtp.gmail.com with ESMTPSA id j7sm6264833lfh.25.2020.02.24.14.42.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 24 Feb 2020 14:42:40 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano , =?utf-8?q?Micha=C5=82_Miro?= =?utf-8?b?c8WCYXc=?= , Jasper Korten , David Heidelberg , Peter Geis , Nicolas Chauvet Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v11 06/17] ARM: tegra: Expose PM functions required for new cpuidle driver Date: Tue, 25 Feb 2020 01:40:46 +0300 Message-Id: <20200224224057.21877-7-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20200224224057.21877-1-digetx@gmail.com> References: <20200224224057.21877-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org The upcoming unified CPUIDLE driver will be added to the drivers/cpuidle/ directory and it will require all these exposed Tegra PM-core functions. Acked-by: Peter De Schrijver Tested-by: Peter Geis Tested-by: Jasper Korten Tested-by: David Heidelberg Tested-by: Nicolas Chauvet Acked-by: Daniel Lezcano Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/cpuidle-tegra114.c | 3 +- arch/arm/mach-tegra/cpuidle-tegra20.c | 2 +- arch/arm/mach-tegra/cpuidle-tegra30.c | 3 +- arch/arm/mach-tegra/irq.c | 3 +- arch/arm/mach-tegra/pm.h | 8 ----- arch/arm/mach-tegra/sleep.h | 1 - arch/arm/mach-tegra/tegra.c | 1 - .../mach-tegra => include/soc/tegra}/irq.h | 8 +++-- include/soc/tegra/pm.h | 31 +++++++++++++++++++ 9 files changed, 43 insertions(+), 17 deletions(-) rename {arch/arm/mach-tegra => include/soc/tegra}/irq.h (59%) diff --git a/arch/arm/mach-tegra/cpuidle-tegra114.c b/arch/arm/mach-tegra/cpuidle-tegra114.c index 5118f777fd66..2d8527837aeb 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra114.c +++ b/arch/arm/mach-tegra/cpuidle-tegra114.c @@ -12,13 +12,14 @@ #include +#include + #include #include #include #include #include "cpuidle.h" -#include "pm.h" #include "sleep.h" #ifdef CONFIG_PM_SLEEP diff --git a/arch/arm/mach-tegra/cpuidle-tegra20.c b/arch/arm/mach-tegra/cpuidle-tegra20.c index b3087ece9421..aa54a76dbaa2 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra20.c +++ b/arch/arm/mach-tegra/cpuidle-tegra20.c @@ -18,6 +18,7 @@ #include #include +#include #include #include @@ -26,7 +27,6 @@ #include "cpuidle.h" #include "iomap.h" #include "irq.h" -#include "pm.h" #include "reset.h" #include "sleep.h" diff --git a/arch/arm/mach-tegra/cpuidle-tegra30.c b/arch/arm/mach-tegra/cpuidle-tegra30.c index 17cbd118abee..3e91c29891f7 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra30.c +++ b/arch/arm/mach-tegra/cpuidle-tegra30.c @@ -17,12 +17,13 @@ #include #include +#include + #include #include #include #include "cpuidle.h" -#include "pm.h" #include "sleep.h" #ifdef CONFIG_PM_SLEEP diff --git a/arch/arm/mach-tegra/irq.c b/arch/arm/mach-tegra/irq.c index ace7a390b5fe..4e1ee70b2a3f 100644 --- a/arch/arm/mach-tegra/irq.c +++ b/arch/arm/mach-tegra/irq.c @@ -18,9 +18,10 @@ #include #include +#include + #include "board.h" #include "iomap.h" -#include "irq.h" #define SGI_MASK 0xFFFF diff --git a/arch/arm/mach-tegra/pm.h b/arch/arm/mach-tegra/pm.h index 7d72f31dee77..81525f5f4a44 100644 --- a/arch/arm/mach-tegra/pm.h +++ b/arch/arm/mach-tegra/pm.h @@ -23,20 +23,12 @@ void tegra20_sleep_core_init(void); void tegra30_lp1_iram_hook(void); void tegra30_sleep_core_init(void); -void tegra_clear_cpu_in_lp2(void); -void tegra_set_cpu_in_lp2(void); -int tegra_idle_lp2_last(void); extern void (*tegra_tear_down_cpu)(void); #ifdef CONFIG_PM_SLEEP void tegra_init_suspend(void); -int tegra_pm_park_secondary_cpu(unsigned long cpu); #else static inline void tegra_init_suspend(void) {} -static inline int tegra_pm_park_secondary_cpu(unsigned long cpu) -{ - return -ENOTSUPP; -} #endif #endif /* _MACH_TEGRA_PM_H_ */ diff --git a/arch/arm/mach-tegra/sleep.h b/arch/arm/mach-tegra/sleep.h index 4978def9db46..4718a3cb45a1 100644 --- a/arch/arm/mach-tegra/sleep.h +++ b/arch/arm/mach-tegra/sleep.h @@ -122,7 +122,6 @@ void tegra20_hotplug_shutdown(void); void tegra30_hotplug_shutdown(void); void tegra20_tear_down_cpu(void); -int tegra30_sleep_cpu_secondary_finish(unsigned long); void tegra30_tear_down_cpu(void); #endif diff --git a/arch/arm/mach-tegra/tegra.c b/arch/arm/mach-tegra/tegra.c index 1e3b85923ca3..79184a077c84 100644 --- a/arch/arm/mach-tegra/tegra.c +++ b/arch/arm/mach-tegra/tegra.c @@ -42,7 +42,6 @@ #include "common.h" #include "cpuidle.h" #include "iomap.h" -#include "irq.h" #include "pm.h" #include "reset.h" #include "sleep.h" diff --git a/arch/arm/mach-tegra/irq.h b/include/soc/tegra/irq.h similarity index 59% rename from arch/arm/mach-tegra/irq.h rename to include/soc/tegra/irq.h index 7a94cf121448..8eb11a7109e4 100644 --- a/arch/arm/mach-tegra/irq.h +++ b/include/soc/tegra/irq.h @@ -3,9 +3,11 @@ * Copyright (c) 2012, NVIDIA Corporation. All rights reserved. */ -#ifndef __TEGRA_IRQ_H -#define __TEGRA_IRQ_H +#ifndef __SOC_TEGRA_IRQ_H +#define __SOC_TEGRA_IRQ_H +#if defined(CONFIG_ARM) bool tegra_pending_sgi(void); - #endif + +#endif /* __SOC_TEGRA_IRQ_H */ diff --git a/include/soc/tegra/pm.h b/include/soc/tegra/pm.h index 951fcd738d55..1974e8405098 100644 --- a/include/soc/tegra/pm.h +++ b/include/soc/tegra/pm.h @@ -6,6 +6,8 @@ #ifndef __SOC_TEGRA_PM_H__ #define __SOC_TEGRA_PM_H__ +#include + enum tegra_suspend_mode { TEGRA_SUSPEND_NONE = 0, TEGRA_SUSPEND_LP2, /* CPU voltage off */ @@ -20,6 +22,12 @@ tegra_pm_validate_suspend_mode(enum tegra_suspend_mode mode); /* low-level resume entry point */ void tegra_resume(void); + +int tegra30_sleep_cpu_secondary_finish(unsigned long arg); +void tegra_clear_cpu_in_lp2(void); +void tegra_set_cpu_in_lp2(void); +int tegra_idle_lp2_last(void); +int tegra_pm_park_secondary_cpu(unsigned long cpu); #else static inline enum tegra_suspend_mode tegra_pm_validate_suspend_mode(enum tegra_suspend_mode mode) @@ -30,6 +38,29 @@ tegra_pm_validate_suspend_mode(enum tegra_suspend_mode mode) static inline void tegra_resume(void) { } + +static inline int tegra30_sleep_cpu_secondary_finish(unsigned long arg) +{ + return -ENOTSUPP; +} + +static inline void tegra_clear_cpu_in_lp2(void) +{ +} + +static inline void tegra_set_cpu_in_lp2(void) +{ +} + +static inline int tegra_idle_lp2_last(void) +{ + return -ENOTSUPP; +} + +static inline int tegra_pm_park_secondary_cpu(unsigned long cpu) +{ + return -ENOTSUPP; +} #endif /* CONFIG_PM_SLEEP */ #endif /* __SOC_TEGRA_PM_H__ */ From patchwork Mon Feb 24 22:40:47 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 1243672 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=u9qahEhu; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 48RHDD1Mt5z9sRl for ; Tue, 25 Feb 2020 09:43:56 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727520AbgBXWnf (ORCPT ); Mon, 24 Feb 2020 17:43:35 -0500 Received: from mail-lj1-f194.google.com ([209.85.208.194]:37351 "EHLO mail-lj1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728314AbgBXWmo (ORCPT ); Mon, 24 Feb 2020 17:42:44 -0500 Received: by mail-lj1-f194.google.com with SMTP id q23so11937862ljm.4; Mon, 24 Feb 2020 14:42:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=9WF2kj4FmDzbR0yv0Uxix1Kav9vk7hAtZjnTASK3L20=; b=u9qahEhuyzZK1qxWS3rrqcUpxI0x1J3vgCkStsFE6zDjpzCMzDIgTDq/8+wzzt4oGF koELwiTngAfQYjlcKNRivQMjNZ1jsJpB02SIv0xU2XzABWq18abPsxcDM8kgs2sGxgIP ZLlUp8WIVgNTgR2so8oF2awCiiA9/P71aXPms0Sct9HIzQXIJiq92qG+bIaj/i/sJf6v mgPyuL0KnkjbxSIjCrXx+W76wcIKfIwBKH12qxaPUh0iMjd1Mgsf6pphXZELo9GVywPQ mSbTAxiP/xJA2DjjG/nIxr7zPxknMVj8FsviKlRXry0qvUklFSSJYzKm0mGy1sk5bzoP BqpA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=9WF2kj4FmDzbR0yv0Uxix1Kav9vk7hAtZjnTASK3L20=; b=OQdjeMuQQ8lzW9mnVmmLBN0R5xs94V/6kFiKLQYZZQaStwKN2uzmxpBKhT5/KbDjRD QymKmWc4AmPc5FsuO+Lxm/IKRNiMmwI5AwCf/4TMJCI7X4XuryPwZM5BALOlS4Q6hOgE 8gjGEM6ZB7nGQx3hi7HdruUIgkRn1AE7WIUCDzsZ3Ho3A0yc4RewkgFOI+uYnJuMPX+Y aIt/b/mg++Y3jRoWwy3XYBlfksQ1Wl5qYqeIb1agkxbZYnNGD6hjkJNfd6jgr4lJB/jG sm174jInYt4SPB+JcaCdRe3vvUOZmckT8jV/an5UCRDBnbxKxCxdhfMpwjzI+jPHku6c U+gw== X-Gm-Message-State: APjAAAWd+B6Jht2ZiIkoK2ZwK6LLtzY9vwCkRZSfuN86BOlPJrPAh0lL OzAGd3NfQ1gZnc749PcWy0k= X-Google-Smtp-Source: APXvYqw/bcXHavyh7GIdz3heqJp1Ag+JuHk6XPZ6WjMY7fScGd8Wx6wU0ebLLVkvXqwoWxEVdlyoKA== X-Received: by 2002:a2e:9b5a:: with SMTP id o26mr31934749ljj.190.1582584161494; Mon, 24 Feb 2020 14:42:41 -0800 (PST) Received: from localhost.localdomain (79-139-233-37.dynamic.spd-mgts.ru. [79.139.233.37]) by smtp.gmail.com with ESMTPSA id j7sm6264833lfh.25.2020.02.24.14.42.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 24 Feb 2020 14:42:41 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano , =?utf-8?q?Micha=C5=82_Miro?= =?utf-8?b?c8WCYXc=?= , Jasper Korten , David Heidelberg , Peter Geis , Nicolas Chauvet Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v11 07/17] ARM: tegra: Rename some of the newly exposed PM functions Date: Tue, 25 Feb 2020 01:40:47 +0300 Message-Id: <20200224224057.21877-8-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20200224224057.21877-1-digetx@gmail.com> References: <20200224224057.21877-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Rename some of the recently exposed PM functions, prefixing them with "tegra_pm_" in order to make the naming of the PM functions consistent. Acked-by: Peter De Schrijver Tested-by: Peter Geis Tested-by: Jasper Korten Tested-by: David Heidelberg Tested-by: Nicolas Chauvet Acked-by: Daniel Lezcano Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/cpuidle-tegra114.c | 6 +++--- arch/arm/mach-tegra/cpuidle-tegra20.c | 6 +++--- arch/arm/mach-tegra/cpuidle-tegra30.c | 8 ++++---- arch/arm/mach-tegra/pm.c | 10 +++++----- arch/arm/mach-tegra/sleep-tegra30.S | 6 +++--- include/soc/tegra/pm.h | 16 ++++++++-------- 6 files changed, 26 insertions(+), 26 deletions(-) diff --git a/arch/arm/mach-tegra/cpuidle-tegra114.c b/arch/arm/mach-tegra/cpuidle-tegra114.c index 2d8527837aeb..858c30cc5dc7 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra114.c +++ b/arch/arm/mach-tegra/cpuidle-tegra114.c @@ -35,17 +35,17 @@ static int tegra114_idle_power_down(struct cpuidle_device *dev, { local_fiq_disable(); - tegra_set_cpu_in_lp2(); + tegra_pm_set_cpu_in_lp2(); cpu_pm_enter(); call_firmware_op(prepare_idle, TF_PM_MODE_LP2_NOFLUSH_L2); /* Do suspend by ourselves if the firmware does not implement it */ if (call_firmware_op(do_idle, 0) == -ENOSYS) - cpu_suspend(0, tegra30_sleep_cpu_secondary_finish); + cpu_suspend(0, tegra30_pm_secondary_cpu_suspend); cpu_pm_exit(); - tegra_clear_cpu_in_lp2(); + tegra_pm_clear_cpu_in_lp2(); local_fiq_enable(); diff --git a/arch/arm/mach-tegra/cpuidle-tegra20.c b/arch/arm/mach-tegra/cpuidle-tegra20.c index aa54a76dbaa2..a5b7d4e68f43 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra20.c +++ b/arch/arm/mach-tegra/cpuidle-tegra20.c @@ -91,7 +91,7 @@ static bool tegra20_cpu_cluster_power_down(struct cpuidle_device *dev, while (!tegra_cpu_rail_off_ready()) cpu_relax(); - ret = !tegra_idle_lp2_last(); + ret = !tegra_pm_enter_lp2(); if (cpu_online(1)) tegra20_wake_cpu1_from_reset(); @@ -136,7 +136,7 @@ static int tegra20_idle_lp2_coupled(struct cpuidle_device *dev, local_fiq_disable(); - tegra_set_cpu_in_lp2(); + tegra_pm_set_cpu_in_lp2(); cpu_pm_enter(); if (dev->cpu == 0) @@ -145,7 +145,7 @@ static int tegra20_idle_lp2_coupled(struct cpuidle_device *dev, entered_lp2 = tegra20_idle_enter_lp2_cpu_1(dev, drv, index); cpu_pm_exit(); - tegra_clear_cpu_in_lp2(); + tegra_pm_clear_cpu_in_lp2(); local_fiq_enable(); diff --git a/arch/arm/mach-tegra/cpuidle-tegra30.c b/arch/arm/mach-tegra/cpuidle-tegra30.c index 3e91c29891f7..a4f0add46a27 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra30.c +++ b/arch/arm/mach-tegra/cpuidle-tegra30.c @@ -69,7 +69,7 @@ static bool tegra30_cpu_cluster_power_down(struct cpuidle_device *dev, return false; } - return !tegra_idle_lp2_last(); + return !tegra_pm_enter_lp2(); } #ifdef CONFIG_SMP @@ -79,7 +79,7 @@ static bool tegra30_cpu_core_power_down(struct cpuidle_device *dev, { smp_wmb(); - cpu_suspend(0, tegra30_sleep_cpu_secondary_finish); + cpu_suspend(0, tegra30_pm_secondary_cpu_suspend); return true; } @@ -100,7 +100,7 @@ static int tegra30_idle_lp2(struct cpuidle_device *dev, local_fiq_disable(); - tegra_set_cpu_in_lp2(); + tegra_pm_set_cpu_in_lp2(); cpu_pm_enter(); if (dev->cpu == 0) @@ -109,7 +109,7 @@ static int tegra30_idle_lp2(struct cpuidle_device *dev, entered_lp2 = tegra30_cpu_core_power_down(dev, drv, index); cpu_pm_exit(); - tegra_clear_cpu_in_lp2(); + tegra_pm_clear_cpu_in_lp2(); local_fiq_enable(); diff --git a/arch/arm/mach-tegra/pm.c b/arch/arm/mach-tegra/pm.c index a094acaca307..7d9ef26e52a7 100644 --- a/arch/arm/mach-tegra/pm.c +++ b/arch/arm/mach-tegra/pm.c @@ -110,7 +110,7 @@ static void suspend_cpu_complex(void) flowctrl_cpu_suspend_enter(cpu); } -void tegra_clear_cpu_in_lp2(void) +void tegra_pm_clear_cpu_in_lp2(void) { int phy_cpu_id = cpu_logical_map(smp_processor_id()); u32 *cpu_in_lp2 = tegra_cpu_lp2_mask; @@ -123,7 +123,7 @@ void tegra_clear_cpu_in_lp2(void) spin_unlock(&tegra_lp2_lock); } -void tegra_set_cpu_in_lp2(void) +void tegra_pm_set_cpu_in_lp2(void) { int phy_cpu_id = cpu_logical_map(smp_processor_id()); u32 *cpu_in_lp2 = tegra_cpu_lp2_mask; @@ -189,7 +189,7 @@ static void tegra_pm_set(enum tegra_suspend_mode mode) tegra_pmc_enter_suspend_mode(mode); } -int tegra_idle_lp2_last(void) +int tegra_pm_enter_lp2(void) { int err; @@ -356,7 +356,7 @@ static int tegra_suspend_enter(suspend_state_t state) tegra_suspend_enter_lp1(); break; case TEGRA_SUSPEND_LP2: - tegra_set_cpu_in_lp2(); + tegra_pm_set_cpu_in_lp2(); break; default: break; @@ -377,7 +377,7 @@ static int tegra_suspend_enter(suspend_state_t state) tegra_suspend_exit_lp1(); break; case TEGRA_SUSPEND_LP2: - tegra_clear_cpu_in_lp2(); + tegra_pm_clear_cpu_in_lp2(); break; default: break; diff --git a/arch/arm/mach-tegra/sleep-tegra30.S b/arch/arm/mach-tegra/sleep-tegra30.S index c3946dbd0240..2667bcdb5dc6 100644 --- a/arch/arm/mach-tegra/sleep-tegra30.S +++ b/arch/arm/mach-tegra/sleep-tegra30.S @@ -265,11 +265,11 @@ ENTRY(tegra30_sleep_core_finish) ENDPROC(tegra30_sleep_core_finish) /* - * tegra30_sleep_cpu_secondary_finish(unsigned long v2p) + * tegra30_pm_secondary_cpu_suspend(unsigned long unused_arg) * * Enters LP2 on secondary CPU by exiting coherency and powergating the CPU. */ -ENTRY(tegra30_sleep_cpu_secondary_finish) +ENTRY(tegra30_pm_secondary_cpu_suspend) mov r7, lr /* Flush and disable the L1 data cache */ @@ -281,7 +281,7 @@ ENTRY(tegra30_sleep_cpu_secondary_finish) bl tegra30_cpu_shutdown mov r0, #1 @ never return here ret r7 -ENDPROC(tegra30_sleep_cpu_secondary_finish) +ENDPROC(tegra30_pm_secondary_cpu_suspend) /* * tegra30_tear_down_cpu diff --git a/include/soc/tegra/pm.h b/include/soc/tegra/pm.h index 1974e8405098..08477d7bfab9 100644 --- a/include/soc/tegra/pm.h +++ b/include/soc/tegra/pm.h @@ -23,10 +23,10 @@ tegra_pm_validate_suspend_mode(enum tegra_suspend_mode mode); /* low-level resume entry point */ void tegra_resume(void); -int tegra30_sleep_cpu_secondary_finish(unsigned long arg); -void tegra_clear_cpu_in_lp2(void); -void tegra_set_cpu_in_lp2(void); -int tegra_idle_lp2_last(void); +int tegra30_pm_secondary_cpu_suspend(unsigned long arg); +void tegra_pm_clear_cpu_in_lp2(void); +void tegra_pm_set_cpu_in_lp2(void); +int tegra_pm_enter_lp2(void); int tegra_pm_park_secondary_cpu(unsigned long cpu); #else static inline enum tegra_suspend_mode @@ -39,20 +39,20 @@ static inline void tegra_resume(void) { } -static inline int tegra30_sleep_cpu_secondary_finish(unsigned long arg) +static inline int tegra30_pm_secondary_cpu_suspend(unsigned long arg) { return -ENOTSUPP; } -static inline void tegra_clear_cpu_in_lp2(void) +static inline void tegra_pm_clear_cpu_in_lp2(void) { } -static inline void tegra_set_cpu_in_lp2(void) +static inline void tegra_pm_set_cpu_in_lp2(void) { } -static inline int tegra_idle_lp2_last(void) +static inline int tegra_pm_enter_lp2(void) { return -ENOTSUPP; } From patchwork Mon Feb 24 22:40:48 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 1243671 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=aCyZG32W; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 48RHDC5CrQz9sRs for ; Tue, 25 Feb 2020 09:43:55 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728310AbgBXWnf (ORCPT ); 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[79.139.233.37]) by smtp.gmail.com with ESMTPSA id j7sm6264833lfh.25.2020.02.24.14.42.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 24 Feb 2020 14:42:42 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano , =?utf-8?q?Micha=C5=82_Miro?= =?utf-8?b?c8WCYXc=?= , Jasper Korten , David Heidelberg , Peter Geis , Nicolas Chauvet Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v11 08/17] ARM: tegra: Make outer_disable() open-coded Date: Tue, 25 Feb 2020 01:40:48 +0300 Message-Id: <20200224224057.21877-9-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20200224224057.21877-1-digetx@gmail.com> References: <20200224224057.21877-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org The outer_disable() of Tegra's suspend code is open-coded now since that helper produces spurious warning message about secondary CPUs being online when CPU enters into LP2 from cpuidle. The secondaries are actually halted by the cpuidle driver on entering into LP2 idle-state, but the online status is not touched by the cpuidle. This fixes a storm of warnings once LP2 idling state is enabled on Tegra30. The outer_disable() helper has sanity checks for interrupts and secondary CPUs being disabled and we are pretty confident about the interrupts state during of CPU idling / system suspend. The rail-off status check is added in this patch as equivalent for the "num_online_cpus() > 1". Acked-by: Peter De Schrijver Tested-by: Peter Geis Tested-by: Jasper Korten Tested-by: David Heidelberg Tested-by: Nicolas Chauvet Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/pm.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-tegra/pm.c b/arch/arm/mach-tegra/pm.c index 7d9ef26e52a7..d1e1a61b12cf 100644 --- a/arch/arm/mach-tegra/pm.c +++ b/arch/arm/mach-tegra/pm.c @@ -138,6 +138,10 @@ void tegra_pm_set_cpu_in_lp2(void) static int tegra_sleep_cpu(unsigned long v2p) { + if (tegra_cpu_car_ops->rail_off_ready && + WARN_ON(!tegra_cpu_rail_off_ready())) + return -EBUSY; + /* * L2 cache disabling using kernel API only allowed when all * secondary CPU's are offline. Cache have to be disabled with @@ -146,9 +150,10 @@ static int tegra_sleep_cpu(unsigned long v2p) * if any of secondary CPU's is online and this is the LP2-idle * code-path only for Tegra20/30. */ - if (trusted_foundations_registered()) - outer_disable(); - +#ifdef CONFIG_OUTER_CACHE + if (trusted_foundations_registered() && outer_cache.disable) + outer_cache.disable(); +#endif /* * Note that besides of setting up CPU reset vector this firmware * call may also do the following, depending on the FW version: From patchwork Mon Feb 24 22:40:49 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 1243668 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=ZUTA5Yia; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 48RHCq5s3Dz9sRL for ; Tue, 25 Feb 2020 09:43:35 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728020AbgBXWna (ORCPT ); Mon, 24 Feb 2020 17:43:30 -0500 Received: from mail-lf1-f68.google.com ([209.85.167.68]:37796 "EHLO mail-lf1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728252AbgBXWmq (ORCPT ); Mon, 24 Feb 2020 17:42:46 -0500 Received: by mail-lf1-f68.google.com with SMTP id b15so8066602lfc.4; Mon, 24 Feb 2020 14:42:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=nIyuKZWIZi/B5cTCqrl8qdcGjW5k6PQ+Dl+Q52lH0cU=; b=ZUTA5YiaSxFRz/5GiZEXH/fQSYJ4U2Jo6OWoRZPQJkXeYfdyL+r8Ew6o53y0NQ/ZGK Nz+Oyvehtg4/Uatv6UzpCjsz7TZmiRyNtQHwk0azTaot2laWe6Z4ztqHVwJmItabhN0f 2kRiH7Dh0vYafg103a+y2yIM+K8vLm8QBlHT/6BnTUiTK31R0NV1BxGc536JFrnVCNKD LiLaCCjoc0wiTyweav6Da70DvsXPsTXLqcR2TB/UvcO7Agrm9ktw5Ia9MIIV8aXmVJM/ Ie/Golg8SjWkvlqL2943fyg6f6GkhdHudpls1CCbWTbgUqZH3/Ni/I1Oy2A7CXkLBmFn N/5w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=nIyuKZWIZi/B5cTCqrl8qdcGjW5k6PQ+Dl+Q52lH0cU=; b=YYI5ipb71oAPHdabXG6GiLcPivsv9Quj+G/wN7cQtuFueYzQefNdmo8CDUCqir6FjI lk7HM7QQyO9inZm2OcTfnKkozwppcO+p+jgODo10x0gNab8QGZorSEFa6nyGuZE9qvWs BHAt6dJK4oKmhf1owCMH83ems4fye9HyWb/Sv4hceIEXRUb+76spQNfeck6+CHAKgKY1 Y5z0mkR0/Dt3NdzWBUqLJq6SfbM092hZeqCj6CZSOtvZgKz1KueHUNDkX63mcd0xlV0t ThDKD/BDZacM9VCjdK8lqrof+jRK0qp40W6nh87XQv99h7q3/3apqFT3OuuhTfJFw7mv 57Xg== X-Gm-Message-State: APjAAAWGv01mbc2QTROSSgK+t4L5g7F80GEox3EUJxe0zgwz495UvgRB 7FdJYDi1LkQ6MJ2p0okIpjM= X-Google-Smtp-Source: APXvYqxbRCCCBd7E8CLBaxTr5AOAUU2DoPJi/QOJmaBGNtS4agc/HYfYHKD6U70SRjhPTej+W9K7dQ== X-Received: by 2002:ac2:4467:: with SMTP id y7mr6150265lfl.167.1582584163658; Mon, 24 Feb 2020 14:42:43 -0800 (PST) Received: from localhost.localdomain (79-139-233-37.dynamic.spd-mgts.ru. [79.139.233.37]) by smtp.gmail.com with ESMTPSA id j7sm6264833lfh.25.2020.02.24.14.42.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 24 Feb 2020 14:42:43 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano , =?utf-8?q?Micha=C5=82_Miro?= =?utf-8?b?c8WCYXc=?= , Jasper Korten , David Heidelberg , Peter Geis , Nicolas Chauvet Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v11 09/17] arm: tegra20: cpuidle: Handle case where secondary CPU hangs on entering LP2 Date: Tue, 25 Feb 2020 01:40:49 +0300 Message-Id: <20200224224057.21877-10-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20200224224057.21877-1-digetx@gmail.com> References: <20200224224057.21877-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org It is possible that something may go wrong with the secondary CPU, in that case it is much nicer to get a dump of the flow-controller state before hanging machine. Acked-by: Peter De Schrijver Tested-by: Peter Geis Tested-by: Jasper Korten Tested-by: David Heidelberg Tested-by: Nicolas Chauvet Acked-by: Daniel Lezcano Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/cpuidle-tegra20.c | 51 +++++++++++++++++++++++++-- 1 file changed, 49 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-tegra/cpuidle-tegra20.c b/arch/arm/mach-tegra/cpuidle-tegra20.c index a5b7d4e68f43..40566da25c6c 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra20.c +++ b/arch/arm/mach-tegra/cpuidle-tegra20.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include @@ -82,14 +83,60 @@ static inline void tegra20_wake_cpu1_from_reset(void) } #endif +static void tegra20_report_cpus_state(void) +{ + unsigned long cpu, lcpu, csr; + + for_each_cpu(lcpu, cpu_possible_mask) { + cpu = cpu_logical_map(lcpu); + csr = flowctrl_read_cpu_csr(cpu); + + pr_err("cpu%lu: online=%d flowctrl_csr=0x%08lx\n", + cpu, cpu_online(lcpu), csr); + } +} + +static int tegra20_wait_for_secondary_cpu_parking(void) +{ + unsigned int retries = 3; + + while (retries--) { + unsigned int delay_us = 10; + unsigned int timeout_us = 500 * 1000 / delay_us; + + /* + * The primary CPU0 core shall wait for the secondaries + * shutdown in order to power-off CPU's cluster safely. + * The timeout value depends on the current CPU frequency, + * it takes about 40-150us in average and over 1000us in + * a worst case scenario. + */ + do { + if (tegra_cpu_rail_off_ready()) + return 0; + + udelay(delay_us); + + } while (timeout_us--); + + pr_err("secondary CPU taking too long to park\n"); + + tegra20_report_cpus_state(); + } + + pr_err("timed out waiting secondaries to park\n"); + + return -ETIMEDOUT; +} + static bool tegra20_cpu_cluster_power_down(struct cpuidle_device *dev, struct cpuidle_driver *drv, int index) { bool ret; - while (!tegra_cpu_rail_off_ready()) - cpu_relax(); + if (tegra20_wait_for_secondary_cpu_parking()) + return false; ret = !tegra_pm_enter_lp2(); From patchwork Mon Feb 24 22:40:50 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 1243651 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=O3JG2c9x; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 48RHBv65WBz9sRG for ; Tue, 25 Feb 2020 09:42:47 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728358AbgBXWmr (ORCPT ); Mon, 24 Feb 2020 17:42:47 -0500 Received: from mail-lj1-f194.google.com ([209.85.208.194]:40972 "EHLO mail-lj1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728340AbgBXWmq (ORCPT ); Mon, 24 Feb 2020 17:42:46 -0500 Received: by mail-lj1-f194.google.com with SMTP id h23so11914164ljc.8; Mon, 24 Feb 2020 14:42:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=rz2ISugkt7qveQ6HpbfJWAvvkJeXQ6y9RjeXhO+Pnyg=; b=O3JG2c9xM2ocaKkGzFJG3skCViMAqMJRq3IKFyHt+CR6iNLywRxq6LFVtUud/gj7YQ ZtM9Lvavxzp8mbE2vYmDE18bqHoRMa7m4qPv8m0o+LxEUfrp2EFBqTdz1Whn8MPJiSFg 12hok+UlvPItpfDaogmxy/s+Hw1DB39YDapiHcp+LFyzeG6HoBEtiL5TRA8flYWo7Wlm Imyi2xTVtlNoXUqQZBrDmI/xbSP2wFvdXQxYcGNd2AS+e+jVkncjTkllkyHyXSDTesyq CnniWdv0T00vdQqXlPj+rQcq1Ii10M+O7AKongCK0kLrZ4S3i0/wNYM3dbPSuXRQ5oom 7AQw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=rz2ISugkt7qveQ6HpbfJWAvvkJeXQ6y9RjeXhO+Pnyg=; b=ckALeDfcU93Xip43tWlaVzZDZ9VB4FJQaJyLEaBg0EZ1wEgqNMPPCCL3TbrnaHU569 dCsfYav4eqGMKQNN6uIytMJImHy2whBGmFk/5IHzfHVm+Qv/tegdzokXRE5r+J4pX4Ua m4PF215iJHXptP7XnM4iZB8tJug941/NBvv/jwtYq2B2EY0RWDdvyiUhwZEfF47Jkxps lM9jw5LCqxVspWxepjbaDSgpK6MnTeyHFXVNi9wQxoqY9dMHvko1q/yOUPkusYc+xzWa r+eMNgdbe3sFBVfIPT3UGgPwPUY/h2N5IezumbwA9Cj9WWZNvAEOSO4GxM2X0cWEr5kE w6XA== X-Gm-Message-State: APjAAAXyOFNOGCYdJ9OKYJD25VVpwmu0wPQ0FaiU1qs84hzggALQVDdi cACk1NQBP6VYp+qRp+gpcQk= X-Google-Smtp-Source: APXvYqyyxdVNN+cpXo0lxx6Ost1gzNW7pM+3kRKuGG1aWoUBEK2F1NAcsZDmiVxl70vODLXEP3yjKA== X-Received: by 2002:a05:651c:d4:: with SMTP id 20mr31018523ljr.269.1582584164716; Mon, 24 Feb 2020 14:42:44 -0800 (PST) Received: from localhost.localdomain (79-139-233-37.dynamic.spd-mgts.ru. [79.139.233.37]) by smtp.gmail.com with ESMTPSA id j7sm6264833lfh.25.2020.02.24.14.42.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 24 Feb 2020 14:42:44 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano , =?utf-8?q?Micha=C5=82_Miro?= =?utf-8?b?c8WCYXc=?= , Jasper Korten , David Heidelberg , Peter Geis , Nicolas Chauvet Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v11 10/17] arm: tegra20: cpuidle: Make abort_flag atomic Date: Tue, 25 Feb 2020 01:40:50 +0300 Message-Id: <20200224224057.21877-11-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20200224224057.21877-1-digetx@gmail.com> References: <20200224224057.21877-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Replace memory accessors with atomic API just to make code consistent with the abort_barrier. The new variant may be even more correct now since atomic_read() will prevent compiler from generating wrong things like carrying abort_flag value in a register instead of re-fetching it from memory. Acked-by: Peter De Schrijver Tested-by: Peter Geis Tested-by: Jasper Korten Tested-by: David Heidelberg Tested-by: Nicolas Chauvet Acked-by: Daniel Lezcano Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/cpuidle-tegra20.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-tegra/cpuidle-tegra20.c b/arch/arm/mach-tegra/cpuidle-tegra20.c index 40566da25c6c..8cdffdf7acd7 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra20.c +++ b/arch/arm/mach-tegra/cpuidle-tegra20.c @@ -32,7 +32,7 @@ #include "sleep.h" #ifdef CONFIG_PM_SLEEP -static bool abort_flag; +static atomic_t abort_flag; static atomic_t abort_barrier; static int tegra20_idle_lp2_coupled(struct cpuidle_device *dev, struct cpuidle_driver *drv, @@ -171,13 +171,14 @@ static int tegra20_idle_lp2_coupled(struct cpuidle_device *dev, bool entered_lp2 = false; if (tegra_pending_sgi()) - WRITE_ONCE(abort_flag, true); + atomic_set(&abort_flag, 1); cpuidle_coupled_parallel_barrier(dev, &abort_barrier); - if (abort_flag) { + if (atomic_read(&abort_flag)) { cpuidle_coupled_parallel_barrier(dev, &abort_barrier); - abort_flag = false; /* clean flag for next coming */ + /* clean flag for next coming */ + atomic_set(&abort_flag, 0); return -EINTR; } From patchwork Mon Feb 24 22:40:51 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 1243666 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=l0bwjGD5; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 48RHCg4r3Xz9sRJ for ; Tue, 25 Feb 2020 09:43:27 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728260AbgBXWnX (ORCPT ); Mon, 24 Feb 2020 17:43:23 -0500 Received: from mail-lf1-f65.google.com ([209.85.167.65]:46813 "EHLO mail-lf1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728347AbgBXWms (ORCPT ); Mon, 24 Feb 2020 17:42:48 -0500 Received: by mail-lf1-f65.google.com with SMTP id u2so5355700lfk.13; Mon, 24 Feb 2020 14:42:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=cRfDY6o3JLtgU0E8AhwXsc4tadD+Z274NBI7QDEmKc0=; b=l0bwjGD5lP1/kKdENiUvJpnEe46PGmODo54ldG8Nn/hn5AqZ0QZsaFHVGdFuw0W3ga dYKPi0HoCKLSZp8D37kDa+TeuSAWjMhrLSiQ8nhJ7NEIzdE/2PIcKou04mnPE18MYrTk iVUNcWGLpVcRaatDmYiWRW3oK8DPn/AYbH52fPAQtmShrgCfXoxlsUWXgGTbSybtG65y fnFkmOAsTv6uQ/mB317SKgrFKSqvnt7d3zwJv47YyU2eTp4u79coppYiagOZmoS9JJyp 8Yv6lB+Yo30rKD8UrZrjsGZqlwFN+QJoyyKSrIHjovh3GNnzW86SMRHvSKeYomOtEtCT KLnw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=cRfDY6o3JLtgU0E8AhwXsc4tadD+Z274NBI7QDEmKc0=; b=fK7PGnK4hernRuVGq57/wgv/N+y12kLRqcuoUw6T7Q9XyF2grLwXvESHfMY/MSKbLo hAAUv2oY3ZD1hjXTSRqRpCL9GtwJB5lJ3dDyImPJWhnn6xVRhvmvYxn2kk52F4bPj5Ds VO8cS407SB4i7lF5drl7/sdrbmtm5KHuoze7Kuj8dzDIHGUvv7ukjNYi4JfsSb9tPiLi MX04GdHeJ9a79499wHQ1ClWQBd3iBBr0KRuc3ky6MYy4/olMwhiegnInZ6QdwXATOYx5 r1D64HpAlv2GUdXiFxejiLSTpVU4SekJRayNROY72yhnbwcfzag3k2FjKJyd0vj426r+ YlrQ== X-Gm-Message-State: APjAAAW+ZymS4FCmYXHI3G66x1anwd7bAFLgRo0w2YUl7v1CULeRGu4W Utg4nqB2vzEMC3TLPfGYQPA= X-Google-Smtp-Source: APXvYqyiEo42FEGINsJwrlFM47li49pvziubmyXDSxiDbXkU50bgs4t6+l4qei0sFjfyNOhLuJoPrA== X-Received: by 2002:ac2:53b3:: with SMTP id j19mr15273156lfh.127.1582584165819; Mon, 24 Feb 2020 14:42:45 -0800 (PST) Received: from localhost.localdomain (79-139-233-37.dynamic.spd-mgts.ru. [79.139.233.37]) by smtp.gmail.com with ESMTPSA id j7sm6264833lfh.25.2020.02.24.14.42.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 24 Feb 2020 14:42:45 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano , =?utf-8?q?Micha=C5=82_Miro?= =?utf-8?b?c8WCYXc=?= , Jasper Korten , David Heidelberg , Peter Geis , Nicolas Chauvet Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v11 11/17] arm: tegra20/30: cpuidle: Remove unnecessary memory barrier Date: Tue, 25 Feb 2020 01:40:51 +0300 Message-Id: <20200224224057.21877-12-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20200224224057.21877-1-digetx@gmail.com> References: <20200224224057.21877-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org There is no good justification for smp_rmb() after returning from LP2 because there are no memory operations that require SMP synchronization. Thus remove the confusing barrier. Acked-by: Peter De Schrijver Tested-by: Peter Geis Tested-by: Jasper Korten Tested-by: David Heidelberg Tested-by: Nicolas Chauvet Acked-by: Daniel Lezcano Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/cpuidle-tegra20.c | 2 -- arch/arm/mach-tegra/cpuidle-tegra30.c | 2 -- 2 files changed, 4 deletions(-) diff --git a/arch/arm/mach-tegra/cpuidle-tegra20.c b/arch/arm/mach-tegra/cpuidle-tegra20.c index 8cdffdf7acd7..6db380515a6a 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra20.c +++ b/arch/arm/mach-tegra/cpuidle-tegra20.c @@ -197,8 +197,6 @@ static int tegra20_idle_lp2_coupled(struct cpuidle_device *dev, local_fiq_enable(); - smp_rmb(); - return entered_lp2 ? index : 0; } #endif diff --git a/arch/arm/mach-tegra/cpuidle-tegra30.c b/arch/arm/mach-tegra/cpuidle-tegra30.c index a4f0add46a27..80ae64bcdf50 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra30.c +++ b/arch/arm/mach-tegra/cpuidle-tegra30.c @@ -113,8 +113,6 @@ static int tegra30_idle_lp2(struct cpuidle_device *dev, local_fiq_enable(); - smp_rmb(); - return (entered_lp2) ? index : 0; } #endif From patchwork Mon Feb 24 22:40:52 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 1243653 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=tXPWaQmu; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 48RHC14HLJz9sRQ for ; Tue, 25 Feb 2020 09:42:53 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728415AbgBXWmw (ORCPT ); Mon, 24 Feb 2020 17:42:52 -0500 Received: from mail-lf1-f65.google.com ([209.85.167.65]:32903 "EHLO mail-lf1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728376AbgBXWmu (ORCPT ); Mon, 24 Feb 2020 17:42:50 -0500 Received: by mail-lf1-f65.google.com with SMTP id n25so8084445lfl.0; Mon, 24 Feb 2020 14:42:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=01ghVrklhYIUsqx5cXXknCb5ZZYZ6xdEke2dPVsxITE=; b=tXPWaQmunUys02Mw9zqU73rGUeG4o5vApMyApF2XLtIMceszFtcUMVbOtomudbcmzx 8hd7+MNdPN95L6u+ilbkjvCWFf7x1Yq1TBjxwMHoa/AOfB7CL+WKAe3328VxThDG7euu WCRG/m7ce+v0qztOSBohkeulPtSMczwGUqEpb7IjCvC2TStcV1AY1f1AKCAu/w4l3FNl wCxsvEA5W5w+7FchLOVz+XlhSXYsPKdnIWBTGd5ffgCFS+1yfDl2jeIbSpyniAFZ2XDK 1DWt7Ehq07Ems2FtbXATR16R1sB2CNs6VilH1Juw5juWkzL0MlCrbEk6/GOVFzbNLj+s whCA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=01ghVrklhYIUsqx5cXXknCb5ZZYZ6xdEke2dPVsxITE=; b=tgC+RfuQfo2DFIJpj3SuVrQ9t1DF3Sn1B4A0nbX3Io2Zga9IcvQRh67xqNOODYDqv6 mp5SgQ97hg+JZsSVGgeLUbtgPLB6V/Qo80ZIgQwT9V8m96+Bma+Nvb2binCxQsQRF3kI GwZtDGnJbEZ60dbjl5h/VGt9xjZ/VNtNIqyJeOsc3xcG5xIgXB68Cqxx+LHq3O897sUQ sQUfuoiMMCU/F+lYajxRHo2M0nNnxgLh4KsWOZUlSJ4WMuME97F0MsPox4XbApEx86yP DfqjK8HV3KC1MHa4PzY4wFIVlkaCE5TH83h9EaZymFNKux6sfZwdVKln0XCrNGXq0TEu C8dg== X-Gm-Message-State: APjAAAWeajLuZ/5GEYUta3tovio8m2ZYV9w/lJyaorORhK3uvGhquFOK KVSv+8fpkElR+YbxrRMn4rY= X-Google-Smtp-Source: APXvYqw/0LUvdJCodzTZ18hH9nBLzFAJJUw0rzTUFDYHmgZppu/TIwU9OTKqTppeSxjmB8g3Inpq7Q== X-Received: by 2002:ac2:4c10:: with SMTP id t16mr384444lfq.38.1582584166945; Mon, 24 Feb 2020 14:42:46 -0800 (PST) Received: from localhost.localdomain (79-139-233-37.dynamic.spd-mgts.ru. [79.139.233.37]) by smtp.gmail.com with ESMTPSA id j7sm6264833lfh.25.2020.02.24.14.42.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 24 Feb 2020 14:42:46 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano , =?utf-8?q?Micha=C5=82_Miro?= =?utf-8?b?c8WCYXc=?= , Jasper Korten , David Heidelberg , Peter Geis , Nicolas Chauvet Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v11 12/17] cpuidle: Refactor and move out NVIDIA Tegra20 driver into drivers/cpuidle Date: Tue, 25 Feb 2020 01:40:52 +0300 Message-Id: <20200224224057.21877-13-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20200224224057.21877-1-digetx@gmail.com> References: <20200224224057.21877-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org The driver's code is refactored in a way that will make it easy to support Tegra30/114/124 SoCs by this unified driver later on. The current functionality is equal to the old Tegra20 driver, only the code's structure changed a tad. This is also a proper platform driver now. Acked-by: Peter De Schrijver Signed-off-by: Dmitry Osipenko Acked-by: Daniel Lezcano --- arch/arm/mach-tegra/Makefile | 3 - arch/arm/mach-tegra/cpuidle-tegra20.c | 219 -------------------- arch/arm/mach-tegra/cpuidle.c | 14 +- arch/arm/mach-tegra/cpuidle.h | 4 - drivers/cpuidle/Kconfig.arm | 8 + drivers/cpuidle/Makefile | 1 + drivers/cpuidle/cpuidle-tegra.c | 280 ++++++++++++++++++++++++++ include/soc/tegra/cpuidle.h | 2 +- 8 files changed, 292 insertions(+), 239 deletions(-) delete mode 100644 arch/arm/mach-tegra/cpuidle-tegra20.c create mode 100644 drivers/cpuidle/cpuidle-tegra.c diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile index 965862608ff6..8425bb5608d5 100644 --- a/arch/arm/mach-tegra/Makefile +++ b/arch/arm/mach-tegra/Makefile @@ -12,9 +12,6 @@ obj-y += sleep-tegra20.o obj-y += sleep-tegra30.o obj-$(CONFIG_CPU_IDLE) += cpuidle.o obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += pm-tegra20.o -ifeq ($(CONFIG_CPU_IDLE),y) -obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += cpuidle-tegra20.o -endif obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += pm-tegra30.o ifeq ($(CONFIG_CPU_IDLE),y) obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += cpuidle-tegra30.o diff --git a/arch/arm/mach-tegra/cpuidle-tegra20.c b/arch/arm/mach-tegra/cpuidle-tegra20.c deleted file mode 100644 index 6db380515a6a..000000000000 --- a/arch/arm/mach-tegra/cpuidle-tegra20.c +++ /dev/null @@ -1,219 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * CPU idle driver for Tegra CPUs - * - * Copyright (c) 2010-2012, NVIDIA Corporation. - * Copyright (c) 2011 Google, Inc. - * Author: Colin Cross - * Gary King - * - * Rework for 3.3 by Peter De Schrijver - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include - -#include "cpuidle.h" -#include "iomap.h" -#include "irq.h" -#include "reset.h" -#include "sleep.h" - -#ifdef CONFIG_PM_SLEEP -static atomic_t abort_flag; -static atomic_t abort_barrier; -static int tegra20_idle_lp2_coupled(struct cpuidle_device *dev, - struct cpuidle_driver *drv, - int index); -#define TEGRA20_MAX_STATES 2 -#else -#define TEGRA20_MAX_STATES 1 -#endif - -static struct cpuidle_driver tegra_idle_driver = { - .name = "tegra_idle", - .owner = THIS_MODULE, - .states = { - ARM_CPUIDLE_WFI_STATE_PWR(600), -#ifdef CONFIG_PM_SLEEP - { - .enter = tegra20_idle_lp2_coupled, - .exit_latency = 5000, - .target_residency = 10000, - .power_usage = 0, - .flags = CPUIDLE_FLAG_COUPLED | - CPUIDLE_FLAG_TIMER_STOP, - .name = "powered-down", - .desc = "CPU power gated", - }, -#endif - }, - .state_count = TEGRA20_MAX_STATES, - .safe_state_index = 0, -}; - -#ifdef CONFIG_PM_SLEEP -#ifdef CONFIG_SMP -static void tegra20_wake_cpu1_from_reset(void) -{ - /* enable cpu clock on cpu */ - tegra_enable_cpu_clock(1); - - /* take the CPU out of reset */ - tegra_cpu_out_of_reset(1); - - /* unhalt the cpu */ - flowctrl_write_cpu_halt(1, 0); -} -#else -static inline void tegra20_wake_cpu1_from_reset(void) -{ -} -#endif - -static void tegra20_report_cpus_state(void) -{ - unsigned long cpu, lcpu, csr; - - for_each_cpu(lcpu, cpu_possible_mask) { - cpu = cpu_logical_map(lcpu); - csr = flowctrl_read_cpu_csr(cpu); - - pr_err("cpu%lu: online=%d flowctrl_csr=0x%08lx\n", - cpu, cpu_online(lcpu), csr); - } -} - -static int tegra20_wait_for_secondary_cpu_parking(void) -{ - unsigned int retries = 3; - - while (retries--) { - unsigned int delay_us = 10; - unsigned int timeout_us = 500 * 1000 / delay_us; - - /* - * The primary CPU0 core shall wait for the secondaries - * shutdown in order to power-off CPU's cluster safely. - * The timeout value depends on the current CPU frequency, - * it takes about 40-150us in average and over 1000us in - * a worst case scenario. - */ - do { - if (tegra_cpu_rail_off_ready()) - return 0; - - udelay(delay_us); - - } while (timeout_us--); - - pr_err("secondary CPU taking too long to park\n"); - - tegra20_report_cpus_state(); - } - - pr_err("timed out waiting secondaries to park\n"); - - return -ETIMEDOUT; -} - -static bool tegra20_cpu_cluster_power_down(struct cpuidle_device *dev, - struct cpuidle_driver *drv, - int index) -{ - bool ret; - - if (tegra20_wait_for_secondary_cpu_parking()) - return false; - - ret = !tegra_pm_enter_lp2(); - - if (cpu_online(1)) - tegra20_wake_cpu1_from_reset(); - - return ret; -} - -#ifdef CONFIG_SMP -static bool tegra20_idle_enter_lp2_cpu_1(struct cpuidle_device *dev, - struct cpuidle_driver *drv, - int index) -{ - cpu_suspend(dev->cpu, tegra_pm_park_secondary_cpu); - - return true; -} -#else -static inline bool tegra20_idle_enter_lp2_cpu_1(struct cpuidle_device *dev, - struct cpuidle_driver *drv, - int index) -{ - return true; -} -#endif - -static int tegra20_idle_lp2_coupled(struct cpuidle_device *dev, - struct cpuidle_driver *drv, - int index) -{ - bool entered_lp2 = false; - - if (tegra_pending_sgi()) - atomic_set(&abort_flag, 1); - - cpuidle_coupled_parallel_barrier(dev, &abort_barrier); - - if (atomic_read(&abort_flag)) { - cpuidle_coupled_parallel_barrier(dev, &abort_barrier); - /* clean flag for next coming */ - atomic_set(&abort_flag, 0); - return -EINTR; - } - - local_fiq_disable(); - - tegra_pm_set_cpu_in_lp2(); - cpu_pm_enter(); - - if (dev->cpu == 0) - entered_lp2 = tegra20_cpu_cluster_power_down(dev, drv, index); - else - entered_lp2 = tegra20_idle_enter_lp2_cpu_1(dev, drv, index); - - cpu_pm_exit(); - tegra_pm_clear_cpu_in_lp2(); - - local_fiq_enable(); - - return entered_lp2 ? index : 0; -} -#endif - -/* - * Tegra20 HW appears to have a bug such that PCIe device interrupts, whether - * they are legacy IRQs or MSI, are lost when LP2 is enabled. To work around - * this, simply disable LP2 if the PCI driver and DT node are both enabled. - */ -void tegra20_cpuidle_pcie_irqs_in_use(void) -{ - pr_info_once( - "Disabling cpuidle LP2 state, since PCIe IRQs are in use\n"); - cpuidle_driver_state_disabled(&tegra_idle_driver, 1, true); -} - -int __init tegra20_cpuidle_init(void) -{ - return cpuidle_register(&tegra_idle_driver, cpu_possible_mask); -} diff --git a/arch/arm/mach-tegra/cpuidle.c b/arch/arm/mach-tegra/cpuidle.c index d565c44cfc93..eee85d517783 100644 --- a/arch/arm/mach-tegra/cpuidle.c +++ b/arch/arm/mach-tegra/cpuidle.c @@ -14,6 +14,7 @@ #include #include +#include #include @@ -23,8 +24,7 @@ void __init tegra_cpuidle_init(void) { switch (tegra_get_chip_id()) { case TEGRA20: - if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC)) - tegra20_cpuidle_init(); + platform_device_register_simple("tegra-cpuidle", -1, NULL, 0); break; case TEGRA30: if (IS_ENABLED(CONFIG_ARCH_TEGRA_3x_SOC)) @@ -38,13 +38,3 @@ void __init tegra_cpuidle_init(void) break; } } - -void tegra_cpuidle_pcie_irqs_in_use(void) -{ - switch (tegra_get_chip_id()) { - case TEGRA20: - if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC)) - tegra20_cpuidle_pcie_irqs_in_use(); - break; - } -} diff --git a/arch/arm/mach-tegra/cpuidle.h b/arch/arm/mach-tegra/cpuidle.h index 4e1f459f5bd8..eeb37baf18e1 100644 --- a/arch/arm/mach-tegra/cpuidle.h +++ b/arch/arm/mach-tegra/cpuidle.h @@ -7,15 +7,11 @@ #define __MACH_TEGRA_CPUIDLE_H #ifdef CONFIG_CPU_IDLE -int tegra20_cpuidle_init(void); -void tegra20_cpuidle_pcie_irqs_in_use(void); int tegra30_cpuidle_init(void); int tegra114_cpuidle_init(void); void tegra_cpuidle_init(void); -void tegra_cpuidle_pcie_irqs_in_use(void); #else static inline void tegra_cpuidle_init(void) {} -static inline void tegra_cpuidle_pcie_irqs_in_use(void) {} #endif #endif diff --git a/drivers/cpuidle/Kconfig.arm b/drivers/cpuidle/Kconfig.arm index 62272ecfa771..99a2d72ac02b 100644 --- a/drivers/cpuidle/Kconfig.arm +++ b/drivers/cpuidle/Kconfig.arm @@ -86,3 +86,11 @@ config ARM_MVEBU_V7_CPUIDLE depends on (ARCH_MVEBU || COMPILE_TEST) && !ARM64 help Select this to enable cpuidle on Armada 370, 38x and XP processors. + +config ARM_TEGRA_CPUIDLE + bool "CPU Idle Driver for NVIDIA Tegra SoCs" + depends on ARCH_TEGRA && !ARM64 + select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP + select ARM_CPU_SUSPEND + help + Select this to enable cpuidle for NVIDIA Tegra20/30/114/124 SoCs. diff --git a/drivers/cpuidle/Makefile b/drivers/cpuidle/Makefile index cc8c769d7fa9..55a464f6a78b 100644 --- a/drivers/cpuidle/Makefile +++ b/drivers/cpuidle/Makefile @@ -24,6 +24,7 @@ obj-$(CONFIG_ARM_CPUIDLE) += cpuidle-arm.o obj-$(CONFIG_ARM_PSCI_CPUIDLE) += cpuidle_psci.o cpuidle_psci-y := cpuidle-psci.o cpuidle_psci-$(CONFIG_PM_GENERIC_DOMAINS_OF) += cpuidle-psci-domain.o +obj-$(CONFIG_ARM_TEGRA_CPUIDLE) += cpuidle-tegra.o ############################################################################### # MIPS drivers diff --git a/drivers/cpuidle/cpuidle-tegra.c b/drivers/cpuidle/cpuidle-tegra.c new file mode 100644 index 000000000000..5691bdcf11cb --- /dev/null +++ b/drivers/cpuidle/cpuidle-tegra.c @@ -0,0 +1,280 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * CPU idle driver for Tegra CPUs + * + * Copyright (c) 2010-2013, NVIDIA Corporation. + * Copyright (c) 2011 Google, Inc. + * Author: Colin Cross + * Gary King + * + * Rework for 3.3 by Peter De Schrijver + * + * Tegra20/124 driver unification by Dmitry Osipenko + */ + +#define pr_fmt(fmt) "tegra-cpuidle: " fmt + +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include +#include +#include +#include +#include + +#include +#include +#include + +enum tegra_state { + TEGRA_C1, + TEGRA_CC6, + TEGRA_STATE_COUNT, +}; + +static atomic_t tegra_idle_barrier; +static atomic_t tegra_abort_flag; + +static void tegra_cpuidle_report_cpus_state(void) +{ + unsigned long cpu, lcpu, csr; + + for_each_cpu(lcpu, cpu_possible_mask) { + cpu = cpu_logical_map(lcpu); + csr = flowctrl_read_cpu_csr(cpu); + + pr_err("cpu%lu: online=%d flowctrl_csr=0x%08lx\n", + cpu, cpu_online(lcpu), csr); + } +} + +static int tegra_cpuidle_wait_for_secondary_cpus_parking(void) +{ + unsigned int retries = 3; + + while (retries--) { + unsigned int delay_us = 10; + unsigned int timeout_us = 500 * 1000 / delay_us; + + /* + * The primary CPU0 core shall wait for the secondaries + * shutdown in order to power-off CPU's cluster safely. + * The timeout value depends on the current CPU frequency, + * it takes about 40-150us in average and over 1000us in + * a worst case scenario. + */ + do { + if (tegra_cpu_rail_off_ready()) + return 0; + + udelay(delay_us); + + } while (timeout_us--); + + pr_err("secondary CPU taking too long to park\n"); + + tegra_cpuidle_report_cpus_state(); + } + + pr_err("timed out waiting secondaries to park\n"); + + return -ETIMEDOUT; +} + +static void tegra_cpuidle_unpark_secondary_cpus(void) +{ + unsigned int cpu, lcpu; + + for_each_cpu(lcpu, cpu_online_mask) { + cpu = cpu_logical_map(lcpu); + + if (cpu > 0) { + tegra_enable_cpu_clock(cpu); + tegra_cpu_out_of_reset(cpu); + flowctrl_write_cpu_halt(cpu, 0); + } + } +} + +static int tegra_cpuidle_cc6_enter(unsigned int cpu) +{ + int ret; + + if (cpu > 0) { + ret = cpu_suspend(cpu, tegra_pm_park_secondary_cpu); + } else { + ret = tegra_cpuidle_wait_for_secondary_cpus_parking(); + if (!ret) + ret = tegra_pm_enter_lp2(); + + tegra_cpuidle_unpark_secondary_cpus(); + } + + return ret; +} + +static int tegra_cpuidle_coupled_barrier(struct cpuidle_device *dev) +{ + if (tegra_pending_sgi()) { + /* + * CPU got local interrupt that will be lost after GIC's + * shutdown because GIC driver doesn't save/restore the + * pending SGI state across CPU cluster PM. Abort and retry + * next time. + */ + atomic_set(&tegra_abort_flag, 1); + } + + cpuidle_coupled_parallel_barrier(dev, &tegra_idle_barrier); + + if (atomic_read(&tegra_abort_flag)) { + cpuidle_coupled_parallel_barrier(dev, &tegra_idle_barrier); + atomic_set(&tegra_abort_flag, 0); + return -EINTR; + } + + return 0; +} + +static int tegra_cpuidle_state_enter(struct cpuidle_device *dev, + int index, unsigned int cpu) +{ + int ret; + + /* + * CC6 state is the "CPU cluster power-off" state. In order to + * enter this state, at first the secondary CPU cores need to be + * parked into offline mode, then the last CPU should clean out + * remaining dirty cache lines into DRAM and trigger Flow Controller + * logic that turns off the cluster's power domain (which includes + * CPU cores, GIC and L2 cache). + */ + if (index == TEGRA_CC6) { + ret = tegra_cpuidle_coupled_barrier(dev); + if (ret) + return ret; + } + + local_fiq_disable(); + tegra_pm_set_cpu_in_lp2(); + cpu_pm_enter(); + + switch (index) { + case TEGRA_CC6: + ret = tegra_cpuidle_cc6_enter(cpu); + break; + + default: + ret = -EINVAL; + break; + } + + cpu_pm_exit(); + tegra_pm_clear_cpu_in_lp2(); + local_fiq_enable(); + + return ret; +} + +static int tegra_cpuidle_enter(struct cpuidle_device *dev, + struct cpuidle_driver *drv, + int index) +{ + unsigned int cpu = cpu_logical_map(dev->cpu); + int err; + + err = tegra_cpuidle_state_enter(dev, index, cpu); + if (err && err != -EINTR) + pr_err_once("cpu%u failed to enter idle state %d err: %d\n", + cpu, index, err); + + return err ? -1 : index; +} + +/* + * The previous versions of Tegra CPUIDLE driver used a different "legacy" + * terminology for naming of the idling states, while this driver uses the + * new terminology. + * + * Mapping of the old terms into the new ones: + * + * Old | New + * --------- + * LP3 | C1 (CPU core clock gating) + * LP2 | C7 (CPU core power gating) + * LP2 | CC6 (CPU cluster power gating) + * + * Note that that the older CPUIDLE driver versions didn't explicitly + * differentiate the LP2 states because these states either used the same + * code path or because CC6 wasn't supported. + */ +static struct cpuidle_driver tegra_idle_driver = { + .name = "tegra_idle", + .states = { + [TEGRA_C1] = ARM_CPUIDLE_WFI_STATE_PWR(600), + [TEGRA_CC6] = { + .enter = tegra_cpuidle_enter, + .exit_latency = 5000, + .target_residency = 10000, + .power_usage = 0, + .flags = CPUIDLE_FLAG_TIMER_STOP | + CPUIDLE_FLAG_COUPLED, + .name = "CC6", + .desc = "CPU cluster powered off", + }, + }, + .state_count = TEGRA_STATE_COUNT, + .safe_state_index = TEGRA_C1, +}; + +static inline void tegra_cpuidle_disable_state(enum tegra_state state) +{ + cpuidle_driver_state_disabled(&tegra_idle_driver, state, true); +} + +/* + * Tegra20 HW appears to have a bug such that PCIe device interrupts, whether + * they are legacy IRQs or MSI, are lost when CC6 is enabled. To work around + * this, simply disable CC6 if the PCI driver and DT node are both enabled. + */ +void tegra_cpuidle_pcie_irqs_in_use(void) +{ + struct cpuidle_state *state_cc6 = &tegra_idle_driver.states[TEGRA_CC6]; + + if ((state_cc6->flags & CPUIDLE_FLAG_UNUSABLE) || + tegra_get_chip_id() != TEGRA20) + return; + + pr_info("disabling CC6 state, since PCIe IRQs are in use\n"); + tegra_cpuidle_disable_state(TEGRA_CC6); +} + +static int tegra_cpuidle_probe(struct platform_device *pdev) +{ + /* + * Required suspend-resume functionality, which is provided by the + * Tegra-arch core and PMC driver, is unavailable if PM-sleep option + * is disabled. + */ + if (!IS_ENABLED(CONFIG_PM_SLEEP)) + tegra_cpuidle_disable_state(TEGRA_CC6); + + return cpuidle_register(&tegra_idle_driver, cpu_possible_mask); +} + +static struct platform_driver tegra_cpuidle_driver = { + .probe = tegra_cpuidle_probe, + .driver = { + .name = "tegra-cpuidle", + }, +}; +builtin_platform_driver(tegra_cpuidle_driver); diff --git a/include/soc/tegra/cpuidle.h b/include/soc/tegra/cpuidle.h index 029ba1f4b2cc..5665975015d8 100644 --- a/include/soc/tegra/cpuidle.h +++ b/include/soc/tegra/cpuidle.h @@ -6,7 +6,7 @@ #ifndef __SOC_TEGRA_CPUIDLE_H__ #define __SOC_TEGRA_CPUIDLE_H__ -#if defined(CONFIG_ARM) && defined(CONFIG_ARCH_TEGRA) && defined(CONFIG_CPU_IDLE) +#ifdef CONFIG_ARM_TEGRA_CPUIDLE void tegra_cpuidle_pcie_irqs_in_use(void); #else static inline void tegra_cpuidle_pcie_irqs_in_use(void) From patchwork Mon Feb 24 22:40:53 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 1243652 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=N7s6Rec4; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 48RHC06lHdz9sRN for ; Tue, 25 Feb 2020 09:42:52 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728412AbgBXWmv (ORCPT ); Mon, 24 Feb 2020 17:42:51 -0500 Received: from mail-lf1-f66.google.com ([209.85.167.66]:37800 "EHLO mail-lf1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728386AbgBXWmu (ORCPT ); Mon, 24 Feb 2020 17:42:50 -0500 Received: by mail-lf1-f66.google.com with SMTP id b15so8066726lfc.4; Mon, 24 Feb 2020 14:42:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=gPXlw+TPEAIGqeYKizkXpN+v1vevpC6XwF4/g9bqzh4=; b=N7s6Rec4Dlk+3u1aZ0JgPxVACBZdanHduCrk6EdS+634vb5bDdpXDUr+0ijvd7Fkma 7b6cwYGLywMhDzw+rihAPMt88oi3rnHrHdA1Fa9BNoOJqgYVN77EoPv91LRTtwD7b/Fd 02h3PtFjp6C3Xb6mxhUe0q+b321RYk29yfIiHN6bG30obgR+2ZVEf3CHzgb2pm3mou8X QO1ns0zisKzByFuzWijSfVsFS3xQ/6Q07jlO7xlnE5VVAUf+EeylG8RuIyXBQ8iWYtVE yXBjssIjR3lFimWTN6NrDgUaw7S9do46kfq7opEoDPU5pMG+Yh3lp82Vx92NB6h4AKpL jUUg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=gPXlw+TPEAIGqeYKizkXpN+v1vevpC6XwF4/g9bqzh4=; b=bJsZ4/JqaVLkrIrNc65KdW/87s0YIE3J2sb9FEc+1HiYXycNkY7vEeJFl8+egUmdgs ti2Snq4tU9v9mH9+kz63GAnvWwnTjhJ4ljH0xQ0mJTm9wrJ51+DS9pKFEmymqmBxihKC u34ihIf/+GNSf0EO8cWwxtO6zRCMRXQdIvwhyuv/PZ6+9CLnNnrD1UrczZKMxZnoSGNS mt2AXjN/sou/H0wQ78IGLz/5f8qrPd5uhkZB829U7Esa42oYg8UbhHlgjqfaPDutHVKc BaZ2sh4Uw8cBpOx24MV7kO+giVcLur9b0D42h2ehcMEorXVR1s13jJihedidDYMoyg5J aqZw== X-Gm-Message-State: APjAAAUZU3nEQBGoAAHkemdF94OK62L3KoNfy2PH/90si/rocM2p16jz MxMzH7xQmexPvGmvOynzBWU= X-Google-Smtp-Source: APXvYqyXId6rkgoMadrB+7P+FemRWQQvkOOuaYCoPyzgwDzFmiUEPUZe9PgKE6o8C8NyI2ND6NlR6g== X-Received: by 2002:ac2:44a7:: with SMTP id c7mr17394260lfm.32.1582584167980; Mon, 24 Feb 2020 14:42:47 -0800 (PST) Received: from localhost.localdomain (79-139-233-37.dynamic.spd-mgts.ru. [79.139.233.37]) by smtp.gmail.com with ESMTPSA id j7sm6264833lfh.25.2020.02.24.14.42.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 24 Feb 2020 14:42:47 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano , =?utf-8?q?Micha=C5=82_Miro?= =?utf-8?b?c8WCYXc=?= , Jasper Korten , David Heidelberg , Peter Geis , Nicolas Chauvet Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v11 13/17] cpuidle: tegra: Squash Tegra30 driver into the common driver Date: Tue, 25 Feb 2020 01:40:53 +0300 Message-Id: <20200224224057.21877-14-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20200224224057.21877-1-digetx@gmail.com> References: <20200224224057.21877-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Tegra20 and Terga30 SoCs have common C1 and CC6 idling states and thus share the same code paths, there is no point in having separate drivers for a similar hardware. This patch merely moves functionality of the old driver into the new, although the CC6 state is kept disabled for now since old driver had a rudimentary support for this state (allowing to enter into CC6 only when secondary CPUs are put offline), while new driver can provide a full-featured support. The new feature will be enabled by another patch. Acked-by: Peter De Schrijver Tested-by: Peter Geis Tested-by: Jasper Korten Tested-by: David Heidelberg Tested-by: Nicolas Chauvet Acked-by: Daniel Lezcano Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/Makefile | 3 - arch/arm/mach-tegra/cpuidle-tegra30.c | 123 -------------------------- arch/arm/mach-tegra/cpuidle.c | 5 +- arch/arm/mach-tegra/cpuidle.h | 1 - drivers/cpuidle/cpuidle-tegra.c | 74 ++++++++++++++-- 5 files changed, 70 insertions(+), 136 deletions(-) delete mode 100644 arch/arm/mach-tegra/cpuidle-tegra30.c diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile index 8425bb5608d5..99c5f4274e5c 100644 --- a/arch/arm/mach-tegra/Makefile +++ b/arch/arm/mach-tegra/Makefile @@ -13,9 +13,6 @@ obj-y += sleep-tegra30.o obj-$(CONFIG_CPU_IDLE) += cpuidle.o obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += pm-tegra20.o obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += pm-tegra30.o -ifeq ($(CONFIG_CPU_IDLE),y) -obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += cpuidle-tegra30.o -endif obj-$(CONFIG_SMP) += platsmp.o obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o diff --git a/arch/arm/mach-tegra/cpuidle-tegra30.c b/arch/arm/mach-tegra/cpuidle-tegra30.c deleted file mode 100644 index 80ae64bcdf50..000000000000 --- a/arch/arm/mach-tegra/cpuidle-tegra30.c +++ /dev/null @@ -1,123 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * CPU idle driver for Tegra CPUs - * - * Copyright (c) 2010-2012, NVIDIA Corporation. - * Copyright (c) 2011 Google, Inc. - * Author: Colin Cross - * Gary King - * - * Rework for 3.3 by Peter De Schrijver - */ - -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include - -#include "cpuidle.h" -#include "sleep.h" - -#ifdef CONFIG_PM_SLEEP -static int tegra30_idle_lp2(struct cpuidle_device *dev, - struct cpuidle_driver *drv, - int index); -#endif - -static struct cpuidle_driver tegra_idle_driver = { - .name = "tegra_idle", - .owner = THIS_MODULE, -#ifdef CONFIG_PM_SLEEP - .state_count = 2, -#else - .state_count = 1, -#endif - .states = { - [0] = ARM_CPUIDLE_WFI_STATE_PWR(600), -#ifdef CONFIG_PM_SLEEP - [1] = { - .enter = tegra30_idle_lp2, - .exit_latency = 2000, - .target_residency = 2200, - .power_usage = 0, - .flags = CPUIDLE_FLAG_TIMER_STOP, - .name = "powered-down", - .desc = "CPU power gated", - }, -#endif - }, -}; - -#ifdef CONFIG_PM_SLEEP -static bool tegra30_cpu_cluster_power_down(struct cpuidle_device *dev, - struct cpuidle_driver *drv, - int index) -{ - /* All CPUs entering LP2 is not working. - * Don't let CPU0 enter LP2 when any secondary CPU is online. - */ - if (num_online_cpus() > 1 || !tegra_cpu_rail_off_ready()) { - cpu_do_idle(); - return false; - } - - return !tegra_pm_enter_lp2(); -} - -#ifdef CONFIG_SMP -static bool tegra30_cpu_core_power_down(struct cpuidle_device *dev, - struct cpuidle_driver *drv, - int index) -{ - smp_wmb(); - - cpu_suspend(0, tegra30_pm_secondary_cpu_suspend); - - return true; -} -#else -static inline bool tegra30_cpu_core_power_down(struct cpuidle_device *dev, - struct cpuidle_driver *drv, - int index) -{ - return true; -} -#endif - -static int tegra30_idle_lp2(struct cpuidle_device *dev, - struct cpuidle_driver *drv, - int index) -{ - bool entered_lp2 = false; - - local_fiq_disable(); - - tegra_pm_set_cpu_in_lp2(); - cpu_pm_enter(); - - if (dev->cpu == 0) - entered_lp2 = tegra30_cpu_cluster_power_down(dev, drv, index); - else - entered_lp2 = tegra30_cpu_core_power_down(dev, drv, index); - - cpu_pm_exit(); - tegra_pm_clear_cpu_in_lp2(); - - local_fiq_enable(); - - return (entered_lp2) ? index : 0; -} -#endif - -int __init tegra30_cpuidle_init(void) -{ - return cpuidle_register(&tegra_idle_driver, NULL); -} diff --git a/arch/arm/mach-tegra/cpuidle.c b/arch/arm/mach-tegra/cpuidle.c index eee85d517783..fa0dcf3c2c45 100644 --- a/arch/arm/mach-tegra/cpuidle.c +++ b/arch/arm/mach-tegra/cpuidle.c @@ -24,11 +24,8 @@ void __init tegra_cpuidle_init(void) { switch (tegra_get_chip_id()) { case TEGRA20: - platform_device_register_simple("tegra-cpuidle", -1, NULL, 0); - break; case TEGRA30: - if (IS_ENABLED(CONFIG_ARCH_TEGRA_3x_SOC)) - tegra30_cpuidle_init(); + platform_device_register_simple("tegra-cpuidle", -1, NULL, 0); break; case TEGRA114: case TEGRA124: diff --git a/arch/arm/mach-tegra/cpuidle.h b/arch/arm/mach-tegra/cpuidle.h index eeb37baf18e1..5423a05a69f6 100644 --- a/arch/arm/mach-tegra/cpuidle.h +++ b/arch/arm/mach-tegra/cpuidle.h @@ -7,7 +7,6 @@ #define __MACH_TEGRA_CPUIDLE_H #ifdef CONFIG_CPU_IDLE -int tegra30_cpuidle_init(void); int tegra114_cpuidle_init(void); void tegra_cpuidle_init(void); #else diff --git a/drivers/cpuidle/cpuidle-tegra.c b/drivers/cpuidle/cpuidle-tegra.c index 5691bdcf11cb..cd969ec18651 100644 --- a/drivers/cpuidle/cpuidle-tegra.c +++ b/drivers/cpuidle/cpuidle-tegra.c @@ -37,6 +37,7 @@ enum tegra_state { TEGRA_C1, + TEGRA_C7, TEGRA_CC6, TEGRA_STATE_COUNT, }; @@ -122,6 +123,11 @@ static int tegra_cpuidle_cc6_enter(unsigned int cpu) return ret; } +static int tegra_cpuidle_c7_enter(void) +{ + return cpu_suspend(0, tegra30_pm_secondary_cpu_suspend); +} + static int tegra_cpuidle_coupled_barrier(struct cpuidle_device *dev) { if (tegra_pending_sgi()) { @@ -169,6 +175,10 @@ static int tegra_cpuidle_state_enter(struct cpuidle_device *dev, cpu_pm_enter(); switch (index) { + case TEGRA_C7: + ret = tegra_cpuidle_c7_enter(); + break; + case TEGRA_CC6: ret = tegra_cpuidle_cc6_enter(cpu); break; @@ -185,6 +195,24 @@ static int tegra_cpuidle_state_enter(struct cpuidle_device *dev, return ret; } +static int tegra_cpuidle_adjust_state_index(int index, unsigned int cpu) +{ + /* + * On Tegra30 CPU0 can't be power-gated separately from secondary + * cores because it gates the whole CPU cluster. + */ + if (cpu > 0 || index != TEGRA_C7 || tegra_get_chip_id() != TEGRA30) + return index; + + /* put CPU0 into C1 if C7 is requested and secondaries are online */ + if (!IS_ENABLED(CONFIG_PM_SLEEP) || num_online_cpus() > 1) + index = TEGRA_C1; + else + index = TEGRA_CC6; + + return index; +} + static int tegra_cpuidle_enter(struct cpuidle_device *dev, struct cpuidle_driver *drv, int index) @@ -192,10 +220,17 @@ static int tegra_cpuidle_enter(struct cpuidle_device *dev, unsigned int cpu = cpu_logical_map(dev->cpu); int err; - err = tegra_cpuidle_state_enter(dev, index, cpu); - if (err && err != -EINTR) - pr_err_once("cpu%u failed to enter idle state %d err: %d\n", - cpu, index, err); + index = tegra_cpuidle_adjust_state_index(index, cpu); + if (dev->states_usage[index].disable) + return -1; + + if (index == TEGRA_C1) + err = arm_cpuidle_simple_enter(dev, drv, index); + else + err = tegra_cpuidle_state_enter(dev, index, cpu); + + if (err && (err != -EINTR || index != TEGRA_CC6)) + pr_err_once("failed to enter state %d err: %d\n", index, err); return err ? -1 : index; } @@ -221,6 +256,15 @@ static struct cpuidle_driver tegra_idle_driver = { .name = "tegra_idle", .states = { [TEGRA_C1] = ARM_CPUIDLE_WFI_STATE_PWR(600), + [TEGRA_C7] = { + .enter = tegra_cpuidle_enter, + .exit_latency = 2000, + .target_residency = 2200, + .power_usage = 100, + .flags = CPUIDLE_FLAG_TIMER_STOP, + .name = "C7", + .desc = "CPU core powered off", + }, [TEGRA_CC6] = { .enter = tegra_cpuidle_enter, .exit_latency = 5000, @@ -265,8 +309,28 @@ static int tegra_cpuidle_probe(struct platform_device *pdev) * Tegra-arch core and PMC driver, is unavailable if PM-sleep option * is disabled. */ - if (!IS_ENABLED(CONFIG_PM_SLEEP)) + if (!IS_ENABLED(CONFIG_PM_SLEEP)) { + tegra_cpuidle_disable_state(TEGRA_C7); tegra_cpuidle_disable_state(TEGRA_CC6); + } + + /* + * Generic WFI state (also known as C1 or LP3) and the coupled CPU + * cluster power-off (CC6 or LP2) states are common for all Tegra SoCs. + */ + switch (tegra_get_chip_id()) { + case TEGRA20: + /* Tegra20 isn't capable to power-off individual CPU cores */ + tegra_cpuidle_disable_state(TEGRA_C7); + break; + + case TEGRA30: + tegra_cpuidle_disable_state(TEGRA_CC6); + break; + + default: + return -EINVAL; + } return cpuidle_register(&tegra_idle_driver, cpu_possible_mask); } From patchwork Mon Feb 24 22:40:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 1243665 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=as5fr+uY; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 48RHCY1Kz1z9sRJ for ; Tue, 25 Feb 2020 09:43:21 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728358AbgBXWnQ (ORCPT ); Mon, 24 Feb 2020 17:43:16 -0500 Received: from mail-lf1-f67.google.com ([209.85.167.67]:46817 "EHLO mail-lf1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728398AbgBXWmv (ORCPT ); Mon, 24 Feb 2020 17:42:51 -0500 Received: by mail-lf1-f67.google.com with SMTP id u2so5355790lfk.13; Mon, 24 Feb 2020 14:42:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=yUqQ80Gm1VC83eTLc9O8bMgxItSexq/gS3iB7oB+5hA=; b=as5fr+uYlLG4Cf0/qw6VUt/j7Xwk9b47Fcxgpw4PR/+9mkElUObby1FvplySz4Eb0+ Eef8FW5XE0SMfwVbRrqyTfc/tLUI7rQV9IcrMOW9iTEqsCkuNmj8P/nANqBFzzUcQEBu xOkDztYyAOcXfAmeV2YBxlZxsQ8n+GWHhSmRjCYaZX7uMsBsh2810r1g9hWtR0i1ICTc HFvSgr9zALXGrQEAYdqM8N31GYtDWuw3vvdcCFwf+nDQiJAUVKgLAYYS2Y9opKvqJfqz Hr36eZrzGR0r1vJb74k5d79ohFc3AcOosslkHxCkKEL6q74Bc1gEde0QCx46EfuOiyvP 3EZw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=yUqQ80Gm1VC83eTLc9O8bMgxItSexq/gS3iB7oB+5hA=; b=hWwwZ9Fp4aUYSPe5eQFFWO1FrtXPrRtIOW5F5pmASdI96hep75tZQRhkwbcLW7S0Cy cI1dt+uwkrmW0QBQlbze1erGZ4SVbooEeasHttq+k0vRzh96CwaJ8J5NtmCDC9le1GgU h5FT+TcgAWN+Z3pEzGEl3TeZyyy5i5SPmcSvLuwkXZI+zMwzo6EKKEKa9tYteY3IGAtt +yxWtgxkzr7V9zMtlXzEnfSOqUC1KH+rPGsK4Y/JO5mdRLr8w+MeSI308Yt3CD/gTrPH /q7J/TgVhpj3gK9n2H2d3GHuxxicr9t57f0tBvBKMFfi3QbgaIcCxty0Dgsrc/22huJ6 jQcQ== X-Gm-Message-State: APjAAAVz5maR9mGfK0HrSV2j4W1IGb3CbOyd8flR3Wvooi4xuqprOBdP UhS7dk1gu+JYm1NSZFJ7T+Y= X-Google-Smtp-Source: APXvYqxJSrcrowD2vhM1fV4h9KnHS0Cg4UztDaLiu4wtO1R6VPuJdfOkYuyVg+1dPac+dHwiNMpnjQ== X-Received: by 2002:a19:6903:: with SMTP id e3mr3667522lfc.25.1582584169060; Mon, 24 Feb 2020 14:42:49 -0800 (PST) Received: from localhost.localdomain (79-139-233-37.dynamic.spd-mgts.ru. [79.139.233.37]) by smtp.gmail.com with ESMTPSA id j7sm6264833lfh.25.2020.02.24.14.42.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 24 Feb 2020 14:42:48 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano , =?utf-8?q?Micha=C5=82_Miro?= =?utf-8?b?c8WCYXc=?= , Jasper Korten , David Heidelberg , Peter Geis , Nicolas Chauvet Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v11 14/17] cpuidle: tegra: Squash Tegra114 driver into the common driver Date: Tue, 25 Feb 2020 01:40:54 +0300 Message-Id: <20200224224057.21877-15-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20200224224057.21877-1-digetx@gmail.com> References: <20200224224057.21877-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Tegra20/30/114/124 SoCs have common idling states, thus there is no much point in having separate drivers for a similar hardware. This patch moves Tegra114/124 arch/ drivers into the common driver without any functional changes. The CC6 state is kept disabled on Tegra114/124 because the core Tegra PM code needs some more work in order to support that state. Acked-by: Peter De Schrijver Signed-off-by: Dmitry Osipenko Acked-by: Daniel Lezcano --- arch/arm/mach-tegra/Makefile | 7 -- arch/arm/mach-tegra/cpuidle-tegra114.c | 90 -------------------------- arch/arm/mach-tegra/cpuidle.c | 37 ----------- arch/arm/mach-tegra/cpuidle.h | 16 ----- arch/arm/mach-tegra/tegra.c | 6 +- drivers/cpuidle/cpuidle-tegra.c | 45 ++++++++++++- 6 files changed, 48 insertions(+), 153 deletions(-) delete mode 100644 arch/arm/mach-tegra/cpuidle-tegra114.c delete mode 100644 arch/arm/mach-tegra/cpuidle.c delete mode 100644 arch/arm/mach-tegra/cpuidle.h diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile index 99c5f4274e5c..07572b5373b8 100644 --- a/arch/arm/mach-tegra/Makefile +++ b/arch/arm/mach-tegra/Makefile @@ -10,19 +10,12 @@ obj-y += sleep.o obj-y += tegra.o obj-y += sleep-tegra20.o obj-y += sleep-tegra30.o -obj-$(CONFIG_CPU_IDLE) += cpuidle.o obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += pm-tegra20.o obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += pm-tegra30.o obj-$(CONFIG_SMP) += platsmp.o obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o obj-$(CONFIG_ARCH_TEGRA_114_SOC) += pm-tegra30.o -ifeq ($(CONFIG_CPU_IDLE),y) -obj-$(CONFIG_ARCH_TEGRA_114_SOC) += cpuidle-tegra114.o -endif obj-$(CONFIG_ARCH_TEGRA_124_SOC) += pm-tegra30.o -ifeq ($(CONFIG_CPU_IDLE),y) -obj-$(CONFIG_ARCH_TEGRA_124_SOC) += cpuidle-tegra114.o -endif obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += board-paz00.o diff --git a/arch/arm/mach-tegra/cpuidle-tegra114.c b/arch/arm/mach-tegra/cpuidle-tegra114.c deleted file mode 100644 index 858c30cc5dc7..000000000000 --- a/arch/arm/mach-tegra/cpuidle-tegra114.c +++ /dev/null @@ -1,90 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (c) 2013, NVIDIA Corporation. All rights reserved. - */ - -#include -#include -#include -#include -#include -#include - -#include - -#include - -#include -#include -#include -#include - -#include "cpuidle.h" -#include "sleep.h" - -#ifdef CONFIG_PM_SLEEP -#define TEGRA114_MAX_STATES 2 -#else -#define TEGRA114_MAX_STATES 1 -#endif - -#ifdef CONFIG_PM_SLEEP -static int tegra114_idle_power_down(struct cpuidle_device *dev, - struct cpuidle_driver *drv, - int index) -{ - local_fiq_disable(); - - tegra_pm_set_cpu_in_lp2(); - cpu_pm_enter(); - - call_firmware_op(prepare_idle, TF_PM_MODE_LP2_NOFLUSH_L2); - - /* Do suspend by ourselves if the firmware does not implement it */ - if (call_firmware_op(do_idle, 0) == -ENOSYS) - cpu_suspend(0, tegra30_pm_secondary_cpu_suspend); - - cpu_pm_exit(); - tegra_pm_clear_cpu_in_lp2(); - - local_fiq_enable(); - - return index; -} - -static void tegra114_idle_enter_s2idle(struct cpuidle_device *dev, - struct cpuidle_driver *drv, - int index) -{ - tegra114_idle_power_down(dev, drv, index); -} -#endif - -static struct cpuidle_driver tegra_idle_driver = { - .name = "tegra_idle", - .owner = THIS_MODULE, - .state_count = TEGRA114_MAX_STATES, - .states = { - [0] = ARM_CPUIDLE_WFI_STATE_PWR(600), -#ifdef CONFIG_PM_SLEEP - [1] = { - .enter = tegra114_idle_power_down, - .enter_s2idle = tegra114_idle_enter_s2idle, - .exit_latency = 500, - .target_residency = 1000, - .flags = CPUIDLE_FLAG_TIMER_STOP, - .power_usage = 0, - .name = "powered-down", - .desc = "CPU power gated", - }, -#endif - }, -}; - -int __init tegra114_cpuidle_init(void) -{ - if (!psci_smp_available()) - return cpuidle_register(&tegra_idle_driver, NULL); - - return 0; -} diff --git a/arch/arm/mach-tegra/cpuidle.c b/arch/arm/mach-tegra/cpuidle.c deleted file mode 100644 index fa0dcf3c2c45..000000000000 --- a/arch/arm/mach-tegra/cpuidle.c +++ /dev/null @@ -1,37 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * arch/arm/mach-tegra/cpuidle.c - * - * CPU idle driver for Tegra CPUs - * - * Copyright (c) 2010-2012, NVIDIA Corporation. - * Copyright (c) 2011 Google, Inc. - * Author: Colin Cross - * Gary King - * - * Rework for 3.3 by Peter De Schrijver - */ - -#include -#include -#include - -#include - -#include "cpuidle.h" - -void __init tegra_cpuidle_init(void) -{ - switch (tegra_get_chip_id()) { - case TEGRA20: - case TEGRA30: - platform_device_register_simple("tegra-cpuidle", -1, NULL, 0); - break; - case TEGRA114: - case TEGRA124: - if (IS_ENABLED(CONFIG_ARCH_TEGRA_114_SOC) || - IS_ENABLED(CONFIG_ARCH_TEGRA_124_SOC)) - tegra114_cpuidle_init(); - break; - } -} diff --git a/arch/arm/mach-tegra/cpuidle.h b/arch/arm/mach-tegra/cpuidle.h deleted file mode 100644 index 5423a05a69f6..000000000000 --- a/arch/arm/mach-tegra/cpuidle.h +++ /dev/null @@ -1,16 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (c) 2012, NVIDIA Corporation. All rights reserved. - */ - -#ifndef __MACH_TEGRA_CPUIDLE_H -#define __MACH_TEGRA_CPUIDLE_H - -#ifdef CONFIG_CPU_IDLE -int tegra114_cpuidle_init(void); -void tegra_cpuidle_init(void); -#else -static inline void tegra_cpuidle_init(void) {} -#endif - -#endif diff --git a/arch/arm/mach-tegra/tegra.c b/arch/arm/mach-tegra/tegra.c index 79184a077c84..eeacff626546 100644 --- a/arch/arm/mach-tegra/tegra.c +++ b/arch/arm/mach-tegra/tegra.c @@ -36,11 +36,11 @@ #include #include #include +#include #include #include "board.h" #include "common.h" -#include "cpuidle.h" #include "iomap.h" #include "pm.h" #include "reset.h" @@ -85,7 +85,6 @@ static void __init tegra_dt_init(void) static void __init tegra_dt_init_late(void) { tegra_init_suspend(); - tegra_cpuidle_init(); if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC) && of_machine_is_compatible("compal,paz00")) @@ -98,6 +97,9 @@ static void __init tegra_dt_init_late(void) if (IS_ENABLED(CONFIG_ARCH_TEGRA_3x_SOC) && of_machine_is_compatible("nvidia,tegra30")) platform_device_register_simple("tegra20-cpufreq", -1, NULL, 0); + + if (IS_ENABLED(CONFIG_ARM_TEGRA_CPUIDLE) && !psci_smp_available()) + platform_device_register_simple("tegra-cpuidle", -1, NULL, 0); } static const char * const tegra_dt_board_compat[] = { diff --git a/drivers/cpuidle/cpuidle-tegra.c b/drivers/cpuidle/cpuidle-tegra.c index cd969ec18651..2ddbd289e17d 100644 --- a/drivers/cpuidle/cpuidle-tegra.c +++ b/drivers/cpuidle/cpuidle-tegra.c @@ -24,6 +24,7 @@ #include #include +#include #include #include @@ -32,6 +33,7 @@ #include #include +#include #include #include @@ -45,6 +47,11 @@ enum tegra_state { static atomic_t tegra_idle_barrier; static atomic_t tegra_abort_flag; +static inline bool tegra_cpuidle_using_firmware(void) +{ + return firmware_ops->prepare_idle && firmware_ops->do_idle; +} + static void tegra_cpuidle_report_cpus_state(void) { unsigned long cpu, lcpu, csr; @@ -125,6 +132,16 @@ static int tegra_cpuidle_cc6_enter(unsigned int cpu) static int tegra_cpuidle_c7_enter(void) { + int err; + + if (tegra_cpuidle_using_firmware()) { + err = call_firmware_op(prepare_idle, TF_PM_MODE_LP2_NOFLUSH_L2); + if (err) + return err; + + return call_firmware_op(do_idle, 0); + } + return cpu_suspend(0, tegra30_pm_secondary_cpu_suspend); } @@ -235,6 +252,13 @@ static int tegra_cpuidle_enter(struct cpuidle_device *dev, return err ? -1 : index; } +static void tegra114_enter_s2idle(struct cpuidle_device *dev, + struct cpuidle_driver *drv, + int index) +{ + tegra_cpuidle_enter(dev, drv, index); +} + /* * The previous versions of Tegra CPUIDLE driver used a different "legacy" * terminology for naming of the idling states, while this driver uses the @@ -302,6 +326,15 @@ void tegra_cpuidle_pcie_irqs_in_use(void) tegra_cpuidle_disable_state(TEGRA_CC6); } +static void tegra_cpuidle_setup_tegra114_c7_state(void) +{ + struct cpuidle_state *s = &tegra_idle_driver.states[TEGRA_C7]; + + s->enter_s2idle = tegra114_enter_s2idle; + s->target_residency = 1000; + s->exit_latency = 500; +} + static int tegra_cpuidle_probe(struct platform_device *pdev) { /* @@ -310,7 +343,9 @@ static int tegra_cpuidle_probe(struct platform_device *pdev) * is disabled. */ if (!IS_ENABLED(CONFIG_PM_SLEEP)) { - tegra_cpuidle_disable_state(TEGRA_C7); + if (!tegra_cpuidle_using_firmware()) + tegra_cpuidle_disable_state(TEGRA_C7); + tegra_cpuidle_disable_state(TEGRA_CC6); } @@ -328,6 +363,14 @@ static int tegra_cpuidle_probe(struct platform_device *pdev) tegra_cpuidle_disable_state(TEGRA_CC6); break; + case TEGRA114: + case TEGRA124: + tegra_cpuidle_setup_tegra114_c7_state(); + + /* coupled CC6 (LP2) state isn't implemented yet */ + tegra_cpuidle_disable_state(TEGRA_CC6); + break; + default: return -EINVAL; } From patchwork Mon Feb 24 22:40:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 1243655 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=GP4+gGka; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 48RHC30PB0z9sQx for ; Tue, 25 Feb 2020 09:42:55 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728425AbgBXWmy (ORCPT ); Mon, 24 Feb 2020 17:42:54 -0500 Received: from mail-lj1-f193.google.com ([209.85.208.193]:35355 "EHLO mail-lj1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728407AbgBXWmx (ORCPT ); Mon, 24 Feb 2020 17:42:53 -0500 Received: by mail-lj1-f193.google.com with SMTP id q8so11909199ljb.2; Mon, 24 Feb 2020 14:42:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ZoylVC2UJJwnJQI/G1aVwYHoPPGDLsbVpFo6bETe7WE=; b=GP4+gGkaF7AP+tmYns2QkWJwnCqh0tsrj/n8NdmCwueq30JDSyKy605Kc+V0stwNF0 SbblPiVvUSuSQ0RvBobQWo7oC6P3LOwb5m6zweDjGjCdi/TwnNVpPi1bG/eZ72a+fxiV V9oeEJysOm6AMsk47rjxflnPox8A/lUYJeYTDfqkzxeH55xVS1cn8ix2sHGL+vRObYhz FD2pw01AxXIZrs1XlE03s5tc2rOBidl/nKo0SBve3h3wHf92ZE6hnJdYQfOVSj27Ue2o aPp/CqxETpzA+W02VyG5G8oFzJgt5G9p37bJp2xQ97pHJyHDXdTyDeY9VUFVzohV+5Rf D5Xw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ZoylVC2UJJwnJQI/G1aVwYHoPPGDLsbVpFo6bETe7WE=; b=am4k1gUNLBUUmaWg5YqH+6VXO81d3CMG0Bepi2b12npkX3CcgADOyv3hr5f4DMNqhm MF/IRqGkPBQQjCNkKuCI+3srVEpniRDHb4nZ+ggzcHfXyX/ByHj/eQYhifuTMDBeI9FS wwHEPoMEij48HIEdFDxlMPGhZsAPXU8rk6eoLOB4MAOj4iuctZE3rBtfBpEG+RmduSdb Qvu+eVzL4e5y2nU2sxNxEc6WKS98SPKxv5EOowXUS8K2rR77ylCSy7U5OSATXOKUFTUz X8iAhSQ4w5MalwGBoZsxkPpX7ZRzAKfGHzkY5p2hTauhhwwfCGn1XO6NE7D5BPVfTQ7E WG/Q== X-Gm-Message-State: APjAAAULs0wrLYYAq3+31Otp0Zsjb01xm2gI1i8vz4wCt+AgCg/0yfha 6JAlhDmgQ4O/TOCsiDHKi3E= X-Google-Smtp-Source: APXvYqzST2YV207SBFEyLt5fEFLkfQzEeMEpSQJHHQZD19O5jGt0464hAf+CxVMhTf1Pv5dn4S7VLQ== X-Received: by 2002:a2e:1459:: with SMTP id 25mr32623019lju.189.1582584170367; Mon, 24 Feb 2020 14:42:50 -0800 (PST) Received: from localhost.localdomain (79-139-233-37.dynamic.spd-mgts.ru. [79.139.233.37]) by smtp.gmail.com with ESMTPSA id j7sm6264833lfh.25.2020.02.24.14.42.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 24 Feb 2020 14:42:49 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano , =?utf-8?q?Micha=C5=82_Miro?= =?utf-8?b?c8WCYXc=?= , Jasper Korten , David Heidelberg , Peter Geis , Nicolas Chauvet Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v11 15/17] cpuidle: tegra: Disable CC6 state if LP2 unavailable Date: Tue, 25 Feb 2020 01:40:55 +0300 Message-Id: <20200224224057.21877-16-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20200224224057.21877-1-digetx@gmail.com> References: <20200224224057.21877-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org LP2 suspending could be unavailable, for example if it is disabled in a device-tree. CC6 cpuidle state won't work in that case. Acked-by: Peter De Schrijver Acked-by: Daniel Lezcano Signed-off-by: Dmitry Osipenko --- drivers/cpuidle/cpuidle-tegra.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/cpuidle/cpuidle-tegra.c b/drivers/cpuidle/cpuidle-tegra.c index 2ddbd289e17d..313b0290e97b 100644 --- a/drivers/cpuidle/cpuidle-tegra.c +++ b/drivers/cpuidle/cpuidle-tegra.c @@ -31,6 +31,7 @@ #include #include #include +#include #include #include @@ -337,6 +338,10 @@ static void tegra_cpuidle_setup_tegra114_c7_state(void) static int tegra_cpuidle_probe(struct platform_device *pdev) { + /* LP2 could be disabled in device-tree */ + if (tegra_pmc_get_suspend_mode() < TEGRA_SUSPEND_LP2) + tegra_cpuidle_disable_state(TEGRA_CC6); + /* * Required suspend-resume functionality, which is provided by the * Tegra-arch core and PMC driver, is unavailable if PM-sleep option From patchwork Mon Feb 24 22:40:56 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 1243662 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=C0scDf7P; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 48RHCR35Fmz9sRQ for ; Tue, 25 Feb 2020 09:43:15 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728468AbgBXWnG (ORCPT ); Mon, 24 Feb 2020 17:43:06 -0500 Received: from mail-lj1-f194.google.com ([209.85.208.194]:37380 "EHLO mail-lj1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728420AbgBXWmy (ORCPT ); Mon, 24 Feb 2020 17:42:54 -0500 Received: by mail-lj1-f194.google.com with SMTP id q23so11938239ljm.4; Mon, 24 Feb 2020 14:42:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=0hUJ+JgfxZEA468vXjntT4RJZ/+VagueJ/BTp8613xY=; b=C0scDf7PrZ5FnBGFEJYsiBSVRQ8WGDHyNXCilBLVpql+IJBQVXCT0i0/NoasEg4p2G Gb7rOCWWDp0pACOSPgyZFC0kO1MSJuUtSj1yNg+jX1k/ysgcemLhbMN3Uw9UMaholkLI nnBsNlILbHrhzPn+Gkk58hrEOLJSwuDFASoq8CFtq4orlFQ5OJ6ZxR2slaqsdbEOPMJt clmQy1Fd63AGvt89ObPpk0Koj6bwDG1BW86dZfh4rJL7ela3knNby5jEnMsCgFvFRnkW lo8/LvDDK2CW56JnPFom6GZIomaGEogLGmaN1zFyV4c3OA+5LUTWafp615yJCmYUF0e6 yJ4A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=0hUJ+JgfxZEA468vXjntT4RJZ/+VagueJ/BTp8613xY=; b=T4Jy62o1U1XBbQ8Idjj6cN95oNkYBN2nr3Ogre3ghQz9AZm9rEfXkbgQIzqmcJYJGu N/00UPIpJN3wc7CcCKS/9+JV2fst1z03ujncjCDl7TfKAbJda6QqdMNkUPuti7BgVgxG CmV3oJxfBVDbv2ystSRvu8/va6kvOKWDrJkZj9PYFsF5JkIOfv/2TWpW/uVvR7Jz91ir FOPMQgyoi5RnKv66m1AImoTYVg4crF6QiERBFiauvlAYAHG/XM8hiEFp+cCCVofK7XUx 6lNVK9O142r0p/WSQAu+eotvNI6uTQQzhGSo9H8PKkYLSwH9TQUbfX453JT493R6rhHM OJBA== X-Gm-Message-State: APjAAAUAZCzn+YVrTGEcBeNTcFzseiti07ZBiqddDWsp1SPT7RcP1Szb 83HyyqPxhRc2hA1rfskMK3k= X-Google-Smtp-Source: APXvYqxD3LcoWtS/nitwx99ej+V+ekLaikYfKtxV7NjwwHGQFzMx8LTBw+Y0C7UjDlaQoBoJUMtfSA== X-Received: by 2002:a2e:9b52:: with SMTP id o18mr31069962ljj.270.1582584171731; Mon, 24 Feb 2020 14:42:51 -0800 (PST) Received: from localhost.localdomain (79-139-233-37.dynamic.spd-mgts.ru. [79.139.233.37]) by smtp.gmail.com with ESMTPSA id j7sm6264833lfh.25.2020.02.24.14.42.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 24 Feb 2020 14:42:51 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano , =?utf-8?q?Micha=C5=82_Miro?= =?utf-8?b?c8WCYXc=?= , Jasper Korten , David Heidelberg , Peter Geis , Nicolas Chauvet Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v11 16/17] ARM: multi_v7_defconfig: Enable Tegra cpuidle driver Date: Tue, 25 Feb 2020 01:40:56 +0300 Message-Id: <20200224224057.21877-17-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20200224224057.21877-1-digetx@gmail.com> References: <20200224224057.21877-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org The Tegra CPU Idle driver was moved out into driver/cpuidle/ directory and it is now a proper platform driver. Acked-by: Peter De Schrijver Acked-by: Daniel Lezcano Signed-off-by: Dmitry Osipenko --- arch/arm/configs/multi_v7_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig index 017d65f86eba..7c8a1c310bbb 100644 --- a/arch/arm/configs/multi_v7_defconfig +++ b/arch/arm/configs/multi_v7_defconfig @@ -113,6 +113,7 @@ CONFIG_CPU_IDLE=y CONFIG_ARM_CPUIDLE=y CONFIG_ARM_ZYNQ_CPUIDLE=y CONFIG_ARM_EXYNOS_CPUIDLE=y +CONFIG_ARM_TEGRA_CPUIDLE=y CONFIG_KERNEL_MODE_NEON=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_TRUSTED_FOUNDATIONS=y From patchwork Mon Feb 24 22:40:57 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 1243659 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=pck/NJYX; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 48RHCJ3kD0z9sRQ for ; Tue, 25 Feb 2020 09:43:08 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728475AbgBXWnH (ORCPT ); Mon, 24 Feb 2020 17:43:07 -0500 Received: from mail-lj1-f193.google.com ([209.85.208.193]:36825 "EHLO mail-lj1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728423AbgBXWmy (ORCPT ); Mon, 24 Feb 2020 17:42:54 -0500 Received: by mail-lj1-f193.google.com with SMTP id r19so11912989ljg.3; Mon, 24 Feb 2020 14:42:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=I/mPxVay/Hu7K8kphFH3cVYIKPmVTHJMz4OBtoUwnDw=; b=pck/NJYXlaxPY/Q2J7OuVN6xmLsa88Uo+1U6VsrkPtynrVeYdq58ngBpPJxUOrd2Vt yuwC94w71HwS9MpFJoJwOGJ4soe6WOpN0TVYTOZWZSnCF2Kiuzc1dhBt3Ho7p5LuThmu EbEDSmkg+2vzCpnlxld3cUuk6LP76DO0IeeFJGSFVcywbk5Qo8KhIWkpgvrddHtZzqnv 5Hcn4MNg62vOb7OEAqKS3SQYKUmV8ude/Tytebl0h6RCm3nqG0zuqaH/w7B372Y1CHZO kaXf8V9l6Y9dx6iXtFcwTuAMnAg5v0VxJTVJN3M+H+AJ/CjOUG3yNdQ1BEjCf0GOsZUW kH5A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=I/mPxVay/Hu7K8kphFH3cVYIKPmVTHJMz4OBtoUwnDw=; b=bxZTEqVoKLMO3dgjHBei2Gn2SsFE+AcscU3Dp1C8syG6PJQHLUwl8yOYMfyXKLFpH4 Pl6VVt154NdsGg1G2akqSH44/u10eHBINxS9ds7nLBz/hTH7+fRoqOOMMLebAoYX1Toa fFWvuCY7lH1unChhuwC29nB5An0uPzjxD5K6xNHamRCO1Qp1InOiHgvDk/fBfe7y6C6M QUt52aI65gUWVTt9cOTAxTc51GoUDvK7xrFtnq8MPMatjqRPKc7O9d9UXtcl/o3n7WeA +JuUD5NVOkExeWfYRNNqlWdVpAeKQ5Yu2I/pAYihYQ2rlgdHrNPiHKp8gpJkx/V9AWrJ wfyw== X-Gm-Message-State: APjAAAVGS2uTDRT8EZSLXsh++xu0XElhHkpEqKeuMszeaWp3XbcIxBct iU1/TnVh+Z8PZcFTUa0PP5Q= X-Google-Smtp-Source: APXvYqzSdEcbWR3nCTxQCqY20tMSNhhfhYra8xq6nWa3oEW2qkCRskdNNhiQ6sqd9ohn/Q1yrUTREw== X-Received: by 2002:a2e:9143:: with SMTP id q3mr30254680ljg.199.1582584172729; Mon, 24 Feb 2020 14:42:52 -0800 (PST) Received: from localhost.localdomain (79-139-233-37.dynamic.spd-mgts.ru. [79.139.233.37]) by smtp.gmail.com with ESMTPSA id j7sm6264833lfh.25.2020.02.24.14.42.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 24 Feb 2020 14:42:52 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano , =?utf-8?q?Micha=C5=82_Miro?= =?utf-8?b?c8WCYXc=?= , Jasper Korten , David Heidelberg , Peter Geis , Nicolas Chauvet Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v11 17/17] ARM: tegra: Enable Tegra cpuidle driver in tegra_defconfig Date: Tue, 25 Feb 2020 01:40:57 +0300 Message-Id: <20200224224057.21877-18-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20200224224057.21877-1-digetx@gmail.com> References: <20200224224057.21877-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org The Tegra CPU Idle driver was moved out into driver/cpuidle/ directory and it is now a proper platform driver. Acked-by: Peter De Schrijver Acked-by: Daniel Lezcano Signed-off-by: Dmitry Osipenko --- arch/arm/configs/tegra_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/configs/tegra_defconfig b/arch/arm/configs/tegra_defconfig index a27592d3b1fa..aa94369bdd0f 100644 --- a/arch/arm/configs/tegra_defconfig +++ b/arch/arm/configs/tegra_defconfig @@ -25,6 +25,7 @@ CONFIG_CPU_FREQ=y CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y CONFIG_CPUFREQ_DT=y CONFIG_CPU_IDLE=y +CONFIG_ARM_TEGRA_CPUIDLE=y CONFIG_VFP=y CONFIG_NEON=y CONFIG_TRUSTED_FOUNDATIONS=y