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[178.255.168.35]) by smtp.gmail.com with ESMTPSA id f11sm3280565wml.3.2020.02.18.04.20.52 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 18 Feb 2020 04:20:52 -0800 (PST) From: Michal Simek To: u-boot@lists.denx.de Cc: git@xilinx.com, Quanyang Wang Subject: [PATCH 01/16] ARM: dts: zc702: Fix I2C bus warnings Date: Tue, 18 Feb 2020 13:20:31 +0100 Message-Id: <6286dbcd900b76c5b7be9c608c733535defa315e.1582028304.git.michal.simek@xilinx.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.1 at phobos.denx.de X-Virus-Status: Clean From: Quanyang Wang The dtc has new checks for I2C and SPI buses. Fix the warnings in node names and unit-addresses. Warning from Linux kernel: arch/arm/boot/dts/zynq-zc702.dts:187.13-190.6: Warning (i2c_bus_reg): /amba/i2c@e0004000/i2c-mux@74/i2c@7/hwmon@52: I2C bus unit address format error, expected "34" arch/arm/boot/dts/zynq-zc702.dts:191.13-194.6: Warning (i2c_bus_reg): /amba/i2c@e0004000/i2c-mux@74/i2c@7/hwmon@53: I2C bus unit address format error, expected "35" arch/arm/boot/dts/zynq-zc702.dts:195.13-198.6: Warning (i2c_bus_reg): /amba/i2c@e0004000/i2c-mux@74/i2c@7/hwmon@54: I2C bus unit address format error, expected "36" Signed-off-by: Quanyang Wang Signed-off-by: Michal Simek --- arch/arm/dts/zynq-zc702.dts | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/dts/zynq-zc702.dts b/arch/arm/dts/zynq-zc702.dts index d10695740fa9..b043d341d680 100644 --- a/arch/arm/dts/zynq-zc702.dts +++ b/arch/arm/dts/zynq-zc702.dts @@ -181,17 +181,17 @@ #address-cells = <1>; #size-cells = <0>; reg = <7>; - hwmon@52 { + hwmon@34 { compatible = "ti,ucd9248"; - reg = <52>; + reg = <0x34>; }; - hwmon@53 { + hwmon@35 { compatible = "ti,ucd9248"; - reg = <53>; + reg = <0x35>; }; - hwmon@54 { + hwmon@36 { compatible = "ti,ucd9248"; - reg = <54>; + reg = <0x36>; }; }; }; From patchwork Tue Feb 18 12:20:32 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 1239973 X-Patchwork-Delegate: monstr@monstr.eu Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=xilinx.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=monstr-eu.20150623.gappssmtp.com header.i=@monstr-eu.20150623.gappssmtp.com header.a=rsa-sha256 header.s=20150623 header.b=zaycG2gT; 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[178.255.168.35]) by smtp.gmail.com with ESMTPSA id 16sm3419856wmi.0.2020.02.18.04.20.53 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 18 Feb 2020 04:20:53 -0800 (PST) From: Michal Simek To: u-boot@lists.denx.de Cc: git@xilinx.com, Sudeep Holla Subject: [PATCH 02/16] ARM: dts: zynq: replace gpio-key, wakeup with wakeup-source property Date: Tue, 18 Feb 2020 13:20:32 +0100 Message-Id: X-Mailer: git-send-email 2.25.0 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.1 at phobos.denx.de X-Virus-Status: Clean From: Sudeep Holla Most of the legacy "gpio-key,wakeup" boolean property is already replaced with "wakeup-source". However few occurrences of old property has popped up again, probably from the remnants in downstream trees. Replace the legacy properties with the unified "wakeup-source" property introduced in the Linux kernel commit 700a38b27eef ("Input: gpio_keys - switch to using generic device properties") Cc: Michal Simek Signed-off-by: Sudeep Holla Signed-off-by: Michal Simek --- arch/arm/dts/zynq-zturn.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/dts/zynq-zturn.dts b/arch/arm/dts/zynq-zturn.dts index cc41efcb4631..600e8ee0255c 100644 --- a/arch/arm/dts/zynq-zturn.dts +++ b/arch/arm/dts/zynq-zturn.dts @@ -54,7 +54,7 @@ label = "K1"; gpios = <&gpio0 0x32 0x1>; linux,code = <0x66>; - gpio-key,wakeup; + wakeup-source; autorepeat; }; }; From patchwork Tue Feb 18 12:20:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 1239978 X-Patchwork-Delegate: monstr@monstr.eu Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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[178.255.168.35]) by smtp.gmail.com with ESMTPSA id z6sm1517329wrs.96.2020.02.18.04.20.55 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 18 Feb 2020 04:20:55 -0800 (PST) From: Michal Simek To: u-boot@lists.denx.de Cc: git@xilinx.com Subject: [PATCH 03/16] arm64: zynqmp: Replace gpio-key, wakeup with wakeup source Date: Tue, 18 Feb 2020 13:20:33 +0100 Message-Id: <2b742a8771daec3b81cd80ad0ed83a35e78ff3c7.1582028304.git.michal.simek@xilinx.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.1 at phobos.denx.de X-Virus-Status: Clean The same change has been done for Zynq by commit 1241c72b6db1 ("ARM: dts: zynq: replace gpio-key,wakeup with wakeup-source property") in mainline Linux kernel. Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp-zcu208-revA.dts | 2 +- arch/arm/dts/zynqmp-zcu216-revA.dts | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/dts/zynqmp-zcu208-revA.dts b/arch/arm/dts/zynqmp-zcu208-revA.dts index 9181060b893a..85f9e1f62850 100644 --- a/arch/arm/dts/zynqmp-zcu208-revA.dts +++ b/arch/arm/dts/zynqmp-zcu208-revA.dts @@ -50,7 +50,7 @@ label = "sw19"; gpios = <&gpio 22 GPIO_ACTIVE_HIGH>; linux,code = ; - gpio-key,wakeup; + wakeup-source; autorepeat; }; }; diff --git a/arch/arm/dts/zynqmp-zcu216-revA.dts b/arch/arm/dts/zynqmp-zcu216-revA.dts index c294e1b51a22..2db546fddd2c 100644 --- a/arch/arm/dts/zynqmp-zcu216-revA.dts +++ b/arch/arm/dts/zynqmp-zcu216-revA.dts @@ -50,7 +50,7 @@ label = "sw19"; gpios = <&gpio 22 GPIO_ACTIVE_HIGH>; linux,code = ; - gpio-key,wakeup; + wakeup-source; autorepeat; }; }; From patchwork Tue Feb 18 12:20:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 1239979 X-Patchwork-Delegate: monstr@monstr.eu Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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[178.255.168.35]) by smtp.gmail.com with ESMTPSA id l131sm3338724wmf.31.2020.02.18.04.20.57 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 18 Feb 2020 04:20:57 -0800 (PST) From: Michal Simek To: u-boot@lists.denx.de Cc: git@xilinx.com Subject: [PATCH 04/16] arm64: zynqmp: Update Copyright years to 2020 Date: Tue, 18 Feb 2020 13:20:34 +0100 Message-Id: <456c6d26e82d829b7010e0f40dd12e668d70fb72.1582028304.git.michal.simek@xilinx.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.1 at phobos.denx.de X-Virus-Status: Clean Trivial change. Signed-off-by: Michal Simek --- arch/arm/dts/avnet-ultra96-rev1.dts | 2 +- arch/arm/dts/zynqmp-clk-ccf.dtsi | 2 +- arch/arm/dts/zynqmp-clk.dtsi | 2 +- arch/arm/dts/zynqmp-mini-qspi.dts | 2 +- arch/arm/dts/zynqmp-zc1232-revA.dts | 2 +- arch/arm/dts/zynqmp-zc1254-revA.dts | 2 +- arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts | 2 +- arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts | 2 +- arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts | 2 +- arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts | 2 +- arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts | 2 +- arch/arm/dts/zynqmp-zcu100-revC.dts | 2 +- arch/arm/dts/zynqmp-zcu102-rev1.0.dts | 2 +- arch/arm/dts/zynqmp-zcu102-revA.dts | 2 +- arch/arm/dts/zynqmp-zcu102-revB.dts | 2 +- arch/arm/dts/zynqmp-zcu104-revA.dts | 2 +- arch/arm/dts/zynqmp-zcu104-revC.dts | 2 +- arch/arm/dts/zynqmp-zcu106-revA.dts | 2 +- arch/arm/dts/zynqmp-zcu111-revA.dts | 2 +- arch/arm/dts/zynqmp-zcu1275-revA.dts | 2 +- arch/arm/dts/zynqmp-zcu1275-revB.dts | 2 +- arch/arm/dts/zynqmp-zcu1285-revA.dts | 2 +- arch/arm/dts/zynqmp-zcu208-revA.dts | 2 +- arch/arm/dts/zynqmp-zcu216-revA.dts | 2 +- arch/arm/dts/zynqmp.dtsi | 2 +- 25 files changed, 25 insertions(+), 25 deletions(-) diff --git a/arch/arm/dts/avnet-ultra96-rev1.dts b/arch/arm/dts/avnet-ultra96-rev1.dts index 88aa06fa78a8..ddb8febaece1 100644 --- a/arch/arm/dts/avnet-ultra96-rev1.dts +++ b/arch/arm/dts/avnet-ultra96-rev1.dts @@ -2,7 +2,7 @@ /* * dts file for Avnet Ultra96 rev1 * - * (C) Copyright 2018, Xilinx, Inc. + * (C) Copyright 2018 - 2020, Xilinx, Inc. * * Michal Simek */ diff --git a/arch/arm/dts/zynqmp-clk-ccf.dtsi b/arch/arm/dts/zynqmp-clk-ccf.dtsi index 8eacd22d7cda..1098e890192c 100644 --- a/arch/arm/dts/zynqmp-clk-ccf.dtsi +++ b/arch/arm/dts/zynqmp-clk-ccf.dtsi @@ -2,7 +2,7 @@ /* * Clock specification for Xilinx ZynqMP * - * (C) Copyright 2017 - 2019, Xilinx, Inc. + * (C) Copyright 2017 - 2020, Xilinx, Inc. * * Michal Simek */ diff --git a/arch/arm/dts/zynqmp-clk.dtsi b/arch/arm/dts/zynqmp-clk.dtsi index c9464ec8eb27..82eac56c9d93 100644 --- a/arch/arm/dts/zynqmp-clk.dtsi +++ b/arch/arm/dts/zynqmp-clk.dtsi @@ -2,7 +2,7 @@ /* * Clock specification for Xilinx ZynqMP * - * (C) Copyright 2015 - 2018, Xilinx, Inc. + * (C) Copyright 2015 - 2020, Xilinx, Inc. * * Michal Simek */ diff --git a/arch/arm/dts/zynqmp-mini-qspi.dts b/arch/arm/dts/zynqmp-mini-qspi.dts index e4ba5ae9b683..c523e8123666 100644 --- a/arch/arm/dts/zynqmp-mini-qspi.dts +++ b/arch/arm/dts/zynqmp-mini-qspi.dts @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP Mini Configuration * - * (C) Copyright 2015 - 2018, Xilinx, Inc. + * (C) Copyright 2015 - 2020, Xilinx, Inc. * * Siva Durga Prasad * Michal Simek diff --git a/arch/arm/dts/zynqmp-zc1232-revA.dts b/arch/arm/dts/zynqmp-zc1232-revA.dts index 6117f83c474e..87152afc32f5 100644 --- a/arch/arm/dts/zynqmp-zc1232-revA.dts +++ b/arch/arm/dts/zynqmp-zc1232-revA.dts @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP ZC1232 * - * (C) Copyright 2017 - 2018, Xilinx, Inc. + * (C) Copyright 2017 - 2020, Xilinx, Inc. * * Michal Simek */ diff --git a/arch/arm/dts/zynqmp-zc1254-revA.dts b/arch/arm/dts/zynqmp-zc1254-revA.dts index 6ac8346d23d9..d6b2834f3aa6 100644 --- a/arch/arm/dts/zynqmp-zc1254-revA.dts +++ b/arch/arm/dts/zynqmp-zc1254-revA.dts @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP ZC1254 * - * (C) Copyright 2015 - 2018, Xilinx, Inc. + * (C) Copyright 2015 - 2020, Xilinx, Inc. * * Michal Simek * Siva Durga Prasad Paladugu diff --git a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts index bb6a94eefb8f..d604cf134252 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP zc1751-xm015-dc1 * - * (C) Copyright 2015 - 2018, Xilinx, Inc. + * (C) Copyright 2015 - 2020, Xilinx, Inc. * * Michal Simek */ diff --git a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts index 1cc8aaa87976..2ff7952e70e5 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP zc1751-xm016-dc2 * - * (C) Copyright 2015 - 2018, Xilinx, Inc. + * (C) Copyright 2015 - 2020, Xilinx, Inc. * * Michal Simek */ diff --git a/arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts b/arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts index 2ead8dd24d57..c7de59e1e986 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm017-dc3.dts @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP zc1751-xm017-dc3 * - * (C) Copyright 2016 - 2018, Xilinx, Inc. + * (C) Copyright 2016 - 2020, Xilinx, Inc. * * Michal Simek */ diff --git a/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts b/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts index 84c2904dc202..13508c45191f 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP zc1751-xm018-dc4 * - * (C) Copyright 2015 - 2018, Xilinx, Inc. + * (C) Copyright 2015 - 2020, Xilinx, Inc. * * Michal Simek */ diff --git a/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts b/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts index 12c0173c5599..8d8ebeaac3bf 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm019-dc5.dts @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP zc1751-xm019-dc5 * - * (C) Copyright 2015 - 2018, Xilinx, Inc. + * (C) Copyright 2015 - 2020, Xilinx, Inc. * * Siva Durga Prasad * Michal Simek diff --git a/arch/arm/dts/zynqmp-zcu100-revC.dts b/arch/arm/dts/zynqmp-zcu100-revC.dts index 21118c8cc34a..1726edf78ed2 100644 --- a/arch/arm/dts/zynqmp-zcu100-revC.dts +++ b/arch/arm/dts/zynqmp-zcu100-revC.dts @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP ZCU100 revC * - * (C) Copyright 2016 - 2018, Xilinx, Inc. + * (C) Copyright 2016 - 2020, Xilinx, Inc. * * Michal Simek * Nathalie Chan King Choy diff --git a/arch/arm/dts/zynqmp-zcu102-rev1.0.dts b/arch/arm/dts/zynqmp-zcu102-rev1.0.dts index 6c702f2674e3..f39013794fa2 100644 --- a/arch/arm/dts/zynqmp-zcu102-rev1.0.dts +++ b/arch/arm/dts/zynqmp-zcu102-rev1.0.dts @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP ZCU102 Rev1.0 * - * (C) Copyright 2016 - 2018, Xilinx, Inc. + * (C) Copyright 2016 - 2020, Xilinx, Inc. * * Michal Simek */ diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index b580f9263d02..222b67c7ce2f 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP ZCU102 RevA * - * (C) Copyright 2015 - 2018, Xilinx, Inc. + * (C) Copyright 2015 - 2020, Xilinx, Inc. * * Michal Simek */ diff --git a/arch/arm/dts/zynqmp-zcu102-revB.dts b/arch/arm/dts/zynqmp-zcu102-revB.dts index 38ec18816456..2422558b7484 100644 --- a/arch/arm/dts/zynqmp-zcu102-revB.dts +++ b/arch/arm/dts/zynqmp-zcu102-revB.dts @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP ZCU102 RevB * - * (C) Copyright 2016 - 2018, Xilinx, Inc. + * (C) Copyright 2016 - 2020, Xilinx, Inc. * * Michal Simek */ diff --git a/arch/arm/dts/zynqmp-zcu104-revA.dts b/arch/arm/dts/zynqmp-zcu104-revA.dts index 82557c88d21c..6375b47ff859 100644 --- a/arch/arm/dts/zynqmp-zcu104-revA.dts +++ b/arch/arm/dts/zynqmp-zcu104-revA.dts @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP ZCU104 * - * (C) Copyright 2017 - 2018, Xilinx, Inc. + * (C) Copyright 2017 - 2020, Xilinx, Inc. * * Michal Simek */ diff --git a/arch/arm/dts/zynqmp-zcu104-revC.dts b/arch/arm/dts/zynqmp-zcu104-revC.dts index e0e7dac010c5..425d7605bf5c 100644 --- a/arch/arm/dts/zynqmp-zcu104-revC.dts +++ b/arch/arm/dts/zynqmp-zcu104-revC.dts @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP ZCU104 * - * (C) Copyright 2017 - 2018, Xilinx, Inc. + * (C) Copyright 2017 - 2020, Xilinx, Inc. * * Michal Simek */ diff --git a/arch/arm/dts/zynqmp-zcu106-revA.dts b/arch/arm/dts/zynqmp-zcu106-revA.dts index d31982fce784..dc533f5f6dd7 100644 --- a/arch/arm/dts/zynqmp-zcu106-revA.dts +++ b/arch/arm/dts/zynqmp-zcu106-revA.dts @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP ZCU106 * - * (C) Copyright 2016, Xilinx, Inc. + * (C) Copyright 2016 - 2020, Xilinx, Inc. * * Michal Simek */ diff --git a/arch/arm/dts/zynqmp-zcu111-revA.dts b/arch/arm/dts/zynqmp-zcu111-revA.dts index bff224f78d1d..1304c509ac2a 100644 --- a/arch/arm/dts/zynqmp-zcu111-revA.dts +++ b/arch/arm/dts/zynqmp-zcu111-revA.dts @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP ZCU111 * - * (C) Copyright 2017 - 2018, Xilinx, Inc. + * (C) Copyright 2017 - 2020, Xilinx, Inc. * * Michal Simek */ diff --git a/arch/arm/dts/zynqmp-zcu1275-revA.dts b/arch/arm/dts/zynqmp-zcu1275-revA.dts index c22de576a586..8755bc433b4f 100644 --- a/arch/arm/dts/zynqmp-zcu1275-revA.dts +++ b/arch/arm/dts/zynqmp-zcu1275-revA.dts @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP ZCU1275 * - * (C) Copyright 2017 - 2018, Xilinx, Inc. + * (C) Copyright 2017 - 2020, Xilinx, Inc. * * Michal Simek * Siva Durga Prasad Paladugu diff --git a/arch/arm/dts/zynqmp-zcu1275-revB.dts b/arch/arm/dts/zynqmp-zcu1275-revB.dts index 2ec29b0b5d11..16f609c7e5c0 100644 --- a/arch/arm/dts/zynqmp-zcu1275-revB.dts +++ b/arch/arm/dts/zynqmp-zcu1275-revB.dts @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP ZCU1275 RevB * - * (C) Copyright 2018, Xilinx, Inc. + * (C) Copyright 2018 - 2020, Xilinx, Inc. * * Michal Simek * Siva Durga Prasad Paladugu diff --git a/arch/arm/dts/zynqmp-zcu1285-revA.dts b/arch/arm/dts/zynqmp-zcu1285-revA.dts index 9c1801313889..8a4d5b9fed19 100644 --- a/arch/arm/dts/zynqmp-zcu1285-revA.dts +++ b/arch/arm/dts/zynqmp-zcu1285-revA.dts @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP ZCU1285 RevA * - * (C) Copyright 2018 - 2019, Xilinx, Inc. + * (C) Copyright 2018 - 2020, Xilinx, Inc. * * Michal Simek * Siva Durga Prasad Paladugu diff --git a/arch/arm/dts/zynqmp-zcu208-revA.dts b/arch/arm/dts/zynqmp-zcu208-revA.dts index 85f9e1f62850..7395f23b6757 100644 --- a/arch/arm/dts/zynqmp-zcu208-revA.dts +++ b/arch/arm/dts/zynqmp-zcu208-revA.dts @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP ZCU208 * - * (C) Copyright 2017 - 2019, Xilinx, Inc. + * (C) Copyright 2017 - 2020, Xilinx, Inc. * * Michal Simek */ diff --git a/arch/arm/dts/zynqmp-zcu216-revA.dts b/arch/arm/dts/zynqmp-zcu216-revA.dts index 2db546fddd2c..f08bbe36c2a5 100644 --- a/arch/arm/dts/zynqmp-zcu216-revA.dts +++ b/arch/arm/dts/zynqmp-zcu216-revA.dts @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP ZCU216 * - * (C) Copyright 2017 - 2019, Xilinx, Inc. + * (C) Copyright 2017 - 2020, Xilinx, Inc. * * Michal Simek */ diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index 9e7fae83f787..ec0dd73e1504 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP * - 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[178.255.168.35]) by smtp.gmail.com with ESMTPSA id y131sm3406621wmc.13.2020.02.18.04.20.58 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 18 Feb 2020 04:20:58 -0800 (PST) From: Michal Simek To: u-boot@lists.denx.de Cc: git@xilinx.com Subject: [PATCH 05/16] ARM: zynq: Fix spi name node Date: Tue, 18 Feb 2020 13:20:35 +0100 Message-Id: <3863a9dce687283bff274f4df7164d09025cd940.1582028304.git.michal.simek@xilinx.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.1 at phobos.denx.de X-Virus-Status: Clean None name address should be aligned with address. DTC 1.5.1 is reporting issues related to that. arch/arm/boot/dts/zynq-zc770-xm010.dts:106.10-119.4: Warning (spi_bus_reg): /amba/spi@e0007000/flash@0: SPI bus unit address format error, expected "1" arch/arm/boot/dts/zynq-zc770-xm013.dts:101.19-109.4: Warning (spi_bus_reg): /amba/spi@e0006000/eeprom@0: SPI bus unit address format error, expected "2" Signed-off-by: Michal Simek --- arch/arm/dts/zynq-zc770-xm010.dts | 2 +- arch/arm/dts/zynq-zc770-xm013.dts | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/dts/zynq-zc770-xm010.dts b/arch/arm/dts/zynq-zc770-xm010.dts index e1f34653ec3c..c547d7921d9c 100644 --- a/arch/arm/dts/zynq-zc770-xm010.dts +++ b/arch/arm/dts/zynq-zc770-xm010.dts @@ -72,7 +72,7 @@ status = "okay"; num-cs = <4>; is-decoded-cs = <0>; - flash@0 { + flash@1 { compatible = "sst25wf080", "jedec,spi-nor"; reg = <1>; spi-max-frequency = <1000000>; diff --git a/arch/arm/dts/zynq-zc770-xm013.dts b/arch/arm/dts/zynq-zc770-xm013.dts index 05a49982cc4b..bdf0c2f956d1 100644 --- a/arch/arm/dts/zynq-zc770-xm013.dts +++ b/arch/arm/dts/zynq-zc770-xm013.dts @@ -67,7 +67,7 @@ status = "okay"; num-cs = <4>; is-decoded-cs = <0>; - eeprom: eeprom@0 { + eeprom: eeprom@2 { at25,byte-len = <8192>; at25,addr-mode = <2>; at25,page-size = <32>; From patchwork Tue Feb 18 12:20:36 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 1239980 X-Patchwork-Delegate: monstr@monstr.eu Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=xilinx.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=monstr-eu.20150623.gappssmtp.com header.i=@monstr-eu.20150623.gappssmtp.com header.a=rsa-sha256 header.s=20150623 header.b=Z2GvNp92; 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[178.255.168.35]) by smtp.gmail.com with ESMTPSA id y7sm2933515wmd.1.2020.02.18.04.21.00 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 18 Feb 2020 04:21:00 -0800 (PST) From: Michal Simek To: u-boot@lists.denx.de Cc: git@xilinx.com Subject: [PATCH 06/16] arm64: zynqmp: Remove unused zynqmp-clk.dtsi Date: Tue, 18 Feb 2020 13:20:36 +0100 Message-Id: <5fb5cb8ba6bb623684fed92b28daea96ee55693d.1582028304.git.michal.simek@xilinx.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.1 at phobos.denx.de X-Virus-Status: Clean All boards have been converted to firmware based driver that's why we can remove this file now. Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp-clk.dtsi | 244 ----------------------------------- 1 file changed, 244 deletions(-) delete mode 100644 arch/arm/dts/zynqmp-clk.dtsi diff --git a/arch/arm/dts/zynqmp-clk.dtsi b/arch/arm/dts/zynqmp-clk.dtsi deleted file mode 100644 index 82eac56c9d93..000000000000 --- a/arch/arm/dts/zynqmp-clk.dtsi +++ /dev/null @@ -1,244 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Clock specification for Xilinx ZynqMP - * - * (C) Copyright 2015 - 2020, Xilinx, Inc. - * - * Michal Simek - */ - -/ { - clk100: clk100 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <100000000>; - u-boot,dm-pre-reloc; - }; - - clk125: clk125 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <125000000>; - }; - - clk200: clk200 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <200000000>; - u-boot,dm-pre-reloc; - }; - - clk250: clk250 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <250000000>; - }; - - clk300: clk300 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <300000000>; - u-boot,dm-pre-reloc; - }; - - clk600: clk600 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <600000000>; - }; - - dp_aclk: clock0 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <100000000>; - clock-accuracy = <100>; - }; - - dp_aud_clk: clock1 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <24576000>; - clock-accuracy = <100>; - }; - - dpdma_clk: dpdma-clk { - compatible = "fixed-clock"; - #clock-cells = <0x0>; - clock-frequency = <533000000>; - }; - - drm_clock: drm-clock { - compatible = "fixed-clock"; - #clock-cells = <0x0>; - clock-frequency = <262750000>; - clock-accuracy = <0x64>; - }; -}; - -&can0 { - clocks = <&clk100 &clk100>; -}; - -&can1 { - clocks = <&clk100 &clk100>; -}; - -&fpd_dma_chan1 { - clocks = <&clk600>, <&clk100>; -}; - -&fpd_dma_chan2 { - clocks = <&clk600>, <&clk100>; -}; - -&fpd_dma_chan3 { - clocks = <&clk600>, <&clk100>; -}; - -&fpd_dma_chan4 { - clocks = <&clk600>, <&clk100>; -}; - -&fpd_dma_chan5 { - clocks = <&clk600>, <&clk100>; -}; - -&fpd_dma_chan6 { - clocks = <&clk600>, <&clk100>; -}; - -&fpd_dma_chan7 { - clocks = <&clk600>, <&clk100>; -}; - -&fpd_dma_chan8 { - clocks = <&clk600>, <&clk100>; -}; - -&lpd_dma_chan1 { - clocks = <&clk600>, <&clk100>; -}; - -&lpd_dma_chan2 { - clocks = <&clk600>, <&clk100>; -}; - -&lpd_dma_chan3 { - clocks = <&clk600>, <&clk100>; -}; - -&lpd_dma_chan4 { - clocks = <&clk600>, <&clk100>; -}; - -&lpd_dma_chan5 { - clocks = <&clk600>, <&clk100>; -}; - -&lpd_dma_chan6 { - clocks = <&clk600>, <&clk100>; -}; - -&lpd_dma_chan7 { - clocks = <&clk600>, <&clk100>; -}; - -&lpd_dma_chan8 { - clocks = <&clk600>, <&clk100>; -}; - -&nand0 { - clocks = <&clk100 &clk100>; -}; - -&gem0 { - clocks = <&clk125>, <&clk125>, <&clk125>; -}; - -&gem1 { - clocks = <&clk125>, <&clk125>, <&clk125>; -}; - -&gem2 { - clocks = <&clk125>, <&clk125>, <&clk125>; -}; - -&gem3 { - clocks = <&clk125>, <&clk125>, <&clk125>; -}; - -&gpio { - clocks = <&clk100>; -}; - -&i2c0 { - clocks = <&clk100>; -}; - -&i2c1 { - clocks = <&clk100>; -}; - -&qspi { - clocks = <&clk300 &clk300>; -}; - -&sata { - clocks = <&clk250>; -}; - -&sdhci0 { - clocks = <&clk200 &clk200>; -}; - -&sdhci1 { - clocks = <&clk200 &clk200>; -}; - -&spi0 { - clocks = <&clk200 &clk200>; -}; - -&spi1 { - clocks = <&clk200 &clk200>; -}; - -&uart0 { - clocks = <&clk100 &clk100>; -}; - -&uart1 { - clocks = <&clk100 &clk100>; -}; - -&usb0 { - clocks = <&clk250>, <&clk250>; -}; - -&usb1 { - clocks = <&clk250>, <&clk250>; -}; - -&watchdog0 { - clocks = <&clk100>; -}; - -&lpd_watchdog { - clocks = <&clk250>; -}; - -&xilinx_drm { - clocks = <&drm_clock>; -}; - -&xlnx_dp { - clocks = <&dp_aclk>, <&dp_aud_clk>; -}; - -&xlnx_dpdma { - clocks = <&dpdma_clk>; -}; - -&xlnx_dp_snd_codec0 { - clocks = <&dp_aud_clk>; -}; From patchwork Tue Feb 18 12:20:37 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 1239982 X-Patchwork-Delegate: monstr@monstr.eu Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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[178.255.168.35]) by smtp.gmail.com with ESMTPSA id r6sm5636390wrq.92.2020.02.18.04.21.01 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 18 Feb 2020 04:21:02 -0800 (PST) From: Michal Simek To: u-boot@lists.denx.de Cc: git@xilinx.com, Nava kishore Manne Subject: [PATCH 07/16] arm64: zynqmp: Sync zynqmp fpga manager with mainline Date: Tue, 18 Feb 2020 13:20:37 +0100 Message-Id: <3c1a0da3a0acac89daa7bc039d8b617f5a773558.1582028304.git.michal.simek@xilinx.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.1 at phobos.denx.de X-Virus-Status: Clean From: Nava kishore Manne Sync zynqmp fpga manager with mainline. Signed-off-by: Nava kishore Manne Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp-clk-ccf.dtsi | 4 ++++ arch/arm/dts/zynqmp.dtsi | 12 +++++++----- 2 files changed, 11 insertions(+), 5 deletions(-) diff --git a/arch/arm/dts/zynqmp-clk-ccf.dtsi b/arch/arm/dts/zynqmp-clk-ccf.dtsi index 1098e890192c..0b0fb6e98788 100644 --- a/arch/arm/dts/zynqmp-clk-ccf.dtsi +++ b/arch/arm/dts/zynqmp-clk-ccf.dtsi @@ -291,3 +291,7 @@ &xlnx_dp_snd_codec0 { clocks = <&zynqmp_clk DP_AUDIO_REF>; }; + +&zynqmp_pcap { + clocks = <&zynqmp_clk PCAP>; +}; diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index ec0dd73e1504..58ac62c4f851 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -149,6 +149,11 @@ #power-domain-cells = <0x1>; u-boot,dm-pre-reloc; + zynqmp_pcap: pcap { + compatible = "xlnx,zynqmp-pcap-fpga"; + clock-names = "ref_clk"; + }; + zynqmp_power: zynqmp-power { u-boot,dm-pre-reloc; compatible = "xlnx,zynqmp-power"; @@ -180,9 +185,10 @@ fpga_full: fpga-full { compatible = "fpga-region"; - fpga-mgr = <&pcap>; + fpga-mgr = <&zynqmp_pcap>; #address-cells = <2>; #size-cells = <2>; + ranges; }; nvmem_firmware { @@ -195,10 +201,6 @@ }; }; - pcap: pcap { - compatible = "xlnx,zynqmp-pcap-fpga"; - }; - rst: reset-controller { compatible = "xlnx,zynqmp-reset"; #reset-cells = <1>; From patchwork Tue Feb 18 12:20:38 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 1239985 X-Patchwork-Delegate: monstr@monstr.eu Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=xilinx.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; 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[178.255.168.35]) by smtp.gmail.com with ESMTPSA id t9sm6060173wrv.63.2020.02.18.04.21.03 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 18 Feb 2020 04:21:03 -0800 (PST) From: Michal Simek To: u-boot@lists.denx.de Cc: git@xilinx.com, Manish Narani Subject: [PATCH 08/16] arm64: zynqmp: Add 'no-1-8-v' property for ZynqMP Boards Date: Tue, 18 Feb 2020 13:20:38 +0100 Message-Id: <8c8be22a6146ff599fe8a459d2b395e1caceb14f.1582028304.git.michal.simek@xilinx.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.1 at phobos.denx.de X-Virus-Status: Clean From: Manish Narani Modify dts files to add 'no-1-8-v' property for all the ZynqMP boards. User can remove this property to enable the UHS mode. This is to keep the same speed (HS) modes across all the stages of the Linux Boot. Due to power cycling limitation of some of the ZynqMP boards, some SD cards don't get power cycled and are failing in Linux. Signed-off-by: Manish Narani Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts | 5 ++++- arch/arm/dts/zynqmp-zcu102-rev1.0.dts | 4 ---- arch/arm/dts/zynqmp-zcu102-revA.dts | 6 +++++- arch/arm/dts/zynqmp-zcu106-revA.dts | 4 ++++ arch/arm/dts/zynqmp-zcu111-revA.dts | 4 ++++ arch/arm/dts/zynqmp-zcu1285-revA.dts | 4 ++++ arch/arm/dts/zynqmp-zcu208-revA.dts | 4 ++++ arch/arm/dts/zynqmp-zcu216-revA.dts | 4 ++++ 8 files changed, 29 insertions(+), 6 deletions(-) diff --git a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts index d604cf134252..d8ea5578e779 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts @@ -154,7 +154,10 @@ /* SD1 with level shifter */ &sdhci1 { status = "okay"; - no-1-8-v; /* for 1.0 silicon */ + /* + * This property should be removed for supporting UHS mode + */ + no-1-8-v; xlnx,mio_bank = <1>; }; diff --git a/arch/arm/dts/zynqmp-zcu102-rev1.0.dts b/arch/arm/dts/zynqmp-zcu102-rev1.0.dts index f39013794fa2..d508f3359943 100644 --- a/arch/arm/dts/zynqmp-zcu102-rev1.0.dts +++ b/arch/arm/dts/zynqmp-zcu102-rev1.0.dts @@ -34,7 +34,3 @@ reg = <0xe0 0x3>; }; }; - -&sdhci1 { - /delete-property/ no-1-8-v; -}; diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index 222b67c7ce2f..e63f4b9cd8b0 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -655,7 +655,11 @@ /* SD1 with level shifter */ &sdhci1 { status = "okay"; - no-1-8-v; /* for 1.0 silicon */ + /* + * 1.0 revision has level shifter and this property should be + * removed for supporting UHS mode + */ + no-1-8-v; xlnx,mio_bank = <1>; }; diff --git a/arch/arm/dts/zynqmp-zcu106-revA.dts b/arch/arm/dts/zynqmp-zcu106-revA.dts index dc533f5f6dd7..a5c4309f2f39 100644 --- a/arch/arm/dts/zynqmp-zcu106-revA.dts +++ b/arch/arm/dts/zynqmp-zcu106-revA.dts @@ -653,6 +653,10 @@ /* SD1 with level shifter */ &sdhci1 { status = "okay"; + /* + * This property should be removed for supporting UHS mode + */ + no-1-8-v; xlnx,mio_bank = <1>; }; diff --git a/arch/arm/dts/zynqmp-zcu111-revA.dts b/arch/arm/dts/zynqmp-zcu111-revA.dts index 1304c509ac2a..755c30e9ff67 100644 --- a/arch/arm/dts/zynqmp-zcu111-revA.dts +++ b/arch/arm/dts/zynqmp-zcu111-revA.dts @@ -567,6 +567,10 @@ &sdhci1 { status = "okay"; disable-wp; + /* + * This property should be removed for supporting UHS mode + */ + no-1-8-v; xlnx,mio_bank = <1>; }; diff --git a/arch/arm/dts/zynqmp-zcu1285-revA.dts b/arch/arm/dts/zynqmp-zcu1285-revA.dts index 8a4d5b9fed19..d8b9cb1a9e13 100644 --- a/arch/arm/dts/zynqmp-zcu1285-revA.dts +++ b/arch/arm/dts/zynqmp-zcu1285-revA.dts @@ -241,5 +241,9 @@ &sdhci1 { status = "okay"; + /* + * This property should be removed for supporting UHS mode + */ + no-1-8-v; xlnx,mio_bank = <1>; }; diff --git a/arch/arm/dts/zynqmp-zcu208-revA.dts b/arch/arm/dts/zynqmp-zcu208-revA.dts index 7395f23b6757..75ecd7a5c203 100644 --- a/arch/arm/dts/zynqmp-zcu208-revA.dts +++ b/arch/arm/dts/zynqmp-zcu208-revA.dts @@ -563,6 +563,10 @@ &sdhci1 { status = "okay"; disable-wp; + /* + * This property should be removed for supporting UHS mode + */ + no-1-8-v; xlnx,mio_bank = <1>; }; diff --git a/arch/arm/dts/zynqmp-zcu216-revA.dts b/arch/arm/dts/zynqmp-zcu216-revA.dts index f08bbe36c2a5..f3b5edfeb423 100644 --- a/arch/arm/dts/zynqmp-zcu216-revA.dts +++ b/arch/arm/dts/zynqmp-zcu216-revA.dts @@ -567,6 +567,10 @@ &sdhci1 { status = "okay"; disable-wp; + /* + * This property should be removed for supporting UHS mode + */ + no-1-8-v; xlnx,mio_bank = <1>; }; From patchwork Tue Feb 18 12:20:39 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 1239983 X-Patchwork-Delegate: monstr@monstr.eu Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=xilinx.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=monstr-eu.20150623.gappssmtp.com header.i=@monstr-eu.20150623.gappssmtp.com header.a=rsa-sha256 header.s=20150623 header.b=wvW63NmP; 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[178.255.168.35]) by smtp.gmail.com with ESMTPSA id u14sm5537140wrm.51.2020.02.18.04.21.05 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 18 Feb 2020 04:21:05 -0800 (PST) From: Michal Simek To: u-boot@lists.denx.de Cc: git@xilinx.com Subject: [PATCH 09/16] arm64: zynqmp: Remove second copy of reset-controller Date: Tue, 18 Feb 2020 13:20:39 +0100 Message-Id: X-Mailer: git-send-email 2.25.0 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.1 at phobos.denx.de X-Virus-Status: Clean Reset controller is handled via firmware that's why it should be the part of firmware node. Origin solution hasn't been removed when above change was applied by commit b07e97b4ba27 ("arm64: zynqmp: Use reset header in zynqmp.dtsi"). Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp.dtsi | 5 ----- 1 file changed, 5 deletions(-) diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index 58ac62c4f851..ed28f1f695bb 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -201,11 +201,6 @@ }; }; - rst: reset-controller { - compatible = "xlnx,zynqmp-reset"; - #reset-cells = <1>; - }; - xlnx_dp_snd_card: dp_snd_card { compatible = "xlnx,dp-snd-card"; status = "disabled"; From patchwork Tue Feb 18 12:20:40 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 1239984 X-Patchwork-Delegate: monstr@monstr.eu Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=xilinx.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=monstr-eu.20150623.gappssmtp.com header.i=@monstr-eu.20150623.gappssmtp.com header.a=rsa-sha256 header.s=20150623 header.b=k5cGYEBU; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48MKkT0NDzz9sRG for ; Tue, 18 Feb 2020 23:22:56 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 5641080227; Tue, 18 Feb 2020 13:21:39 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=xilinx.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=monstr-eu.20150623.gappssmtp.com header.i=@monstr-eu.20150623.gappssmtp.com header.b="k5cGYEBU"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 7FD7E813A6; Tue, 18 Feb 2020 13:21:11 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,SPF_HELO_NONE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-wr1-x443.google.com (mail-wr1-x443.google.com [IPv6:2a00:1450:4864:20::443]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id E991D813A6 for ; Tue, 18 Feb 2020 13:21:07 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=xilinx.com Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=monstr@monstr.eu Received: by mail-wr1-x443.google.com with SMTP id m16so23634457wrx.11 for ; Tue, 18 Feb 2020 04:21:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monstr-eu.20150623.gappssmtp.com; s=20150623; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=DGYHaoCMoyxYLaJFViMm4WrQtZubBDnWhSUvBz9YH2A=; b=k5cGYEBUYCx0mx7GZIyXP5eEyjmtnq8GvZQ7hxP+2QC9ieNt+gJGidBKhpTy7JZK5n S/0G4TlLr1wOtgiI3Fb1CNfGGDurkOsptjVAdf17E1BX218lBXjjF/lyXqNuRejFz6Mv B+0xOQKJ0rW9VTUa6HMnow51ueW0BnvUcSFCgVoLOwLQGOd+5wHL0zNt1Jbk51aIRjx9 x/Y/vIkvrjojXKUt/5nRSeOIMckrmW5JprHBecvp7tXt2n4zxkFIGx2FbkqpUsG8LaA4 gcuP10xECdgtutgPev8uAbHLp5csv/BxWIHGAlwa07lizmwvKjycoY6s4HeVKlwRu1Sj D4VA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=DGYHaoCMoyxYLaJFViMm4WrQtZubBDnWhSUvBz9YH2A=; b=ei81POx8JdY9yojLTQWXaEEVjaUkY6NO+RDJ1QyhuX/Fa4N/dR2Zqdo5K+oj+I3/6I QhTCxh0uqJwTOLWca0qEpvm2lCXHh6l7jdprZpIWfcishBh/BMTyQoBk+U/WS6t6jteC R3naOElpAK1UGN6Aas83i3rmw69U7BuQT7q4s5sGCpF6/J9quyP6WqV6ErM+bbEzir2g KqsOYalR0ZRYr79rAwfQBVrLhUMtlDR03bbQ7/GTAsMl2DFvl1xPWWHvxVu3gSz519eu D9BsK8KpkCPzluA56nactfEwG/PK8P/29qlfO67gXUeCiGdm/r8a7v2aq0rCK4qbECzK jflA== X-Gm-Message-State: APjAAAXX6zMPOsuhyts6ZJP0ZXFW1817/bIZNrMd/S8KABlGfYtZo17p b6qS1QV4OQswc93S1SCY+k758FNpX8/hyg== X-Google-Smtp-Source: APXvYqwQXz7p90Z/m3XxYkl4Hbc5qdw73wpdouaVWJR2iAC+7TRa/2o6fturD5nYV/aN2LAue9GkVw== X-Received: by 2002:a5d:4d4a:: with SMTP id a10mr30246803wru.220.1582028467294; Tue, 18 Feb 2020 04:21:07 -0800 (PST) Received: from localhost (nat-35.starnet.cz. [178.255.168.35]) by smtp.gmail.com with ESMTPSA id y185sm3442556wmg.2.2020.02.18.04.21.06 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 18 Feb 2020 04:21:06 -0800 (PST) From: Michal Simek To: u-boot@lists.denx.de Cc: git@xilinx.com, Ashok Reddy Soma Subject: [PATCH 10/16] arm64: dts: zynqmp: Add clk cells for sdhci Date: Tue, 18 Feb 2020 13:20:40 +0100 Message-Id: <7d6a2e07589348942ebeec0359a2513f38374d67.1582028304.git.michal.simek@xilinx.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.1 at phobos.denx.de X-Virus-Status: Clean From: Ashok Reddy Soma Add clock-cells and clock-output-names for sdhci0 and sdhci1. These are needed for linux sdhci driver from 5.4 version onwards. Signed-off-by: Ashok Reddy Soma Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index ed28f1f695bb..b117fc43c6d2 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -791,6 +791,8 @@ power-domains = <&zynqmp_firmware PD_SD_0>; nvmem-cells = <&soc_revision>; nvmem-cell-names = "soc_revision"; + #clock-cells = <1>; + clock-output-names = "clk_out_sd0", "clk_in_sd0"; }; sdhci1: mmc@ff170000 { @@ -807,6 +809,8 @@ power-domains = <&zynqmp_firmware PD_SD_1>; nvmem-cells = <&soc_revision>; nvmem-cell-names = "soc_revision"; + #clock-cells = <1>; + clock-output-names = "clk_out_sd1", "clk_in_sd1"; }; pinctrl0: pinctrl@ff180000 { From patchwork Tue Feb 18 12:20:41 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 1239986 X-Patchwork-Delegate: monstr@monstr.eu Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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[178.255.168.35]) by smtp.gmail.com with ESMTPSA id g2sm5653632wrw.76.2020.02.18.04.21.08 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 18 Feb 2020 04:21:08 -0800 (PST) From: Michal Simek To: u-boot@lists.denx.de Cc: git@xilinx.com, Amit Kumar Mahapatra Subject: [PATCH 11/16] arm64: zynqmp: Do not duplicate flash partition label property Date: Tue, 18 Feb 2020 13:20:41 +0100 Message-Id: <887e8758e665bd8640d27b035f12dee893d4196a.1582028304.git.michal.simek@xilinx.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.1 at phobos.denx.de X-Virus-Status: Clean From: Amit Kumar Mahapatra In kernel 5.4, support has been added for reading MTD devices via the nvmem API. For this the mtd devices are registered as read-only NVMEM providers under sysfs with the same name as the flash partition label property. So if flash partition label property of multiple flash devices are identical then the second mtd device fails to get registered as a NVMEM provider. This patch fixes the issue by having different label property for different flashes. Signed-off-by: Amit Kumar Mahapatra Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts index 2ff7952e70e5..92d938d665d2 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm016-dc2.dts @@ -197,7 +197,7 @@ reg = <0>; partition@0 { - label = "data"; + label = "spi0-data"; reg = <0x0 0x100000>; }; }; @@ -214,7 +214,7 @@ reg = <0>; partition@0 { - label = "data"; + label = "spi1-data"; reg = <0x0 0x84000>; }; }; From patchwork Tue Feb 18 12:20:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 1239987 X-Patchwork-Delegate: monstr@monstr.eu Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=xilinx.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=monstr-eu.20150623.gappssmtp.com header.i=@monstr-eu.20150623.gappssmtp.com header.a=rsa-sha256 header.s=20150623 header.b=qKr80mFS; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48MKl62Wqkz9sRG for ; Tue, 18 Feb 2020 23:23:30 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 8E875813AF; Tue, 18 Feb 2020 13:22:03 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=xilinx.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=monstr-eu.20150623.gappssmtp.com header.i=@monstr-eu.20150623.gappssmtp.com header.b="qKr80mFS"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 90B43813B2; Tue, 18 Feb 2020 13:21:16 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,SPF_HELO_NONE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-wm1-x341.google.com (mail-wm1-x341.google.com [IPv6:2a00:1450:4864:20::341]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 45440813AC for ; Tue, 18 Feb 2020 13:21:11 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=xilinx.com Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=monstr@monstr.eu Received: by mail-wm1-x341.google.com with SMTP id b17so2682250wmb.0 for ; Tue, 18 Feb 2020 04:21:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monstr-eu.20150623.gappssmtp.com; s=20150623; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=+mjsniJCpj90dNubB4UYL3LiNO2HoLf75/SUO+NoHFc=; b=qKr80mFSV32gWVmk1fPwrg/susayyK5JrmgwM44mGWbBFvHpHPyQ/69vDv/B3lrf29 2+UUxJGPldHqi8bptKpftPmmbKLcsdgrBiMEVvUjEMhL+lvdWtIJWDCGAXmHs3jiUvNT kGjaWgT7Aj/840iMfkU3onAyHqwkXLsKzsoEvZYvUa6X7sOQfluIX1H/vTscpbtLGDgq ualbaFedQFOBW6nxP4Q9z3yXGAojUJ1LID/QpcJsFdzErZFqt2wbgASWbwlxG/AF9C/F eevIswKYJzNifBlKnegjMtI8W+d4V80yYxquZCVJxPPaVRBWa15AQKcELkj9YaQUZmR8 F9xw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=+mjsniJCpj90dNubB4UYL3LiNO2HoLf75/SUO+NoHFc=; b=U32klDIHx8ItI61xWfYjd/ujp9bcaX87SygU0t/1OP//adap0bAltQLTxnsdA4UD6M ++EN4CdrTdlsJ9Uk0l48BioYgF04zTNZjrenuOdRlWYWhIE6UC6Kmx6SgFoftpb+4ItS PyOgfHfUwJArR3GpRYvI1/5TRUzOPvZGExY1dL1yHJwgzWqHHV9C9fuKbQtJlfW/e/C4 laFKxDWvrDAmZB9knZWkdjhdBToVVVX8z9AuK4VOpHNDD7QcK7h8j8LE7QKYeGHU+ccY bV+mTA2BJ7ulAfRGbm0SZdazEuYbhOt4E/wnuabxbEYYypi6WVr3F+a7zBeAUGu1u0Pj MHvQ== X-Gm-Message-State: APjAAAW7Qo+1kKzAVZSgazNuojH0F9eIbR6jAXxkFF6DS7LcxJfvuK1u McJHzr/755UngzOJpNHrv5JVOk0oRPPWHA== X-Google-Smtp-Source: APXvYqwwM25kd8hb+LM6v+LL7kgvzvrwew5qOzXqNRkYR0GfYIX5yg88rWMnOXORLqgFZbDR8hiGjg== X-Received: by 2002:a1c:1c7:: with SMTP id 190mr2925872wmb.121.1582028470528; Tue, 18 Feb 2020 04:21:10 -0800 (PST) Received: from localhost (nat-35.starnet.cz. [178.255.168.35]) by smtp.gmail.com with ESMTPSA id j15sm6209056wrp.9.2020.02.18.04.21.09 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 18 Feb 2020 04:21:10 -0800 (PST) From: Michal Simek To: u-boot@lists.denx.de Cc: git@xilinx.com Subject: [PATCH 12/16] arm64: zynqmp: Sync DP subsystem Date: Tue, 18 Feb 2020 13:20:42 +0100 Message-Id: <388ec55598b1d778030113cb97647c8b0dc9bd19.1582028304.git.michal.simek@xilinx.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.1 at phobos.denx.de X-Virus-Status: Clean Sync DP subsystem with the latest state in Xilinx U-Boot repository. This binding hasn't been approved in mainline Linux but it is much better than ancient version which this patch removes. Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp-clk-ccf.dtsi | 6 +- arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts | 19 +--- arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts | 2 +- arch/arm/dts/zynqmp-zcu102-revA.dts | 20 +--- arch/arm/dts/zynqmp.dtsi | 136 ++++++++++------------- 5 files changed, 73 insertions(+), 110 deletions(-) diff --git a/arch/arm/dts/zynqmp-clk-ccf.dtsi b/arch/arm/dts/zynqmp-clk-ccf.dtsi index 0b0fb6e98788..b02ef22abd20 100644 --- a/arch/arm/dts/zynqmp-clk-ccf.dtsi +++ b/arch/arm/dts/zynqmp-clk-ccf.dtsi @@ -284,11 +284,15 @@ clocks = <&zynqmp_clk AMS_REF>; }; +&zynqmp_dpsub { + clocks = <&dp_aclk>, <&zynqmp_clk DP_AUDIO_REF>, <&zynqmp_clk DP_VIDEO_REF>; +}; + &xlnx_dpdma { clocks = <&zynqmp_clk DPDMA_REF>; }; -&xlnx_dp_snd_codec0 { +&zynqmp_dp_snd_codec0 { clocks = <&zynqmp_clk DP_AUDIO_REF>; }; diff --git a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts index d8ea5578e779..fa3824d2a126 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts @@ -175,32 +175,23 @@ dr_mode = "host"; }; -&xilinx_drm { +&zynqmp_dpsub { status = "okay"; }; -&xlnx_dp { +&zynqmp_dp_snd_pcm0 { status = "okay"; }; -&xlnx_dp_sub { +&zynqmp_dp_snd_pcm1 { status = "okay"; - xlnx,vid-clk-pl; }; -&xlnx_dp_snd_pcm0 { +&zynqmp_dp_snd_card0 { status = "okay"; }; -&xlnx_dp_snd_pcm1 { - status = "okay"; -}; - -&xlnx_dp_snd_card { - status = "okay"; -}; - -&xlnx_dp_snd_codec0 { +&zynqmp_dp_snd_codec0 { status = "okay"; }; diff --git a/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts b/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts index 13508c45191f..6655b86a8029 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts @@ -115,7 +115,7 @@ status = "okay"; }; -&xlnx_dp { +&zynqmp_dpsub { status = "okay"; }; diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index e63f4b9cd8b0..fd6dfdd3c225 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -705,33 +705,23 @@ status = "okay"; }; -&xilinx_drm { +&zynqmp_dpsub { status = "okay"; - clocks = <&si570_1>; }; -&xlnx_dp { +&zynqmp_dp_snd_codec0 { status = "okay"; }; -&xlnx_dp_sub { +&zynqmp_dp_snd_pcm0 { status = "okay"; - xlnx,vid-clk-pl; }; -&xlnx_dp_snd_pcm0 { +&zynqmp_dp_snd_pcm1 { status = "okay"; }; -&xlnx_dp_snd_pcm1 { - status = "okay"; -}; - -&xlnx_dp_snd_card { - status = "okay"; -}; - -&xlnx_dp_snd_codec0 { +&zynqmp_dp_snd_card0 { status = "okay"; }; diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index b117fc43c6d2..7d84a64b8055 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -201,54 +201,6 @@ }; }; - xlnx_dp_snd_card: dp_snd_card { - compatible = "xlnx,dp-snd-card"; - status = "disabled"; - xlnx,dp-snd-pcm = <&xlnx_dp_snd_pcm0>, <&xlnx_dp_snd_pcm1>; - xlnx,dp-snd-codec = <&xlnx_dp_snd_codec0>; - }; - - xlnx_dp_snd_codec0: dp_snd_codec0 { - compatible = "xlnx,dp-snd-codec"; - status = "disabled"; - clock-names = "aud_clk"; - }; - - xlnx_dp_snd_pcm0: dp_snd_pcm0 { - compatible = "xlnx,dp-snd-pcm"; - status = "disabled"; - dmas = <&xlnx_dpdma 4>; - dma-names = "tx"; - }; - - xlnx_dp_snd_pcm1: dp_snd_pcm1 { - compatible = "xlnx,dp-snd-pcm"; - status = "disabled"; - dmas = <&xlnx_dpdma 5>; - dma-names = "tx"; - }; - - xilinx_drm: xilinx_drm { - compatible = "xlnx,drm"; - status = "disabled"; - xlnx,encoder-slave = <&xlnx_dp>; - xlnx,connector-type = "DisplayPort"; - xlnx,dp-sub = <&xlnx_dp_sub>; - planes { - xlnx,pixel-format = "rgb565"; - plane0 { - dmas = <&xlnx_dpdma 3>; - dma-names = "dma0"; - }; - plane1 { - dmas = <&xlnx_dpdma 0>, - <&xlnx_dpdma 1>, - <&xlnx_dpdma 2>; - dma-names = "dma0", "dma1", "dma2"; - }; - }; - }; - amba_apu: amba-apu@0 { compatible = "simple-bus"; #address-cells = <2>; @@ -1016,37 +968,6 @@ }; }; - xlnx_dp: dp@fd4a0000 { - compatible = "xlnx,v-dp"; - status = "disabled"; - reg = <0x0 0xfd4a0000 0x0 0x1000>; - interrupts = <0 119 4>; - interrupt-parent = <&gic>; - clock-names = "aclk", "aud_clk"; - xlnx,dp-version = "v1.2"; - xlnx,max-lanes = <2>; - xlnx,max-link-rate = <540000>; - xlnx,max-bpc = <16>; - xlnx,enable-ycrcb; - xlnx,colormetry = "rgb"; - xlnx,bpc = <8>; - xlnx,audio-chan = <2>; - xlnx,dp-sub = <&xlnx_dp_sub>; - xlnx,max-pclock-frequency = <300000>; - }; - - xlnx_dp_sub: dp_sub@fd4aa000 { - compatible = "xlnx,dp-sub"; - status = "disabled"; - reg = <0x0 0xfd4aa000 0x0 0x1000>, - <0x0 0xfd4ab000 0x0 0x1000>, - <0x0 0xfd4ac000 0x0 0x1000>; - reg-names = "blend", "av_buf", "aud"; - xlnx,output-fmt = "rgb"; - xlnx,vid-fmt = "yuyv"; - xlnx,gfx-fmt = "rgb565"; - }; - xlnx_dpdma: dma@fd4c0000 { compatible = "xlnx,dpdma"; status = "disabled"; @@ -1076,5 +997,62 @@ compatible = "xlnx,audio1"; }; }; + + zynqmp_dpsub: zynqmp-display@fd4a0000 { + compatible = "xlnx,zynqmp-dpsub-1.7"; + status = "disabled"; + reg = <0x0 0xfd4a0000 0x0 0x1000>, + <0x0 0xfd4aa000 0x0 0x1000>, + <0x0 0xfd4ab000 0x0 0x1000>, + <0x0 0xfd4ac000 0x0 0x1000>; + reg-names = "dp", "blend", "av_buf", "aud"; + interrupts = <0 119 4>; + interrupt-parent = <&gic>; + + clock-names = "dp_apb_clk", "dp_aud_clk", + "dp_vtc_pixel_clk_in"; + + power-domains = <&zynqmp_firmware PD_DP>; + + vid-layer { + dma-names = "vid0", "vid1", "vid2"; + dmas = <&xlnx_dpdma 0>, + <&xlnx_dpdma 1>, + <&xlnx_dpdma 2>; + }; + + gfx-layer { + dma-names = "gfx0"; + dmas = <&xlnx_dpdma 3>; + }; + + /* dummy node to indicate there's no child i2c device */ + i2c-bus { + }; + + zynqmp_dp_snd_codec0: zynqmp_dp_snd_codec0 { + compatible = "xlnx,dp-snd-codec"; + clock-names = "aud_clk"; + }; + + zynqmp_dp_snd_pcm0: zynqmp_dp_snd_pcm0 { + compatible = "xlnx,dp-snd-pcm"; + dmas = <&xlnx_dpdma 4>; + dma-names = "tx"; + }; + + zynqmp_dp_snd_pcm1: zynqmp_dp_snd_pcm1 { + compatible = "xlnx,dp-snd-pcm"; + dmas = <&xlnx_dpdma 5>; + dma-names = "tx"; + }; + + zynqmp_dp_snd_card0: zynqmp_dp_snd_card { + compatible = "xlnx,dp-snd-card"; + xlnx,dp-snd-pcm = <&zynqmp_dp_snd_pcm0>, + <&zynqmp_dp_snd_pcm1>; + xlnx,dp-snd-codec = <&zynqmp_dp_snd_codec0>; + }; + }; }; }; From patchwork Tue Feb 18 12:20:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 1239989 X-Patchwork-Delegate: monstr@monstr.eu Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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[178.255.168.35]) by smtp.gmail.com with ESMTPSA id 25sm3396542wmi.32.2020.02.18.04.21.11 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 18 Feb 2020 04:21:11 -0800 (PST) From: Michal Simek To: u-boot@lists.denx.de Cc: git@xilinx.com Subject: [PATCH 13/16] arm64: zynqmp: Fix addresses in partition definitions Date: Tue, 18 Feb 2020 13:20:43 +0100 Message-Id: X-Mailer: git-send-email 2.25.0 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.1 at phobos.denx.de X-Virus-Status: Clean Node name should be @
which is not how partitions are described. Issue was found by running dtbs_check as: flash@0: 'partition@qspi-device-tree', 'partition@qspi-fsbl-uboot', 'partition@qspi-linux', 'partition@qspi-rootfs' do not match any of the regexes: ... Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp-zc1232-revA.dts | 8 ++++---- arch/arm/dts/zynqmp-zc1254-revA.dts | 8 ++++---- arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts | 8 ++++---- arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts | 8 ++++---- arch/arm/dts/zynqmp-zcu102-revA.dts | 8 ++++---- arch/arm/dts/zynqmp-zcu104-revA.dts | 8 ++++---- arch/arm/dts/zynqmp-zcu104-revC.dts | 8 ++++---- arch/arm/dts/zynqmp-zcu106-revA.dts | 8 ++++---- arch/arm/dts/zynqmp-zcu111-revA.dts | 8 ++++---- arch/arm/dts/zynqmp-zcu1275-revA.dts | 8 ++++---- arch/arm/dts/zynqmp-zcu1275-revB.dts | 8 ++++---- 11 files changed, 44 insertions(+), 44 deletions(-) diff --git a/arch/arm/dts/zynqmp-zc1232-revA.dts b/arch/arm/dts/zynqmp-zc1232-revA.dts index 87152afc32f5..cdd1c688abc8 100644 --- a/arch/arm/dts/zynqmp-zc1232-revA.dts +++ b/arch/arm/dts/zynqmp-zc1232-revA.dts @@ -48,19 +48,19 @@ spi-tx-bus-width = <1>; spi-rx-bus-width = <4>; spi-max-frequency = <108000000>; /* Based on DC1 spec */ - partition@qspi-fsbl-uboot { /* for testing purpose */ + partition@0 { /* for testing purpose */ label = "qspi-fsbl-uboot"; reg = <0x0 0x100000>; }; - partition@qspi-linux { /* for testing purpose */ + partition@10000 { /* for testing purpose */ label = "qspi-linux"; reg = <0x100000 0x500000>; }; - partition@qspi-device-tree { /* for testing purpose */ + partition@600000 { /* for testing purpose */ label = "qspi-device-tree"; reg = <0x600000 0x20000>; }; - partition@qspi-rootfs { /* for testing purpose */ + partition@620000 { /* for testing purpose */ label = "qspi-rootfs"; reg = <0x620000 0x5E0000>; }; diff --git a/arch/arm/dts/zynqmp-zc1254-revA.dts b/arch/arm/dts/zynqmp-zc1254-revA.dts index d6b2834f3aa6..f13788042314 100644 --- a/arch/arm/dts/zynqmp-zc1254-revA.dts +++ b/arch/arm/dts/zynqmp-zc1254-revA.dts @@ -48,19 +48,19 @@ spi-tx-bus-width = <1>; spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */ spi-max-frequency = <108000000>; /* Based on DC1 spec */ - partition@qspi-fsbl-uboot { /* for testing purpose */ + partition@0 { /* for testing purpose */ label = "qspi-fsbl-uboot"; reg = <0x0 0x100000>; }; - partition@qspi-linux { /* for testing purpose */ + partition@10000 { /* for testing purpose */ label = "qspi-linux"; reg = <0x100000 0x500000>; }; - partition@qspi-device-tree { /* for testing purpose */ + partition@600000 { /* for testing purpose */ label = "qspi-device-tree"; reg = <0x600000 0x20000>; }; - partition@qspi-rootfs { /* for testing purpose */ + partition@620000 { /* for testing purpose */ label = "qspi-rootfs"; reg = <0x620000 0x5E0000>; }; diff --git a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts index fa3824d2a126..05be495841e0 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm015-dc1.dts @@ -108,19 +108,19 @@ spi-tx-bus-width = <1>; spi-rx-bus-width = <4>; spi-max-frequency = <108000000>; /* Based on DC1 spec */ - partition@qspi-fsbl-uboot { /* for testing purpose */ + partition@0 { /* for testing purpose */ label = "qspi-fsbl-uboot"; reg = <0x0 0x100000>; }; - partition@qspi-linux { /* for testing purpose */ + partition@10000 { /* for testing purpose */ label = "qspi-linux"; reg = <0x100000 0x500000>; }; - partition@qspi-device-tree { /* for testing purpose */ + partition@600000 { /* for testing purpose */ label = "qspi-device-tree"; reg = <0x600000 0x20000>; }; - partition@qspi-rootfs { /* for testing purpose */ + partition@620000 { /* for testing purpose */ label = "qspi-rootfs"; reg = <0x620000 0x5E0000>; }; diff --git a/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts b/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts index 6655b86a8029..e22947ef326f 100644 --- a/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts +++ b/arch/arm/dts/zynqmp-zc1751-xm018-dc4.dts @@ -187,19 +187,19 @@ spi-tx-bus-width = <1>; spi-rx-bus-width = <4>; /* also DUAL configuration possible */ spi-max-frequency = <108000000>; /* Based on DC1 spec */ - partition@qspi-fsbl-uboot { /* for testing purpose */ + partition@0 { /* for testing purpose */ label = "qspi-fsbl-uboot"; reg = <0x0 0x100000>; }; - partition@qspi-linux { /* for testing purpose */ + partition@10000 { /* for testing purpose */ label = "qspi-linux"; reg = <0x100000 0x500000>; }; - partition@qspi-device-tree { /* for testing purpose */ + partition@600000 { /* for testing purpose */ label = "qspi-device-tree"; reg = <0x600000 0x20000>; }; - partition@qspi-rootfs { /* for testing purpose */ + partition@620000 { /* for testing purpose */ label = "qspi-rootfs"; reg = <0x620000 0x5E0000>; }; diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index fd6dfdd3c225..620ef81a979b 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -614,19 +614,19 @@ spi-tx-bus-width = <1>; spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */ spi-max-frequency = <108000000>; /* Based on DC1 spec */ - partition@qspi-fsbl-uboot { /* for testing purpose */ + partition@0 { /* for testing purpose */ label = "qspi-fsbl-uboot"; reg = <0x0 0x100000>; }; - partition@qspi-linux { /* for testing purpose */ + partition@10000 { /* for testing purpose */ label = "qspi-linux"; reg = <0x100000 0x500000>; }; - partition@qspi-device-tree { /* for testing purpose */ + partition@600000 { /* for testing purpose */ label = "qspi-device-tree"; reg = <0x600000 0x20000>; }; - partition@qspi-rootfs { /* for testing purpose */ + partition@620000 { /* for testing purpose */ label = "qspi-rootfs"; reg = <0x620000 0x5E0000>; }; diff --git a/arch/arm/dts/zynqmp-zcu104-revA.dts b/arch/arm/dts/zynqmp-zcu104-revA.dts index 6375b47ff859..5172cfdcb141 100644 --- a/arch/arm/dts/zynqmp-zcu104-revA.dts +++ b/arch/arm/dts/zynqmp-zcu104-revA.dts @@ -209,19 +209,19 @@ spi-tx-bus-width = <1>; spi-rx-bus-width = <4>; spi-max-frequency = <108000000>; /* Based on DC1 spec */ - partition@qspi-fsbl-uboot { /* for testing purpose */ + partition@0 { /* for testing purpose */ label = "qspi-fsbl-uboot"; reg = <0x0 0x100000>; }; - partition@qspi-linux { /* for testing purpose */ + partition@10000 { /* for testing purpose */ label = "qspi-linux"; reg = <0x100000 0x500000>; }; - partition@qspi-device-tree { /* for testing purpose */ + partition@600000 { /* for testing purpose */ label = "qspi-device-tree"; reg = <0x600000 0x20000>; }; - partition@qspi-rootfs { /* for testing purpose */ + partition@620000 { /* for testing purpose */ label = "qspi-rootfs"; reg = <0x620000 0x5E0000>; }; diff --git a/arch/arm/dts/zynqmp-zcu104-revC.dts b/arch/arm/dts/zynqmp-zcu104-revC.dts index 425d7605bf5c..0d18bacd0c3e 100644 --- a/arch/arm/dts/zynqmp-zcu104-revC.dts +++ b/arch/arm/dts/zynqmp-zcu104-revC.dts @@ -222,19 +222,19 @@ spi-tx-bus-width = <1>; spi-rx-bus-width = <4>; spi-max-frequency = <108000000>; /* Based on DC1 spec */ - partition@qspi-fsbl-uboot { /* for testing purpose */ + partition@0 { /* for testing purpose */ label = "qspi-fsbl-uboot"; reg = <0x0 0x100000>; }; - partition@qspi-linux { /* for testing purpose */ + partition@10000 { /* for testing purpose */ label = "qspi-linux"; reg = <0x100000 0x500000>; }; - partition@qspi-device-tree { /* for testing purpose */ + partition@600000 { /* for testing purpose */ label = "qspi-device-tree"; reg = <0x600000 0x20000>; }; - partition@qspi-rootfs { /* for testing purpose */ + partition@620000 { /* for testing purpose */ label = "qspi-rootfs"; reg = <0x620000 0x5E0000>; }; diff --git a/arch/arm/dts/zynqmp-zcu106-revA.dts b/arch/arm/dts/zynqmp-zcu106-revA.dts index a5c4309f2f39..6b8d55c053b3 100644 --- a/arch/arm/dts/zynqmp-zcu106-revA.dts +++ b/arch/arm/dts/zynqmp-zcu106-revA.dts @@ -612,19 +612,19 @@ spi-tx-bus-width = <1>; spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */ spi-max-frequency = <108000000>; /* Based on DC1 spec */ - partition@qspi-fsbl-uboot { /* for testing purpose */ + partition@0 { /* for testing purpose */ label = "qspi-fsbl-uboot"; reg = <0x0 0x100000>; }; - partition@qspi-linux { /* for testing purpose */ + partition@10000 { /* for testing purpose */ label = "qspi-linux"; reg = <0x100000 0x500000>; }; - partition@qspi-device-tree { /* for testing purpose */ + partition@600000 { /* for testing purpose */ label = "qspi-device-tree"; reg = <0x600000 0x20000>; }; - partition@qspi-rootfs { /* for testing purpose */ + partition@620000 { /* for testing purpose */ label = "qspi-rootfs"; reg = <0x620000 0x5E0000>; }; diff --git a/arch/arm/dts/zynqmp-zcu111-revA.dts b/arch/arm/dts/zynqmp-zcu111-revA.dts index 755c30e9ff67..56cf60767fdd 100644 --- a/arch/arm/dts/zynqmp-zcu111-revA.dts +++ b/arch/arm/dts/zynqmp-zcu111-revA.dts @@ -525,19 +525,19 @@ spi-tx-bus-width = <1>; spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */ spi-max-frequency = <108000000>; /* Based on DC1 spec */ - partition@qspi-fsbl-uboot { /* for testing purpose */ + partition@0 { /* for testing purpose */ label = "qspi-fsbl-uboot"; reg = <0x0 0x100000>; }; - partition@qspi-linux { /* for testing purpose */ + partition@10000 { /* for testing purpose */ label = "qspi-linux"; reg = <0x100000 0x500000>; }; - partition@qspi-device-tree { /* for testing purpose */ + partition@600000 { /* for testing purpose */ label = "qspi-device-tree"; reg = <0x600000 0x20000>; }; - partition@qspi-rootfs { /* for testing purpose */ + partition@620000 { /* for testing purpose */ label = "qspi-rootfs"; reg = <0x620000 0x5E0000>; }; diff --git a/arch/arm/dts/zynqmp-zcu1275-revA.dts b/arch/arm/dts/zynqmp-zcu1275-revA.dts index 8755bc433b4f..d0322add3bbb 100644 --- a/arch/arm/dts/zynqmp-zcu1275-revA.dts +++ b/arch/arm/dts/zynqmp-zcu1275-revA.dts @@ -49,19 +49,19 @@ spi-tx-bus-width = <1>; spi-rx-bus-width = <4>; /* FIXME also DUAL configuration possible */ spi-max-frequency = <108000000>; /* Based on DC1 spec */ - partition@qspi-fsbl-uboot { /* for testing purpose */ + partition@0 { /* for testing purpose */ label = "qspi-fsbl-uboot"; reg = <0x0 0x100000>; }; - partition@qspi-linux { /* for testing purpose */ + partition@10000 { /* for testing purpose */ label = "qspi-linux"; reg = <0x100000 0x500000>; }; - partition@qspi-device-tree { /* for testing purpose */ + partition@600000 { /* for testing purpose */ label = "qspi-device-tree"; reg = <0x600000 0x20000>; }; - partition@qspi-rootfs { /* for testing purpose */ + partition@620000 { /* for testing purpose */ label = "qspi-rootfs"; reg = <0x620000 0x5E0000>; }; diff --git a/arch/arm/dts/zynqmp-zcu1275-revB.dts b/arch/arm/dts/zynqmp-zcu1275-revB.dts index 16f609c7e5c0..b5be749ee644 100644 --- a/arch/arm/dts/zynqmp-zcu1275-revB.dts +++ b/arch/arm/dts/zynqmp-zcu1275-revB.dts @@ -50,19 +50,19 @@ spi-tx-bus-width = <1>; spi-rx-bus-width = <1>; spi-max-frequency = <108000000>; /* Based on DC1 spec */ - partition@qspi-fsbl-uboot { /* for testing purpose */ + partition@0 { /* for testing purpose */ label = "qspi-fsbl-uboot"; reg = <0x0 0x100000>; }; - partition@qspi-linux { /* for testing purpose */ + partition@10000 { /* for testing purpose */ label = "qspi-linux"; reg = <0x100000 0x500000>; }; - partition@qspi-device-tree { /* for testing purpose */ + partition@600000 { /* for testing purpose */ label = "qspi-device-tree"; reg = <0x600000 0x20000>; }; - partition@qspi-rootfs { /* for testing purpose */ + partition@620000 { /* for testing purpose */ label = "qspi-rootfs"; reg = <0x620000 0x5E0000>; }; From patchwork Tue Feb 18 12:20:44 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 1239988 X-Patchwork-Delegate: monstr@monstr.eu Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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[178.255.168.35]) by smtp.gmail.com with ESMTPSA id a13sm5738783wrp.93.2020.02.18.04.21.14 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 18 Feb 2020 04:21:14 -0800 (PST) From: Michal Simek To: u-boot@lists.denx.de Cc: git@xilinx.com Subject: [PATCH 15/16] arm64: zynqmp: Change bus naming to axi Date: Tue, 18 Feb 2020 13:20:45 +0100 Message-Id: X-Mailer: git-send-email 2.25.0 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.1 at phobos.denx.de X-Virus-Status: Clean Linux dtbs_check reports issue with bus name reported as amba-apu@0: $nodename:0: 'amba-apu@0' does not match '^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$' amba: $nodename:0: 'amba' does not match '^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$' That's why change bus names to axi. Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index aa2815822237..d5bee2f448d1 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -201,7 +201,7 @@ }; }; - amba_apu: amba-apu@0 { + amba_apu: axi@0 { compatible = "simple-bus"; #address-cells = <2>; #size-cells = <1>; @@ -220,7 +220,7 @@ }; }; - amba: amba { + amba: axi { compatible = "simple-bus"; u-boot,dm-pre-reloc; #address-cells = <2>; From patchwork Tue Feb 18 12:20:46 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Simek X-Patchwork-Id: 1239991 X-Patchwork-Delegate: monstr@monstr.eu Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=xilinx.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=monstr-eu.20150623.gappssmtp.com header.i=@monstr-eu.20150623.gappssmtp.com header.a=rsa-sha256 header.s=20150623 header.b=0ppT0ucy; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48MKm019RLz9sRG for ; Tue, 18 Feb 2020 23:24:15 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 2B4BC81524; Tue, 18 Feb 2020 13:22:17 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=xilinx.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=monstr-eu.20150623.gappssmtp.com header.i=@monstr-eu.20150623.gappssmtp.com header.b="0ppT0ucy"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 71B31813AC; Tue, 18 Feb 2020 13:21:22 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,SPF_HELO_NONE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-wm1-x341.google.com (mail-wm1-x341.google.com [IPv6:2a00:1450:4864:20::341]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 9C68E813AC for ; Tue, 18 Feb 2020 13:21:17 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=xilinx.com Authentication-Results: phobos.denx.de; spf=none smtp.mailfrom=monstr@monstr.eu Received: by mail-wm1-x341.google.com with SMTP id a5so2565307wmb.0 for ; Tue, 18 Feb 2020 04:21:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monstr-eu.20150623.gappssmtp.com; s=20150623; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=QmS8PBIM2V0jptFwvdlQxZ3vp6n1AWgHl00Trm4ri7E=; b=0ppT0ucy9AwdczH/ZatNHomwhjN1PmrqnCHfJWrCGqncJegBO6cPjQAM0tajNKBPHy JyCP01sVVXLCVpoK66wWLy2R7+KJT28l8bdQvqpUgDDy8+T/gdfWE48DxL2dM5VU97Vn XhLqHsOEIbTMyaYQfhr57aFTIILSvqbX1pmtjZTGfxxfINmVEdqTfNMPQo9XoQpXgrCR tsrdPDjJAY0tGvrd+PZO2PBCmx58XcNuxr4VN/V0CG1pRRd5wTa0b0ZzPwy/Lu/n7e97 EY5nIBhbarTy90BP+kF7JPUGZvkFpTCMPuzTR9hDH3mIeM6zTDpEPz657p4lXRozi9ah r+kg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=QmS8PBIM2V0jptFwvdlQxZ3vp6n1AWgHl00Trm4ri7E=; b=dH3qO1sTrSDMSU81KZoDCovXtTgaBFVRdnYiGLTxjIs3v1gmsUw9rxYlmtgtF5008d hG/ZACjwsCSK3bRS0hGK+kntJQ2MgCRTnlo/mnYqqAa7o0AauiPp1VQ1HXns0zS3MMc1 0oVowUEO4HectQulqpCgJZ+bKvA7EHmYcbkfdD8bDB95xTEOUEiB8B0MvHAvqxg8rsDu hy57CuSrMAOh18PQlckhEAWkS3/3Y9dMwnJiFHR+MpPUcFRSEKbvr869RQWan/cBfhRB dpSpZH31f1KAGBIuBgKeypq+PeRApAJpcVUXqBqD/kyF1c4wrDJBK7KGlc/n4pnKfod+ +OYQ== X-Gm-Message-State: APjAAAX5fJvuHrkApxrWKLtd4c+ccHqRhsU/siWRmsTQdrSqxA0oVJ+C 5orxwOnHAQjO6iIHB+ILYw8x7iKqfrpPFw== X-Google-Smtp-Source: APXvYqw8JRf/ZZcqwQLGlQU/sjbFumLI+vLCsq6Op5pPyXK68CJ+KRdqY40qPJDD8BI/WswZFn8l0g== X-Received: by 2002:a1c:4e03:: with SMTP id g3mr2966739wmh.22.1582028476916; Tue, 18 Feb 2020 04:21:16 -0800 (PST) Received: from localhost (nat-35.starnet.cz. [178.255.168.35]) by smtp.gmail.com with ESMTPSA id u4sm5849131wrt.37.2020.02.18.04.21.16 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 18 Feb 2020 04:21:16 -0800 (PST) From: Michal Simek To: u-boot@lists.denx.de Cc: git@xilinx.com Subject: [PATCH 16/16] arm64: zynqmp: Move pinctrl node under firmware node Date: Tue, 18 Feb 2020 13:20:46 +0100 Message-Id: <3729ff8ca7c8f1fbf851729bbe85e1743c1553e1.1582028304.git.michal.simek@xilinx.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.1 at phobos.denx.de X-Virus-Status: Clean Pinctrl is handled via firmare interface that's why move it there without reg property and new compatible string. Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp.dtsi | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index d5bee2f448d1..93fdf6bfb8a8 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -167,6 +167,11 @@ compatible = "xlnx,zynqmp-reset"; #reset-cells = <1>; }; + + pinctrl0: pinctrl { + compatible = "xlnx,zynqmp-pinctrl"; + status = "disabled"; + }; }; }; @@ -765,12 +770,6 @@ clock-output-names = "clk_out_sd1", "clk_in_sd1"; }; - pinctrl0: pinctrl@ff180000 { - compatible = "xlnx,pinctrl-zynqmp"; - status = "disabled"; - reg = <0x0 0xff180000 0x0 0x1000>; - }; - smmu: smmu@fd800000 { compatible = "arm,mmu-500"; reg = <0x0 0xfd800000 0x0 0x20000>;