From patchwork Mon Feb 17 00:14:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: BALATON Zoltan X-Patchwork-Id: 1238941 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=eik.bme.hu Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48LT5K4Gvsz9sRN for ; Mon, 17 Feb 2020 13:51:17 +1100 (AEDT) Received: from localhost ([::1]:39442 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j3WV9-0008NF-Gw for incoming@patchwork.ozlabs.org; Sun, 16 Feb 2020 21:51:15 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:44070) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j3WUf-0008Mx-N3 for qemu-devel@nongnu.org; Sun, 16 Feb 2020 21:50:46 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j3WUe-0000nu-MB for qemu-devel@nongnu.org; Sun, 16 Feb 2020 21:50:45 -0500 Received: from zero.eik.bme.hu ([2001:738:2001:2001::2001]:40734) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1j3WUe-0000n3-Fz; Sun, 16 Feb 2020 21:50:44 -0500 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id 410C1747E00; Mon, 17 Feb 2020 03:50:43 +0100 (CET) Received: by zero.eik.bme.hu (Postfix, from userid 432) id 21227747DCF; Mon, 17 Feb 2020 03:50:43 +0100 (CET) Message-Id: <82d245d64615e337c604ea330cffffea84cbd61c.1581904461.git.balaton@eik.bme.hu> In-Reply-To: References: From: BALATON Zoltan Date: Mon, 17 Feb 2020 01:14:16 +0100 Subject: [RFC PATCH 1/2] target/ppc/cpu: Add hardfloat property To: qemu-devel@nongnu.org X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:738:2001:2001::2001 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Cave-Ayland , John Arbuckle , qemu-ppc@nongnu.org, Paul Clarke , Howard Spoelstra , David Gibson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Add a property to allow setting a flag in cpu env that will be used to control if hardfloat is used for floating point ops (i.e. speed is preferred over accuracy). Signed-off-by: BALATON Zoltan --- target/ppc/cpu.h | 2 ++ target/ppc/translate_init.inc.c | 2 ++ 2 files changed, 4 insertions(+) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index b283042515..1b258a5db5 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -1033,6 +1033,7 @@ struct CPUPPCState { float_status vec_status; float_status fp_status; /* Floating point execution context */ target_ulong fpscr; /* Floating point status and control register */ + bool hardfloat; /* use hardfloat (this breaks FPSCR[FI] bit) */ /* Internal devices resources */ ppc_tb_t *tb_env; /* Time base and decrementer */ @@ -1163,6 +1164,7 @@ struct PowerPCCPU { void *machine_data; int32_t node_id; /* NUMA node this CPU belongs to */ PPCHash64Options *hash64_opts; + bool hardfloat; /* pass on property to env */ /* Those resources are used only during code translation */ /* opcode handlers */ diff --git a/target/ppc/translate_init.inc.c b/target/ppc/translate_init.inc.c index 53995f62ea..d6e1d66bc8 100644 --- a/target/ppc/translate_init.inc.c +++ b/target/ppc/translate_init.inc.c @@ -10736,6 +10736,7 @@ static void ppc_cpu_reset(CPUState *s) /* tininess for underflow is detected before rounding */ set_float_detect_tininess(float_tininess_before_rounding, &env->fp_status); + env->hardfloat = cpu->hardfloat; for (i = 0; i < ARRAY_SIZE(env->spr_cb); i++) { ppc_spr_t *spr = &env->spr_cb[i]; @@ -10868,6 +10869,7 @@ static Property ppc_cpu_properties[] = { false), DEFINE_PROP_BOOL("pre-3.0-migration", PowerPCCPU, pre_3_0_migration, false), + DEFINE_PROP_BOOL("hardfloat", PowerPCCPU, hardfloat, false), DEFINE_PROP_END_OF_LIST(), }; From patchwork Mon Feb 17 01:19:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: BALATON Zoltan X-Patchwork-Id: 1238943 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=eik.bme.hu Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48LT6G6ryqz9sRN for ; Mon, 17 Feb 2020 13:52:06 +1100 (AEDT) Received: from localhost ([::1]:39454 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j3WVw-00017r-Ts for incoming@patchwork.ozlabs.org; Sun, 16 Feb 2020 21:52:04 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:44075) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j3WUg-0008My-71 for qemu-devel@nongnu.org; Sun, 16 Feb 2020 21:50:47 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j3WUe-0000nz-MQ for qemu-devel@nongnu.org; Sun, 16 Feb 2020 21:50:46 -0500 Received: from zero.eik.bme.hu ([2001:738:2001:2001::2001]:40733) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1j3WUe-0000n2-GC; Sun, 16 Feb 2020 21:50:44 -0500 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id 4A38E747E01; Mon, 17 Feb 2020 03:50:43 +0100 (CET) Received: by zero.eik.bme.hu (Postfix, from userid 432) id 2789F747DF8; Mon, 17 Feb 2020 03:50:43 +0100 (CET) Message-Id: <01eddb5c1639ab2dfb744b3515f9b907afcbb056.1581904461.git.balaton@eik.bme.hu> In-Reply-To: References: From: BALATON Zoltan Date: Mon, 17 Feb 2020 02:19:20 +0100 Subject: [RFC PATCH 2/2] target/ppc: Enable hardfloat for PPC To: qemu-devel@nongnu.org X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:738:2001:2001::2001 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Cave-Ayland , John Arbuckle , qemu-ppc@nongnu.org, Paul Clarke , Howard Spoelstra , David Gibson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" While other targets take advantage of using host FPU to do floating point computations, this was disabled for PPC target because always clearing exception flags before every FP op made it slightly slower than emulating everyting with softfloat. To emulate some FPSCR bits, clearing of fp_status may be necessary (unless these could be handled e.g. using FP exceptions on host but there's no API for that in QEMU yet) but preserving at least the inexact flag makes hardfloat usable and faster than softfloat. Since most clients don't actually care about this flag, we can gain some speed trading some emulation accuracy. This patch implements a simple way to keep the inexact flag set for hardfloat while still allowing to revert to softfloat for workloads that need more accurate albeit slower emulation. (Set hardfloat property of CPU, i.e. -cpu name,hardfloat=false for that.) There are still more places where flags are reset so there is place for further improvement. Also having a conditional to test for the hardfloat flag every time makes the softfloat case slower than before this patch so some other way (like setting a function pointer once and use that instead if possible) may be needed to avoid this otherwise this patch only makes sense if the default is also set to enable hardfloat. Because of the above this patch at the moment is mainly for testing different workloads to evaluate how viable would this be in practice. Thus, RFC and not ready for merge yet. Signed-off-by: BALATON Zoltan --- fpu/softfloat.c | 14 +++++++------- target/ppc/fpu_helper.c | 7 ++++++- target/ppc/translate_init.inc.c | 2 +- 3 files changed, 14 insertions(+), 9 deletions(-) diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 301ce3b537..6d3f4af72a 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -216,15 +216,15 @@ GEN_INPUT_FLUSH3(float64_input_flush3, float64) #endif /* - * Some targets clear the FP flags before most FP operations. This prevents - * the use of hardfloat, since hardfloat relies on the inexact flag being - * already set. + * Disable hardfloat for known problem cases. + * Additionally, some targets clear the FP flags before most FP operations. + * This prevents the use of hardfloat, since it relies on the inexact flag + * being already set and clearing it often may result in slower computations. + * Those targets could also be listed here. */ -#if defined(TARGET_PPC) || defined(__FAST_MATH__) -# if defined(__FAST_MATH__) -# warning disabling hardfloat due to -ffast-math: hardfloat requires an exact \ +#if defined(__FAST_MATH__) +# warning disabling hardfloat due to -ffast-math: hardfloat requires an exact \ IEEE implementation -# endif # define QEMU_NO_HARDFLOAT 1 # define QEMU_SOFTFLOAT_ATTR QEMU_FLATTEN #else diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c index ae43b08eb5..33aa977970 100644 --- a/target/ppc/fpu_helper.c +++ b/target/ppc/fpu_helper.c @@ -659,7 +659,12 @@ void helper_float_check_status(CPUPPCState *env) void helper_reset_fpstatus(CPUPPCState *env) { - set_float_exception_flags(0, &env->fp_status); + if (env->hardfloat) { + /* hardfloat needs inexact flag already set, clear only others */ + set_float_exception_flags(float_flag_inexact, &env->fp_status); + } else { + set_float_exception_flags(0, &env->fp_status); + } } static void float_invalid_op_addsub(CPUPPCState *env, bool set_fpcc, diff --git a/target/ppc/translate_init.inc.c b/target/ppc/translate_init.inc.c index d6e1d66bc8..caac0c2d11 100644 --- a/target/ppc/translate_init.inc.c +++ b/target/ppc/translate_init.inc.c @@ -10869,7 +10869,7 @@ static Property ppc_cpu_properties[] = { false), DEFINE_PROP_BOOL("pre-3.0-migration", PowerPCCPU, pre_3_0_migration, false), - DEFINE_PROP_BOOL("hardfloat", PowerPCCPU, hardfloat, false), + DEFINE_PROP_BOOL("hardfloat", PowerPCCPU, hardfloat, true), DEFINE_PROP_END_OF_LIST(), };