From patchwork Fri Feb 14 09:18:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 1237944 X-Patchwork-Delegate: lokeshvutla@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.a=rsa-sha256 header.s=ti-com-17Q1 header.b=eGIvSFH2; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48Jnr62KxGz9s29 for ; Fri, 14 Feb 2020 20:19:02 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 8D04B8127D; Fri, 14 Feb 2020 10:18:40 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="eGIvSFH2"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 8F8A381278; Fri, 14 Feb 2020 10:18:35 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,SPF_HELO_NONE,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id B20D081259 for ; Fri, 14 Feb 2020 10:18:29 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=t-kristo@ti.com Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 01E9IRfH046985; Fri, 14 Feb 2020 03:18:27 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1581671907; bh=JN5LhE+rGrCFGGak8GGRSwRwJhZjIcmne+rOEiDcvHU=; h=From:To:Subject:Date:In-Reply-To:References; b=eGIvSFH2ktAhgihDCkPl9fWwrgIbGtHHM9nTaNCKv720+o2Q6LwuPwfGAo3um4VUc te/1DmUPkpH2JWos/CdQbQXnPNettPSmh6cXCbmM4HvWM6k3P5a5IvNE6mC1ivhTHB y0B+RlpsenXSwauiZuTf+uLxxUh5eSHn57CrbchI= Received: from DLEE105.ent.ti.com (dlee105.ent.ti.com [157.170.170.35]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 01E9IQe2083102 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 14 Feb 2020 03:18:27 -0600 Received: from DLEE108.ent.ti.com (157.170.170.38) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Fri, 14 Feb 2020 03:18:26 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Fri, 14 Feb 2020 03:18:26 -0600 Received: from sokoban.bb.dnainternet.fi (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 01E9INYY050125; Fri, 14 Feb 2020 03:18:25 -0600 From: Tero Kristo To: , , Subject: [PATCHv2 1/7] power: pmic: tps65941: Add support for probing the child devices Date: Fri, 14 Feb 2020 11:18:14 +0200 Message-ID: <20200214091820.28877-2-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200214091820.28877-1-t-kristo@ti.com> References: <20200214091820.28877-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.1 at phobos.denx.de X-Virus-Status: Clean TPS65941 can have child devices under it (like the ESM support), so probe these once the master pmic node completes probe. Signed-off-by: Tero Kristo --- drivers/power/pmic/tps65941.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/power/pmic/tps65941.c b/drivers/power/pmic/tps65941.c index e8f3c950bd..7b3416ae6e 100644 --- a/drivers/power/pmic/tps65941.c +++ b/drivers/power/pmic/tps65941.c @@ -59,8 +59,8 @@ static int tps65941_bind(struct udevice *dev) if (!children) printf("%s: %s - no child found\n", __func__, dev->name); - /* Always return success for this device */ - return 0; + /* Probe all the child devices */ + return dm_scan_fdt_dev(dev); } static struct dm_pmic_ops tps65941_ops = { From patchwork Fri Feb 14 09:18:15 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 1237943 X-Patchwork-Delegate: lokeshvutla@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; 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Fri, 14 Feb 2020 03:18:27 -0600 Received: from sokoban.bb.dnainternet.fi (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 01E9INYZ050125; Fri, 14 Feb 2020 03:18:26 -0600 From: Tero Kristo To: , , Subject: [PATCHv2 2/7] misc: k3_esm: Add support for Texas Instruments K3 ESM driver Date: Fri, 14 Feb 2020 11:18:15 +0200 Message-ID: <20200214091820.28877-3-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200214091820.28877-1-t-kristo@ti.com> References: <20200214091820.28877-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.1 at phobos.denx.de X-Virus-Status: Clean The ESM (Error Signaling Module) is used to route error signals within the K3 SoCs somewhat similar to interrupts. The handling for these is different though, and can be routed for hardware error handling, to be handled by safety processor or just as error interrupts handled by the main processor. The u-boot level ESM driver is just used to configure the ESM signals so that they get routed to proper destination. Signed-off-by: Tero Kristo Reviewed-by: Tom Rini --- doc/device-tree-bindings/misc/esm-k3.txt | 25 +++++++ drivers/misc/Kconfig | 5 ++ drivers/misc/Makefile | 1 + drivers/misc/k3_esm.c | 87 ++++++++++++++++++++++++ 4 files changed, 118 insertions(+) create mode 100644 doc/device-tree-bindings/misc/esm-k3.txt create mode 100644 drivers/misc/k3_esm.c diff --git a/doc/device-tree-bindings/misc/esm-k3.txt b/doc/device-tree-bindings/misc/esm-k3.txt new file mode 100644 index 0000000000..01c8b6b294 --- /dev/null +++ b/doc/device-tree-bindings/misc/esm-k3.txt @@ -0,0 +1,25 @@ +Texas Instruments K3 ESM Binding +====================== + +ESM (Error Signaling Module) is an IP block on TI K3 devices that allows +handling of safety events somewhat similar to what interrupt controller +would do. The safety signals have their separate paths within the SoC, +and they are handled by the ESM, which routes them to the proper +destination, which can be system reset, interrupt controller, etc. In +the simplest configuration the signals are just routed to reset the +SoC. + +Required properties : +- compatible : "ti,j721e-esm" +- ti,esm-pins : integer array of esm events IDs to route to external event + pin which can be used to reset the SoC. The array can + have arbitrary amount of event IDs listed on it. + +Example +======= + + main_esm: esm@700000 { + compatible = "ti,j721e-esm"; + reg = <0x0 0x700000 0x0 0x1000>; + ti,esm-pins = <344>, <345>; + }; diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index f18aa8f7ba..38588b2cbd 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -462,6 +462,11 @@ config IHS_FPGA gdsys devices, which supply the majority of the functionality offered by the devices. This driver supports both CON and CPU variants of the devices, depending on the device tree entry. +config ESM_K3 + bool "Enable K3 ESM driver" + depends on ARCH_K3 + help + Support ESM (Error Signaling Module) on TI K3 SoCs. config MICROCHIP_FLEXCOM bool "Enable Microchip Flexcom driver" diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index 2b843de93c..60406c3e0a 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -72,3 +72,4 @@ obj-$(CONFIG_WINBOND_W83627) += winbond_w83627.o obj-$(CONFIG_JZ4780_EFUSE) += jz4780_efuse.o obj-$(CONFIG_MICROCHIP_FLEXCOM) += microchip_flexcom.o obj-$(CONFIG_K3_AVS0) += k3_avs.o +obj-$(CONFIG_ESM_K3) += k3_esm.o diff --git a/drivers/misc/k3_esm.c b/drivers/misc/k3_esm.c new file mode 100644 index 0000000000..8f270f3b5c --- /dev/null +++ b/drivers/misc/k3_esm.c @@ -0,0 +1,87 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Texas Instruments' K3 Error Signalling Module driver + * + * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Tero Kristo + * + */ + +#include +#include +#include +#include +#include + +#define ESM_SFT_RST 0x0c +#define ESM_SFT_RST_KEY 0x0f + +#define ESM_STS(i) (0x404 + (i) / 32 * 0x20) +#define ESM_PIN_EN_SET_OFFSET(i) (0x414 + (i) / 32 * 0x20) +#define ESM_PIN_MASK(i) BIT((i) & 0x1f) + +static void esm_pin_enable(void __iomem *base, int pin) +{ + /* Enable event */ + writel(ESM_PIN_MASK(pin), base + ESM_PIN_EN_SET_OFFSET(pin)); +} + +/** + * k3_esm_probe: configures ESM based on DT data + * + * Parses ESM info from device tree, and configures the module accordingly. + */ +static int k3_esm_probe(struct udevice *dev) +{ + int ret; + void __iomem *base; + int num_pins; + u32 *pins; + int i; + + base = dev_remap_addr_index(dev, 0); + if (!base) + return -ENODEV; + + num_pins = dev_read_size(dev, "ti,esm-pins"); + if (num_pins < 0) { + dev_err(dev, "ti,esm-pins property missing or invalid: %d\n", + num_pins); + return num_pins; + } + + num_pins /= sizeof(u32); + + pins = kmalloc(num_pins * sizeof(u32), __GFP_ZERO); + if (!pins) + return -ENOMEM; + + ret = dev_read_u32_array(dev, "ti,esm-pins", pins, num_pins); + if (ret < 0) { + dev_err(dev, "failed to read ti,esm-pins property: %d\n", + ret); + goto free_pins; + } + + /* Clear any pending events */ + writel(ESM_SFT_RST_KEY, base + ESM_SFT_RST); + + for (i = 0; i < num_pins; i++) + esm_pin_enable(base, pins[i]); + +free_pins: + kfree(pins); + return ret; +} + +static const struct udevice_id k3_esm_ids[] = { + { .compatible = "ti,j721e-esm" }, + {} +}; + +U_BOOT_DRIVER(k3_esm) = { + .name = "k3_esm", + .of_match = k3_esm_ids, + .id = UCLASS_MISC, + .probe = k3_esm_probe, +}; From patchwork Fri Feb 14 09:18:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 1237948 X-Patchwork-Delegate: lokeshvutla@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.a=rsa-sha256 header.s=ti-com-17Q1 header.b=FHhgfi4h; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48Jnrg3Rf3z9s29 for ; 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Fri, 14 Feb 2020 03:18:28 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Fri, 14 Feb 2020 03:18:28 -0600 Received: from sokoban.bb.dnainternet.fi (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 01E9INYa050125; Fri, 14 Feb 2020 03:18:27 -0600 From: Tero Kristo To: , , Subject: [PATCHv2 3/7] misc: pmic_esm: Add support for PMIC ESM driver Date: Fri, 14 Feb 2020 11:18:16 +0200 Message-ID: <20200214091820.28877-4-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200214091820.28877-1-t-kristo@ti.com> References: <20200214091820.28877-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.1 at phobos.denx.de X-Virus-Status: Clean The ESM (Error Signal Monitor) is used on certain PMIC versions to handle error signals propagating from rest of the system. If these reach the PMIC, it is typically a last resort fatal error which requires a system reset. The ESM driver does the proper configuration for the ESM module to reach this end goal. Initially, only TPS65941 PMIC is supported for this. Signed-off-by: Tero Kristo --- doc/device-tree-bindings/misc/esm-pmic.txt | 19 ++++++ drivers/misc/Kconfig | 7 +++ drivers/misc/Makefile | 1 + drivers/misc/esm_pmic.c | 69 ++++++++++++++++++++++ 4 files changed, 96 insertions(+) create mode 100644 doc/device-tree-bindings/misc/esm-pmic.txt create mode 100644 drivers/misc/esm_pmic.c diff --git a/doc/device-tree-bindings/misc/esm-pmic.txt b/doc/device-tree-bindings/misc/esm-pmic.txt new file mode 100644 index 0000000000..a60ad74679 --- /dev/null +++ b/doc/device-tree-bindings/misc/esm-pmic.txt @@ -0,0 +1,19 @@ +PMIC ESM Binding +====================== + +Certain Power Management ICs contain safety handling logic within them, +allowing automatic reset of the board in case a safety error is signaled. +For this purpose, ESM (Error Signal Monitor) is implemented within +the PMIC running its own state machine. + +Required properties : +- compatible : "ti,tps659413-esm" + +Example +======= + +&tps659413a { + esm: esm { + compatible = "ti,tps659413-esm"; + }; +}; diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 38588b2cbd..766402745d 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig @@ -486,4 +486,11 @@ config K3_AVS0 optimized voltage from the efuse, so that it can be programmed to the PMIC on board. +config ESM_PMIC + bool "Enable PMIC ESM driver" + depends on DM_PMIC + help + Support ESM (Error Signal Monitor) on PMIC devices. ESM is used + typically to reboot the board in error condition. + endmenu diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index 60406c3e0a..68e0e7ad17 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile @@ -73,3 +73,4 @@ obj-$(CONFIG_JZ4780_EFUSE) += jz4780_efuse.o obj-$(CONFIG_MICROCHIP_FLEXCOM) += microchip_flexcom.o obj-$(CONFIG_K3_AVS0) += k3_avs.o obj-$(CONFIG_ESM_K3) += k3_esm.o +obj-$(CONFIG_ESM_PMIC) += esm_pmic.o diff --git a/drivers/misc/esm_pmic.c b/drivers/misc/esm_pmic.c new file mode 100644 index 0000000000..92c8d68f7c --- /dev/null +++ b/drivers/misc/esm_pmic.c @@ -0,0 +1,69 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * PMIC Error Signal Monitor driver + * + * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ + * Tero Kristo + * + */ + +#include +#include +#include +#include +#include + +#define INT_ESM_REG 0x6c +#define INT_ESM_MASK 0x3f + +#define ESM_MCU_START_REG 0x8f + +#define ESM_MCU_START BIT(0) + +#define ESM_MCU_MODE_CFG_REG 0x92 + +#define ESM_MCU_EN BIT(6) +#define ESM_MCU_ENDRV BIT(5) + +/** + * pmic_esm_probe: configures and enables PMIC ESM functionality + * + * Configures ESM PMIC support and enables it. + */ +static int pmic_esm_probe(struct udevice *dev) +{ + int ret; + + ret = pmic_reg_write(dev->parent, INT_ESM_REG, INT_ESM_MASK); + if (ret) { + dev_err(dev, "clearing ESM irqs failed: %d\n", ret); + return ret; + } + + ret = pmic_reg_write(dev->parent, ESM_MCU_MODE_CFG_REG, + ESM_MCU_EN | ESM_MCU_ENDRV); + if (ret) { + dev_err(dev, "setting ESM mode failed: %d\n", ret); + return ret; + } + + ret = pmic_reg_write(dev->parent, ESM_MCU_START_REG, ESM_MCU_START); + if (ret) { + dev_err(dev, "starting ESM failed: %d\n", ret); + return ret; + } + + return 0; +} + +static const struct udevice_id pmic_esm_ids[] = { + { .compatible = "ti,tps659413-esm" }, + {} +}; + +U_BOOT_DRIVER(pmic_esm) = { + .name = "esm_pmic", + .of_match = pmic_esm_ids, + .id = UCLASS_MISC, + .probe = pmic_esm_probe, +}; From patchwork Fri Feb 14 09:18:17 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 1237945 X-Patchwork-Delegate: lokeshvutla@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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Fri, 14 Feb 2020 03:18:30 -0600 Received: from sokoban.bb.dnainternet.fi (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 01E9INYb050125; Fri, 14 Feb 2020 03:18:29 -0600 From: Tero Kristo To: , , Subject: [PATCHv2 4/7] arm: dts: k3-k721e: Add Main domain ESM support Date: Fri, 14 Feb 2020 11:18:17 +0200 Message-ID: <20200214091820.28877-5-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200214091820.28877-1-t-kristo@ti.com> References: <20200214091820.28877-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.1 at phobos.denx.de X-Virus-Status: Clean Main domain ESM support is needed to configure main domain watchdogs to generate ESM pin events by default. On J7 processor board these propagate to the PMIC to generate a reset when watchdog expires. Signed-off-by: Tero Kristo --- arch/arm/dts/k3-j721e-r5-common-proc-board.dts | 9 +++++++++ arch/arm/dts/k3-j721e.dtsi | 1 + 2 files changed, 10 insertions(+) diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts index 1f14d71438..c8dea666c8 100644 --- a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts +++ b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts @@ -75,6 +75,15 @@ }; }; +&cbass_main { + main_esm: esm@700000 { + compatible = "ti,j721e-esm"; + reg = <0x0 0x700000 0x0 0x1000>; + ti,esm-pins = <344>, <345>; + u-boot,dm-spl; + }; +}; + &dmsc { mboxes= <&mcu_secproxy 8>, <&mcu_secproxy 6>, <&mcu_secproxy 5>; mbox-names = "tx", "rx", "notify"; diff --git a/arch/arm/dts/k3-j721e.dtsi b/arch/arm/dts/k3-j721e.dtsi index 68ba517e50..e470d3a1b5 100644 --- a/arch/arm/dts/k3-j721e.dtsi +++ b/arch/arm/dts/k3-j721e.dtsi @@ -135,6 +135,7 @@ #size-cells = <2>; ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */ <0x00 0x00600000 0x00 0x00600000 0x00 0x00031100>, /* GPIO */ + <0x00 0x00700000 0x00 0x00700000 0x00 0x00001000>, /* ESM */ <0x00 0x00900000 0x00 0x00900000 0x00 0x00012000>, /* serdes */ <0x00 0x00A40000 0x00 0x00A40000 0x00 0x00000800>, /* timesync router */ <0x00 0x01000000 0x00 0x01000000 0x00 0x0af02400>, /* Most peripherals */ From patchwork Fri Feb 14 09:18:18 2020 Content-Type: text/plain; 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Fri, 14 Feb 2020 03:18:31 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Fri, 14 Feb 2020 03:18:31 -0600 Received: from sokoban.bb.dnainternet.fi (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 01E9INYc050125; Fri, 14 Feb 2020 03:18:30 -0600 From: Tero Kristo To: , , Subject: [PATCHv2 5/7] arm: dts: k3-j721e: Add ESM PMIC support for tps659413 based board Date: Fri, 14 Feb 2020 11:18:18 +0200 Message-ID: <20200214091820.28877-6-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200214091820.28877-1-t-kristo@ti.com> References: <20200214091820.28877-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.1 at phobos.denx.de X-Virus-Status: Clean The ESM handling on J7 processor board requires routing the MCU_SAFETY_ERROR signal to the PMIC on the board for critical safety error handling. The PMIC itself should then reset the board based on receiving it. Enable the support for the board by adding the esm node in place. Signed-off-by: Tero Kristo --- .../arm/dts/k3-j721e-r5-common-proc-board-u-boot.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) create mode 100644 arch/arm/dts/k3-j721e-r5-common-proc-board-u-boot.dtsi diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721e-r5-common-proc-board-u-boot.dtsi new file mode 100644 index 0000000000..c6c60b44ec --- /dev/null +++ b/arch/arm/dts/k3-j721e-r5-common-proc-board-u-boot.dtsi @@ -0,0 +1,11 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/ + */ + +&tps659413a { + esm: esm { + compatible = "ti,tps659413-esm"; + u-boot,dm-spl; + }; +}; From patchwork Fri Feb 14 09:18:19 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 1237949 X-Patchwork-Delegate: lokeshvutla@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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Fri, 14 Feb 2020 03:18:32 -0600 Received: from sokoban.bb.dnainternet.fi (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 01E9INYd050125; Fri, 14 Feb 2020 03:18:31 -0600 From: Tero Kristo To: , , Subject: [PATCHv2 6/7] board: ti: j721e: initialize ESM support Date: Fri, 14 Feb 2020 11:18:19 +0200 Message-ID: <20200214091820.28877-7-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200214091820.28877-1-t-kristo@ti.com> References: <20200214091820.28877-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.1 at phobos.denx.de X-Virus-Status: Clean Initialize both ESM and ESM_PMIC support if available for the board. If support is not available for either, a warning is printed out. ESM signals are only properly routed on PM2 version of the J721E SOM, so only probe the drivers on this device. Signed-off-by: Tero Kristo --- board/ti/j721e/evm.c | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/board/ti/j721e/evm.c b/board/ti/j721e/evm.c index aa2240b852..c068bb86b5 100644 --- a/board/ti/j721e/evm.c +++ b/board/ti/j721e/evm.c @@ -15,6 +15,8 @@ #include #include #include +#include +#include #include "../common/board_detect.h" @@ -343,5 +345,29 @@ int board_late_init(void) void spl_board_init(void) { +#if defined(CONFIG_ESM_K3) || defined(CONFIG_ESM_PMIC) + struct udevice *dev; + int ret; +#endif + probe_daughtercards(); + +#ifdef CONFIG_ESM_K3 + if (board_ti_k3_is("J721EX-PM2-SOM")) { + ret = uclass_get_device_by_driver(UCLASS_MISC, + DM_GET_DRIVER(k3_esm), &dev); + if (ret) + printf("ESM init failed: %d\n", ret); + } +#endif + +#ifdef CONFIG_ESM_PMIC + if (board_ti_k3_is("J721EX-PM2-SOM")) { + ret = uclass_get_device_by_driver(UCLASS_MISC, + DM_GET_DRIVER(pmic_esm), + &dev); + if (ret) + printf("ESM PMIC init failed: %d\n", ret); + } +#endif } From patchwork Fri Feb 14 09:18:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 1237950 X-Patchwork-Delegate: lokeshvutla@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.a=rsa-sha256 header.s=ti-com-17Q1 header.b=UoJ15gAu; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 48Jns41Byfz9s29 for ; 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Fri, 14 Feb 2020 03:18:34 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE101.ent.ti.com (157.170.170.31) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Fri, 14 Feb 2020 03:18:33 -0600 Received: from sokoban.bb.dnainternet.fi (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 01E9INYe050125; Fri, 14 Feb 2020 03:18:32 -0600 From: Tero Kristo To: , , Subject: [PATCHv2 7/7] configs: j721e_evm_r5_defconfig: Enable ESM modules Date: Fri, 14 Feb 2020 11:18:20 +0200 Message-ID: <20200214091820.28877-8-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200214091820.28877-1-t-kristo@ti.com> References: <20200214091820.28877-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.30rc1 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.1 at phobos.denx.de X-Virus-Status: Clean Enable ESM modules for both PMIC and SoC side for proper watchdog handling on the board. SPL_BOARD_INIT is also enabled so that the board init function probing the drivers is called. Signed-off-by: Tero Kristo --- configs/j721e_evm_r5_defconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/configs/j721e_evm_r5_defconfig b/configs/j721e_evm_r5_defconfig index 19fbd450c7..a28ea30372 100644 --- a/configs/j721e_evm_r5_defconfig +++ b/configs/j721e_evm_r5_defconfig @@ -122,3 +122,6 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0x6163 CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_FS_EXT4=y CONFIG_FS_FAT_MAX_CLUSTSIZE=16384 +CONFIG_ESM_K3=y +CONFIG_ESM_PMIC=y +CONFIG_SPL_BOARD_INIT=y