From patchwork Wed Jan 22 13:20:27 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Madalin Bucur (OSS)" X-Patchwork-Id: 1227267 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=oss.nxp.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 482mWf6Gy1z9sTJ for ; Thu, 23 Jan 2020 00:31:10 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730086AbgAVNUy (ORCPT ); Wed, 22 Jan 2020 08:20:54 -0500 Received: from inva021.nxp.com ([92.121.34.21]:53538 "EHLO inva021.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726054AbgAVNUw (ORCPT ); Wed, 22 Jan 2020 08:20:52 -0500 Received: from inva021.nxp.com (localhost [127.0.0.1]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 800EC20033F; Wed, 22 Jan 2020 14:20:50 +0100 (CET) Received: from inva024.eu-rdc02.nxp.com (inva024.eu-rdc02.nxp.com [134.27.226.22]) by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 72538200332; Wed, 22 Jan 2020 14:20:50 +0100 (CET) Received: from fsr-fed2164-101.ea.freescale.net (fsr-fed2164-101.ea.freescale.net [10.171.82.91]) by inva024.eu-rdc02.nxp.com (Postfix) with ESMTP id 2CF4520364; Wed, 22 Jan 2020 14:20:50 +0100 (CET) From: Madalin Bucur To: davem@davemloft.net, netdev@vger.kernel.org Cc: robh+dt@kernel.org, mark.rutland@arm.com, devicetree@vger.kernel.org, Madalin Bucur Subject: [PATCH net 1/3] dt-bindings: net: add fsl,erratum-a011043 Date: Wed, 22 Jan 2020 15:20:27 +0200 Message-Id: <1579699229-5948-2-git-send-email-madalin.bucur@oss.nxp.com> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1579699229-5948-1-git-send-email-madalin.bucur@oss.nxp.com> References: <1579699229-5948-1-git-send-email-madalin.bucur@oss.nxp.com> Reply-to: madalin.bucur@oss.nxp.com X-Virus-Scanned: ClamAV using ClamSMTP Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add an entry for erratum A011043: the MDIO_CFG[MDIO_RD_ER] bit may be falsely set when reading internal PCS registers. MDIO reads to internal PCS registers may result in having the MDIO_CFG[MDIO_RD_ER] bit set, even when there is no error and read data (MDIO_DATA[MDIO_DATA]) is correct. Software may get false read error when reading internal PCS registers through MDIO. As a workaround, all internal MDIO accesses should ignore the MDIO_CFG[MDIO_RD_ER] bit. Signed-off-by: Madalin Bucur --- Documentation/devicetree/bindings/net/fsl-fman.txt | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/Documentation/devicetree/bindings/net/fsl-fman.txt b/Documentation/devicetree/bindings/net/fsl-fman.txt index 299c0dcd67db..250f8d8cdce4 100644 --- a/Documentation/devicetree/bindings/net/fsl-fman.txt +++ b/Documentation/devicetree/bindings/net/fsl-fman.txt @@ -403,6 +403,19 @@ PROPERTIES The settings and programming routines for internal/external MDIO are different. Must be included for internal MDIO. +- fsl,erratum-a011043 + Usage: optional + Value type: + Definition: Indicates the presence of the A011043 erratum + describing that the MDIO_CFG[MDIO_RD_ER] bit may be falsely + set when reading internal PCS registers. MDIO reads to + internal PCS registers may result in having the + MDIO_CFG[MDIO_RD_ER] bit set, even when there is no error and + read data (MDIO_DATA[MDIO_DATA]) is correct. + Software may get false read error when reading internal + PCS registers through MDIO. As a workaround, all internal + MDIO accesses should ignore the MDIO_CFG[MDIO_RD_ER] bit. + For internal PHY device on internal mdio bus, a PHY node should be created. See the definition of the PHY node in booting-without-of.txt for an example of how to define a PHY (Internal PHY has no interrupt line).