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[66.91.136.155]) by smtp.gmail.com with ESMTPSA id b22sm26385424pft.110.2020.01.16.17.53.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Jan 2020 17:53:26 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH] target/hppa: Allow, but diagnose, LDCW aligned only mod 4 Date: Thu, 16 Jan 2020 15:53:22 -1000 Message-Id: <20200117015322.12953-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::541 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: deller@gmx.de, dave.anglin@bell.net Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" The PA-RISC 1.1 specification says that LDCW must be aligned mod 16 or the operation is undefined. However, real hardware only generates an unaligned access trap for unaligned mod 4. Match real hardware, but diagnose with GUEST_ERROR a violation of the specification. Reported-by: Helge Deller Suggested-by: John David Anglin Signed-off-by: Richard Henderson Tested-by: Helge Deller Reviewed-by: Philippe Mathieu-Daudé --- Helge, can you please test this against your failing kernel? You will of course want to add -D logfile -d guest_errors to you qemu command-line. r~ --- target/hppa/helper.h | 2 ++ target/hppa/op_helper.c | 9 +++++++++ target/hppa/translate.c | 6 +++++- 3 files changed, 16 insertions(+), 1 deletion(-) diff --git a/target/hppa/helper.h b/target/hppa/helper.h index 38d834ef6b..2d483aab58 100644 --- a/target/hppa/helper.h +++ b/target/hppa/helper.h @@ -17,6 +17,8 @@ DEF_HELPER_FLAGS_3(stby_b_parallel, TCG_CALL_NO_WG, void, env, tl, tr) DEF_HELPER_FLAGS_3(stby_e, TCG_CALL_NO_WG, void, env, tl, tr) DEF_HELPER_FLAGS_3(stby_e_parallel, TCG_CALL_NO_WG, void, env, tl, tr) +DEF_HELPER_FLAGS_1(ldc_check, TCG_CALL_NO_RWG, void, tl) + DEF_HELPER_FLAGS_4(probe, TCG_CALL_NO_WG, tr, env, tl, i32, i32) DEF_HELPER_FLAGS_1(loaded_fr0, TCG_CALL_NO_RWG, void, env) diff --git a/target/hppa/op_helper.c b/target/hppa/op_helper.c index f0516e81f1..345cef2c08 100644 --- a/target/hppa/op_helper.c +++ b/target/hppa/op_helper.c @@ -153,6 +153,15 @@ void HELPER(stby_e_parallel)(CPUHPPAState *env, target_ulong addr, do_stby_e(env, addr, val, true, GETPC()); } +void HELPER(ldc_check)(target_ulong addr) +{ + if (unlikely(addr & 0xf)) { + qemu_log_mask(LOG_GUEST_ERROR, + "Undefined ldc to address unaligned mod 16: " + TARGET_FMT_lx "\n", addr); + } +} + target_ureg HELPER(probe)(CPUHPPAState *env, target_ulong addr, uint32_t level, uint32_t want) { diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 2f8d407a82..669381dc1d 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -2942,7 +2942,7 @@ static bool trans_st(DisasContext *ctx, arg_ldst *a) static bool trans_ldc(DisasContext *ctx, arg_ldst *a) { - MemOp mop = MO_TEUL | MO_ALIGN_16 | a->size; + MemOp mop = MO_TE | MO_ALIGN | a->size; TCGv_reg zero, dest, ofs; TCGv_tl addr; @@ -2958,8 +2958,12 @@ static bool trans_ldc(DisasContext *ctx, arg_ldst *a) form_gva(ctx, &addr, &ofs, a->b, a->x, a->scale ? a->size : 0, a->disp, a->sp, a->m, ctx->mmu_idx == MMU_PHYS_IDX); + + gen_helper_ldc_check(addr); zero = tcg_const_reg(0); tcg_gen_atomic_xchg_reg(dest, addr, zero, ctx->mmu_idx, mop); + tcg_temp_free(zero); + if (a->m) { save_gpr(ctx, a->b, ofs); }