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Fri, 10 Jan 2020 00:57:18 +0000 (GMT) Received: from b01ledav004.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 627A6112063; Fri, 10 Jan 2020 00:57:18 +0000 (GMT) Received: from ibm-toto.the-meissners.org (unknown [9.32.77.177]) by b01ledav004.gho.pok.ibm.com (Postfix) with ESMTPS; Fri, 10 Jan 2020 00:57:18 +0000 (GMT) Date: Thu, 9 Jan 2020 19:57:17 -0500 From: Michael Meissner To: Michael Meissner , gcc-patches@gcc.gnu.org, Segher Boessenkool , David Edelsohn Subject: [PATCH] V12 patch #10 of 14, Add tests for generating prefixed load/store instructions with large numeric offsets Message-ID: <20200110005717.GJ30103@ibm-toto.the-meissners.org> Mail-Followup-To: Michael Meissner , gcc-patches@gcc.gnu.org, Segher Boessenkool , David Edelsohn References: <20200109225010.GA21999@ibm-toto.the-meissners.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200109225010.GA21999@ibm-toto.the-meissners.org> User-Agent: Mutt/1.5.21 (2010-09-15) This patch is the same as: https://gcc.gnu.org/ml/gcc-patches/2019-12/msg01500.html This patch adds one test per type validating that we generate the appropriate prefixed instructions to load/store the type when the offset if large. Can I check this into the trunk? 2020-01-09 Michael Meissner * gcc.target/powerpc/prefix-large.h: New set of tests to test prefixed addressing on 'future' system with large numeric offsets for various types. * gcc.target/powerpc/prefix-large-dd.c: New test for prefixed loads/stores with large offsets for the _Decimal64 type. * gcc.target/powerpc/prefix-large-df.c: New test for prefixed loads/stores with large offsets for the double type. * gcc.target/powerpc/prefix-large-di.c: New test for prefixed loads/stores with large offsets for the long type. * gcc.target/powerpc/prefix-large-hi.c: New test for prefixed loads/stores with large offsets for the short type. * gcc.target/powerpc/prefix-large-kf.c: New test for prefixed loads/stores with large offsets for the __float128 type. * gcc.target/powerpc/prefix-large-qi.c: New test for prefixed loads/stores with large offsets for the signed char type. * gcc.target/powerpc/prefix-large-sd.c: New test for prefixed loads/stores with large offsets for the _Decimal32 type. * gcc.target/powerpc/prefix-large-sf.c: New test for prefixed loads/stores with large offsets for the float type. * gcc.target/powerpc/prefix-large-si.c: New test for prefixed loads/stores with large offsets for the int type. * gcc.target/powerpc/prefix-large-udi.c: New test for prefixed loads/stores with large offsets for the unsigned long type. * gcc.target/powerpc/prefix-large-uhi.c: New test for prefixed loads/stores with large offsets for the unsigned short type. * gcc.target/powerpc/prefix-large-uqi.c: New test for prefixed loads/stores with large offsets for the unsigned char type. * gcc.target/powerpc/prefix-large-usi.c: New test for prefixed loads/stores with large offsets for the unsigned int type. * gcc.target/powerpc/prefix-large-v2df.c: New test for prefixed loads/stores with large offsets for the vector double type. Index: gcc/testsuite/gcc.target/powerpc/prefix-large-dd.c =================================================================== --- gcc/testsuite/gcc.target/powerpc/prefix-large-dd.c (revision 280083) +++ gcc/testsuite/gcc.target/powerpc/prefix-large-dd.c (working copy) @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_prefixed_addr } */ +/* { dg-options "-O2 -mdejagnu-cpu=future" } */ + +/* Tests for prefixed instructions testing whether we can generate a prefixed + load/store instruction that has a 34-bit offset for _Decimal64 objects. */ + +#define TYPE _Decimal64 + +#include "prefix-large.h" + +/* { dg-final { scan-assembler-times {\mplfd\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mpstfd\M} 2 } } */ Index: gcc/testsuite/gcc.target/powerpc/prefix-large-df.c =================================================================== --- gcc/testsuite/gcc.target/powerpc/prefix-large-df.c (revision 280083) +++ gcc/testsuite/gcc.target/powerpc/prefix-large-df.c (working copy) @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_prefixed_addr } */ +/* { dg-options "-O2 -mdejagnu-cpu=future" } */ + +/* Tests for prefixed instructions testing whether we can generate a prefixed + load/store instruction that has a 34-bit offset for double objects. */ + +#define TYPE double + +#include "prefix-large.h" + +/* { dg-final { scan-assembler-times {\mplfd\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mpstfd\M} 2 } } */ Index: gcc/testsuite/gcc.target/powerpc/prefix-large-di.c =================================================================== --- gcc/testsuite/gcc.target/powerpc/prefix-large-di.c (revision 280083) +++ gcc/testsuite/gcc.target/powerpc/prefix-large-di.c (working copy) @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_prefixed_addr } */ +/* { dg-options "-O2 -mdejagnu-cpu=future" } */ + +/* Tests for prefixed instructions testing whether we can generate a prefixed + load/store instruction that has a 34-bit offset for long objects. */ + +#define TYPE long + +#include "prefix-large.h" + +/* { dg-final { scan-assembler-times {\mpld\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mpstd\M} 2 } } */ Index: gcc/testsuite/gcc.target/powerpc/prefix-large-hi.c =================================================================== --- gcc/testsuite/gcc.target/powerpc/prefix-large-hi.c (revision 280083) +++ gcc/testsuite/gcc.target/powerpc/prefix-large-hi.c (working copy) @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_prefixed_addr } */ +/* { dg-options "-O2 -mdejagnu-cpu=future" } */ + +/* Tests for prefixed instructions testing whether we can generate a prefixed + load/store instruction that has a 34-bit offset for short objects. */ + +#define TYPE short + +#include "prefix-large.h" + +/* { dg-final { scan-assembler-times {\mplh[az]\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mpsth\M} 2 } } */ Index: gcc/testsuite/gcc.target/powerpc/prefix-large-kf.c =================================================================== --- gcc/testsuite/gcc.target/powerpc/prefix-large-kf.c (revision 280083) +++ gcc/testsuite/gcc.target/powerpc/prefix-large-kf.c (working copy) @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_prefixed_addr } */ +/* { dg-options "-O2 -mdejagnu-cpu=future" } */ + +/* Tests for prefixed instructions testing whether we can generate a prefixed + load/store instruction that has a 34-bit offset for __float128 objects. */ + +#define TYPE __float128 + +#include "prefix-large.h" + +/* { dg-final { scan-assembler-times {\mplxv\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mpstxv\M} 2 } } */ Index: gcc/testsuite/gcc.target/powerpc/prefix-large-qi.c =================================================================== --- gcc/testsuite/gcc.target/powerpc/prefix-large-qi.c (revision 280083) +++ gcc/testsuite/gcc.target/powerpc/prefix-large-qi.c (working copy) @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_prefixed_addr } */ +/* { dg-options "-O2 -mdejagnu-cpu=future" } */ + +/* Tests for prefixed instructions testing whether we can generate a prefixed + load/store instruction that has a 34-bit offset for signed char objects. */ + +#define TYPE signed char + +#include "prefix-large.h" + +/* { dg-final { scan-assembler-times {\mplbz\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mpstb\M} 2 } } */ Index: gcc/testsuite/gcc.target/powerpc/prefix-large-sd.c =================================================================== --- gcc/testsuite/gcc.target/powerpc/prefix-large-sd.c (revision 280083) +++ gcc/testsuite/gcc.target/powerpc/prefix-large-sd.c (working copy) @@ -0,0 +1,16 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_prefixed_addr } */ +/* { dg-options "-O2 -mdejagnu-cpu=future" } */ + +/* Tests for prefixed instructions testing whether we can generate a prefixed + load/store instruction that has a 34-bit offset for _Decimal32 objects. */ + +#define TYPE _Decimal32 + +#include "prefix-large.h" + +/* { dg-final { scan-assembler-times {\mpaddi\M|\mpli|\mpla\M} 3 } } */ +/* { dg-final { scan-assembler-times {\mlfiwzx\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mstfiwx\M} 2 } } */ + + Index: gcc/testsuite/gcc.target/powerpc/prefix-large-sf.c =================================================================== --- gcc/testsuite/gcc.target/powerpc/prefix-large-sf.c (revision 280083) +++ gcc/testsuite/gcc.target/powerpc/prefix-large-sf.c (working copy) @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_prefixed_addr } */ +/* { dg-options "-O2 -mdejagnu-cpu=future" } */ + +/* Tests for prefixed instructions testing whether we can generate a prefixed + load/store instruction that has a 34-bit offset for float objects. */ + +#define TYPE float + +#include "prefix-large.h" + +/* { dg-final { scan-assembler-times {\mplfs\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mpstfs\M} 2 } } */ Index: gcc/testsuite/gcc.target/powerpc/prefix-large-si.c =================================================================== --- gcc/testsuite/gcc.target/powerpc/prefix-large-si.c (revision 280083) +++ gcc/testsuite/gcc.target/powerpc/prefix-large-si.c (working copy) @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_prefixed_addr } */ +/* { dg-options "-O2 -mdejagnu-cpu=future" } */ + +/* Tests for prefixed instructions testing whether we can generate a prefixed + load/store instruction that has a 34-bit offset for int objects. */ + +#define TYPE int + +#include "prefix-large.h" + +/* { dg-final { scan-assembler-times {\mplw[az]\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mpstw\M} 2 } } */ Index: gcc/testsuite/gcc.target/powerpc/prefix-large-udi.c =================================================================== --- gcc/testsuite/gcc.target/powerpc/prefix-large-udi.c (revision 280083) +++ gcc/testsuite/gcc.target/powerpc/prefix-large-udi.c (working copy) @@ -0,0 +1,14 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_prefixed_addr } */ +/* { dg-options "-O2 -mdejagnu-cpu=future" } */ + +/* Tests for prefixed instructions testing whether we can generate a prefixed + load/store instruction that has a 34-bit offset for unsigned long + objects. */ + +#define TYPE unsigned long + +#include "prefix-large.h" + +/* { dg-final { scan-assembler-times {\mpld\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mpstd\M} 2 } } */ Index: gcc/testsuite/gcc.target/powerpc/prefix-large-uhi.c =================================================================== --- gcc/testsuite/gcc.target/powerpc/prefix-large-uhi.c (revision 280083) +++ gcc/testsuite/gcc.target/powerpc/prefix-large-uhi.c (working copy) @@ -0,0 +1,14 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_prefixed_addr } */ +/* { dg-options "-O2 -mdejagnu-cpu=future" } */ + +/* Tests for prefixed instructions testing whether we can generate a prefixed + load/store instruction that has a 34-bit offset for unsigned short + objects. */ + +#define TYPE unsigned short + +#include "prefix-large.h" + +/* { dg-final { scan-assembler-times {\mplhz\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mpsth\M} 2 } } */ Index: gcc/testsuite/gcc.target/powerpc/prefix-large-uqi.c =================================================================== --- gcc/testsuite/gcc.target/powerpc/prefix-large-uqi.c (revision 280083) +++ gcc/testsuite/gcc.target/powerpc/prefix-large-uqi.c (working copy) @@ -0,0 +1,14 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_prefixed_addr } */ +/* { dg-options "-O2 -mdejagnu-cpu=future" } */ + +/* Tests for prefixed instructions testing whether we can generate a prefixed + load/store instruction that has a 34-bit offset for unsigned char + objects. */ + +#define TYPE unsigned char + +#include "prefix-large.h" + +/* { dg-final { scan-assembler-times {\mplbz\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mpstb\M} 2 } } */ Index: gcc/testsuite/gcc.target/powerpc/prefix-large-usi.c =================================================================== --- gcc/testsuite/gcc.target/powerpc/prefix-large-usi.c (revision 280083) +++ gcc/testsuite/gcc.target/powerpc/prefix-large-usi.c (working copy) @@ -0,0 +1,14 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_prefixed_addr } */ +/* { dg-options "-O2 -mdejagnu-cpu=future" } */ + +/* Tests for prefixed instructions testing whether we can generate a prefixed + load/store instruction that has a 34-bit offset for unsigned int + objects. */ + +#define TYPE unsigned int + +#include "prefix-large.h" + +/* { dg-final { scan-assembler-times {\mplwz\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mpstw\M} 2 } } */ Index: gcc/testsuite/gcc.target/powerpc/prefix-large-v2df.c =================================================================== --- gcc/testsuite/gcc.target/powerpc/prefix-large-v2df.c (revision 280083) +++ gcc/testsuite/gcc.target/powerpc/prefix-large-v2df.c (working copy) @@ -0,0 +1,13 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_prefixed_addr } */ +/* { dg-options "-O2 -mdejagnu-cpu=future" } */ + +/* Tests for prefixed instructions testing whether we can generate a prefixed + load/store instruction that has a 34-bit offset for vector objects. */ + +#define TYPE vector double + +#include "prefix-large.h" + +/* { dg-final { scan-assembler-times {\mplxv\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mpstxv\M} 2 } } */ Index: gcc/testsuite/gcc.target/powerpc/prefix-large.h =================================================================== --- gcc/testsuite/gcc.target/powerpc/prefix-large.h (revision 280083) +++ gcc/testsuite/gcc.target/powerpc/prefix-large.h (working copy) @@ -0,0 +1,59 @@ +/* Common tests for prefixed instructions testing whether we can generate a + 34-bit offset using 1 instruction. */ + +typedef signed char schar; +typedef unsigned char uchar; +typedef unsigned short ushort; +typedef unsigned int uint; +typedef unsigned long ulong; +typedef long double ldouble; +typedef vector double v2df; +typedef vector long v2di; +typedef vector float v4sf; +typedef vector int v4si; + +#ifndef TYPE +#define TYPE ulong +#endif + +#ifndef ITYPE +#define ITYPE TYPE +#endif + +#ifndef OTYPE +#define OTYPE TYPE +#endif + +#if !defined(DO_ADD) && !defined(DO_VALUE) && !defined(DO_SET) +#define DO_ADD 1 +#define DO_VALUE 1 +#define DO_SET 1 +#endif + +#ifndef CONSTANT +#define CONSTANT 0x123450UL +#endif + +#if DO_ADD +void +add (TYPE *p, TYPE a) +{ + p[CONSTANT] += a; +} +#endif + +#if DO_VALUE +OTYPE +value (TYPE *p) +{ + return p[CONSTANT]; +} +#endif + +#if DO_SET +void +set (TYPE *p, ITYPE a) +{ + p[CONSTANT] = a; +} +#endif Index: gcc/testsuite/gcc.target/powerpc/prefix-no-premodify.c =================================================================== --- gcc/testsuite/gcc.target/powerpc/prefix-no-premodify.c (revision 280082) +++ gcc/testsuite/gcc.target/powerpc/prefix-no-premodify.c (working copy) @@ -0,0 +1,50 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_prefixed_addr } */ +/* { dg-options "-O2 -mdejagnu-cpu=future" } */ + +/* Make sure that we don't generate a prefixed form of the load and store with + update instructions (i.e. instead of generating LWZU we have to generate + PLWZ plus a PADDI). */ + +#ifndef SIZE +#define SIZE 50000 +#endif + +struct foo { + unsigned int field; + char pad[SIZE]; +}; + +struct foo *inc_load (struct foo *p, unsigned int *q) +{ + *q = (++p)->field; /* PLWZ, PADDI, STW. */ + return p; +} + +struct foo *dec_load (struct foo *p, unsigned int *q) +{ + *q = (--p)->field; /* PLWZ, PADDI, STW. */ + return p; +} + +struct foo *inc_store (struct foo *p, unsigned int *q) +{ + (++p)->field = *q; /* LWZ, PADDI, PSTW. */ + return p; +} + +struct foo *dec_store (struct foo *p, unsigned int *q) +{ + (--p)->field = *q; /* LWZ, PADDI, PSTW. */ + return p; +} + +/* { dg-final { scan-assembler-times {\mlwz\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mstw\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mpaddi\M} 4 } } */ +/* { dg-final { scan-assembler-times {\mplwz\M} 2 } } */ +/* { dg-final { scan-assembler-times {\mpstw\M} 2 } } */ +/* { dg-final { scan-assembler-not {\mplwzu\M} } } */ +/* { dg-final { scan-assembler-not {\mpstwu\M} } } */ +/* { dg-final { scan-assembler-not {\maddis\M} } } */ +/* { dg-final { scan-assembler-not {\maddi\M} } } */