From patchwork Wed Dec 18 21:04:47 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 1212791 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="M3ntVZ9X"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 47dSHN4psHz9sPc for ; Thu, 19 Dec 2019 08:06:40 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726536AbfLRVGk (ORCPT ); Wed, 18 Dec 2019 16:06:40 -0500 Received: from mail-lj1-f196.google.com ([209.85.208.196]:42880 "EHLO mail-lj1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725985AbfLRVGk (ORCPT ); Wed, 18 Dec 2019 16:06:40 -0500 Received: by mail-lj1-f196.google.com with SMTP id e28so3713253ljo.9; Wed, 18 Dec 2019 13:06:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=mWavUsy63Myr06DtRlRJItAe45X9tnU2gUPobdy7CAw=; b=M3ntVZ9XGM1zxPHS3li8mquGBrVGyz5/ykokRkrzXKTGG0gwG5h/03CLp3eLe2J4Uo mY02+/gtuOOVXDwuqPvKJLvRgRmRxis0sMf1iB7PY8m+zdB5XK+YCO/YYY9eIf9GBA1s AG8yi9WY4BM3+a2j/FjkLEE2WKdKr+SVExM1KJbclr8m2rhYafZrtOout8tT7QQlAN5W iywQkdoewV1F0myCzlTqvm7dcHdzeFarKFeX+us7QW2kQekrWWbnjE81InVxTyyq3Cna 7JD8lcQwgeQS5a2+6xbeiaIH9LJg2rU8DX1Z7TGTXf4LWeFsSlycSUr4X7DsUnaiWYQE Mh/g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=mWavUsy63Myr06DtRlRJItAe45X9tnU2gUPobdy7CAw=; b=AoatmZBwHwbGGUqnOUWfUJNY0IQ77OEzDOQUGqzfaY90WDUbF5VudM2nVOz9N5dBa+ wow/G6r/K65fPsRtIxtgP0iaVc3uFQh63THqfrjR+p3xSnESsXHv9e2nw9voW6DVba7b 0E0gn3l3WUbUml7mvOp4sIWFubdqtUw6Z6di5QqPYl7B+mnR5RZ1vKBhbnUlTRMysExp l7bh04OElUY3nxBGTnlZo/2kBuh8J/0q79peRx2CBdMyPnkHtiXJwPAXK+QYniKSAYwW ZWRDO610nqgGrbH5ZutiMwyo6O0t2D3vRAxYa6xsygtR51gY5O7dKmyUc7bktUqBnsFY Qi1A== X-Gm-Message-State: APjAAAVxtbXgOv/RB4tyElFC8gjHtFiC/sN2pJbyQggt85Ia8tARrf2I 959IOd+61oG1gJvwBhIzby8= X-Google-Smtp-Source: APXvYqxHwjRHmn9QXzTwE2jGlguasAidzGuMvDBOK/tCwzmx+wemk0pqgHqheskVVRzGREC6bYFzmw== X-Received: by 2002:a05:651c:111c:: with SMTP id d28mr3421894ljo.32.1576703198031; Wed, 18 Dec 2019 13:06:38 -0800 (PST) Received: from localhost.localdomain (79-139-233-37.dynamic.spd-mgts.ru. [79.139.233.37]) by smtp.gmail.com with ESMTPSA id r15sm1754648ljk.3.2019.12.18.13.06.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Dec 2019 13:06:37 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano , =?utf-8?q?Micha=C5=82_Miro?= =?utf-8?b?c8WCYXc=?= Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v9 01/17] ARM: tegra: Compile sleep-tegra20/30.S unconditionally Date: Thu, 19 Dec 2019 00:04:47 +0300 Message-Id: <20191218210503.6689-2-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191218210503.6689-1-digetx@gmail.com> References: <20191218210503.6689-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org The sleep-tegra*.S provides functionality required for suspend/resume and CPU hotplugging. The new unified CPUIDLE driver will support multiple hardware generations starting from Terga20 and ending with Tegra124, the driver will utilize functions that are provided by the assembly and thus it is cleaner to compile that code without any build-dependencies in order to avoid churning with #ifdef's. Acked-by: Peter De Schrijver Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/Makefile | 6 ++---- arch/arm/mach-tegra/sleep.h | 2 -- 2 files changed, 2 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile index 6c1dff2eccc2..965862608ff6 100644 --- a/arch/arm/mach-tegra/Makefile +++ b/arch/arm/mach-tegra/Makefile @@ -8,13 +8,13 @@ obj-y += reset.o obj-y += reset-handler.o obj-y += sleep.o obj-y += tegra.o +obj-y += sleep-tegra20.o +obj-y += sleep-tegra30.o obj-$(CONFIG_CPU_IDLE) += cpuidle.o -obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += sleep-tegra20.o obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += pm-tegra20.o ifeq ($(CONFIG_CPU_IDLE),y) obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += cpuidle-tegra20.o endif -obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += sleep-tegra30.o obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += pm-tegra30.o ifeq ($(CONFIG_CPU_IDLE),y) obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += cpuidle-tegra30.o @@ -22,12 +22,10 @@ endif obj-$(CONFIG_SMP) += platsmp.o obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o -obj-$(CONFIG_ARCH_TEGRA_114_SOC) += sleep-tegra30.o obj-$(CONFIG_ARCH_TEGRA_114_SOC) += pm-tegra30.o ifeq ($(CONFIG_CPU_IDLE),y) obj-$(CONFIG_ARCH_TEGRA_114_SOC) += cpuidle-tegra114.o endif -obj-$(CONFIG_ARCH_TEGRA_124_SOC) += sleep-tegra30.o obj-$(CONFIG_ARCH_TEGRA_124_SOC) += pm-tegra30.o ifeq ($(CONFIG_CPU_IDLE),y) obj-$(CONFIG_ARCH_TEGRA_124_SOC) += cpuidle-tegra114.o diff --git a/arch/arm/mach-tegra/sleep.h b/arch/arm/mach-tegra/sleep.h index 78ef32a907c8..63e2205cbc82 100644 --- a/arch/arm/mach-tegra/sleep.h +++ b/arch/arm/mach-tegra/sleep.h @@ -120,10 +120,8 @@ void tegra_resume(void); int tegra_sleep_cpu_finish(unsigned long); void tegra_disable_clean_inv_dcache(u32 flag); -#ifdef CONFIG_HOTPLUG_CPU void tegra20_hotplug_shutdown(void); void tegra30_hotplug_shutdown(void); -#endif void tegra20_cpu_shutdown(int cpu); int tegra20_cpu_is_resettable_soon(void); From patchwork Wed Dec 18 21:04:48 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 1212793 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="Kc+epk9i"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 47dSHR5xfxz9sP3 for ; Thu, 19 Dec 2019 08:06:43 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725985AbfLRVGm (ORCPT ); Wed, 18 Dec 2019 16:06:42 -0500 Received: from mail-lj1-f195.google.com ([209.85.208.195]:43858 "EHLO mail-lj1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726530AbfLRVGl (ORCPT ); Wed, 18 Dec 2019 16:06:41 -0500 Received: by mail-lj1-f195.google.com with SMTP id a13so3716574ljm.10; Wed, 18 Dec 2019 13:06:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ntVu9I3XrhWfhrQTxhKWXPXWtQH1te/zTY/xV+5R5ck=; b=Kc+epk9iVsrcYKd1AhP2pJbSIakkbj7sE7TsSLmqLD7g4n9JKPPf3Ri+IMrYOlQzz2 VoX48J+qWP2tYmVE5SVfpILRofHBWYk+lrji78eIIYE3354t5U8Kz7ZbbwmRCGyZCb8t tRX8qRpEU01B8sHXn8YA/5ETc6N1OWN4ILfqlILkGAASCuuR5GKsb85dIS00/h/KU9Ss c9uBFQ+N/0R4342enAx1v8a3DDoPiTJRN6CTsWTxv+H2oGIz0WL1W7QIBqWgFuFLiVwW 8TrFym3VN0W3DsioImqWDuIiO5omLlNklHaUQ8SoCQhYZb0MwKp5iuqNUkTaCH9nfUFz w8eQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ntVu9I3XrhWfhrQTxhKWXPXWtQH1te/zTY/xV+5R5ck=; b=X2SnmHKLMehmlcZgpb0/EqWdkIzEu8Hrpo0gbYVnpFPeSMq240FOLn51VCoy2fbDwn tYlocL9mRLoLlrTGh5zCcC2ujtAUJsOde11MX68ao5an9ENE6KpzrTdWy6K1+YjVQZ8g gTTLUXXdzNnkJfV4TCanX9KdWNsLNMSAAtmC8LkQbg4BjF9YL5901J/zH7SKpA9SPdmf U90RkbCTzVd8oo0O2osx0ukO24UvTNl9kxwaO75WsIxzpF+hlRjHkqljbzJp98Bji6uy OoCVzAN59NPlNpdd/3OVj/D6B8lJV8oPMBaBhJhhccKm9MvzRIWsHpwG+wZ3dPbteN+4 2wnQ== X-Gm-Message-State: APjAAAWMadrPXBhdkv3NqN3quge5e3gayyfRdBEm2sx7PDJQbm6E25W4 ySOAsmaPEnai18mhdlzDpPvDRKzW X-Google-Smtp-Source: APXvYqxu0TylR3ICWuTMlcE6n7+VPYU8W/rDeiaJMwGSQ+h88FLauLohsJ7hy3mKVFwOpVeXqBeM4A== X-Received: by 2002:a2e:b0f5:: with SMTP id h21mr1335570ljl.9.1576703199037; Wed, 18 Dec 2019 13:06:39 -0800 (PST) Received: from localhost.localdomain (79-139-233-37.dynamic.spd-mgts.ru. [79.139.233.37]) by smtp.gmail.com with ESMTPSA id r15sm1754648ljk.3.2019.12.18.13.06.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Dec 2019 13:06:38 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano , =?utf-8?q?Micha=C5=82_Miro?= =?utf-8?b?c8WCYXc=?= Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v9 02/17] ARM: tegra: Add tegra_pm_park_secondary_cpu() Date: Thu, 19 Dec 2019 00:04:48 +0300 Message-Id: <20191218210503.6689-3-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191218210503.6689-1-digetx@gmail.com> References: <20191218210503.6689-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org This function resembles tegra_cpu_die() of the hotplug code, but this variant is more suitable to be used for CPU PM because it's made specifically to be used by cpu_suspend(). In short this function puts secondary CPU offline, it will be used by the new CPUIDLE driver. Acked-by: Peter De Schrijver Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/pm.c | 14 ++++++++++++++ arch/arm/mach-tegra/pm.h | 5 +++++ 2 files changed, 19 insertions(+) diff --git a/arch/arm/mach-tegra/pm.c b/arch/arm/mach-tegra/pm.c index 3cab81b82866..f5ff3dd1dd81 100644 --- a/arch/arm/mach-tegra/pm.c +++ b/arch/arm/mach-tegra/pm.c @@ -436,4 +436,18 @@ void __init tegra_init_suspend(void) suspend_set_ops(&tegra_suspend_ops); } + +int tegra_pm_park_secondary_cpu(unsigned long cpu) +{ + if (cpu > 0) { + tegra_disable_clean_inv_dcache(TEGRA_FLUSH_CACHE_LOUIS); + + if (tegra_get_chip_id() == TEGRA20) + tegra20_hotplug_shutdown(); + else + tegra30_hotplug_shutdown(); + } + + return -EINVAL; +} #endif diff --git a/arch/arm/mach-tegra/pm.h b/arch/arm/mach-tegra/pm.h index 569151b3edc0..9a790f00237f 100644 --- a/arch/arm/mach-tegra/pm.h +++ b/arch/arm/mach-tegra/pm.h @@ -31,8 +31,13 @@ extern void (*tegra_tear_down_cpu)(void); #ifdef CONFIG_PM_SLEEP void tegra_init_suspend(void); +int tegra_pm_park_secondary_cpu(unsigned long cpu); #else static inline void tegra_init_suspend(void) {} +static inline int tegra_pm_park_secondary_cpu(unsigned long cpu) +{ + return -ENOTSUPP; +} #endif #endif /* _MACH_TEGRA_PM_H_ */ From patchwork Wed Dec 18 21:04:49 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 1212808 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="q5wj/W0j"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 47dSJc4lStz9sR8 for ; Thu, 19 Dec 2019 08:07:44 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726680AbfLRVGq (ORCPT ); Wed, 18 Dec 2019 16:06:46 -0500 Received: from mail-lf1-f41.google.com ([209.85.167.41]:42382 "EHLO mail-lf1-f41.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726616AbfLRVGo (ORCPT ); Wed, 18 Dec 2019 16:06:44 -0500 Received: by mail-lf1-f41.google.com with SMTP id y19so2709669lfl.9; Wed, 18 Dec 2019 13:06:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ipXDQ1pS/eo+638V06UZ4nlPYu5SgXkrCJ/PIHTnzg0=; b=q5wj/W0jk+M3MGo8Abr8kMtLqpDPoRXrLq/B5N8kimjUtsK2GDB//nOhlyBzPw25OO 14kaLi1b3TPZGd5DpqCVETd21/EnZd3Eqj7s7UQMXX0pMPyEb6i76GlM82p5JzQA62zJ aNEdQgxdSKBzC6k86jHFflexV2DLbZ9AgSZ6XgreHSiofJOcoJWl6w3VYy8ntYgPXDAO 18YwBQUyPJTFqltdIGccpnp51EcrBJ9Q2ZvOs6fBI41BgMmiPdnFc3C9nxqY+Ne4TMa4 +5/nImxp43sUWFkiSklLq7A3D1TdjSn8QuLoldQHkOWCtPyyOU+Dm5Zyti2MZs5zeA/1 JHIA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ipXDQ1pS/eo+638V06UZ4nlPYu5SgXkrCJ/PIHTnzg0=; b=lIJFPeT2FxkjvEVxW1ioA4Vgztn/XWTVur7XjL5d4/FvxweeTXqH9eA0Yes2OGUeTG eU0Z7i70Zihu+zm8TsWCZWKEwNveJSsfr4RM0TxfK+eMRTmQyjEZKJga+QflcLqY37Na oPdwubAnebFEEDYO7sFvH/EYQIM5eqYk6GEaAJVy+F96Q7WWWSwY3v2QHp06IASH/f/u uF36WS7nAS+jE4Tdl7k5gDSLMUWob0/vf5WgsgflpSXoxhw+yGDp0CfWKLZiVx50M057 8SGXUG68vDPDW0Fc1g9grWjXKjlcYctAsLo2WgqFkwlctqrBdr3ESd0B4he8wHgu9juj n34A== X-Gm-Message-State: APjAAAULZrBdpchQGNYimUSk1KiZJ6dxIIVNFW5R8s/BKEXMlqwwhlXN yK4xQB7DSrLclAPjyBtxd0U= X-Google-Smtp-Source: APXvYqzaRGZoz/ZtY375U1Y7nP+sliPLzeTvpPx4/WgwczeRBe0Y5mPfDKEbOo34/tgTIdz60m+4Aw== X-Received: by 2002:ac2:5b41:: with SMTP id i1mr3112356lfp.82.1576703201665; Wed, 18 Dec 2019 13:06:41 -0800 (PST) Received: from localhost.localdomain (79-139-233-37.dynamic.spd-mgts.ru. [79.139.233.37]) by smtp.gmail.com with ESMTPSA id r15sm1754648ljk.3.2019.12.18.13.06.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Dec 2019 13:06:41 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano , =?utf-8?q?Micha=C5=82_Miro?= =?utf-8?b?c8WCYXc=?= Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v9 03/17] ARM: tegra: Remove pen-locking from cpuidle-tegra20 Date: Thu, 19 Dec 2019 00:04:49 +0300 Message-Id: <20191218210503.6689-4-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191218210503.6689-1-digetx@gmail.com> References: <20191218210503.6689-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Pen-locking is meant to block CPU0 if CPU1 wakes up during of entering into LP2 because of some interrupt firing up, preventing unnecessary LP2 enter that will be resumed immediately. Apparently this case doesn't happen often in practice, I checked how often it takes place and found that after ~20 hours of browsing web, managing email, watching videos and idling (15+ hours) there is only a dozen of early LP2 entering abortions and they all happened while device was idling. Thus let's remove the pen-locking and make LP2 entering uninterruptible, simplifying code quite a lot. This will also become very handy for the upcoming unified cpuidle driver, allowing to have a common LP2 code-path across of different hardware generations. Acked-by: Peter De Schrijver Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/cpuidle-tegra20.c | 46 +------ arch/arm/mach-tegra/pm.c | 7 -- arch/arm/mach-tegra/pm.h | 1 - arch/arm/mach-tegra/reset-handler.S | 11 -- arch/arm/mach-tegra/reset.h | 9 +- arch/arm/mach-tegra/sleep-tegra20.S | 170 -------------------------- arch/arm/mach-tegra/sleep.h | 12 -- 7 files changed, 5 insertions(+), 251 deletions(-) diff --git a/arch/arm/mach-tegra/cpuidle-tegra20.c b/arch/arm/mach-tegra/cpuidle-tegra20.c index 69f3fa270fbe..f7d5041e73cc 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra20.c +++ b/arch/arm/mach-tegra/cpuidle-tegra20.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include @@ -65,28 +66,8 @@ static struct cpuidle_driver tegra_idle_driver = { #ifdef CONFIG_PM_SLEEP #ifdef CONFIG_SMP -static int tegra20_reset_sleeping_cpu_1(void) -{ - int ret = 0; - - tegra_pen_lock(); - - if (readb(tegra20_cpu1_resettable_status) == CPU_RESETTABLE) - tegra20_cpu_shutdown(1); - else - ret = -EINVAL; - - tegra_pen_unlock(); - - return ret; -} - static void tegra20_wake_cpu1_from_reset(void) { - tegra_pen_lock(); - - tegra20_cpu_clear_resettable(); - /* enable cpu clock on cpu */ tegra_enable_cpu_clock(1); @@ -95,39 +76,20 @@ static void tegra20_wake_cpu1_from_reset(void) /* unhalt the cpu */ flowctrl_write_cpu_halt(1, 0); - - tegra_pen_unlock(); -} - -static int tegra20_reset_cpu_1(void) -{ - if (!cpu_online(1) || !tegra20_reset_sleeping_cpu_1()) - return 0; - - tegra20_wake_cpu1_from_reset(); - return -EBUSY; } #else static inline void tegra20_wake_cpu1_from_reset(void) { } - -static inline int tegra20_reset_cpu_1(void) -{ - return 0; -} #endif static bool tegra20_cpu_cluster_power_down(struct cpuidle_device *dev, struct cpuidle_driver *drv, int index) { - while (tegra20_cpu_is_resettable_soon()) + while (!tegra_cpu_rail_off_ready()) cpu_relax(); - if (tegra20_reset_cpu_1() || !tegra_cpu_rail_off_ready()) - return false; - tegra_idle_lp2_last(); if (cpu_online(1)) @@ -141,9 +103,7 @@ static bool tegra20_idle_enter_lp2_cpu_1(struct cpuidle_device *dev, struct cpuidle_driver *drv, int index) { - cpu_suspend(0, tegra20_sleep_cpu_secondary_finish); - - tegra20_cpu_clear_resettable(); + cpu_suspend(dev->cpu, tegra_pm_park_secondary_cpu); return true; } diff --git a/arch/arm/mach-tegra/pm.c b/arch/arm/mach-tegra/pm.c index f5ff3dd1dd81..1ff499068bb1 100644 --- a/arch/arm/mach-tegra/pm.c +++ b/arch/arm/mach-tegra/pm.c @@ -137,18 +137,11 @@ bool tegra_set_cpu_in_lp2(void) if ((phy_cpu_id == 0) && cpumask_equal(cpu_lp2_mask, cpu_online_mask)) last_cpu = true; - else if (tegra_get_chip_id() == TEGRA20 && phy_cpu_id == 1) - tegra20_cpu_set_resettable_soon(); spin_unlock(&tegra_lp2_lock); return last_cpu; } -int tegra_cpu_do_idle(void) -{ - return cpu_do_idle(); -} - static int tegra_sleep_cpu(unsigned long v2p) { /* diff --git a/arch/arm/mach-tegra/pm.h b/arch/arm/mach-tegra/pm.h index 9a790f00237f..b9cc12222bb1 100644 --- a/arch/arm/mach-tegra/pm.h +++ b/arch/arm/mach-tegra/pm.h @@ -25,7 +25,6 @@ void tegra30_sleep_core_init(void); void tegra_clear_cpu_in_lp2(void); bool tegra_set_cpu_in_lp2(void); -int tegra_cpu_do_idle(void); void tegra_idle_lp2_last(void); extern void (*tegra_tear_down_cpu)(void); diff --git a/arch/arm/mach-tegra/reset-handler.S b/arch/arm/mach-tegra/reset-handler.S index e3f34815c9da..53123ae4ac3b 100644 --- a/arch/arm/mach-tegra/reset-handler.S +++ b/arch/arm/mach-tegra/reset-handler.S @@ -183,17 +183,6 @@ after_errata: bleq __die @ CPU not present (to OS) #endif -#ifdef CONFIG_ARCH_TEGRA_2x_SOC - /* Are we on Tegra20? */ - cmp r6, #TEGRA20 - bne 1f - /* If not CPU0, don't let CPU0 reset CPU1 now that CPU1 is coming up. */ - mov r0, #CPU_NOT_RESETTABLE - cmp r10, #0 - strbne r0, [r12, #RESET_DATA(RESETTABLE_STATUS)] -1: -#endif - /* Waking up from LP1? */ ldr r8, [r12, #RESET_DATA(MASK_LP1)] tst r8, r11 @ if in_lp1 diff --git a/arch/arm/mach-tegra/reset.h b/arch/arm/mach-tegra/reset.h index a4cfc08159f6..51265592cb1a 100644 --- a/arch/arm/mach-tegra/reset.h +++ b/arch/arm/mach-tegra/reset.h @@ -16,9 +16,8 @@ #define TEGRA_RESET_STARTUP_SECONDARY 3 #define TEGRA_RESET_STARTUP_LP2 4 #define TEGRA_RESET_STARTUP_LP1 5 -#define TEGRA_RESET_RESETTABLE_STATUS 6 -#define TEGRA_RESET_TF_PRESENT 7 -#define TEGRA_RESET_DATA_SIZE 8 +#define TEGRA_RESET_TF_PRESENT 6 +#define TEGRA_RESET_DATA_SIZE 7 #define RESET_DATA(x) ((TEGRA_RESET_##x)*4) @@ -42,10 +41,6 @@ void __tegra_cpu_reset_handler_end(void); (IO_ADDRESS(TEGRA_IRAM_BASE + TEGRA_IRAM_RESET_HANDLER_OFFSET + \ ((u32)&__tegra_cpu_reset_handler_data[TEGRA_RESET_MASK_LP2] - \ (u32)__tegra_cpu_reset_handler_start))) -#define tegra20_cpu1_resettable_status \ - (IO_ADDRESS(TEGRA_IRAM_BASE + TEGRA_IRAM_RESET_HANDLER_OFFSET + \ - ((u32)&__tegra_cpu_reset_handler_data[TEGRA_RESET_RESETTABLE_STATUS] - \ - (u32)__tegra_cpu_reset_handler_start))) #endif #define tegra_cpu_reset_handler_offset \ diff --git a/arch/arm/mach-tegra/sleep-tegra20.S b/arch/arm/mach-tegra/sleep-tegra20.S index 9a89f30d53ca..0e00ba8cf646 100644 --- a/arch/arm/mach-tegra/sleep-tegra20.S +++ b/arch/arm/mach-tegra/sleep-tegra20.S @@ -43,9 +43,6 @@ #define APB_MISC_XM2CFGCPADCTRL2 0x8e4 #define APB_MISC_XM2CFGDPADCTRL2 0x8e8 -#define __tegra20_cpu1_resettable_status_offset \ - (__tegra_cpu_reset_handler_data_offset + RESET_DATA(RESETTABLE_STATUS)) - .macro pll_enable, rd, r_car_base, pll_base ldr \rd, [\r_car_base, #\pll_base] tst \rd, #(1 << 30) @@ -90,10 +87,6 @@ ENDPROC(tegra20_hotplug_shutdown) ENTRY(tegra20_cpu_shutdown) cmp r0, #0 reteq lr @ must not be called for CPU 0 - mov32 r1, TEGRA_IRAM_RESET_BASE_VIRT - ldr r2, =__tegra20_cpu1_resettable_status_offset - mov r12, #CPU_RESETTABLE - strb r12, [r1, r2] cpu_to_halt_reg r1, r0 ldr r3, =TEGRA_FLOW_CTRL_VIRT @@ -116,107 +109,6 @@ ENDPROC(tegra20_cpu_shutdown) #endif #ifdef CONFIG_PM_SLEEP -/* - * tegra_pen_lock - * - * spinlock implementation with no atomic test-and-set and no coherence - * using Peterson's algorithm on strongly-ordered registers - * used to synchronize a cpu waking up from wfi with entering lp2 on idle - * - * The reference link of Peterson's algorithm: - * http://en.wikipedia.org/wiki/Peterson's_algorithm - * - * SCRATCH37 = r1 = !turn (inverted from Peterson's algorithm) - * on cpu 0: - * r2 = flag[0] (in SCRATCH38) - * r3 = flag[1] (in SCRATCH39) - * on cpu1: - * r2 = flag[1] (in SCRATCH39) - * r3 = flag[0] (in SCRATCH38) - * - * must be called with MMU on - * corrupts r0-r3, r12 - */ -ENTRY(tegra_pen_lock) - mov32 r3, TEGRA_PMC_VIRT - cpu_id r0 - add r1, r3, #PMC_SCRATCH37 - cmp r0, #0 - addeq r2, r3, #PMC_SCRATCH38 - addeq r3, r3, #PMC_SCRATCH39 - addne r2, r3, #PMC_SCRATCH39 - addne r3, r3, #PMC_SCRATCH38 - - mov r12, #1 - str r12, [r2] @ flag[cpu] = 1 - dsb - str r12, [r1] @ !turn = cpu -1: dsb - ldr r12, [r3] - cmp r12, #1 @ flag[!cpu] == 1? - ldreq r12, [r1] - cmpeq r12, r0 @ !turn == cpu? - beq 1b @ while !turn == cpu && flag[!cpu] == 1 - - ret lr @ locked -ENDPROC(tegra_pen_lock) - -ENTRY(tegra_pen_unlock) - dsb - mov32 r3, TEGRA_PMC_VIRT - cpu_id r0 - cmp r0, #0 - addeq r2, r3, #PMC_SCRATCH38 - addne r2, r3, #PMC_SCRATCH39 - mov r12, #0 - str r12, [r2] - ret lr -ENDPROC(tegra_pen_unlock) - -/* - * tegra20_cpu_clear_resettable(void) - * - * Called to clear the "resettable soon" flag in IRAM variable when - * it is expected that the secondary CPU will be idle soon. - */ -ENTRY(tegra20_cpu_clear_resettable) - mov32 r1, TEGRA_IRAM_RESET_BASE_VIRT - ldr r2, =__tegra20_cpu1_resettable_status_offset - mov r12, #CPU_NOT_RESETTABLE - strb r12, [r1, r2] - ret lr -ENDPROC(tegra20_cpu_clear_resettable) - -/* - * tegra20_cpu_set_resettable_soon(void) - * - * Called to set the "resettable soon" flag in IRAM variable when - * it is expected that the secondary CPU will be idle soon. - */ -ENTRY(tegra20_cpu_set_resettable_soon) - mov32 r1, TEGRA_IRAM_RESET_BASE_VIRT - ldr r2, =__tegra20_cpu1_resettable_status_offset - mov r12, #CPU_RESETTABLE_SOON - strb r12, [r1, r2] - ret lr -ENDPROC(tegra20_cpu_set_resettable_soon) - -/* - * tegra20_cpu_is_resettable_soon(void) - * - * Returns true if the "resettable soon" flag in IRAM variable has been - * set because it is expected that the secondary CPU will be idle soon. - */ -ENTRY(tegra20_cpu_is_resettable_soon) - mov32 r1, TEGRA_IRAM_RESET_BASE_VIRT - ldr r2, =__tegra20_cpu1_resettable_status_offset - ldrb r12, [r1, r2] - cmp r12, #CPU_RESETTABLE_SOON - moveq r0, #1 - movne r0, #0 - ret lr -ENDPROC(tegra20_cpu_is_resettable_soon) - /* * tegra20_sleep_core_finish(unsigned long v2p) * @@ -242,68 +134,6 @@ ENTRY(tegra20_sleep_core_finish) ret r3 ENDPROC(tegra20_sleep_core_finish) -/* - * tegra20_sleep_cpu_secondary_finish(unsigned long v2p) - * - * Enters WFI on secondary CPU by exiting coherency. - */ -ENTRY(tegra20_sleep_cpu_secondary_finish) - stmfd sp!, {r4-r11, lr} - - mrc p15, 0, r11, c1, c0, 1 @ save actlr before exiting coherency - - /* Flush and disable the L1 data cache */ - mov r0, #TEGRA_FLUSH_CACHE_LOUIS - bl tegra_disable_clean_inv_dcache - - mov32 r0, TEGRA_IRAM_RESET_BASE_VIRT - ldr r4, =__tegra20_cpu1_resettable_status_offset - mov r3, #CPU_RESETTABLE - strb r3, [r0, r4] - - bl tegra_cpu_do_idle - - /* - * cpu may be reset while in wfi, which will return through - * tegra_resume to cpu_resume - * or interrupt may wake wfi, which will return here - * cpu state is unchanged - MMU is on, cache is on, coherency - * is off, and the data cache is off - * - * r11 contains the original actlr - */ - - bl tegra_pen_lock - - mov32 r0, TEGRA_IRAM_RESET_BASE_VIRT - ldr r4, =__tegra20_cpu1_resettable_status_offset - mov r3, #CPU_NOT_RESETTABLE - strb r3, [r0, r4] - - bl tegra_pen_unlock - - /* Re-enable the data cache */ - mrc p15, 0, r10, c1, c0, 0 - orr r10, r10, #CR_C - mcr p15, 0, r10, c1, c0, 0 - isb - - mcr p15, 0, r11, c1, c0, 1 @ reenable coherency - - /* Invalidate the TLBs & BTAC */ - mov r1, #0 - mcr p15, 0, r1, c8, c3, 0 @ invalidate shared TLBs - mcr p15, 0, r1, c7, c1, 6 @ invalidate shared BTAC - dsb - isb - - /* the cpu was running with coherency disabled, - * caches may be out of date */ - bl v7_flush_kern_cache_louis - - ldmfd sp!, {r4 - r11, pc} -ENDPROC(tegra20_sleep_cpu_secondary_finish) - /* * tegra20_tear_down_cpu * diff --git a/arch/arm/mach-tegra/sleep.h b/arch/arm/mach-tegra/sleep.h index 63e2205cbc82..4978def9db46 100644 --- a/arch/arm/mach-tegra/sleep.h +++ b/arch/arm/mach-tegra/sleep.h @@ -114,8 +114,6 @@ .endm #else -void tegra_pen_lock(void); -void tegra_pen_unlock(void); void tegra_resume(void); int tegra_sleep_cpu_finish(unsigned long); void tegra_disable_clean_inv_dcache(u32 flag); @@ -123,16 +121,6 @@ void tegra_disable_clean_inv_dcache(u32 flag); void tegra20_hotplug_shutdown(void); void tegra30_hotplug_shutdown(void); -void tegra20_cpu_shutdown(int cpu); -int tegra20_cpu_is_resettable_soon(void); -void tegra20_cpu_clear_resettable(void); -#ifdef CONFIG_ARCH_TEGRA_2x_SOC -void tegra20_cpu_set_resettable_soon(void); -#else -static inline void tegra20_cpu_set_resettable_soon(void) {} -#endif - -int tegra20_sleep_cpu_secondary_finish(unsigned long); void tegra20_tear_down_cpu(void); int tegra30_sleep_cpu_secondary_finish(unsigned long); void tegra30_tear_down_cpu(void); From patchwork Wed Dec 18 21:04:50 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 1212794 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="PT0sDezm"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 47dSHW1Vv6z9sP3 for ; Thu, 19 Dec 2019 08:06:47 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726652AbfLRVGq (ORCPT ); Wed, 18 Dec 2019 16:06:46 -0500 Received: from mail-lj1-f193.google.com ([209.85.208.193]:46905 "EHLO mail-lj1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726622AbfLRVGo (ORCPT ); Wed, 18 Dec 2019 16:06:44 -0500 Received: by mail-lj1-f193.google.com with SMTP id m26so1286191ljc.13; Wed, 18 Dec 2019 13:06:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ictt12Eq7VaaXoLWFuFA5etM79lSU8mNQN6AK4ra3FM=; b=PT0sDezmOHOS1LyLXQ9CFOpEW/FpT9KCJifb1HaT/VVuM5/+ajWCZfT1ZXyxb1rkKc 5PTRL59ceZWTyuPN9L4+/dDwAjv2HjUVD9E26J9lV+XRFqlMfuGHqLBxTs0BkHNwKwkR OyLOv+OEf2kqJ/7zxU2XNOXdqlY9IBylopp/n+O7FqCJRVENcRLmgvl75gNXw+reC30A yvIrd/Ulu0wVajFLAEXkn1bfvwt4/5WAdz15NmCVwXE5G0dYOiOpEzfI1YWbXJfu2utc DrnDkXRZbhxLTuZtCeKxI69wQt+Uu7xLlIIOt2kDJ/M/avIP3P3Z4EbZd8M65yAZ4TT7 rMbA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ictt12Eq7VaaXoLWFuFA5etM79lSU8mNQN6AK4ra3FM=; b=Aap5ObHI6fT/5MxGaG/ydHtL+6im3fUzAPyhoXpHiO+h7h3XR7gmDOXKn8aSqWmg0n +erEdh4lt7X2bCESopIyoV3Q1TXuHAUDxw6nXptImOerIb9wkQINgzvW3HgqwxcfCKdS P/L2CFdbdNqq5opK5Ix20umQb4R/5Dc+jTO4cluuCWCaZ7tHh6HlYZRSeAHC5DBf1xy4 zoqBC/wt6E1KKMebjH2Agrh8fO2KI22JHDrnGsP99d2vbFLTP0VtAD7W86H9Uh+C11dH U4jjpq31tSD00vGf+nEayfeAycxOMaP0IDJf0ONdTGVIw+Rsz9y3yccQo3H4OmjxP8x4 sJMg== X-Gm-Message-State: APjAAAVxUJexcDVXW0x+/Z1/8xuoCkbHeA2xNG8dpcrkh767ozCjkYVW 6eMDcIPPJDVjhqcA0Nmi9E4= X-Google-Smtp-Source: APXvYqz6SkYMTz0qW4TS7TqAzKn+gLRtecXbCQFSqtJ6UW+mlbhiuOxsp2s8/zgpPVHsRNz4YrbFWQ== X-Received: by 2002:a2e:9015:: with SMTP id h21mr3303439ljg.69.1576703202623; Wed, 18 Dec 2019 13:06:42 -0800 (PST) Received: from localhost.localdomain (79-139-233-37.dynamic.spd-mgts.ru. [79.139.233.37]) by smtp.gmail.com with ESMTPSA id r15sm1754648ljk.3.2019.12.18.13.06.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Dec 2019 13:06:42 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano , =?utf-8?q?Micha=C5=82_Miro?= =?utf-8?b?c8WCYXc=?= Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v9 04/17] ARM: tegra: Change tegra_set_cpu_in_lp2() type to void Date: Thu, 19 Dec 2019 00:04:50 +0300 Message-Id: <20191218210503.6689-5-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191218210503.6689-1-digetx@gmail.com> References: <20191218210503.6689-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org The Tegra30 CPUIDLE driver has intention to check whether primary CPU was the last CPU that entered LP2 (CC6) idle-state, but that functionality never got utilized because driver never supported the CC6 state for the case where any secondary CPU is online. The new cpuidle driver will properly support CC6 on Tegra30, including the case where secondary CPUs are online, and that knowledge about what CPUs entered into CC6 won't be needed at all because new driver will use different approach by making use of the coupled idle-state and explicitly parking secondary CPUs before entering into CC6. Thus this patch is just a minor cleanup change. Acked-by: Peter De Schrijver Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/cpuidle-tegra30.c | 14 ++++---------- arch/arm/mach-tegra/pm.c | 8 +------- arch/arm/mach-tegra/pm.h | 2 +- 3 files changed, 6 insertions(+), 18 deletions(-) diff --git a/arch/arm/mach-tegra/cpuidle-tegra30.c b/arch/arm/mach-tegra/cpuidle-tegra30.c index c6128526877d..a3ce8dabfe18 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra30.c +++ b/arch/arm/mach-tegra/cpuidle-tegra30.c @@ -98,22 +98,16 @@ static int tegra30_idle_lp2(struct cpuidle_device *dev, int index) { bool entered_lp2 = false; - bool last_cpu; local_fiq_disable(); - last_cpu = tegra_set_cpu_in_lp2(); + tegra_set_cpu_in_lp2(); cpu_pm_enter(); - if (dev->cpu == 0) { - if (last_cpu) - entered_lp2 = tegra30_cpu_cluster_power_down(dev, drv, - index); - else - cpu_do_idle(); - } else { + if (dev->cpu == 0) + entered_lp2 = tegra30_cpu_cluster_power_down(dev, drv, index); + else entered_lp2 = tegra30_cpu_core_power_down(dev, drv, index); - } cpu_pm_exit(); tegra_clear_cpu_in_lp2(); diff --git a/arch/arm/mach-tegra/pm.c b/arch/arm/mach-tegra/pm.c index 1ff499068bb1..a72f9a2d3cb7 100644 --- a/arch/arm/mach-tegra/pm.c +++ b/arch/arm/mach-tegra/pm.c @@ -123,11 +123,9 @@ void tegra_clear_cpu_in_lp2(void) spin_unlock(&tegra_lp2_lock); } -bool tegra_set_cpu_in_lp2(void) +void tegra_set_cpu_in_lp2(void) { int phy_cpu_id = cpu_logical_map(smp_processor_id()); - bool last_cpu = false; - cpumask_t *cpu_lp2_mask = tegra_cpu_lp2_mask; u32 *cpu_in_lp2 = tegra_cpu_lp2_mask; spin_lock(&tegra_lp2_lock); @@ -135,11 +133,7 @@ bool tegra_set_cpu_in_lp2(void) BUG_ON((*cpu_in_lp2 & BIT(phy_cpu_id))); *cpu_in_lp2 |= BIT(phy_cpu_id); - if ((phy_cpu_id == 0) && cpumask_equal(cpu_lp2_mask, cpu_online_mask)) - last_cpu = true; - spin_unlock(&tegra_lp2_lock); - return last_cpu; } static int tegra_sleep_cpu(unsigned long v2p) diff --git a/arch/arm/mach-tegra/pm.h b/arch/arm/mach-tegra/pm.h index b9cc12222bb1..2c294f6365c0 100644 --- a/arch/arm/mach-tegra/pm.h +++ b/arch/arm/mach-tegra/pm.h @@ -24,7 +24,7 @@ void tegra30_lp1_iram_hook(void); void tegra30_sleep_core_init(void); void tegra_clear_cpu_in_lp2(void); -bool tegra_set_cpu_in_lp2(void); +void tegra_set_cpu_in_lp2(void); void tegra_idle_lp2_last(void); extern void (*tegra_tear_down_cpu)(void); From patchwork Wed Dec 18 21:04:51 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 1212809 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="Dlg1lGJc"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 47dSJd72SKz9sRC for ; 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[79.139.233.37]) by smtp.gmail.com with ESMTPSA id r15sm1754648ljk.3.2019.12.18.13.06.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Dec 2019 13:06:43 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano , =?utf-8?q?Micha=C5=82_Miro?= =?utf-8?b?c8WCYXc=?= Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v9 05/17] ARM: tegra: Propagate error from tegra_idle_lp2_last() Date: Thu, 19 Dec 2019 00:04:51 +0300 Message-Id: <20191218210503.6689-6-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191218210503.6689-1-digetx@gmail.com> References: <20191218210503.6689-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Technically cpu_suspend() may fail and it's never good to lose information about failure. For example things like cpuidle core could correctly sample idling time in the case of failure. Acked-by: Peter De Schrijver Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/cpuidle-tegra20.c | 6 ++++-- arch/arm/mach-tegra/cpuidle-tegra30.c | 4 +--- arch/arm/mach-tegra/pm.c | 8 ++++++-- arch/arm/mach-tegra/pm.h | 2 +- 4 files changed, 12 insertions(+), 8 deletions(-) diff --git a/arch/arm/mach-tegra/cpuidle-tegra20.c b/arch/arm/mach-tegra/cpuidle-tegra20.c index f7d5041e73cc..9789541adb7d 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra20.c +++ b/arch/arm/mach-tegra/cpuidle-tegra20.c @@ -87,15 +87,17 @@ static bool tegra20_cpu_cluster_power_down(struct cpuidle_device *dev, struct cpuidle_driver *drv, int index) { + bool ret; + while (!tegra_cpu_rail_off_ready()) cpu_relax(); - tegra_idle_lp2_last(); + ret = !tegra_idle_lp2_last(); if (cpu_online(1)) tegra20_wake_cpu1_from_reset(); - return true; + return ret; } #ifdef CONFIG_SMP diff --git a/arch/arm/mach-tegra/cpuidle-tegra30.c b/arch/arm/mach-tegra/cpuidle-tegra30.c index a3ce8dabfe18..17cbd118abee 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra30.c +++ b/arch/arm/mach-tegra/cpuidle-tegra30.c @@ -68,9 +68,7 @@ static bool tegra30_cpu_cluster_power_down(struct cpuidle_device *dev, return false; } - tegra_idle_lp2_last(); - - return true; + return !tegra_idle_lp2_last(); } #ifdef CONFIG_SMP diff --git a/arch/arm/mach-tegra/pm.c b/arch/arm/mach-tegra/pm.c index a72f9a2d3cb7..a094acaca307 100644 --- a/arch/arm/mach-tegra/pm.c +++ b/arch/arm/mach-tegra/pm.c @@ -189,14 +189,16 @@ static void tegra_pm_set(enum tegra_suspend_mode mode) tegra_pmc_enter_suspend_mode(mode); } -void tegra_idle_lp2_last(void) +int tegra_idle_lp2_last(void) { + int err; + tegra_pm_set(TEGRA_SUSPEND_LP2); cpu_cluster_pm_enter(); suspend_cpu_complex(); - cpu_suspend(PHYS_OFFSET - PAGE_OFFSET, &tegra_sleep_cpu); + err = cpu_suspend(PHYS_OFFSET - PAGE_OFFSET, &tegra_sleep_cpu); /* * Resume L2 cache if it wasn't re-enabled early during resume, @@ -208,6 +210,8 @@ void tegra_idle_lp2_last(void) restore_cpu_complex(); cpu_cluster_pm_exit(); + + return err; } enum tegra_suspend_mode tegra_pm_validate_suspend_mode( diff --git a/arch/arm/mach-tegra/pm.h b/arch/arm/mach-tegra/pm.h index 2c294f6365c0..7d72f31dee77 100644 --- a/arch/arm/mach-tegra/pm.h +++ b/arch/arm/mach-tegra/pm.h @@ -25,7 +25,7 @@ void tegra30_sleep_core_init(void); void tegra_clear_cpu_in_lp2(void); void tegra_set_cpu_in_lp2(void); -void tegra_idle_lp2_last(void); +int tegra_idle_lp2_last(void); extern void (*tegra_tear_down_cpu)(void); #ifdef CONFIG_PM_SLEEP From patchwork Wed Dec 18 21:04:52 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 1212807 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="Ms/nYFl0"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 47dSJb5Jtvz9sR4 for ; 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[79.139.233.37]) by smtp.gmail.com with ESMTPSA id r15sm1754648ljk.3.2019.12.18.13.06.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Dec 2019 13:06:44 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano , =?utf-8?q?Micha=C5=82_Miro?= =?utf-8?b?c8WCYXc=?= Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v9 06/17] ARM: tegra: Expose PM functions required for new cpuidle driver Date: Thu, 19 Dec 2019 00:04:52 +0300 Message-Id: <20191218210503.6689-7-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191218210503.6689-1-digetx@gmail.com> References: <20191218210503.6689-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org The upcoming unified CPUIDLE driver will be added to the drivers/cpuidle/ directory and it will require all these exposed Tegra PM-core functions. Acked-by: Peter De Schrijver Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/cpuidle-tegra114.c | 3 +- arch/arm/mach-tegra/cpuidle-tegra20.c | 2 +- arch/arm/mach-tegra/cpuidle-tegra30.c | 3 +- arch/arm/mach-tegra/irq.c | 3 +- arch/arm/mach-tegra/pm.h | 8 ----- arch/arm/mach-tegra/sleep.h | 1 - arch/arm/mach-tegra/tegra.c | 1 - .../mach-tegra => include/soc/tegra}/irq.h | 8 +++-- include/soc/tegra/pm.h | 31 +++++++++++++++++++ 9 files changed, 43 insertions(+), 17 deletions(-) rename {arch/arm/mach-tegra => include/soc/tegra}/irq.h (59%) diff --git a/arch/arm/mach-tegra/cpuidle-tegra114.c b/arch/arm/mach-tegra/cpuidle-tegra114.c index 5118f777fd66..2d8527837aeb 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra114.c +++ b/arch/arm/mach-tegra/cpuidle-tegra114.c @@ -12,13 +12,14 @@ #include +#include + #include #include #include #include #include "cpuidle.h" -#include "pm.h" #include "sleep.h" #ifdef CONFIG_PM_SLEEP diff --git a/arch/arm/mach-tegra/cpuidle-tegra20.c b/arch/arm/mach-tegra/cpuidle-tegra20.c index 9789541adb7d..fdfe92068e38 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra20.c +++ b/arch/arm/mach-tegra/cpuidle-tegra20.c @@ -19,6 +19,7 @@ #include #include +#include #include #include @@ -27,7 +28,6 @@ #include "cpuidle.h" #include "iomap.h" #include "irq.h" -#include "pm.h" #include "reset.h" #include "sleep.h" diff --git a/arch/arm/mach-tegra/cpuidle-tegra30.c b/arch/arm/mach-tegra/cpuidle-tegra30.c index 17cbd118abee..3e91c29891f7 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra30.c +++ b/arch/arm/mach-tegra/cpuidle-tegra30.c @@ -17,12 +17,13 @@ #include #include +#include + #include #include #include #include "cpuidle.h" -#include "pm.h" #include "sleep.h" #ifdef CONFIG_PM_SLEEP diff --git a/arch/arm/mach-tegra/irq.c b/arch/arm/mach-tegra/irq.c index ace7a390b5fe..4e1ee70b2a3f 100644 --- a/arch/arm/mach-tegra/irq.c +++ b/arch/arm/mach-tegra/irq.c @@ -18,9 +18,10 @@ #include #include +#include + #include "board.h" #include "iomap.h" -#include "irq.h" #define SGI_MASK 0xFFFF diff --git a/arch/arm/mach-tegra/pm.h b/arch/arm/mach-tegra/pm.h index 7d72f31dee77..81525f5f4a44 100644 --- a/arch/arm/mach-tegra/pm.h +++ b/arch/arm/mach-tegra/pm.h @@ -23,20 +23,12 @@ void tegra20_sleep_core_init(void); void tegra30_lp1_iram_hook(void); void tegra30_sleep_core_init(void); -void tegra_clear_cpu_in_lp2(void); -void tegra_set_cpu_in_lp2(void); -int tegra_idle_lp2_last(void); extern void (*tegra_tear_down_cpu)(void); #ifdef CONFIG_PM_SLEEP void tegra_init_suspend(void); -int tegra_pm_park_secondary_cpu(unsigned long cpu); #else static inline void tegra_init_suspend(void) {} -static inline int tegra_pm_park_secondary_cpu(unsigned long cpu) -{ - return -ENOTSUPP; -} #endif #endif /* _MACH_TEGRA_PM_H_ */ diff --git a/arch/arm/mach-tegra/sleep.h b/arch/arm/mach-tegra/sleep.h index 4978def9db46..4718a3cb45a1 100644 --- a/arch/arm/mach-tegra/sleep.h +++ b/arch/arm/mach-tegra/sleep.h @@ -122,7 +122,6 @@ void tegra20_hotplug_shutdown(void); void tegra30_hotplug_shutdown(void); void tegra20_tear_down_cpu(void); -int tegra30_sleep_cpu_secondary_finish(unsigned long); void tegra30_tear_down_cpu(void); #endif diff --git a/arch/arm/mach-tegra/tegra.c b/arch/arm/mach-tegra/tegra.c index 1e3b85923ca3..79184a077c84 100644 --- a/arch/arm/mach-tegra/tegra.c +++ b/arch/arm/mach-tegra/tegra.c @@ -42,7 +42,6 @@ #include "common.h" #include "cpuidle.h" #include "iomap.h" -#include "irq.h" #include "pm.h" #include "reset.h" #include "sleep.h" diff --git a/arch/arm/mach-tegra/irq.h b/include/soc/tegra/irq.h similarity index 59% rename from arch/arm/mach-tegra/irq.h rename to include/soc/tegra/irq.h index 7a94cf121448..8eb11a7109e4 100644 --- a/arch/arm/mach-tegra/irq.h +++ b/include/soc/tegra/irq.h @@ -3,9 +3,11 @@ * Copyright (c) 2012, NVIDIA Corporation. All rights reserved. */ -#ifndef __TEGRA_IRQ_H -#define __TEGRA_IRQ_H +#ifndef __SOC_TEGRA_IRQ_H +#define __SOC_TEGRA_IRQ_H +#if defined(CONFIG_ARM) bool tegra_pending_sgi(void); - #endif + +#endif /* __SOC_TEGRA_IRQ_H */ diff --git a/include/soc/tegra/pm.h b/include/soc/tegra/pm.h index 951fcd738d55..1974e8405098 100644 --- a/include/soc/tegra/pm.h +++ b/include/soc/tegra/pm.h @@ -6,6 +6,8 @@ #ifndef __SOC_TEGRA_PM_H__ #define __SOC_TEGRA_PM_H__ +#include + enum tegra_suspend_mode { TEGRA_SUSPEND_NONE = 0, TEGRA_SUSPEND_LP2, /* CPU voltage off */ @@ -20,6 +22,12 @@ tegra_pm_validate_suspend_mode(enum tegra_suspend_mode mode); /* low-level resume entry point */ void tegra_resume(void); + +int tegra30_sleep_cpu_secondary_finish(unsigned long arg); +void tegra_clear_cpu_in_lp2(void); +void tegra_set_cpu_in_lp2(void); +int tegra_idle_lp2_last(void); +int tegra_pm_park_secondary_cpu(unsigned long cpu); #else static inline enum tegra_suspend_mode tegra_pm_validate_suspend_mode(enum tegra_suspend_mode mode) @@ -30,6 +38,29 @@ tegra_pm_validate_suspend_mode(enum tegra_suspend_mode mode) static inline void tegra_resume(void) { } + +static inline int tegra30_sleep_cpu_secondary_finish(unsigned long arg) +{ + return -ENOTSUPP; +} + +static inline void tegra_clear_cpu_in_lp2(void) +{ +} + +static inline void tegra_set_cpu_in_lp2(void) +{ +} + +static inline int tegra_idle_lp2_last(void) +{ + return -ENOTSUPP; +} + +static inline int tegra_pm_park_secondary_cpu(unsigned long cpu) +{ + return -ENOTSUPP; +} #endif /* CONFIG_PM_SLEEP */ #endif /* __SOC_TEGRA_PM_H__ */ From patchwork Wed Dec 18 21:04:53 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 1212806 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="XcAuezCH"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 47dSJS18Clz9sR8 for ; Thu, 19 Dec 2019 08:07:36 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727006AbfLRVHf (ORCPT ); Wed, 18 Dec 2019 16:07:35 -0500 Received: from mail-lf1-f66.google.com ([209.85.167.66]:45317 "EHLO mail-lf1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726698AbfLRVGu (ORCPT ); Wed, 18 Dec 2019 16:06:50 -0500 Received: by mail-lf1-f66.google.com with SMTP id 203so2695716lfa.12; Wed, 18 Dec 2019 13:06:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=TBP48l4byiBlZqsnmroWnBjpQOL0lJ3WnnZsntljvo8=; b=XcAuezCHuo8SwUTi8kZiufEqorOLRH8wYBNY68RRHMXnzK5yNlV5y5uNQHjJWfc7de v31k6EvBQZvGDEzEpthzfS/0PsK+kuWaV3MqQ54i5VgPXnGtUM88mZD6Cuom8qTLS8Ot YYu94yTsgw4GEHM24w9+pTOx0WHPOoQhcxDAglOS/keJu2Wm/afmQIklHAW1XVQ8M5kC UP+VOb0brjfVVQHOpqs09l2weIgN7xd26kms9itp1UywR0RwJSSrnawEzOUprIbCDwgN 4Ft2Pwb8yMm3N1Hw5AwFk3rICCrKwF2wuKP6mF9s1UduypC8P8BCGnTMjcJokNHJqqPX H+oA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=TBP48l4byiBlZqsnmroWnBjpQOL0lJ3WnnZsntljvo8=; b=fTp2C9h0c5PxgK08HTOyzECiZP3Skxzh1hQGzlnWQtumOGmQNBuf+9U/r+5gzp7Fpt zS9e42rUNKte0QBkEHk/hU/iqTJ8tDAz+SInWZpDRBgvCW2NKgOiSDcojwZDBVJjvaXX pXk8mSiIXbhgun5MpS2pnSG6+AbiFq7jF08vVSETugn4Ei6zItXSLoEp19Xp+odWa2Tz GTyO6SCjKSXkiPI2uiKmNm3IvYe/IB05s36KR/iyCsiW9HECXh/2aI0MfzhUsrh+wL6M Hv5FdYbpmlmY0dW22kHnHEHHZ3NAda/ncRoUi2LVNEz8wS+cihoF9uD+4DKfCfXU0cLf RFGA== X-Gm-Message-State: APjAAAVYpb4UX9bEveMOanT97EJzh09xcYfR2jkzGlJ8TvUvxz5zOVGH sSeH/09hx4ya+sGbrjDW2D8= X-Google-Smtp-Source: APXvYqy3XK0vi8/jqzuAxXi/vHRnPzhajaysuW7DEmjpHREVM11rk0IdAVba9NDTEAaLNpFut+Ufsw== X-Received: by 2002:ac2:4add:: with SMTP id m29mr3047228lfp.190.1576703206836; Wed, 18 Dec 2019 13:06:46 -0800 (PST) Received: from localhost.localdomain (79-139-233-37.dynamic.spd-mgts.ru. [79.139.233.37]) by smtp.gmail.com with ESMTPSA id r15sm1754648ljk.3.2019.12.18.13.06.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Dec 2019 13:06:44 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano , =?utf-8?q?Micha=C5=82_Miro?= =?utf-8?b?c8WCYXc=?= Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v9 07/17] ARM: tegra: Rename some of the newly exposed PM functions Date: Thu, 19 Dec 2019 00:04:53 +0300 Message-Id: <20191218210503.6689-8-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191218210503.6689-1-digetx@gmail.com> References: <20191218210503.6689-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Rename some of the recently exposed PM functions, prefixing them with "tegra_pm_" in order to make the naming of the PM functions consistent. Acked-by: Peter De Schrijver Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/cpuidle-tegra114.c | 6 +++--- arch/arm/mach-tegra/cpuidle-tegra20.c | 6 +++--- arch/arm/mach-tegra/cpuidle-tegra30.c | 8 ++++---- arch/arm/mach-tegra/pm.c | 10 +++++----- arch/arm/mach-tegra/sleep-tegra30.S | 6 +++--- include/soc/tegra/pm.h | 16 ++++++++-------- 6 files changed, 26 insertions(+), 26 deletions(-) diff --git a/arch/arm/mach-tegra/cpuidle-tegra114.c b/arch/arm/mach-tegra/cpuidle-tegra114.c index 2d8527837aeb..858c30cc5dc7 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra114.c +++ b/arch/arm/mach-tegra/cpuidle-tegra114.c @@ -35,17 +35,17 @@ static int tegra114_idle_power_down(struct cpuidle_device *dev, { local_fiq_disable(); - tegra_set_cpu_in_lp2(); + tegra_pm_set_cpu_in_lp2(); cpu_pm_enter(); call_firmware_op(prepare_idle, TF_PM_MODE_LP2_NOFLUSH_L2); /* Do suspend by ourselves if the firmware does not implement it */ if (call_firmware_op(do_idle, 0) == -ENOSYS) - cpu_suspend(0, tegra30_sleep_cpu_secondary_finish); + cpu_suspend(0, tegra30_pm_secondary_cpu_suspend); cpu_pm_exit(); - tegra_clear_cpu_in_lp2(); + tegra_pm_clear_cpu_in_lp2(); local_fiq_enable(); diff --git a/arch/arm/mach-tegra/cpuidle-tegra20.c b/arch/arm/mach-tegra/cpuidle-tegra20.c index fdfe92068e38..9672c619f4bc 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra20.c +++ b/arch/arm/mach-tegra/cpuidle-tegra20.c @@ -92,7 +92,7 @@ static bool tegra20_cpu_cluster_power_down(struct cpuidle_device *dev, while (!tegra_cpu_rail_off_ready()) cpu_relax(); - ret = !tegra_idle_lp2_last(); + ret = !tegra_pm_enter_lp2(); if (cpu_online(1)) tegra20_wake_cpu1_from_reset(); @@ -137,7 +137,7 @@ static int tegra20_idle_lp2_coupled(struct cpuidle_device *dev, local_fiq_disable(); - tegra_set_cpu_in_lp2(); + tegra_pm_set_cpu_in_lp2(); cpu_pm_enter(); if (dev->cpu == 0) @@ -146,7 +146,7 @@ static int tegra20_idle_lp2_coupled(struct cpuidle_device *dev, entered_lp2 = tegra20_idle_enter_lp2_cpu_1(dev, drv, index); cpu_pm_exit(); - tegra_clear_cpu_in_lp2(); + tegra_pm_clear_cpu_in_lp2(); local_fiq_enable(); diff --git a/arch/arm/mach-tegra/cpuidle-tegra30.c b/arch/arm/mach-tegra/cpuidle-tegra30.c index 3e91c29891f7..a4f0add46a27 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra30.c +++ b/arch/arm/mach-tegra/cpuidle-tegra30.c @@ -69,7 +69,7 @@ static bool tegra30_cpu_cluster_power_down(struct cpuidle_device *dev, return false; } - return !tegra_idle_lp2_last(); + return !tegra_pm_enter_lp2(); } #ifdef CONFIG_SMP @@ -79,7 +79,7 @@ static bool tegra30_cpu_core_power_down(struct cpuidle_device *dev, { smp_wmb(); - cpu_suspend(0, tegra30_sleep_cpu_secondary_finish); + cpu_suspend(0, tegra30_pm_secondary_cpu_suspend); return true; } @@ -100,7 +100,7 @@ static int tegra30_idle_lp2(struct cpuidle_device *dev, local_fiq_disable(); - tegra_set_cpu_in_lp2(); + tegra_pm_set_cpu_in_lp2(); cpu_pm_enter(); if (dev->cpu == 0) @@ -109,7 +109,7 @@ static int tegra30_idle_lp2(struct cpuidle_device *dev, entered_lp2 = tegra30_cpu_core_power_down(dev, drv, index); cpu_pm_exit(); - tegra_clear_cpu_in_lp2(); + tegra_pm_clear_cpu_in_lp2(); local_fiq_enable(); diff --git a/arch/arm/mach-tegra/pm.c b/arch/arm/mach-tegra/pm.c index a094acaca307..7d9ef26e52a7 100644 --- a/arch/arm/mach-tegra/pm.c +++ b/arch/arm/mach-tegra/pm.c @@ -110,7 +110,7 @@ static void suspend_cpu_complex(void) flowctrl_cpu_suspend_enter(cpu); } -void tegra_clear_cpu_in_lp2(void) +void tegra_pm_clear_cpu_in_lp2(void) { int phy_cpu_id = cpu_logical_map(smp_processor_id()); u32 *cpu_in_lp2 = tegra_cpu_lp2_mask; @@ -123,7 +123,7 @@ void tegra_clear_cpu_in_lp2(void) spin_unlock(&tegra_lp2_lock); } -void tegra_set_cpu_in_lp2(void) +void tegra_pm_set_cpu_in_lp2(void) { int phy_cpu_id = cpu_logical_map(smp_processor_id()); u32 *cpu_in_lp2 = tegra_cpu_lp2_mask; @@ -189,7 +189,7 @@ static void tegra_pm_set(enum tegra_suspend_mode mode) tegra_pmc_enter_suspend_mode(mode); } -int tegra_idle_lp2_last(void) +int tegra_pm_enter_lp2(void) { int err; @@ -356,7 +356,7 @@ static int tegra_suspend_enter(suspend_state_t state) tegra_suspend_enter_lp1(); break; case TEGRA_SUSPEND_LP2: - tegra_set_cpu_in_lp2(); + tegra_pm_set_cpu_in_lp2(); break; default: break; @@ -377,7 +377,7 @@ static int tegra_suspend_enter(suspend_state_t state) tegra_suspend_exit_lp1(); break; case TEGRA_SUSPEND_LP2: - tegra_clear_cpu_in_lp2(); + tegra_pm_clear_cpu_in_lp2(); break; default: break; diff --git a/arch/arm/mach-tegra/sleep-tegra30.S b/arch/arm/mach-tegra/sleep-tegra30.S index 4f073869b8ac..3caae60a75a0 100644 --- a/arch/arm/mach-tegra/sleep-tegra30.S +++ b/arch/arm/mach-tegra/sleep-tegra30.S @@ -262,11 +262,11 @@ ENTRY(tegra30_sleep_core_finish) ENDPROC(tegra30_sleep_core_finish) /* - * tegra30_sleep_cpu_secondary_finish(unsigned long v2p) + * tegra30_pm_secondary_cpu_suspend(unsigned long unused_arg) * * Enters LP2 on secondary CPU by exiting coherency and powergating the CPU. */ -ENTRY(tegra30_sleep_cpu_secondary_finish) +ENTRY(tegra30_pm_secondary_cpu_suspend) mov r7, lr /* Flush and disable the L1 data cache */ @@ -278,7 +278,7 @@ ENTRY(tegra30_sleep_cpu_secondary_finish) bl tegra30_cpu_shutdown mov r0, #1 @ never return here ret r7 -ENDPROC(tegra30_sleep_cpu_secondary_finish) +ENDPROC(tegra30_pm_secondary_cpu_suspend) /* * tegra30_tear_down_cpu diff --git a/include/soc/tegra/pm.h b/include/soc/tegra/pm.h index 1974e8405098..08477d7bfab9 100644 --- a/include/soc/tegra/pm.h +++ b/include/soc/tegra/pm.h @@ -23,10 +23,10 @@ tegra_pm_validate_suspend_mode(enum tegra_suspend_mode mode); /* low-level resume entry point */ void tegra_resume(void); -int tegra30_sleep_cpu_secondary_finish(unsigned long arg); -void tegra_clear_cpu_in_lp2(void); -void tegra_set_cpu_in_lp2(void); -int tegra_idle_lp2_last(void); +int tegra30_pm_secondary_cpu_suspend(unsigned long arg); +void tegra_pm_clear_cpu_in_lp2(void); +void tegra_pm_set_cpu_in_lp2(void); +int tegra_pm_enter_lp2(void); int tegra_pm_park_secondary_cpu(unsigned long cpu); #else static inline enum tegra_suspend_mode @@ -39,20 +39,20 @@ static inline void tegra_resume(void) { } -static inline int tegra30_sleep_cpu_secondary_finish(unsigned long arg) +static inline int tegra30_pm_secondary_cpu_suspend(unsigned long arg) { return -ENOTSUPP; } -static inline void tegra_clear_cpu_in_lp2(void) +static inline void tegra_pm_clear_cpu_in_lp2(void) { } -static inline void tegra_set_cpu_in_lp2(void) +static inline void tegra_pm_set_cpu_in_lp2(void) { } -static inline int tegra_idle_lp2_last(void) +static inline int tegra_pm_enter_lp2(void) { return -ENOTSUPP; } From patchwork Wed Dec 18 21:04:54 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 1212805 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="YS0GF1Ct"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 47dSJQ6Nvzz9sR4 for ; Thu, 19 Dec 2019 08:07:34 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726744AbfLRVGv (ORCPT ); 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[79.139.233.37]) by smtp.gmail.com with ESMTPSA id r15sm1754648ljk.3.2019.12.18.13.06.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Dec 2019 13:06:47 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano , =?utf-8?q?Micha=C5=82_Miro?= =?utf-8?b?c8WCYXc=?= Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v9 08/17] ARM: tegra: Make outer_disable() open-coded Date: Thu, 19 Dec 2019 00:04:54 +0300 Message-Id: <20191218210503.6689-9-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191218210503.6689-1-digetx@gmail.com> References: <20191218210503.6689-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org The outer_disable() of Tegra's suspend code is open-coded now since that helper produces spurious warning message about secondary CPUs being online when CPU enters into LP2 from cpuidle. The secondaries are actually halted by the cpuidle driver on entering into LP2 idle-state, but the online status is not touched by the cpuidle. This fixes a storm of warnings once LP2 idling state is enabled on Tegra30. The outer_disable() helper has sanity checks for interrupts and secondary CPUs being disabled and we are pretty confident about the interrupts state during of CPU idling / system suspend. The rail-off status check is added in this patch as equivalent for the "num_online_cpus() > 1". Acked-by: Peter De Schrijver Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/pm.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-tegra/pm.c b/arch/arm/mach-tegra/pm.c index 7d9ef26e52a7..d1e1a61b12cf 100644 --- a/arch/arm/mach-tegra/pm.c +++ b/arch/arm/mach-tegra/pm.c @@ -138,6 +138,10 @@ void tegra_pm_set_cpu_in_lp2(void) static int tegra_sleep_cpu(unsigned long v2p) { + if (tegra_cpu_car_ops->rail_off_ready && + WARN_ON(!tegra_cpu_rail_off_ready())) + return -EBUSY; + /* * L2 cache disabling using kernel API only allowed when all * secondary CPU's are offline. Cache have to be disabled with @@ -146,9 +150,10 @@ static int tegra_sleep_cpu(unsigned long v2p) * if any of secondary CPU's is online and this is the LP2-idle * code-path only for Tegra20/30. */ - if (trusted_foundations_registered()) - outer_disable(); - +#ifdef CONFIG_OUTER_CACHE + if (trusted_foundations_registered() && outer_cache.disable) + outer_cache.disable(); +#endif /* * Note that besides of setting up CPU reset vector this firmware * call may also do the following, depending on the FW version: From patchwork Wed Dec 18 21:04:55 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 1212804 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="Q486js/h"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 47dSJQ1wQ7z9sPc for ; Thu, 19 Dec 2019 08:07:34 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726754AbfLRVGv (ORCPT ); Wed, 18 Dec 2019 16:06:51 -0500 Received: from mail-lf1-f68.google.com ([209.85.167.68]:33010 "EHLO mail-lf1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726726AbfLRVGv (ORCPT ); Wed, 18 Dec 2019 16:06:51 -0500 Received: by mail-lf1-f68.google.com with SMTP id n25so2744502lfl.0; Wed, 18 Dec 2019 13:06:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Hib42aIHxrfB6sXFxEWLAXejr3s2jsMxqrnHovG8wow=; b=Q486js/hrANA53FWo18EGWBKHcSHx5GJbmndmZcaKAopl8fAbACSPx0PsM/8YZ/vyt DIcRsWxv8QzaFRBhKch3s64K86M6uyUnNmk+mleRbkMNWnO0Xn5flXXufv3arGz2NuCp p6NEjKyUvrf0FzNK608XJ6JR5jeIDu5WObrkwC/KsqAFcuZGTAKgo0MCvmSvZV96z0HI BxQutDORcJFFRS5NTw+1RUFoAsDWXjUJDiBbRZTOUoHstJO31l4PtguTLqXewN+4DZDJ +HCywzcR/fWpb+R0d+KEjSxgi6ZBtJEGbekA8nuAmk+re3n/AQw91kCAH+p/H4DWvNt6 iqLg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Hib42aIHxrfB6sXFxEWLAXejr3s2jsMxqrnHovG8wow=; b=d5r8m7p0MA+Zv3tohzmZ339P8zcRSs5sUGkgjgahq8vTzNuIp4K6TbbCRlMTrT2raQ F49q9va3W62U75kpXvhTfSb5juT5rJlhzqbmlLxqFQ+HAibFENLkIPqa0TuIf46pBeQy YgFuiuf5DIpEh4gAMHdDGKFcb2dN5xsYEr9I+AmyyK3XOI8JdWUapySWXa1F+aUiUzsz kl69S6hGHyD5rWtrIzgc2ro4CZsfVVCfzf7CRk691Dn7VjkaKzJQezKFDvLEqBOG++MA duLlbhhazpHGYaUcRr7X2T4Dej9bLQ2ckvsUBnuGIhXgTk2hAP9RpZ4tdi+v49K7/PRx XAXQ== X-Gm-Message-State: APjAAAV4yP9B54z9GbxD/78ShJvC+UCoGRvom3cCanRQ71PS3qh9czKI j88tnW0hTWQPRLC9X2p9FQc= X-Google-Smtp-Source: APXvYqy4sH6ZfMpy5YcNHCvoNmhdpQPpQUkjgd6MHNnEdy4LjgUJhEqk+3eGFJMo9b7cXkf2iqTuxQ== X-Received: by 2002:ac2:44a3:: with SMTP id c3mr3081101lfm.1.1576703209268; Wed, 18 Dec 2019 13:06:49 -0800 (PST) Received: from localhost.localdomain (79-139-233-37.dynamic.spd-mgts.ru. [79.139.233.37]) by smtp.gmail.com with ESMTPSA id r15sm1754648ljk.3.2019.12.18.13.06.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Dec 2019 13:06:48 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano , =?utf-8?q?Micha=C5=82_Miro?= =?utf-8?b?c8WCYXc=?= Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v9 09/17] arm: tegra20: cpuidle: Handle case where secondary CPU hangs on entering LP2 Date: Thu, 19 Dec 2019 00:04:55 +0300 Message-Id: <20191218210503.6689-10-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191218210503.6689-1-digetx@gmail.com> References: <20191218210503.6689-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org It is possible that something may go wrong with the secondary CPU, in that case it is much nicer to get a dump of the flow-controller state before hanging machine. Acked-by: Peter De Schrijver Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/cpuidle-tegra20.c | 47 +++++++++++++++++++++++++-- 1 file changed, 45 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-tegra/cpuidle-tegra20.c b/arch/arm/mach-tegra/cpuidle-tegra20.c index 9672c619f4bc..bcc158b72e67 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra20.c +++ b/arch/arm/mach-tegra/cpuidle-tegra20.c @@ -83,14 +83,57 @@ static inline void tegra20_wake_cpu1_from_reset(void) } #endif +static void tegra20_report_cpus_state(void) +{ + unsigned long cpu, lcpu, csr; + + for_each_cpu(lcpu, cpu_possible_mask) { + cpu = cpu_logical_map(lcpu); + csr = flowctrl_read_cpu_csr(cpu); + + pr_err("cpu%lu: online=%d flowctrl_csr=0x%08lx\n", + cpu, cpu_online(lcpu), csr); + } +} + +static int tegra20_wait_for_secondary_cpu_parking(void) +{ + unsigned int retries = 3; + + while (retries--) { + ktime_t timeout = ktime_add_ms(ktime_get(), 500); + + /* + * The primary CPU0 core shall wait for the secondaries + * shutdown in order to power-off CPU's cluster safely. + * The timeout value depends on the current CPU frequency, + * it takes about 40-150us in average and over 1000us in + * a worst case scenario. + */ + do { + if (tegra_cpu_rail_off_ready()) + return 0; + + } while (ktime_before(ktime_get(), timeout)); + + pr_err("secondary CPU taking too long to park\n"); + + tegra20_report_cpus_state(); + } + + pr_err("timed out waiting secondaries to park\n"); + + return -ETIMEDOUT; +} + static bool tegra20_cpu_cluster_power_down(struct cpuidle_device *dev, struct cpuidle_driver *drv, int index) { bool ret; - while (!tegra_cpu_rail_off_ready()) - cpu_relax(); + if (tegra20_wait_for_secondary_cpu_parking()) + return false; ret = !tegra_pm_enter_lp2(); From patchwork Wed Dec 18 21:04:56 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 1212796 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="r0tmA3ET"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 47dSHf4cP8z9sP3 for ; Thu, 19 Dec 2019 08:06:54 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726776AbfLRVGx (ORCPT ); Wed, 18 Dec 2019 16:06:53 -0500 Received: from mail-lf1-f65.google.com ([209.85.167.65]:40717 "EHLO mail-lf1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726736AbfLRVGw (ORCPT ); Wed, 18 Dec 2019 16:06:52 -0500 Received: by mail-lf1-f65.google.com with SMTP id i23so2720398lfo.7; Wed, 18 Dec 2019 13:06:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=6Fc16lLz+PcEOzTBmofFYsXDuW2bZQVydYqS2lFFTaM=; b=r0tmA3EThpqI/PxZ/vI2RFxHg4XB5ybzOkVV8CBEi5o0yGL+0rAxGrbgffgpd+anLm Z6x3gWjvomu1plPwJZ5et0h6X4kI7dNmh5cKXZf34703Mg0xr8lUGXifhcD8EudtP7BK 0VuSCR8nw9+q1wyBSdgBhuZjYRE4PK+uxZMclm/bA92CocBtjv8vXs3JlBrnPyb8cAZP DIdz9lW506RZrgNH+9/f/wSRM+S82nHiIfRlBCDF1RbrwEGNRSQbs98Ob4nQ96GgyVZY VcKj3cpX17hVtH6TFpHwjMhd6uiUHE0rxiIgiUS82EcjsJ0nMyIfn065BvTT+DQrYYbC u+9w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=6Fc16lLz+PcEOzTBmofFYsXDuW2bZQVydYqS2lFFTaM=; b=kAIpZSFmBN6YysifIXEfLQutFuQSFw5GgCD9K8/Rm12bMeOdZISoV5dShh7XCMN9G4 2Dp4bnwtMpt7K8LoE5rIUPW9r7eocSyi0LcTACLLSSr2C4MJuTYL8ueBpRnCz3h9fnIi JFYZxhWvLnlawvOSZh0QqW2FOMCCao+yKt4h37Vo0kDBwmkX2HgqkMzGiaNnmlZ71kRH MVQghpgHfSOrY2qHOy8qU23FQBJrG8yGHs18DQ42Q8x9IY+lHyjgvpD71/ari61JiCpE m09A/k7seHrBYxBZiK/eEgTUepKU46abha2WZCkHzpJ+DeqphE8X8hsouo7R/GlvRmal DWxQ== X-Gm-Message-State: APjAAAU5dnGBZN+jTzCx+TNzkZdwTw3Fn9N8sTX/KZtzivrh0zkH6wQR e5vxfMV8gmldiaA54ZPsXSA= X-Google-Smtp-Source: APXvYqxULpZ5jzgrz+hAvBDf6HWzZzaPCSAVNAVz5bro2nhaDlG7z/Q1b3BPt3rZ2wYS8Qa4sWPdkQ== X-Received: by 2002:a19:c205:: with SMTP id l5mr3030784lfc.159.1576703210332; Wed, 18 Dec 2019 13:06:50 -0800 (PST) Received: from localhost.localdomain (79-139-233-37.dynamic.spd-mgts.ru. [79.139.233.37]) by smtp.gmail.com with ESMTPSA id r15sm1754648ljk.3.2019.12.18.13.06.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Dec 2019 13:06:49 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano , =?utf-8?q?Micha=C5=82_Miro?= =?utf-8?b?c8WCYXc=?= Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v9 10/17] arm: tegra20: cpuidle: Make abort_flag atomic Date: Thu, 19 Dec 2019 00:04:56 +0300 Message-Id: <20191218210503.6689-11-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191218210503.6689-1-digetx@gmail.com> References: <20191218210503.6689-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Replace memory accessors with atomic API just to make code consistent with the abort_barrier. The new variant may be even more correct now since atomic_read() will prevent compiler from generating wrong things like carrying abort_flag value in a register instead of re-fetching it from memory. Acked-by: Peter De Schrijver Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/cpuidle-tegra20.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-tegra/cpuidle-tegra20.c b/arch/arm/mach-tegra/cpuidle-tegra20.c index bcc158b72e67..ccb8b0aa6c46 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra20.c +++ b/arch/arm/mach-tegra/cpuidle-tegra20.c @@ -32,7 +32,7 @@ #include "sleep.h" #ifdef CONFIG_PM_SLEEP -static bool abort_flag; +static atomic_t abort_flag; static atomic_t abort_barrier; static int tegra20_idle_lp2_coupled(struct cpuidle_device *dev, struct cpuidle_driver *drv, @@ -168,13 +168,14 @@ static int tegra20_idle_lp2_coupled(struct cpuidle_device *dev, bool entered_lp2 = false; if (tegra_pending_sgi()) - WRITE_ONCE(abort_flag, true); + atomic_set(&abort_flag, 1); cpuidle_coupled_parallel_barrier(dev, &abort_barrier); - if (abort_flag) { + if (atomic_read(&abort_flag)) { cpuidle_coupled_parallel_barrier(dev, &abort_barrier); - abort_flag = false; /* clean flag for next coming */ + /* clean flag for next coming */ + atomic_set(&abort_flag, 0); return -EINTR; } From patchwork Wed Dec 18 21:04:57 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 1212803 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="ZZ/1erMZ"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 47dSJH6rBSz9sR0 for ; Thu, 19 Dec 2019 08:07:27 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726546AbfLRVHZ (ORCPT ); Wed, 18 Dec 2019 16:07:25 -0500 Received: from mail-lj1-f194.google.com ([209.85.208.194]:36989 "EHLO mail-lj1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726758AbfLRVGx (ORCPT ); Wed, 18 Dec 2019 16:06:53 -0500 Received: by mail-lj1-f194.google.com with SMTP id u17so3726964lja.4; Wed, 18 Dec 2019 13:06:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Ox3xjJZhAlXLoh8odxfq7BNhkqrIMThtE7VeUHdCC/o=; b=ZZ/1erMZSG3LqTV+84+dNZ+PeJLS/TJVEq/ZGZ2xKnTtPz3/J4jzf/mf2uZ5tLoviL ZwdRixKHsbfuhVVX60hEUhfFOd4so17k6sImZ8sCV507F8SgR4fnQuRLmfBsjxNCOe02 XWauyssTD2fujG+5DapTGla1KnoGxvWo0sbT2dhqCGoiD4FLYOxl7vN172LCMSYXkKzn Z3w4T6Umlcw0yKvHaqhKsWyClgpD6TUONovfQq2Ey2mkHGkkRk+EnzzeL15yQbxzHlYa Zf2MHHVkyf7rZKwdVp4O/l6mtAA0EM+47Mjt355WbveSVAOcPg1TpUoZIuJxr6Y2aD8k xHDg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Ox3xjJZhAlXLoh8odxfq7BNhkqrIMThtE7VeUHdCC/o=; b=ehj61b0pDJwiWv7o4F+Q9DgNUwO4atVa9zsMieZmOsvd3ZVsjLPjN0M7JUA5YarxBi lwXB+K8282Ju0Mw8rZ1Wqv/ev5h3wcTHpOhlCUj9c/7sXFSmBCYZRLZItHeozBfnq2gC 8h+xL5Ow9aFDsvdZHhsOZVlnVojdy6jP6g8JYXELQJlgdwxQzo6uDRgJO80+JEbBJ6Ve UMKgtpu7cku9tZJqdFurdhzdThTKGbCsUxOYBthUaJ1kq1jiSMd0jj2p9pbJin26HHXn yvpkLwKwT/be4StTzHAp4PJf5ET6d6nVHafoJqq5YZBn7tBgqU2Ipii8b4JrRILUUzsJ qidA== X-Gm-Message-State: APjAAAXReic+z9XBM0GHYe5yIkdjaTALEhs8oK7b58fKhhyfVyeaDw4v qyhab2Ceb7o67mI2eJ4zhuE= X-Google-Smtp-Source: APXvYqxBUk8VaEJtN37Hc5GIgP+xYncwHQ+X6s0x9iWLjHbSWGpIYzAFPzDlF7BGp3H85/IGrVAe+A== X-Received: by 2002:a2e:b0c4:: with SMTP id g4mr3268848ljl.83.1576703211300; Wed, 18 Dec 2019 13:06:51 -0800 (PST) Received: from localhost.localdomain (79-139-233-37.dynamic.spd-mgts.ru. [79.139.233.37]) by smtp.gmail.com with ESMTPSA id r15sm1754648ljk.3.2019.12.18.13.06.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Dec 2019 13:06:50 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano , =?utf-8?q?Micha=C5=82_Miro?= =?utf-8?b?c8WCYXc=?= Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v9 11/17] arm: tegra20/30: cpuidle: Remove unnecessary memory barrier Date: Thu, 19 Dec 2019 00:04:57 +0300 Message-Id: <20191218210503.6689-12-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191218210503.6689-1-digetx@gmail.com> References: <20191218210503.6689-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org There is no good justification for smp_rmb() after returning from LP2 because there are no memory operations that require SMP synchronization. Thus remove the confusing barrier. Acked-by: Peter De Schrijver Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/cpuidle-tegra20.c | 2 -- arch/arm/mach-tegra/cpuidle-tegra30.c | 2 -- 2 files changed, 4 deletions(-) diff --git a/arch/arm/mach-tegra/cpuidle-tegra20.c b/arch/arm/mach-tegra/cpuidle-tegra20.c index ccb8b0aa6c46..f8f14c0b79ff 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra20.c +++ b/arch/arm/mach-tegra/cpuidle-tegra20.c @@ -194,8 +194,6 @@ static int tegra20_idle_lp2_coupled(struct cpuidle_device *dev, local_fiq_enable(); - smp_rmb(); - return entered_lp2 ? index : 0; } #endif diff --git a/arch/arm/mach-tegra/cpuidle-tegra30.c b/arch/arm/mach-tegra/cpuidle-tegra30.c index a4f0add46a27..80ae64bcdf50 100644 --- a/arch/arm/mach-tegra/cpuidle-tegra30.c +++ b/arch/arm/mach-tegra/cpuidle-tegra30.c @@ -113,8 +113,6 @@ static int tegra30_idle_lp2(struct cpuidle_device *dev, local_fiq_enable(); - smp_rmb(); - return (entered_lp2) ? index : 0; } #endif From patchwork Wed Dec 18 21:04:58 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 1212800 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="BVbAvLop"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 47dSJ31rjqz9sPT for ; Thu, 19 Dec 2019 08:07:15 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726826AbfLRVG5 (ORCPT ); Wed, 18 Dec 2019 16:06:57 -0500 Received: from mail-lf1-f68.google.com ([209.85.167.68]:36757 "EHLO mail-lf1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726768AbfLRVG4 (ORCPT ); Wed, 18 Dec 2019 16:06:56 -0500 Received: by mail-lf1-f68.google.com with SMTP id n12so2731491lfe.3; Wed, 18 Dec 2019 13:06:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=IbVgAPLOz+y1TErbfXn4LY3y4NYTQMJANj0F8Noy+ac=; b=BVbAvLopk3bbx1nvxLZ/jZf32/drURlqO3kntTEt1clCHLv7W6+qkLnfO+te6TVuKo xMZm9/nLYKFJZKkXLz2NyZXieYTo/Gbc9sCnJVMFKTOTZScFZzI77bq+e0SxLH8o0/0u URiZjhyH8HEqMY3xa64j4E/0F5g1Rpc/c4TvjTOnMBboCufiYQ6KDHkXS99EuxES0RSI rO8DmAqnFet6qnsQ9ijnDGfpxy4qeOq0xQ07BgL8oOqNQleYw5pLBtbB5Cyf+jBV6pE3 3JiN6Gu4aQ6ZQRxCfpxG9D1uFrGnPUlXRe0NSYJZLyv/6lLYx755r1OjdQKYNTCYBUH4 CNdg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=IbVgAPLOz+y1TErbfXn4LY3y4NYTQMJANj0F8Noy+ac=; b=SnHhK/OW8+IsoXCdjCR+m/7lwPD0CVI3H7L3tRicxFyOGoKpO39I532+24KcttfJVY nwrEaRL6laQkPBcjkjHP7XB7QNAHL97oCvBm98WVSXCOINpJNlsKC/8SCKeWYhhY0jIy 8qw3sYs9FphnF+yY1WppfyAReDY4M7n9CyPji1yJnSJOdedYEwqbD3JU2ny851XtbCiz KrrTV0uoRPIkiK8D6648RUFHTvvdhKmQaMKSN9suuM631b/LyX47FF5+SXQTWyah4omL 3O7B58kR0IY0dGn0rbstigdWG8nSwhqyz5EWtyob3hn4dRtuJlqAJhyXqs9VH2fyzCuf BOwQ== X-Gm-Message-State: APjAAAUs22cPK69lunY4M2pvVKr5AcdaRoNyKNgCk4iPBAc+WoYZ2tLi SxMnQZatgQs/5hLHCiI5SMA= X-Google-Smtp-Source: APXvYqweqDGf/BKKYf8Uk0N1Zk6r6eZbYoE90oenzdF71rZu3FlWX/R83Uxve8PPAEkGK6tS0Uh8BQ== X-Received: by 2002:a19:c697:: with SMTP id w145mr2994772lff.54.1576703212356; Wed, 18 Dec 2019 13:06:52 -0800 (PST) Received: from localhost.localdomain (79-139-233-37.dynamic.spd-mgts.ru. [79.139.233.37]) by smtp.gmail.com with ESMTPSA id r15sm1754648ljk.3.2019.12.18.13.06.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Dec 2019 13:06:51 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano , =?utf-8?q?Micha=C5=82_Miro?= =?utf-8?b?c8WCYXc=?= Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v9 12/17] cpuidle: Refactor and move out NVIDIA Tegra20 driver into drivers/cpuidle Date: Thu, 19 Dec 2019 00:04:58 +0300 Message-Id: <20191218210503.6689-13-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191218210503.6689-1-digetx@gmail.com> References: <20191218210503.6689-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org The driver's code is refactored in a way that will make it easy to support Tegra30/114/124 SoCs by this unified driver later on. The current functionality is equal to the old Tegra20 driver, only the code's structure changed a tad. This is also a proper platform driver now. Acked-by: Peter De Schrijver Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/Makefile | 3 - arch/arm/mach-tegra/cpuidle-tegra20.c | 216 -------------------- arch/arm/mach-tegra/cpuidle.c | 14 +- arch/arm/mach-tegra/cpuidle.h | 4 - drivers/cpuidle/Kconfig.arm | 8 + drivers/cpuidle/Makefile | 1 + drivers/cpuidle/cpuidle-tegra.c | 277 ++++++++++++++++++++++++++ include/soc/tegra/cpuidle.h | 2 +- 8 files changed, 289 insertions(+), 236 deletions(-) delete mode 100644 arch/arm/mach-tegra/cpuidle-tegra20.c create mode 100644 drivers/cpuidle/cpuidle-tegra.c diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile index 965862608ff6..8425bb5608d5 100644 --- a/arch/arm/mach-tegra/Makefile +++ b/arch/arm/mach-tegra/Makefile @@ -12,9 +12,6 @@ obj-y += sleep-tegra20.o obj-y += sleep-tegra30.o obj-$(CONFIG_CPU_IDLE) += cpuidle.o obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += pm-tegra20.o -ifeq ($(CONFIG_CPU_IDLE),y) -obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += cpuidle-tegra20.o -endif obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += pm-tegra30.o ifeq ($(CONFIG_CPU_IDLE),y) obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += cpuidle-tegra30.o diff --git a/arch/arm/mach-tegra/cpuidle-tegra20.c b/arch/arm/mach-tegra/cpuidle-tegra20.c deleted file mode 100644 index f8f14c0b79ff..000000000000 --- a/arch/arm/mach-tegra/cpuidle-tegra20.c +++ /dev/null @@ -1,216 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * CPU idle driver for Tegra CPUs - * - * Copyright (c) 2010-2012, NVIDIA Corporation. - * Copyright (c) 2011 Google, Inc. - * Author: Colin Cross - * Gary King - * - * Rework for 3.3 by Peter De Schrijver - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include -#include -#include - -#include "cpuidle.h" -#include "iomap.h" -#include "irq.h" -#include "reset.h" -#include "sleep.h" - -#ifdef CONFIG_PM_SLEEP -static atomic_t abort_flag; -static atomic_t abort_barrier; -static int tegra20_idle_lp2_coupled(struct cpuidle_device *dev, - struct cpuidle_driver *drv, - int index); -#define TEGRA20_MAX_STATES 2 -#else -#define TEGRA20_MAX_STATES 1 -#endif - -static struct cpuidle_driver tegra_idle_driver = { - .name = "tegra_idle", - .owner = THIS_MODULE, - .states = { - ARM_CPUIDLE_WFI_STATE_PWR(600), -#ifdef CONFIG_PM_SLEEP - { - .enter = tegra20_idle_lp2_coupled, - .exit_latency = 5000, - .target_residency = 10000, - .power_usage = 0, - .flags = CPUIDLE_FLAG_COUPLED | - CPUIDLE_FLAG_TIMER_STOP, - .name = "powered-down", - .desc = "CPU power gated", - }, -#endif - }, - .state_count = TEGRA20_MAX_STATES, - .safe_state_index = 0, -}; - -#ifdef CONFIG_PM_SLEEP -#ifdef CONFIG_SMP -static void tegra20_wake_cpu1_from_reset(void) -{ - /* enable cpu clock on cpu */ - tegra_enable_cpu_clock(1); - - /* take the CPU out of reset */ - tegra_cpu_out_of_reset(1); - - /* unhalt the cpu */ - flowctrl_write_cpu_halt(1, 0); -} -#else -static inline void tegra20_wake_cpu1_from_reset(void) -{ -} -#endif - -static void tegra20_report_cpus_state(void) -{ - unsigned long cpu, lcpu, csr; - - for_each_cpu(lcpu, cpu_possible_mask) { - cpu = cpu_logical_map(lcpu); - csr = flowctrl_read_cpu_csr(cpu); - - pr_err("cpu%lu: online=%d flowctrl_csr=0x%08lx\n", - cpu, cpu_online(lcpu), csr); - } -} - -static int tegra20_wait_for_secondary_cpu_parking(void) -{ - unsigned int retries = 3; - - while (retries--) { - ktime_t timeout = ktime_add_ms(ktime_get(), 500); - - /* - * The primary CPU0 core shall wait for the secondaries - * shutdown in order to power-off CPU's cluster safely. - * The timeout value depends on the current CPU frequency, - * it takes about 40-150us in average and over 1000us in - * a worst case scenario. - */ - do { - if (tegra_cpu_rail_off_ready()) - return 0; - - } while (ktime_before(ktime_get(), timeout)); - - pr_err("secondary CPU taking too long to park\n"); - - tegra20_report_cpus_state(); - } - - pr_err("timed out waiting secondaries to park\n"); - - return -ETIMEDOUT; -} - -static bool tegra20_cpu_cluster_power_down(struct cpuidle_device *dev, - struct cpuidle_driver *drv, - int index) -{ - bool ret; - - if (tegra20_wait_for_secondary_cpu_parking()) - return false; - - ret = !tegra_pm_enter_lp2(); - - if (cpu_online(1)) - tegra20_wake_cpu1_from_reset(); - - return ret; -} - -#ifdef CONFIG_SMP -static bool tegra20_idle_enter_lp2_cpu_1(struct cpuidle_device *dev, - struct cpuidle_driver *drv, - int index) -{ - cpu_suspend(dev->cpu, tegra_pm_park_secondary_cpu); - - return true; -} -#else -static inline bool tegra20_idle_enter_lp2_cpu_1(struct cpuidle_device *dev, - struct cpuidle_driver *drv, - int index) -{ - return true; -} -#endif - -static int tegra20_idle_lp2_coupled(struct cpuidle_device *dev, - struct cpuidle_driver *drv, - int index) -{ - bool entered_lp2 = false; - - if (tegra_pending_sgi()) - atomic_set(&abort_flag, 1); - - cpuidle_coupled_parallel_barrier(dev, &abort_barrier); - - if (atomic_read(&abort_flag)) { - cpuidle_coupled_parallel_barrier(dev, &abort_barrier); - /* clean flag for next coming */ - atomic_set(&abort_flag, 0); - return -EINTR; - } - - local_fiq_disable(); - - tegra_pm_set_cpu_in_lp2(); - cpu_pm_enter(); - - if (dev->cpu == 0) - entered_lp2 = tegra20_cpu_cluster_power_down(dev, drv, index); - else - entered_lp2 = tegra20_idle_enter_lp2_cpu_1(dev, drv, index); - - cpu_pm_exit(); - tegra_pm_clear_cpu_in_lp2(); - - local_fiq_enable(); - - return entered_lp2 ? index : 0; -} -#endif - -/* - * Tegra20 HW appears to have a bug such that PCIe device interrupts, whether - * they are legacy IRQs or MSI, are lost when LP2 is enabled. To work around - * this, simply disable LP2 if the PCI driver and DT node are both enabled. - */ -void tegra20_cpuidle_pcie_irqs_in_use(void) -{ - pr_info_once( - "Disabling cpuidle LP2 state, since PCIe IRQs are in use\n"); - cpuidle_driver_state_disabled(&tegra_idle_driver, 1, true); -} - -int __init tegra20_cpuidle_init(void) -{ - return cpuidle_register(&tegra_idle_driver, cpu_possible_mask); -} diff --git a/arch/arm/mach-tegra/cpuidle.c b/arch/arm/mach-tegra/cpuidle.c index d565c44cfc93..eee85d517783 100644 --- a/arch/arm/mach-tegra/cpuidle.c +++ b/arch/arm/mach-tegra/cpuidle.c @@ -14,6 +14,7 @@ #include #include +#include #include @@ -23,8 +24,7 @@ void __init tegra_cpuidle_init(void) { switch (tegra_get_chip_id()) { case TEGRA20: - if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC)) - tegra20_cpuidle_init(); + platform_device_register_simple("tegra-cpuidle", -1, NULL, 0); break; case TEGRA30: if (IS_ENABLED(CONFIG_ARCH_TEGRA_3x_SOC)) @@ -38,13 +38,3 @@ void __init tegra_cpuidle_init(void) break; } } - -void tegra_cpuidle_pcie_irqs_in_use(void) -{ - switch (tegra_get_chip_id()) { - case TEGRA20: - if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC)) - tegra20_cpuidle_pcie_irqs_in_use(); - break; - } -} diff --git a/arch/arm/mach-tegra/cpuidle.h b/arch/arm/mach-tegra/cpuidle.h index 4e1f459f5bd8..eeb37baf18e1 100644 --- a/arch/arm/mach-tegra/cpuidle.h +++ b/arch/arm/mach-tegra/cpuidle.h @@ -7,15 +7,11 @@ #define __MACH_TEGRA_CPUIDLE_H #ifdef CONFIG_CPU_IDLE -int tegra20_cpuidle_init(void); -void tegra20_cpuidle_pcie_irqs_in_use(void); int tegra30_cpuidle_init(void); int tegra114_cpuidle_init(void); void tegra_cpuidle_init(void); -void tegra_cpuidle_pcie_irqs_in_use(void); #else static inline void tegra_cpuidle_init(void) {} -static inline void tegra_cpuidle_pcie_irqs_in_use(void) {} #endif #endif diff --git a/drivers/cpuidle/Kconfig.arm b/drivers/cpuidle/Kconfig.arm index a224d33dda7f..74350d415cd6 100644 --- a/drivers/cpuidle/Kconfig.arm +++ b/drivers/cpuidle/Kconfig.arm @@ -86,3 +86,11 @@ config ARM_MVEBU_V7_CPUIDLE depends on ARCH_MVEBU && !ARM64 help Select this to enable cpuidle on Armada 370, 38x and XP processors. + +config ARM_TEGRA_CPUIDLE + bool "CPU Idle Driver for NVIDIA Tegra SoCs" + depends on ARCH_TEGRA && !ARM64 + select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP + select ARM_CPU_SUSPEND + help + Select this to enable cpuidle for NVIDIA Tegra20/30/114/124 SoCs. diff --git a/drivers/cpuidle/Makefile b/drivers/cpuidle/Makefile index ee70d5cc5b99..a15e4808d295 100644 --- a/drivers/cpuidle/Makefile +++ b/drivers/cpuidle/Makefile @@ -22,6 +22,7 @@ obj-$(CONFIG_ARM_AT91_CPUIDLE) += cpuidle-at91.o obj-$(CONFIG_ARM_EXYNOS_CPUIDLE) += cpuidle-exynos.o obj-$(CONFIG_ARM_CPUIDLE) += cpuidle-arm.o obj-$(CONFIG_ARM_PSCI_CPUIDLE) += cpuidle-psci.o +obj-$(CONFIG_ARM_TEGRA_CPUIDLE) += cpuidle-tegra.o ############################################################################### # MIPS drivers diff --git a/drivers/cpuidle/cpuidle-tegra.c b/drivers/cpuidle/cpuidle-tegra.c new file mode 100644 index 000000000000..a58d2773d45f --- /dev/null +++ b/drivers/cpuidle/cpuidle-tegra.c @@ -0,0 +1,277 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * CPU idle driver for Tegra CPUs + * + * Copyright (c) 2010-2013, NVIDIA Corporation. + * Copyright (c) 2011 Google, Inc. + * Author: Colin Cross + * Gary King + * + * Rework for 3.3 by Peter De Schrijver + * + * Tegra20/124 driver unification by Dmitry Osipenko + */ + +#define pr_fmt(fmt) "tegra-cpuidle: " fmt + +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include +#include +#include +#include +#include + +#include +#include +#include + +enum tegra_state { + TEGRA_C1, + TEGRA_CC6, + TEGRA_STATE_COUNT, +}; + +static atomic_t tegra_idle_barrier; +static atomic_t tegra_abort_flag; + +static void tegra_cpuidle_report_cpus_state(void) +{ + unsigned long cpu, lcpu, csr; + + for_each_cpu(lcpu, cpu_possible_mask) { + cpu = cpu_logical_map(lcpu); + csr = flowctrl_read_cpu_csr(cpu); + + pr_err("cpu%lu: online=%d flowctrl_csr=0x%08lx\n", + cpu, cpu_online(lcpu), csr); + } +} + +static int tegra_cpuidle_wait_for_secondary_cpus_parking(void) +{ + unsigned int retries = 3; + + while (retries--) { + ktime_t timeout = ktime_add_ms(ktime_get(), 500); + + /* + * The primary CPU0 core shall wait for the secondaries + * shutdown in order to power-off CPU's cluster safely. + * The timeout value depends on the current CPU frequency, + * it takes about 40-150us in average and over 1000us in + * a worst case scenario. + */ + do { + if (tegra_cpu_rail_off_ready()) + return 0; + + } while (ktime_before(ktime_get(), timeout)); + + pr_err("secondary CPU taking too long to park\n"); + + tegra_cpuidle_report_cpus_state(); + } + + pr_err("timed out waiting secondaries to park\n"); + + return -ETIMEDOUT; +} + +static void tegra_cpuidle_unpark_secondary_cpus(void) +{ + unsigned int cpu, lcpu; + + for_each_cpu(lcpu, cpu_online_mask) { + cpu = cpu_logical_map(lcpu); + + if (cpu > 0) { + tegra_enable_cpu_clock(cpu); + tegra_cpu_out_of_reset(cpu); + flowctrl_write_cpu_halt(cpu, 0); + } + } +} + +static int tegra_cpuidle_cc6_enter(unsigned int cpu) +{ + int ret; + + if (cpu > 0) { + ret = cpu_suspend(cpu, tegra_pm_park_secondary_cpu); + } else { + ret = tegra_cpuidle_wait_for_secondary_cpus_parking(); + if (!ret) + ret = tegra_pm_enter_lp2(); + + tegra_cpuidle_unpark_secondary_cpus(); + } + + return ret; +} + +static int tegra_cpuidle_coupled_barrier(struct cpuidle_device *dev) +{ + if (tegra_pending_sgi()) { + /* + * CPU got local interrupt that will be lost after GIC's + * shutdown because GIC driver doesn't save/restore the + * pending SGI state across CPU cluster PM. Abort and retry + * next time. + */ + atomic_set(&tegra_abort_flag, 1); + } + + cpuidle_coupled_parallel_barrier(dev, &tegra_idle_barrier); + + if (atomic_read(&tegra_abort_flag)) { + cpuidle_coupled_parallel_barrier(dev, &tegra_idle_barrier); + atomic_set(&tegra_abort_flag, 0); + return -EINTR; + } + + return 0; +} + +static int tegra_cpuidle_state_enter(struct cpuidle_device *dev, + int index, unsigned int cpu) +{ + int ret; + + /* + * CC6 state is the "CPU cluster power-off" state. In order to + * enter this state, at first the secondary CPU cores need to be + * parked into offline mode, then the last CPU should clean out + * remaining dirty cache lines into DRAM and trigger Flow Controller + * logic that turns off the cluster's power domain (which includes + * CPU cores, GIC and L2 cache). + */ + if (index == TEGRA_CC6) { + ret = tegra_cpuidle_coupled_barrier(dev); + if (ret) + return ret; + } + + local_fiq_disable(); + tegra_pm_set_cpu_in_lp2(); + cpu_pm_enter(); + + switch (index) { + case TEGRA_CC6: + ret = tegra_cpuidle_cc6_enter(cpu); + break; + + default: + ret = -EINVAL; + break; + } + + cpu_pm_exit(); + tegra_pm_clear_cpu_in_lp2(); + local_fiq_enable(); + + return ret; +} + +static int tegra_cpuidle_enter(struct cpuidle_device *dev, + struct cpuidle_driver *drv, + int index) +{ + unsigned int cpu = cpu_logical_map(dev->cpu); + int err; + + err = tegra_cpuidle_state_enter(dev, index, cpu); + if (err && err != -EINTR) + pr_err_once("cpu%u failed to enter idle state %d err: %d\n", + cpu, index, err); + + return err ? -1 : index; +} + +/* + * The previous versions of Tegra CPUIDLE driver used a different "legacy" + * terminology for naming of the idling states, while this driver uses the + * new terminology. + * + * Mapping of the old terms into the new ones: + * + * Old | New + * --------- + * LP3 | C1 (CPU core clock gating) + * LP2 | C7 (CPU core power gating) + * LP2 | CC6 (CPU cluster power gating) + * + * Note that that the older CPUIDLE driver versions didn't explicitly + * differentiate the LP2 states because these states either used the same + * code path or because CC6 wasn't supported. + */ +static struct cpuidle_driver tegra_idle_driver = { + .name = "tegra_idle", + .states = { + [TEGRA_C1] = ARM_CPUIDLE_WFI_STATE_PWR(600), + [TEGRA_CC6] = { + .enter = tegra_cpuidle_enter, + .exit_latency = 5000, + .target_residency = 10000, + .power_usage = 0, + .flags = CPUIDLE_FLAG_TIMER_STOP | + CPUIDLE_FLAG_COUPLED, + .name = "CC6", + .desc = "CPU cluster powered off", + }, + }, + .state_count = TEGRA_STATE_COUNT, + .safe_state_index = TEGRA_C1, +}; + +static inline void tegra_cpuidle_disable_state(enum tegra_state state) +{ + cpuidle_driver_state_disabled(&tegra_idle_driver, state, true); +} + +/* + * Tegra20 HW appears to have a bug such that PCIe device interrupts, whether + * they are legacy IRQs or MSI, are lost when CC6 is enabled. To work around + * this, simply disable CC6 if the PCI driver and DT node are both enabled. + */ +void tegra_cpuidle_pcie_irqs_in_use(void) +{ + struct cpuidle_state *state_cc6 = &tegra_idle_driver.states[TEGRA_CC6]; + + if ((state_cc6->flags & CPUIDLE_FLAG_UNUSABLE) || + tegra_get_chip_id() != TEGRA20) + return; + + pr_info("disabling CC6 state, since PCIe IRQs are in use\n"); + tegra_cpuidle_disable_state(TEGRA_CC6); +} + +static int tegra_cpuidle_probe(struct platform_device *pdev) +{ + /* + * Required suspend-resume functionality, which is provided by the + * Tegra-arch core and PMC driver, is unavailable if PM-sleep option + * is disabled. + */ + if (!IS_ENABLED(CONFIG_PM_SLEEP)) + tegra_cpuidle_disable_state(TEGRA_CC6); + + return cpuidle_register(&tegra_idle_driver, cpu_possible_mask); +} + +static struct platform_driver tegra_cpuidle_driver = { + .probe = tegra_cpuidle_probe, + .driver = { + .name = "tegra-cpuidle", + }, +}; +builtin_platform_driver(tegra_cpuidle_driver); diff --git a/include/soc/tegra/cpuidle.h b/include/soc/tegra/cpuidle.h index 029ba1f4b2cc..5665975015d8 100644 --- a/include/soc/tegra/cpuidle.h +++ b/include/soc/tegra/cpuidle.h @@ -6,7 +6,7 @@ #ifndef __SOC_TEGRA_CPUIDLE_H__ #define __SOC_TEGRA_CPUIDLE_H__ -#if defined(CONFIG_ARM) && defined(CONFIG_ARCH_TEGRA) && defined(CONFIG_CPU_IDLE) +#ifdef CONFIG_ARM_TEGRA_CPUIDLE void tegra_cpuidle_pcie_irqs_in_use(void); #else static inline void tegra_cpuidle_pcie_irqs_in_use(void) From patchwork Wed Dec 18 21:04:59 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 1212802 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="F3LPCd7Y"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 47dSJD3VrVz9sR8 for ; Thu, 19 Dec 2019 08:07:24 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726943AbfLRVHP (ORCPT ); Wed, 18 Dec 2019 16:07:15 -0500 Received: from mail-lj1-f193.google.com ([209.85.208.193]:40726 "EHLO mail-lj1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726783AbfLRVG5 (ORCPT ); Wed, 18 Dec 2019 16:06:57 -0500 Received: by mail-lj1-f193.google.com with SMTP id u1so3721697ljk.7; Wed, 18 Dec 2019 13:06:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=GwsNI4LvQI1c69zCIIaOFlz4DGunlB3qWDZP4g6/4Qc=; b=F3LPCd7YpEuxEDrLw7H9RGBdA7T/Vk99WDB/pkCqdOuX5+OKnPD3B1cokZIcoQAXYu TY7wLVaYl9D42/3xLGmeyQ8VaNiYjMWjSlc+1W7PXfsJ1IoXSs0lSO4grhu6qKCvxdNU m1WJt4cp1z2CYJ3Vcn2g8D+Je+c6Yi2N85I4rFBnTogXKUdF4zDhD+TtaDHPqD2sd697 rKCtkSPvtS3a0hQhCWWtXfp1nq79vdTvI37+AmE4OTGkxKIM23R9+2kM4PBhneJGHVFu GeXP9pTlrrssn6+WQ/ybwaaRjQBwy+VgdIU5YtwBIA1gKtG2GJ3MOK8WEceea767YrdJ 0wQA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=GwsNI4LvQI1c69zCIIaOFlz4DGunlB3qWDZP4g6/4Qc=; b=baFn0Qxn8/2cyd+aB7Emp1nfFRtFJRDfe/zbIaGVLdLC0OFt2xuwL30ynoNXLTIjhr Vq9jXb+rw9sq2Ep3Lna0bLJ3NNZFRJmjuYf6Er4Lgf5M7rMolwwPkz2w4wCNf4fboaXE 66nIZr230j7BSg5K11kwBA6K3LbuPAQ1kxFIc2FOaLNhQ9zc/Gb58H6+UzoZoXIzyQc8 iih0M1mlRbGf+05UHK04N4zdeyDVIu7J4bJFtF/smUFUFu6cbqHueUHX6IxdQrJY/3gA 4cFWCqc1et/jfjXUnaZEMOaMyDvWvZB9gTWFp1tCLht0ggA0hXk+dVuw3gM0cqHGIJmn rx5A== X-Gm-Message-State: APjAAAX3xa5H9qgr0Okwhutelr5FfkO4MuFWwJvg/a1KqKr+NsDLXm2H hd7DxrK7BO5YDeY0j1FqbjQ= X-Google-Smtp-Source: APXvYqxYC/O9AtgrtsKHcQ7b8FAJEWvcKbpggfwcu5tKyuewDbxovTEMVZqljRmnhW3XYbvD7hShBA== X-Received: by 2002:a2e:9f47:: with SMTP id v7mr3247846ljk.124.1576703213266; Wed, 18 Dec 2019 13:06:53 -0800 (PST) Received: from localhost.localdomain (79-139-233-37.dynamic.spd-mgts.ru. [79.139.233.37]) by smtp.gmail.com with ESMTPSA id r15sm1754648ljk.3.2019.12.18.13.06.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Dec 2019 13:06:52 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano , =?utf-8?q?Micha=C5=82_Miro?= =?utf-8?b?c8WCYXc=?= Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v9 13/17] cpuidle: tegra: Squash Tegra30 driver into the common driver Date: Thu, 19 Dec 2019 00:04:59 +0300 Message-Id: <20191218210503.6689-14-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191218210503.6689-1-digetx@gmail.com> References: <20191218210503.6689-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Tegra20 and Terga30 SoCs have common C1 and CC6 idling states and thus share the same code paths, there is no point in having separate drivers for a similar hardware. This patch merely moves functionality of the old driver into the new, although the CC6 state is kept disabled for now since old driver had a rudimentary support for this state (allowing to enter into CC6 only when secondary CPUs are put offline), while new driver can provide a full-featured support. The new feature will be enabled by another patch. Acked-by: Peter De Schrijver Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/Makefile | 3 - arch/arm/mach-tegra/cpuidle-tegra30.c | 123 -------------------------- arch/arm/mach-tegra/cpuidle.c | 5 +- arch/arm/mach-tegra/cpuidle.h | 1 - drivers/cpuidle/cpuidle-tegra.c | 74 ++++++++++++++-- 5 files changed, 70 insertions(+), 136 deletions(-) delete mode 100644 arch/arm/mach-tegra/cpuidle-tegra30.c diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile index 8425bb5608d5..99c5f4274e5c 100644 --- a/arch/arm/mach-tegra/Makefile +++ b/arch/arm/mach-tegra/Makefile @@ -13,9 +13,6 @@ obj-y += sleep-tegra30.o obj-$(CONFIG_CPU_IDLE) += cpuidle.o obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += pm-tegra20.o obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += pm-tegra30.o -ifeq ($(CONFIG_CPU_IDLE),y) -obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += cpuidle-tegra30.o -endif obj-$(CONFIG_SMP) += platsmp.o obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o diff --git a/arch/arm/mach-tegra/cpuidle-tegra30.c b/arch/arm/mach-tegra/cpuidle-tegra30.c deleted file mode 100644 index 80ae64bcdf50..000000000000 --- a/arch/arm/mach-tegra/cpuidle-tegra30.c +++ /dev/null @@ -1,123 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * CPU idle driver for Tegra CPUs - * - * Copyright (c) 2010-2012, NVIDIA Corporation. - * Copyright (c) 2011 Google, Inc. - * Author: Colin Cross - * Gary King - * - * Rework for 3.3 by Peter De Schrijver - */ - -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include - -#include "cpuidle.h" -#include "sleep.h" - -#ifdef CONFIG_PM_SLEEP -static int tegra30_idle_lp2(struct cpuidle_device *dev, - struct cpuidle_driver *drv, - int index); -#endif - -static struct cpuidle_driver tegra_idle_driver = { - .name = "tegra_idle", - .owner = THIS_MODULE, -#ifdef CONFIG_PM_SLEEP - .state_count = 2, -#else - .state_count = 1, -#endif - .states = { - [0] = ARM_CPUIDLE_WFI_STATE_PWR(600), -#ifdef CONFIG_PM_SLEEP - [1] = { - .enter = tegra30_idle_lp2, - .exit_latency = 2000, - .target_residency = 2200, - .power_usage = 0, - .flags = CPUIDLE_FLAG_TIMER_STOP, - .name = "powered-down", - .desc = "CPU power gated", - }, -#endif - }, -}; - -#ifdef CONFIG_PM_SLEEP -static bool tegra30_cpu_cluster_power_down(struct cpuidle_device *dev, - struct cpuidle_driver *drv, - int index) -{ - /* All CPUs entering LP2 is not working. - * Don't let CPU0 enter LP2 when any secondary CPU is online. - */ - if (num_online_cpus() > 1 || !tegra_cpu_rail_off_ready()) { - cpu_do_idle(); - return false; - } - - return !tegra_pm_enter_lp2(); -} - -#ifdef CONFIG_SMP -static bool tegra30_cpu_core_power_down(struct cpuidle_device *dev, - struct cpuidle_driver *drv, - int index) -{ - smp_wmb(); - - cpu_suspend(0, tegra30_pm_secondary_cpu_suspend); - - return true; -} -#else -static inline bool tegra30_cpu_core_power_down(struct cpuidle_device *dev, - struct cpuidle_driver *drv, - int index) -{ - return true; -} -#endif - -static int tegra30_idle_lp2(struct cpuidle_device *dev, - struct cpuidle_driver *drv, - int index) -{ - bool entered_lp2 = false; - - local_fiq_disable(); - - tegra_pm_set_cpu_in_lp2(); - cpu_pm_enter(); - - if (dev->cpu == 0) - entered_lp2 = tegra30_cpu_cluster_power_down(dev, drv, index); - else - entered_lp2 = tegra30_cpu_core_power_down(dev, drv, index); - - cpu_pm_exit(); - tegra_pm_clear_cpu_in_lp2(); - - local_fiq_enable(); - - return (entered_lp2) ? index : 0; -} -#endif - -int __init tegra30_cpuidle_init(void) -{ - return cpuidle_register(&tegra_idle_driver, NULL); -} diff --git a/arch/arm/mach-tegra/cpuidle.c b/arch/arm/mach-tegra/cpuidle.c index eee85d517783..fa0dcf3c2c45 100644 --- a/arch/arm/mach-tegra/cpuidle.c +++ b/arch/arm/mach-tegra/cpuidle.c @@ -24,11 +24,8 @@ void __init tegra_cpuidle_init(void) { switch (tegra_get_chip_id()) { case TEGRA20: - platform_device_register_simple("tegra-cpuidle", -1, NULL, 0); - break; case TEGRA30: - if (IS_ENABLED(CONFIG_ARCH_TEGRA_3x_SOC)) - tegra30_cpuidle_init(); + platform_device_register_simple("tegra-cpuidle", -1, NULL, 0); break; case TEGRA114: case TEGRA124: diff --git a/arch/arm/mach-tegra/cpuidle.h b/arch/arm/mach-tegra/cpuidle.h index eeb37baf18e1..5423a05a69f6 100644 --- a/arch/arm/mach-tegra/cpuidle.h +++ b/arch/arm/mach-tegra/cpuidle.h @@ -7,7 +7,6 @@ #define __MACH_TEGRA_CPUIDLE_H #ifdef CONFIG_CPU_IDLE -int tegra30_cpuidle_init(void); int tegra114_cpuidle_init(void); void tegra_cpuidle_init(void); #else diff --git a/drivers/cpuidle/cpuidle-tegra.c b/drivers/cpuidle/cpuidle-tegra.c index a58d2773d45f..59398c76cf68 100644 --- a/drivers/cpuidle/cpuidle-tegra.c +++ b/drivers/cpuidle/cpuidle-tegra.c @@ -37,6 +37,7 @@ enum tegra_state { TEGRA_C1, + TEGRA_C7, TEGRA_CC6, TEGRA_STATE_COUNT, }; @@ -119,6 +120,11 @@ static int tegra_cpuidle_cc6_enter(unsigned int cpu) return ret; } +static int tegra_cpuidle_c7_enter(void) +{ + return cpu_suspend(0, tegra30_pm_secondary_cpu_suspend); +} + static int tegra_cpuidle_coupled_barrier(struct cpuidle_device *dev) { if (tegra_pending_sgi()) { @@ -166,6 +172,10 @@ static int tegra_cpuidle_state_enter(struct cpuidle_device *dev, cpu_pm_enter(); switch (index) { + case TEGRA_C7: + ret = tegra_cpuidle_c7_enter(); + break; + case TEGRA_CC6: ret = tegra_cpuidle_cc6_enter(cpu); break; @@ -182,6 +192,24 @@ static int tegra_cpuidle_state_enter(struct cpuidle_device *dev, return ret; } +static int tegra_cpuidle_adjust_state_index(int index, unsigned int cpu) +{ + /* + * On Tegra30 CPU0 can't be power-gated separately from secondary + * cores because it gates the whole CPU cluster. + */ + if (cpu > 0 || index != TEGRA_C7 || tegra_get_chip_id() != TEGRA30) + return index; + + /* put CPU0 into C1 if C7 is requested and secondaries are online */ + if (!IS_ENABLED(CONFIG_PM_SLEEP) || num_online_cpus() > 1) + index = TEGRA_C1; + else + index = TEGRA_CC6; + + return index; +} + static int tegra_cpuidle_enter(struct cpuidle_device *dev, struct cpuidle_driver *drv, int index) @@ -189,10 +217,17 @@ static int tegra_cpuidle_enter(struct cpuidle_device *dev, unsigned int cpu = cpu_logical_map(dev->cpu); int err; - err = tegra_cpuidle_state_enter(dev, index, cpu); - if (err && err != -EINTR) - pr_err_once("cpu%u failed to enter idle state %d err: %d\n", - cpu, index, err); + index = tegra_cpuidle_adjust_state_index(index, cpu); + if (dev->states_usage[index].disable) + return -1; + + if (index == TEGRA_C1) + err = arm_cpuidle_simple_enter(dev, drv, index); + else + err = tegra_cpuidle_state_enter(dev, index, cpu); + + if (err && (err != -EINTR || index != TEGRA_CC6)) + pr_err_once("failed to enter state %d err: %d\n", index, err); return err ? -1 : index; } @@ -218,6 +253,15 @@ static struct cpuidle_driver tegra_idle_driver = { .name = "tegra_idle", .states = { [TEGRA_C1] = ARM_CPUIDLE_WFI_STATE_PWR(600), + [TEGRA_C7] = { + .enter = tegra_cpuidle_enter, + .exit_latency = 2000, + .target_residency = 2200, + .power_usage = 100, + .flags = CPUIDLE_FLAG_TIMER_STOP, + .name = "C7", + .desc = "CPU core powered off", + }, [TEGRA_CC6] = { .enter = tegra_cpuidle_enter, .exit_latency = 5000, @@ -262,8 +306,28 @@ static int tegra_cpuidle_probe(struct platform_device *pdev) * Tegra-arch core and PMC driver, is unavailable if PM-sleep option * is disabled. */ - if (!IS_ENABLED(CONFIG_PM_SLEEP)) + if (!IS_ENABLED(CONFIG_PM_SLEEP)) { + tegra_cpuidle_disable_state(TEGRA_C7); tegra_cpuidle_disable_state(TEGRA_CC6); + } + + /* + * Generic WFI state (also known as C1 or LP3) and the coupled CPU + * cluster power-off (CC6 or LP2) states are common for all Tegra SoCs. + */ + switch (tegra_get_chip_id()) { + case TEGRA20: + /* Tegra20 isn't capable to power-off individual CPU cores */ + tegra_cpuidle_disable_state(TEGRA_C7); + break; + + case TEGRA30: + tegra_cpuidle_disable_state(TEGRA_CC6); + break; + + default: + return -EINVAL; + } return cpuidle_register(&tegra_idle_driver, cpu_possible_mask); } From patchwork Wed Dec 18 21:05:00 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 1212801 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="MmwNue9T"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 47dSJC3cV3z9sR4 for ; Thu, 19 Dec 2019 08:07:23 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726840AbfLRVHP (ORCPT ); Wed, 18 Dec 2019 16:07:15 -0500 Received: from mail-lf1-f66.google.com ([209.85.167.66]:36957 "EHLO mail-lf1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726797AbfLRVG5 (ORCPT ); Wed, 18 Dec 2019 16:06:57 -0500 Received: by mail-lf1-f66.google.com with SMTP id b15so2734081lfc.4; Wed, 18 Dec 2019 13:06:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ZKEEZIia8R+ufMZWjFtVAJL8Wre5/H1rF2/jJQIGBGg=; b=MmwNue9TctTSkJGxe+v1oSIctqsaVEA/leGRcn9UQ8C8sItYno0l90KgFGlw/rB7Ge QzBU8f55bffjn+RGGwWaUvBdW+nMw7BpJui0oaCMzsWvnPTUEHQW6JVnRbZC5XJmg10l woxtBcKxL6icL2ML0NJdYYenDx/ZtnluAYI/4FqYC0weWzsX1d3zi7FQMBtc/TuVU5LC qioj1h9tQiux4vIiwjDvuyrxgN/ckjc0gI0/5vcEZix3pXe6SyI0+dVDX2iuI7tF2bgC moDNSTRYb0LConYPojrpxszwVM/0NCT+93EqXAIKdiyBHPlFiraHKsU3Z9NdA9hPi5Hb lUew== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ZKEEZIia8R+ufMZWjFtVAJL8Wre5/H1rF2/jJQIGBGg=; b=OW0Es3a/sBeuaiPlGeyJNJ0oobLBkrmkK+hsWoEREssLL1Ry9499G4YuyxlX4YDoST 7a4RgTkHHzSoocCS+UCTeMlGzg3QwPkYo5hKvFAVRf2KyWBav1QfKIYNipPnMxAelmBx 2IAU0qcB45i4BXwbTGNkemL6i7qXWtVF0x3vcQzz8LKsZjnXrUWHjdKCIqwCO8ZkzLn/ /M20Pa4AD1nrKvmLBS3HhrtzBZyeQekI+6PjxLiiC7ahzg07JO8fbUqIkaiZ8ijUM6lN vaItva9lGtPBHhA2JKQHWYjtLjMyeV5h2AbD32VHtSqAMuG4Y8Nq14wetAEhJj9rCkii ZufQ== X-Gm-Message-State: APjAAAW/pq3tkCxNw00ZaEka8a2IXMDhQ5Wp/ElM1nQi5x2TNqlnWfSA o6Ipskv28Gmz+M8V7sq4EJs= X-Google-Smtp-Source: APXvYqxEAZZkjxVZlfuVwyUCnrC87vt6RcGbCpb+xD3vgDJX1pDYBKXuS6i6uK3nopOkJC13HHGdmw== X-Received: by 2002:a19:5007:: with SMTP id e7mr3123166lfb.153.1576703214235; Wed, 18 Dec 2019 13:06:54 -0800 (PST) Received: from localhost.localdomain (79-139-233-37.dynamic.spd-mgts.ru. [79.139.233.37]) by smtp.gmail.com with ESMTPSA id r15sm1754648ljk.3.2019.12.18.13.06.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Dec 2019 13:06:53 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano , =?utf-8?q?Micha=C5=82_Miro?= =?utf-8?b?c8WCYXc=?= Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v9 14/17] cpuidle: tegra: Squash Tegra114 driver into the common driver Date: Thu, 19 Dec 2019 00:05:00 +0300 Message-Id: <20191218210503.6689-15-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191218210503.6689-1-digetx@gmail.com> References: <20191218210503.6689-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org Tegra20/30/114/124 SoCs have common idling states, thus there is no much point in having separate drivers for a similar hardware. This patch moves Tegra114/124 arch/ drivers into the common driver without any functional changes. The CC6 state is kept disabled on Tegra114/124 because the core Tegra PM code needs some more work in order to support that state. Acked-by: Peter De Schrijver Signed-off-by: Dmitry Osipenko --- arch/arm/mach-tegra/Makefile | 7 -- arch/arm/mach-tegra/cpuidle-tegra114.c | 90 -------------------------- arch/arm/mach-tegra/cpuidle.c | 37 ----------- arch/arm/mach-tegra/cpuidle.h | 16 ----- arch/arm/mach-tegra/tegra.c | 6 +- drivers/cpuidle/cpuidle-tegra.c | 45 ++++++++++++- 6 files changed, 48 insertions(+), 153 deletions(-) delete mode 100644 arch/arm/mach-tegra/cpuidle-tegra114.c delete mode 100644 arch/arm/mach-tegra/cpuidle.c delete mode 100644 arch/arm/mach-tegra/cpuidle.h diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile index 99c5f4274e5c..07572b5373b8 100644 --- a/arch/arm/mach-tegra/Makefile +++ b/arch/arm/mach-tegra/Makefile @@ -10,19 +10,12 @@ obj-y += sleep.o obj-y += tegra.o obj-y += sleep-tegra20.o obj-y += sleep-tegra30.o -obj-$(CONFIG_CPU_IDLE) += cpuidle.o obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += pm-tegra20.o obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += pm-tegra30.o obj-$(CONFIG_SMP) += platsmp.o obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o obj-$(CONFIG_ARCH_TEGRA_114_SOC) += pm-tegra30.o -ifeq ($(CONFIG_CPU_IDLE),y) -obj-$(CONFIG_ARCH_TEGRA_114_SOC) += cpuidle-tegra114.o -endif obj-$(CONFIG_ARCH_TEGRA_124_SOC) += pm-tegra30.o -ifeq ($(CONFIG_CPU_IDLE),y) -obj-$(CONFIG_ARCH_TEGRA_124_SOC) += cpuidle-tegra114.o -endif obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += board-paz00.o diff --git a/arch/arm/mach-tegra/cpuidle-tegra114.c b/arch/arm/mach-tegra/cpuidle-tegra114.c deleted file mode 100644 index 858c30cc5dc7..000000000000 --- a/arch/arm/mach-tegra/cpuidle-tegra114.c +++ /dev/null @@ -1,90 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (c) 2013, NVIDIA Corporation. All rights reserved. - */ - -#include -#include -#include -#include -#include -#include - -#include - -#include - -#include -#include -#include -#include - -#include "cpuidle.h" -#include "sleep.h" - -#ifdef CONFIG_PM_SLEEP -#define TEGRA114_MAX_STATES 2 -#else -#define TEGRA114_MAX_STATES 1 -#endif - -#ifdef CONFIG_PM_SLEEP -static int tegra114_idle_power_down(struct cpuidle_device *dev, - struct cpuidle_driver *drv, - int index) -{ - local_fiq_disable(); - - tegra_pm_set_cpu_in_lp2(); - cpu_pm_enter(); - - call_firmware_op(prepare_idle, TF_PM_MODE_LP2_NOFLUSH_L2); - - /* Do suspend by ourselves if the firmware does not implement it */ - if (call_firmware_op(do_idle, 0) == -ENOSYS) - cpu_suspend(0, tegra30_pm_secondary_cpu_suspend); - - cpu_pm_exit(); - tegra_pm_clear_cpu_in_lp2(); - - local_fiq_enable(); - - return index; -} - -static void tegra114_idle_enter_s2idle(struct cpuidle_device *dev, - struct cpuidle_driver *drv, - int index) -{ - tegra114_idle_power_down(dev, drv, index); -} -#endif - -static struct cpuidle_driver tegra_idle_driver = { - .name = "tegra_idle", - .owner = THIS_MODULE, - .state_count = TEGRA114_MAX_STATES, - .states = { - [0] = ARM_CPUIDLE_WFI_STATE_PWR(600), -#ifdef CONFIG_PM_SLEEP - [1] = { - .enter = tegra114_idle_power_down, - .enter_s2idle = tegra114_idle_enter_s2idle, - .exit_latency = 500, - .target_residency = 1000, - .flags = CPUIDLE_FLAG_TIMER_STOP, - .power_usage = 0, - .name = "powered-down", - .desc = "CPU power gated", - }, -#endif - }, -}; - -int __init tegra114_cpuidle_init(void) -{ - if (!psci_smp_available()) - return cpuidle_register(&tegra_idle_driver, NULL); - - return 0; -} diff --git a/arch/arm/mach-tegra/cpuidle.c b/arch/arm/mach-tegra/cpuidle.c deleted file mode 100644 index fa0dcf3c2c45..000000000000 --- a/arch/arm/mach-tegra/cpuidle.c +++ /dev/null @@ -1,37 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * arch/arm/mach-tegra/cpuidle.c - * - * CPU idle driver for Tegra CPUs - * - * Copyright (c) 2010-2012, NVIDIA Corporation. - * Copyright (c) 2011 Google, Inc. - * Author: Colin Cross - * Gary King - * - * Rework for 3.3 by Peter De Schrijver - */ - -#include -#include -#include - -#include - -#include "cpuidle.h" - -void __init tegra_cpuidle_init(void) -{ - switch (tegra_get_chip_id()) { - case TEGRA20: - case TEGRA30: - platform_device_register_simple("tegra-cpuidle", -1, NULL, 0); - break; - case TEGRA114: - case TEGRA124: - if (IS_ENABLED(CONFIG_ARCH_TEGRA_114_SOC) || - IS_ENABLED(CONFIG_ARCH_TEGRA_124_SOC)) - tegra114_cpuidle_init(); - break; - } -} diff --git a/arch/arm/mach-tegra/cpuidle.h b/arch/arm/mach-tegra/cpuidle.h deleted file mode 100644 index 5423a05a69f6..000000000000 --- a/arch/arm/mach-tegra/cpuidle.h +++ /dev/null @@ -1,16 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (c) 2012, NVIDIA Corporation. All rights reserved. - */ - -#ifndef __MACH_TEGRA_CPUIDLE_H -#define __MACH_TEGRA_CPUIDLE_H - -#ifdef CONFIG_CPU_IDLE -int tegra114_cpuidle_init(void); -void tegra_cpuidle_init(void); -#else -static inline void tegra_cpuidle_init(void) {} -#endif - -#endif diff --git a/arch/arm/mach-tegra/tegra.c b/arch/arm/mach-tegra/tegra.c index 79184a077c84..eeacff626546 100644 --- a/arch/arm/mach-tegra/tegra.c +++ b/arch/arm/mach-tegra/tegra.c @@ -36,11 +36,11 @@ #include #include #include +#include #include #include "board.h" #include "common.h" -#include "cpuidle.h" #include "iomap.h" #include "pm.h" #include "reset.h" @@ -85,7 +85,6 @@ static void __init tegra_dt_init(void) static void __init tegra_dt_init_late(void) { tegra_init_suspend(); - tegra_cpuidle_init(); if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC) && of_machine_is_compatible("compal,paz00")) @@ -98,6 +97,9 @@ static void __init tegra_dt_init_late(void) if (IS_ENABLED(CONFIG_ARCH_TEGRA_3x_SOC) && of_machine_is_compatible("nvidia,tegra30")) platform_device_register_simple("tegra20-cpufreq", -1, NULL, 0); + + if (IS_ENABLED(CONFIG_ARM_TEGRA_CPUIDLE) && !psci_smp_available()) + platform_device_register_simple("tegra-cpuidle", -1, NULL, 0); } static const char * const tegra_dt_board_compat[] = { diff --git a/drivers/cpuidle/cpuidle-tegra.c b/drivers/cpuidle/cpuidle-tegra.c index 59398c76cf68..b6cdad8437af 100644 --- a/drivers/cpuidle/cpuidle-tegra.c +++ b/drivers/cpuidle/cpuidle-tegra.c @@ -24,6 +24,7 @@ #include #include +#include #include #include @@ -32,6 +33,7 @@ #include #include +#include #include #include @@ -45,6 +47,11 @@ enum tegra_state { static atomic_t tegra_idle_barrier; static atomic_t tegra_abort_flag; +static inline bool tegra_cpuidle_using_firmware(void) +{ + return firmware_ops->prepare_idle && firmware_ops->do_idle; +} + static void tegra_cpuidle_report_cpus_state(void) { unsigned long cpu, lcpu, csr; @@ -122,6 +129,16 @@ static int tegra_cpuidle_cc6_enter(unsigned int cpu) static int tegra_cpuidle_c7_enter(void) { + int err; + + if (tegra_cpuidle_using_firmware()) { + err = call_firmware_op(prepare_idle, TF_PM_MODE_LP2_NOFLUSH_L2); + if (err) + return err; + + return call_firmware_op(do_idle, 0); + } + return cpu_suspend(0, tegra30_pm_secondary_cpu_suspend); } @@ -232,6 +249,13 @@ static int tegra_cpuidle_enter(struct cpuidle_device *dev, return err ? -1 : index; } +static void tegra114_enter_s2idle(struct cpuidle_device *dev, + struct cpuidle_driver *drv, + int index) +{ + tegra_cpuidle_enter(dev, drv, index); +} + /* * The previous versions of Tegra CPUIDLE driver used a different "legacy" * terminology for naming of the idling states, while this driver uses the @@ -299,6 +323,15 @@ void tegra_cpuidle_pcie_irqs_in_use(void) tegra_cpuidle_disable_state(TEGRA_CC6); } +static void tegra_cpuidle_setup_tegra114_c7_state(void) +{ + struct cpuidle_state *s = &tegra_idle_driver.states[TEGRA_C7]; + + s->enter_s2idle = tegra114_enter_s2idle; + s->target_residency = 1000; + s->exit_latency = 500; +} + static int tegra_cpuidle_probe(struct platform_device *pdev) { /* @@ -307,7 +340,9 @@ static int tegra_cpuidle_probe(struct platform_device *pdev) * is disabled. */ if (!IS_ENABLED(CONFIG_PM_SLEEP)) { - tegra_cpuidle_disable_state(TEGRA_C7); + if (!tegra_cpuidle_using_firmware()) + tegra_cpuidle_disable_state(TEGRA_C7); + tegra_cpuidle_disable_state(TEGRA_CC6); } @@ -325,6 +360,14 @@ static int tegra_cpuidle_probe(struct platform_device *pdev) tegra_cpuidle_disable_state(TEGRA_CC6); break; + case TEGRA114: + case TEGRA124: + tegra_cpuidle_setup_tegra114_c7_state(); + + /* coupled CC6 (LP2) state isn't implemented yet */ + tegra_cpuidle_disable_state(TEGRA_CC6); + break; + default: return -EINVAL; } From patchwork Wed Dec 18 21:05:01 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 1212799 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="VwAzIP+g"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 47dSJ210kxz9sR8 for ; Thu, 19 Dec 2019 08:07:14 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726841AbfLRVG6 (ORCPT ); Wed, 18 Dec 2019 16:06:58 -0500 Received: from mail-lj1-f196.google.com ([209.85.208.196]:33445 "EHLO mail-lj1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726808AbfLRVG5 (ORCPT ); Wed, 18 Dec 2019 16:06:57 -0500 Received: by mail-lj1-f196.google.com with SMTP id p8so3757212ljg.0; Wed, 18 Dec 2019 13:06:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=SwBRJQR42/kEWjB6ykPsoUtj/cCrRyEP3WrYnBo2JoU=; b=VwAzIP+gxrmQm3GnN8mZlOs4r3O0dwj2nAIf7Tw7bsKGxkZ46h3JnDMyJuKdJAeXdc iy2Bp5/I47Ep0ia+NBqIX00oVpU91s5OqoNbeRcUaB6h4y4DbmRaL00jWQPkDeqYPJpy DH2EaBjtgYlU72ul5UPt+++1oYafFAnudYzZqdBZOv1zkGNGOvKWvlSl+p+HtD1tJdtm N0tHpX/8jvdFAEHRLdH7fw+TASdSbcWj1nYEVhyELS00stz+9stNxpFuMF7SmUqsHzZ0 T671NtQEu057BazQd98o/yz7rDuLfxi8WooJmADXfEUHbnwIpoDpvneyXRKyP5Iff1xX Tetg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=SwBRJQR42/kEWjB6ykPsoUtj/cCrRyEP3WrYnBo2JoU=; b=rg8/wSFjRA7v7N5Q3pj77GrG9p2YaE/NlN0KBTjd4AiUf5AY4ttRgwf4xzc4cf80+b 01HBeElTt3FxLbMUlaRzr27KN7J4eqPzLYcndlx99Cn9ErabyaLf/XLXvn6b51FuiyZ4 ZEzCp9krLDKTQ71stQJRq1iZK3pePaL0SRXyUCPpVrvkTQKRiqNM6bKg0+bJBu1GxSh7 0IDIgSyW/DS+ag+rwyq9qVZee6rYh7YJR21iaQoXkiXIhyoK/gbm7UORLoAdsQXm2MnY pq2rb1rGKSDxOWIQX3lkmRTyCTL7dTBlvpBp40XTfwBQtXPEVHP5SFK4tYx+thK3YyxM DH0g== X-Gm-Message-State: APjAAAUIO6LvkzNLh8ddOxHeE+VL5xGTWhHj4/x+Vk1TciOvwJ+Tr1fg UUJSaANWnWl2IroXi84G6dA= X-Google-Smtp-Source: APXvYqyZrB7jKpCDPpU77WLvsfTVwoYnrD2UdkKyK8XZm3s5ozs0RYQSmMyhbQUT09p2NBWGPWPIZg== X-Received: by 2002:a2e:85c9:: with SMTP id h9mr3326449ljj.155.1576703215314; Wed, 18 Dec 2019 13:06:55 -0800 (PST) Received: from localhost.localdomain (79-139-233-37.dynamic.spd-mgts.ru. [79.139.233.37]) by smtp.gmail.com with ESMTPSA id r15sm1754648ljk.3.2019.12.18.13.06.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Dec 2019 13:06:54 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano , =?utf-8?q?Micha=C5=82_Miro?= =?utf-8?b?c8WCYXc=?= Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v9 15/17] cpuidle: tegra: Disable CC6 state if LP2 unavailable Date: Thu, 19 Dec 2019 00:05:01 +0300 Message-Id: <20191218210503.6689-16-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191218210503.6689-1-digetx@gmail.com> References: <20191218210503.6689-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org LP2 suspending could be unavailable, for example if it is disabled in a device-tree. CC6 cpuidle state won't work in that case. Acked-by: Peter De Schrijver Signed-off-by: Dmitry Osipenko --- drivers/cpuidle/cpuidle-tegra.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/cpuidle/cpuidle-tegra.c b/drivers/cpuidle/cpuidle-tegra.c index b6cdad8437af..675b8a4464ba 100644 --- a/drivers/cpuidle/cpuidle-tegra.c +++ b/drivers/cpuidle/cpuidle-tegra.c @@ -31,6 +31,7 @@ #include #include #include +#include #include #include @@ -334,6 +335,10 @@ static void tegra_cpuidle_setup_tegra114_c7_state(void) static int tegra_cpuidle_probe(struct platform_device *pdev) { + /* LP2 could be disabled in device-tree */ + if (tegra_pmc_get_suspend_mode() < TEGRA_SUSPEND_LP2) + tegra_cpuidle_disable_state(TEGRA_CC6); + /* * Required suspend-resume functionality, which is provided by the * Tegra-arch core and PMC driver, is unavailable if PM-sleep option From patchwork Wed Dec 18 21:05:02 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 1212798 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="Wt0buarE"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 47dSJ147wRz9sPn for ; Thu, 19 Dec 2019 08:07:13 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726869AbfLRVG7 (ORCPT ); Wed, 18 Dec 2019 16:06:59 -0500 Received: from mail-lj1-f194.google.com ([209.85.208.194]:35563 "EHLO mail-lj1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726824AbfLRVG6 (ORCPT ); Wed, 18 Dec 2019 16:06:58 -0500 Received: by mail-lj1-f194.google.com with SMTP id j6so3739244lja.2; Wed, 18 Dec 2019 13:06:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=knR00ggshGiSq9D+iSExGzRY0OKCDWpZOMHL9ri5sUI=; b=Wt0buarEZpL3wn7TIypAv8IsvBnOPNd3fgNP1hwQaJA80cmvm2VUSCV9Jr/9fYzTWs DnIFeZICqsgQ8TfIgr4wNN6krZnCcT3Wq3SO74hU9dUE4weIiWU/nXrFjI39rs3KoxN2 9B0pG2eT1sNfimYfkn+rXB0FMH5oYL+QVOM0RPaO+slZSDaNT0I/AyzpuW9JuM1O5iv3 fD3FS5yApEJ2qgi1heciiZxOhzLFexFFH4FtDKrklpu0BI97xhE1IbWq+ZI+f3pW9MKs L5qeDehmCfM3FlJ21SOCIHmUey7jVHYprUntpGJZ+2uy92+rYPdEdZmg54DddnvwMhDu RFCQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=knR00ggshGiSq9D+iSExGzRY0OKCDWpZOMHL9ri5sUI=; b=M0SrKct7KJTYWi/eNe9BcnGxPhFu+FdkZgs0Wn23w+mbB2BnzX/l7DuIzBNE39fXi+ gUXP/9Tt4h8Ei6Ozy6nQWL4jEe5O3lauOPcu7or7c9FPVo/DC2ZlTESShiJITQbI1q8q 0o474dd40Xja9dj+/eTcgtnNnOA7KoFfVBNEHnGP3X6OJq8t/KTa0PpBIiChlzWrztwD o/aJi1x9PuKNQcQ19bMjpdacIlDkSF/eMyXyvCRZpFZ/WODdDfzSeh8b3Xei7YR9h5cl PHi73iC8TAknKUgAfV8LCsBugZTyPKIbEg+Xy09aAF4ttc8qpSpNPlKfyqDMTe4hTmit Wz9w== X-Gm-Message-State: APjAAAVjrS8jxYSSJYJzvvG8+yRWfU9/Tg4D91aB3AMchwlV1AvjNpEJ lWH/EWE+X6udJphr5x99zaU= X-Google-Smtp-Source: APXvYqwdbNIgzxaDSt48j+jKXeWeTfYsIANcwxxYZSuiHC4p0VlISRF5WZDiam6+XsRe4K5+66z1cA== X-Received: by 2002:a2e:461a:: with SMTP id t26mr3438827lja.204.1576703216207; Wed, 18 Dec 2019 13:06:56 -0800 (PST) Received: from localhost.localdomain (79-139-233-37.dynamic.spd-mgts.ru. [79.139.233.37]) by smtp.gmail.com with ESMTPSA id r15sm1754648ljk.3.2019.12.18.13.06.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Dec 2019 13:06:55 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano , =?utf-8?q?Micha=C5=82_Miro?= =?utf-8?b?c8WCYXc=?= Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v9 16/17] ARM: multi_v7_defconfig: Enable Tegra cpuidle driver Date: Thu, 19 Dec 2019 00:05:02 +0300 Message-Id: <20191218210503.6689-17-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191218210503.6689-1-digetx@gmail.com> References: <20191218210503.6689-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org The Tegra CPU Idle driver was moved out into driver/cpuidle/ directory and it is now a proper platform driver. Acked-by: Peter De Schrijver Signed-off-by: Dmitry Osipenko --- arch/arm/configs/multi_v7_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig index 3f1b96dc7faa..1d1b595c998c 100644 --- a/arch/arm/configs/multi_v7_defconfig +++ b/arch/arm/configs/multi_v7_defconfig @@ -113,6 +113,7 @@ CONFIG_CPU_IDLE=y CONFIG_ARM_CPUIDLE=y CONFIG_ARM_ZYNQ_CPUIDLE=y CONFIG_ARM_EXYNOS_CPUIDLE=y +CONFIG_ARM_TEGRA_CPUIDLE=y CONFIG_KERNEL_MODE_NEON=y CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_TRUSTED_FOUNDATIONS=y From patchwork Wed Dec 18 21:05:03 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Osipenko X-Patchwork-Id: 1212797 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="GIA8G7vs"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 47dSHx0Dqrz9sR4 for ; Thu, 19 Dec 2019 08:07:09 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726916AbfLRVHH (ORCPT ); Wed, 18 Dec 2019 16:07:07 -0500 Received: from mail-lf1-f68.google.com ([209.85.167.68]:37897 "EHLO mail-lf1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726840AbfLRVG7 (ORCPT ); Wed, 18 Dec 2019 16:06:59 -0500 Received: by mail-lf1-f68.google.com with SMTP id r14so2725335lfm.5; Wed, 18 Dec 2019 13:06:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=OX3etwg8UyXmbbSJQLCscVLMHChzcySiKJD4V7kijDA=; b=GIA8G7vs3ssG+kS97bTj/9sDjWnB0kbPTwEOvBXDvEmAmNgHov8HaqJ9Jp637+eJDr mLFY1peZ9m/mZdiPvimSZzUZtSmoOyFHxLwT00eOyeWK9oa0RYAonBMkgeTj5WbO4y31 MB9rrwVxZvEKGkvsKLHBnmqkbebPuO3RVtN7wMK4iJz7xxNOkm7P0PO5RIILldqBwX1t wQOIcH/BZtXlAPIafiaXZqTi1jI8ohmqMyhgxVvf1v5AJOEDQaZ9INVQZ9SNlm353r5+ /+zwSljYFZwCrEOl6K6f7uHZ2p33pKu8ogzOS4Za84lhGj+2GriO/Gq9UVSamYfih0Z0 K9HA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=OX3etwg8UyXmbbSJQLCscVLMHChzcySiKJD4V7kijDA=; b=NvpaRQ0CIbogvjgGR85shzjd6xrToYE1jKv1B3HM6QRJh2/co5ukBh8OBEmAZIKvbA iY3hkZywULSm8yAdVoy61TNZ3D9SMEmRs8b13U34flmsVJll53qVB4z0fuTLWN4Pu6Q0 prbLzVfV/rKyoYyJ5VZYoLimPcp2l1TCKLewkrtuQF7CkJk79rpaPcSCraAlFsBZLKJk 9RN4PDCJ7ChTXJeTlb6PvoYBuD75dGqyhBad4/aETtOarQu377rNWW8rTq+mphHWF19+ 7uadeqO3eVuYUFYFnKtKxa21EH9I9cdF7/LT8ZTm7IXF3DP3u3vw97NVmTEuzJopihbt gAeA== X-Gm-Message-State: APjAAAVl0zZLJDwP/oSem1oI9rIFLO6jdbNbbUZyJypgytq13d9zXvQ6 6benhIW6J+o+EQa4kCx2oEs= X-Google-Smtp-Source: APXvYqwKH8I3c4Sj8soE97dvCZsqMd65HH/e73RXgS6N+7HJggYBIknoIPITBYBlsvTF68+XmZ4mfQ== X-Received: by 2002:ac2:4194:: with SMTP id z20mr3177996lfh.20.1576703217029; Wed, 18 Dec 2019 13:06:57 -0800 (PST) Received: from localhost.localdomain (79-139-233-37.dynamic.spd-mgts.ru. [79.139.233.37]) by smtp.gmail.com with ESMTPSA id r15sm1754648ljk.3.2019.12.18.13.06.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Dec 2019 13:06:56 -0800 (PST) From: Dmitry Osipenko To: Thierry Reding , Jonathan Hunter , Peter De Schrijver , "Rafael J. Wysocki" , Daniel Lezcano , =?utf-8?q?Micha=C5=82_Miro?= =?utf-8?b?c8WCYXc=?= Cc: linux-pm@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v9 17/17] ARM: tegra: Enable Tegra cpuidle driver in tegra_defconfig Date: Thu, 19 Dec 2019 00:05:03 +0300 Message-Id: <20191218210503.6689-18-digetx@gmail.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191218210503.6689-1-digetx@gmail.com> References: <20191218210503.6689-1-digetx@gmail.com> MIME-Version: 1.0 Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org The Tegra CPU Idle driver was moved out into driver/cpuidle/ directory and it is now a proper platform driver. Acked-by: Peter De Schrijver Signed-off-by: Dmitry Osipenko --- arch/arm/configs/tegra_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/configs/tegra_defconfig b/arch/arm/configs/tegra_defconfig index a27592d3b1fa..aa94369bdd0f 100644 --- a/arch/arm/configs/tegra_defconfig +++ b/arch/arm/configs/tegra_defconfig @@ -25,6 +25,7 @@ CONFIG_CPU_FREQ=y CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y CONFIG_CPUFREQ_DT=y CONFIG_CPU_IDLE=y +CONFIG_ARM_TEGRA_CPUIDLE=y CONFIG_VFP=y CONFIG_NEON=y CONFIG_TRUSTED_FOUNDATIONS=y