From patchwork Wed Dec 4 11:53:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sughosh Ganu X-Patchwork-Id: 1204138 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=linaro.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 47Sclm6wFBz9sR8 for ; Wed, 4 Dec 2019 22:57:08 +1100 (AEDT) Received: by phobos.denx.de (Postfix, from userid 109) id 2D33481659; Wed, 4 Dec 2019 12:57:06 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on mail.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.2 Received: from phobos.denx.de (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id DEC4C808AD; Wed, 4 Dec 2019 12:55:04 +0100 (CET) Authentication-Results: mail.denx.de; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id CB69081532; Wed, 4 Dec 2019 12:54:36 +0100 (CET) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by phobos.denx.de (Postfix) with ESMTP id AB46E80680 for ; Wed, 4 Dec 2019 12:54:04 +0100 (CET) Authentication-Results: mail.denx.de; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.denx.de; spf=fail smtp.mailfrom=sughosh.ganu@linaro.org Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B30C4328; Wed, 4 Dec 2019 03:54:03 -0800 (PST) Received: from usa.arm.com (a074948-lin.blr.arm.com [10.162.4.147]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 1303D3F68E; Wed, 4 Dec 2019 03:54:01 -0800 (PST) From: Sughosh Ganu To: u-boot@lists.denx.de Subject: [PATCH 1/7] dm: rng: Add random number generator(rng) uclass Date: Wed, 4 Dec 2019 17:23:37 +0530 Message-Id: <1575460423-5080-2-git-send-email-sughosh.ganu@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1575460423-5080-1-git-send-email-sughosh.ganu@linaro.org> References: <1575460423-5080-1-git-send-email-sughosh.ganu@linaro.org> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.26 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.101.4 at mail.denx.de X-Virus-Status: Clean Add a uclass for reading a random number seed from a random number generator device. Signed-off-by: Sughosh Ganu Reviewed-by: Patrice Chotard Reviewed-by: Simon Glass --- drivers/Kconfig | 2 ++ drivers/Makefile | 1 + drivers/rng/Kconfig | 7 +++++++ drivers/rng/Makefile | 6 ++++++ drivers/rng/rng-uclass.c | 23 +++++++++++++++++++++++ include/dm/uclass-id.h | 1 + include/rng.h | 25 +++++++++++++++++++++++++ 7 files changed, 65 insertions(+) create mode 100644 drivers/rng/Kconfig create mode 100644 drivers/rng/Makefile create mode 100644 drivers/rng/rng-uclass.c create mode 100644 include/rng.h diff --git a/drivers/Kconfig b/drivers/Kconfig index 9d99ce0..e34a227 100644 --- a/drivers/Kconfig +++ b/drivers/Kconfig @@ -90,6 +90,8 @@ source "drivers/remoteproc/Kconfig" source "drivers/reset/Kconfig" +source "drivers/rng/Kconfig" + source "drivers/rtc/Kconfig" source "drivers/scsi/Kconfig" diff --git a/drivers/Makefile b/drivers/Makefile index 0befedd..0fa4413 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -117,4 +117,5 @@ obj-$(CONFIG_W1_EEPROM) += w1-eeprom/ obj-$(CONFIG_MACH_PIC32) += ddr/microchip/ obj-$(CONFIG_DM_HWSPINLOCK) += hwspinlock/ +obj-$(CONFIG_DM_RNG) += rng/ endif diff --git a/drivers/rng/Kconfig b/drivers/rng/Kconfig new file mode 100644 index 0000000..dd44cc0 --- /dev/null +++ b/drivers/rng/Kconfig @@ -0,0 +1,7 @@ +config DM_RNG + bool "Driver support for Random Number Generator devices" + depends on DM + help + Enable driver model for random number generator(rng) devices. + This interface is used to initialise the rng device and to + read the random seed from the device. diff --git a/drivers/rng/Makefile b/drivers/rng/Makefile new file mode 100644 index 0000000..311705b --- /dev/null +++ b/drivers/rng/Makefile @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (c) 2019, Linaro Limited +# + +obj-$(CONFIG_DM_RNG) += rng-uclass.o diff --git a/drivers/rng/rng-uclass.c b/drivers/rng/rng-uclass.c new file mode 100644 index 0000000..de745d3 --- /dev/null +++ b/drivers/rng/rng-uclass.c @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2019, Linaro Limited + */ + +#include +#include +#include + +int dm_rng_read(struct udevice *dev, void *buffer, size_t size) +{ + const struct dm_rng_ops *ops = device_get_ops(dev); + + if (!ops->read) + return -ENOSYS; + + return ops->read(dev, buffer, size); +} + +UCLASS_DRIVER(hwrng) = { + .name = "rng", + .id = UCLASS_RNG, +}; diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h index 0c563d8..192202d 100644 --- a/include/dm/uclass-id.h +++ b/include/dm/uclass-id.h @@ -86,6 +86,7 @@ enum uclass_id { UCLASS_REGULATOR, /* Regulator device */ UCLASS_REMOTEPROC, /* Remote Processor device */ UCLASS_RESET, /* Reset controller device */ + UCLASS_RNG, /* Random Number Generator */ UCLASS_RTC, /* Real time clock device */ UCLASS_SCSI, /* SCSI device */ UCLASS_SERIAL, /* Serial UART */ diff --git a/include/rng.h b/include/rng.h new file mode 100644 index 0000000..b5fd950 --- /dev/null +++ b/include/rng.h @@ -0,0 +1,25 @@ +#if !defined _RNG_H_ +#define _RNG_H_ + +#include + +/** + * dm_rng_read() - read a random number seed from the rng device + * @buffer: input buffer to put the read random seed into + * @size: number of bytes of random seed read + * + */ +int dm_rng_read(struct udevice *dev, void *buffer, size_t size); + +/* struct dm_rng_ops - Operations for the hwrng uclass */ +struct dm_rng_ops { + /** + * @read() - read a random number seed + * + * @data: input buffer to read the random seed + * @max: total number of bytes to read + */ + int (*read)(struct udevice *dev, void *data, size_t max); +}; + +#endif /* _RNG_H_ */ From patchwork Wed Dec 4 11:53:38 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sughosh Ganu X-Patchwork-Id: 1204174 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=linaro.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 47SfMB5qZtz9sR1 for ; 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dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.denx.de; spf=fail smtp.mailfrom=sughosh.ganu@linaro.org Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D6A6031B; Wed, 4 Dec 2019 03:54:05 -0800 (PST) Received: from usa.arm.com (a074948-lin.blr.arm.com [10.162.4.147]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 2E9213F68E; Wed, 4 Dec 2019 03:54:03 -0800 (PST) From: Sughosh Ganu To: u-boot@lists.denx.de Subject: [PATCH 2/7] clk: stm32mp1: Add a clock entry for RNG1 device Date: Wed, 4 Dec 2019 17:23:38 +0530 Message-Id: <1575460423-5080-3-git-send-email-sughosh.ganu@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1575460423-5080-1-git-send-email-sughosh.ganu@linaro.org> References: <1575460423-5080-1-git-send-email-sughosh.ganu@linaro.org> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.26 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.101.4 at mail.denx.de X-Virus-Status: Clean Add an entry for allowing clock enablement for the random number generator peripheral, RNG1. Signed-off-by: Sughosh Ganu Reviewed-by: Patrice Chotard --- drivers/clk/clk_stm32mp1.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/clk/clk_stm32mp1.c b/drivers/clk/clk_stm32mp1.c index 3718970..da66bde 100644 --- a/drivers/clk/clk_stm32mp1.c +++ b/drivers/clk/clk_stm32mp1.c @@ -563,6 +563,7 @@ static const struct stm32mp1_clk_gate stm32mp1_clk_gate[] = { STM32MP1_CLK_SET_CLR(RCC_MP_AHB4ENSETR, 10, GPIOK, _UNKNOWN_SEL), STM32MP1_CLK_SET_CLR(RCC_MP_AHB5ENSETR, 0, GPIOZ, _UNKNOWN_SEL), + STM32MP1_CLK_SET_CLR(RCC_MP_AHB5ENSETR, 6, RNG1_K, _UNKNOWN_SEL), STM32MP1_CLK_SET_CLR(RCC_MP_AHB6ENSETR, 7, ETHCK_K, _ETH_SEL), STM32MP1_CLK_SET_CLR(RCC_MP_AHB6ENSETR, 8, ETHTX, _UNKNOWN_SEL), From patchwork Wed Dec 4 11:53:39 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sughosh Ganu X-Patchwork-Id: 1204147 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=linaro.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 47Sd7P3RCqz9sPh for ; Wed, 4 Dec 2019 23:14:09 +1100 (AEDT) Received: by phobos.denx.de (Postfix, from userid 109) id B0F628163A; Wed, 4 Dec 2019 13:13:36 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on mail.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.2 Received: from phobos.denx.de (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 5605180199; Wed, 4 Dec 2019 13:03:24 +0100 (CET) Authentication-Results: mail.denx.de; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 616468163F; Wed, 4 Dec 2019 13:03:21 +0100 (CET) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by phobos.denx.de (Postfix) with ESMTP id 77F93808EE for ; Wed, 4 Dec 2019 12:54:08 +0100 (CET) Authentication-Results: mail.denx.de; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.denx.de; spf=fail smtp.mailfrom=sughosh.ganu@linaro.org Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id F0B3431B; Wed, 4 Dec 2019 03:54:07 -0800 (PST) Received: from usa.arm.com (a074948-lin.blr.arm.com [10.162.4.147]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 526323F68E; Wed, 4 Dec 2019 03:54:06 -0800 (PST) From: Sughosh Ganu To: u-boot@lists.denx.de Subject: [PATCH 3/7] stm32mp1: rng: Add a driver for random number generator(rng) device Date: Wed, 4 Dec 2019 17:23:39 +0530 Message-Id: <1575460423-5080-4-git-send-email-sughosh.ganu@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1575460423-5080-1-git-send-email-sughosh.ganu@linaro.org> References: <1575460423-5080-1-git-send-email-sughosh.ganu@linaro.org> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.26 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.101.4 at mail.denx.de X-Virus-Status: Clean Add a driver for the rng device found on stm32mp1 platforms. The driver provides a routine for reading the random number seed from the hardware device. Signed-off-by: Sughosh Ganu --- drivers/rng/Kconfig | 7 ++ drivers/rng/Makefile | 1 + drivers/rng/stm32mp1_rng.c | 164 +++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 172 insertions(+) create mode 100644 drivers/rng/stm32mp1_rng.c diff --git a/drivers/rng/Kconfig b/drivers/rng/Kconfig index dd44cc0..5fc11db 100644 --- a/drivers/rng/Kconfig +++ b/drivers/rng/Kconfig @@ -5,3 +5,10 @@ config DM_RNG Enable driver model for random number generator(rng) devices. This interface is used to initialise the rng device and to read the random seed from the device. + +config RNG_STM32MP1 + bool "Enable random number generator for STM32MP1" + depends on ARCH_STM32MP && DM_RNG + default n + help + Enable STM32MP1 rng driver. diff --git a/drivers/rng/Makefile b/drivers/rng/Makefile index 311705b..699beb3 100644 --- a/drivers/rng/Makefile +++ b/drivers/rng/Makefile @@ -4,3 +4,4 @@ # obj-$(CONFIG_DM_RNG) += rng-uclass.o +obj-$(CONFIG_RNG_STM32MP1) += stm32mp1_rng.o diff --git a/drivers/rng/stm32mp1_rng.c b/drivers/rng/stm32mp1_rng.c new file mode 100644 index 0000000..f5ee084 --- /dev/null +++ b/drivers/rng/stm32mp1_rng.c @@ -0,0 +1,164 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (c) 2019, Linaro Limited + */ + +#include +#include +#include +#include +#include + +#include +#include +#include + +#define RNG_CR 0x00 +#define RNG_CR_RNGEN BIT(2) +#define RNG_CR_CED BIT(5) + +#define RNG_SR 0x04 +#define RNG_SR_SEIS BIT(6) +#define RNG_SR_CEIS BIT(5) +#define RNG_SR_SECS BIT(2) +#define RNG_SR_DRDY BIT(0) + +#define RNG_DR 0x08 + +struct stm32_rng_platdata { + fdt_addr_t base; + struct clk clk; + struct reset_ctl rst; + bool inited; +}; + +static int stm32_rng_read(struct udevice *dev, void *data, size_t len) +{ + int retval = 0, i; + u32 sr, count, reg; + size_t increment; + struct stm32_rng_platdata *pdata = dev_get_platdata(dev); + + while (len > 0) { + retval = readl_poll_timeout(pdata->base + RNG_SR, sr, + sr & RNG_SR_DRDY, 10000); + if (retval) + return retval; + + if (sr & (RNG_SR_SEIS | RNG_SR_SECS)) { + /* As per SoC TRM */ + clrbits_le32(pdata->base + RNG_SR, RNG_SR_SEIS); + for (i = 0; i < 12; i++) + readl(pdata->base + RNG_DR); + if (readl(pdata->base + RNG_SR) & RNG_SR_SEIS) { + printf("RNG Noise"); + return -EIO; + } + /* start again */ + continue; + } + + count = 4; + while (len && count) { + reg = readl(pdata->base + RNG_DR); + memcpy(data, ®, min(len, sizeof(u32))); + increment = min(len, sizeof(u32)); + data += increment; + retval += increment; + len -= increment; + count--; + } + } + + return retval; +} + +static int stm32_rng_init(struct stm32_rng_platdata *pdata) +{ + int err; + + err = clk_enable(&pdata->clk); + if (err) + return err; + + /* Disable CED */ + writel(RNG_CR_RNGEN | RNG_CR_CED, pdata->base + RNG_CR); + + /* clear error indicators */ + writel(0, pdata->base + RNG_SR); + + pdata->inited = 1; + + return 0; +} + +static int stm32_rng_cleanup(struct stm32_rng_platdata *pdata) +{ + + writel(0, pdata->base + RNG_CR); + + return clk_disable(&pdata->clk); +} + +static int stm32_rng_probe(struct udevice *dev) +{ + struct stm32_rng_platdata *pdata = dev_get_platdata(dev); + + if (pdata->inited) + return 0; + + reset_assert(&pdata->rst); + udelay(20); + reset_deassert(&pdata->rst); + + return stm32_rng_init(pdata); +} + +static int stm32_rng_remove(struct udevice *dev) +{ + struct stm32_rng_platdata *pdata = dev_get_platdata(dev); + + return stm32_rng_cleanup(pdata); +} + +static int stm32_rng_ofdata_to_platdata(struct udevice *dev) +{ + struct stm32_rng_platdata *pdata = dev_get_platdata(dev); + int err; + + pdata->base = dev_read_addr(dev); + if (!pdata->base) + return -ENOMEM; + + err = clk_get_by_index(dev, 0, &pdata->clk); + if (err) + return err; + + err = reset_get_by_index(dev, 0, &pdata->rst); + if (err) + return err; + + return 0; +} + +static const struct dm_rng_ops stm32_rng_ops = { + .read = stm32_rng_read, +}; + +static const struct udevice_id stm32_rng_match[] = { + { + .compatible = "st,stm32-rng", + }, + {}, +}; + +U_BOOT_DRIVER(stm32_rng) = { + .name = "stm32-rng", + .id = UCLASS_RNG, + .of_match = stm32_rng_match, + .ops = &stm32_rng_ops, + .probe = stm32_rng_probe, + .remove = stm32_rng_remove, + .platdata_auto_alloc_size = sizeof(struct stm32_rng_platdata), + .ofdata_to_platdata = stm32_rng_ofdata_to_platdata, +}; From patchwork Wed Dec 4 11:53:40 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sughosh Ganu X-Patchwork-Id: 1204146 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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Wed, 4 Dec 2019 13:03:53 +0100 (CET) Authentication-Results: mail.denx.de; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id B977C808EE; Wed, 4 Dec 2019 13:03:21 +0100 (CET) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by phobos.denx.de (Postfix) with ESMTP id D20C480751 for ; Wed, 4 Dec 2019 12:54:10 +0100 (CET) Authentication-Results: mail.denx.de; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.denx.de; spf=fail smtp.mailfrom=sughosh.ganu@linaro.org Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 16AD731B; Wed, 4 Dec 2019 03:54:10 -0800 (PST) Received: from usa.arm.com (a074948-lin.blr.arm.com [10.162.4.147]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 6C4743F68E; Wed, 4 Dec 2019 03:54:08 -0800 (PST) From: Sughosh Ganu To: u-boot@lists.denx.de Subject: [PATCH 4/7] configs: stm32mp15: Enable random number generator(rng) device Date: Wed, 4 Dec 2019 17:23:40 +0530 Message-Id: <1575460423-5080-5-git-send-email-sughosh.ganu@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1575460423-5080-1-git-send-email-sughosh.ganu@linaro.org> References: <1575460423-5080-1-git-send-email-sughosh.ganu@linaro.org> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.26 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.101.4 at mail.denx.de X-Virus-Status: Clean Enable support for the rng device on the stm32mp15 configs. Signed-off-by: Sughosh Ganu Reviewed-by: Patrice Chotard --- configs/stm32mp15_basic_defconfig | 2 ++ configs/stm32mp15_optee_defconfig | 2 ++ configs/stm32mp15_trusted_defconfig | 2 ++ 3 files changed, 6 insertions(+) diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index ae3ee5a..99ec7a4 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -139,3 +139,5 @@ CONFIG_VIDEO_STM32_DSI=y CONFIG_VIDEO_STM32_MAX_XRES=1280 CONFIG_VIDEO_STM32_MAX_YRES=800 CONFIG_FDT_FIXUP_PARTITIONS=y +CONFIG_DM_RNG=y +CONFIG_RNG_STM32MP1=y diff --git a/configs/stm32mp15_optee_defconfig b/configs/stm32mp15_optee_defconfig index e8620d6..adad0cf 100644 --- a/configs/stm32mp15_optee_defconfig +++ b/configs/stm32mp15_optee_defconfig @@ -123,3 +123,5 @@ CONFIG_VIDEO_STM32_DSI=y CONFIG_VIDEO_STM32_MAX_XRES=1280 CONFIG_VIDEO_STM32_MAX_YRES=800 CONFIG_FDT_FIXUP_PARTITIONS=y +CONFIG_DM_RNG=y +CONFIG_RNG_STM32MP1=y diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index 2d937e6..859fd52 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -122,3 +122,5 @@ CONFIG_VIDEO_STM32_DSI=y CONFIG_VIDEO_STM32_MAX_XRES=1280 CONFIG_VIDEO_STM32_MAX_YRES=800 CONFIG_FDT_FIXUP_PARTITIONS=y +CONFIG_DM_RNG=y +CONFIG_RNG_STM32MP1=y From patchwork Wed Dec 4 11:53:41 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sughosh Ganu X-Patchwork-Id: 1204139 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=linaro.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 47Scqs1FQGz9sR8 for ; Wed, 4 Dec 2019 23:00:40 +1100 (AEDT) Received: by phobos.denx.de (Postfix, from userid 109) id 1E85481649; Wed, 4 Dec 2019 13:00:08 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on mail.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.2 Received: from phobos.denx.de (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 3E261806B3; Wed, 4 Dec 2019 12:55:55 +0100 (CET) Authentication-Results: mail.denx.de; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id E80B18161D; Wed, 4 Dec 2019 12:55:00 +0100 (CET) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by phobos.denx.de (Postfix) with ESMTP id 5B523808B5 for ; Wed, 4 Dec 2019 12:54:13 +0100 (CET) Authentication-Results: mail.denx.de; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.denx.de; spf=fail smtp.mailfrom=sughosh.ganu@linaro.org Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 315DE31B; Wed, 4 Dec 2019 03:54:12 -0800 (PST) Received: from usa.arm.com (a074948-lin.blr.arm.com [10.162.4.147]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 867263F68E; Wed, 4 Dec 2019 03:54:10 -0800 (PST) From: Sughosh Ganu To: u-boot@lists.denx.de Subject: [PATCH 5/7] sandbox: rng: Add a random number generator(rng) driver Date: Wed, 4 Dec 2019 17:23:41 +0530 Message-Id: <1575460423-5080-6-git-send-email-sughosh.ganu@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1575460423-5080-1-git-send-email-sughosh.ganu@linaro.org> References: <1575460423-5080-1-git-send-email-sughosh.ganu@linaro.org> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.26 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.101.4 at mail.denx.de X-Virus-Status: Clean Add a sandbox driver for random number generation. Mostly aimed at providing a unit test for rng uclass. Signed-off-by: Sughosh Ganu Reviewed-by: Patrice Chotard Reviewed-by: Simon Glass --- arch/sandbox/dts/test.dts | 4 ++++ drivers/rng/Kconfig | 7 +++++++ drivers/rng/Makefile | 1 + drivers/rng/sandbox_rng.c | 36 ++++++++++++++++++++++++++++++++++++ 4 files changed, 48 insertions(+) create mode 100644 drivers/rng/sandbox_rng.c diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts index fdb08f2..2c85540 100644 --- a/arch/sandbox/dts/test.dts +++ b/arch/sandbox/dts/test.dts @@ -599,6 +599,10 @@ reset-names = "other", "test"; }; + rng@0 { + compatible = "sandbox,sandbox-rng"; + }; + rproc_1: rproc@1 { compatible = "sandbox,test-processor"; remoteproc-name = "remoteproc-test-dev1"; diff --git a/drivers/rng/Kconfig b/drivers/rng/Kconfig index 5fc11db..3a1d3f0 100644 --- a/drivers/rng/Kconfig +++ b/drivers/rng/Kconfig @@ -6,6 +6,13 @@ config DM_RNG This interface is used to initialise the rng device and to read the random seed from the device. +config RNG_SANDBOX + bool "Sandbox random number generator" + depends on SANDBOX && DM_RNG + help + Enable random number generator for sandbox. This is an + emulation of a rng device. + config RNG_STM32MP1 bool "Enable random number generator for STM32MP1" depends on ARCH_STM32MP && DM_RNG diff --git a/drivers/rng/Makefile b/drivers/rng/Makefile index 699beb3..3517005 100644 --- a/drivers/rng/Makefile +++ b/drivers/rng/Makefile @@ -4,4 +4,5 @@ # obj-$(CONFIG_DM_RNG) += rng-uclass.o +obj-$(CONFIG_RNG_SANDBOX) += sandbox_rng.o obj-$(CONFIG_RNG_STM32MP1) += stm32mp1_rng.o diff --git a/drivers/rng/sandbox_rng.c b/drivers/rng/sandbox_rng.c new file mode 100644 index 0000000..c5be552 --- /dev/null +++ b/drivers/rng/sandbox_rng.c @@ -0,0 +1,36 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (c) 2019, Linaro Limited + */ + +#include +#include +#include + +static unsigned long random = 0xdeadbeef; + +static int sandbox_rng_read(struct udevice *dev, void *data, size_t len) +{ + random ^= ~0UL; + *(unsigned long *)data = random; + + return sizeof(random); +} + +static const struct dm_rng_ops sandbox_rng_ops = { + .read = sandbox_rng_read, +}; + +static const struct udevice_id sandbox_rng_match[] = { + { + .compatible = "sandbox,sandbox-rng", + }, + {}, +}; + +U_BOOT_DRIVER(sandbox_rng) = { + .name = "sandbox-rng", + .id = UCLASS_RNG, + .of_match = sandbox_rng_match, + .ops = &sandbox_rng_ops, +}; From patchwork Wed Dec 4 11:53:42 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sughosh Ganu X-Patchwork-Id: 1204140 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=linaro.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 47Scsp0gmgz9sR8 for ; Wed, 4 Dec 2019 23:02:22 +1100 (AEDT) Received: by phobos.denx.de (Postfix, from userid 109) id 6E94E8166A; Wed, 4 Dec 2019 13:02:19 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on mail.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.2 Received: from phobos.denx.de (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id F0E4281624; Wed, 4 Dec 2019 12:56:11 +0100 (CET) Authentication-Results: mail.denx.de; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 200B0806B3; Wed, 4 Dec 2019 12:55:01 +0100 (CET) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by phobos.denx.de (Postfix) with ESMTP id 02FB7806A8 for ; Wed, 4 Dec 2019 12:54:15 +0100 (CET) Authentication-Results: mail.denx.de; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.denx.de; spf=fail smtp.mailfrom=sughosh.ganu@linaro.org Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5610831B; Wed, 4 Dec 2019 03:54:14 -0800 (PST) Received: from usa.arm.com (a074948-lin.blr.arm.com [10.162.4.147]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id A28733F68E; Wed, 4 Dec 2019 03:54:12 -0800 (PST) From: Sughosh Ganu To: u-boot@lists.denx.de Subject: [PATCH 6/7] configs: sandbox: Enable random number generator(rng) device Date: Wed, 4 Dec 2019 17:23:42 +0530 Message-Id: <1575460423-5080-7-git-send-email-sughosh.ganu@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1575460423-5080-1-git-send-email-sughosh.ganu@linaro.org> References: <1575460423-5080-1-git-send-email-sughosh.ganu@linaro.org> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.26 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.101.4 at mail.denx.de X-Virus-Status: Clean Enable support for random number generator on sandbox configs. This is aimed primarily at adding unit test support for rng uclass. Signed-off-by: Sughosh Ganu Reviewed-by: Patrice Chotard Reviewed-by: Simon Glass --- configs/sandbox64_defconfig | 2 ++ configs/sandbox_defconfig | 2 ++ 2 files changed, 4 insertions(+) diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig index be1e103..b6596c4 100644 --- a/configs/sandbox64_defconfig +++ b/configs/sandbox64_defconfig @@ -157,6 +157,8 @@ CONFIG_REGULATOR_RK8XX=y CONFIG_REGULATOR_S5M8767=y CONFIG_DM_REGULATOR_SANDBOX=y CONFIG_REGULATOR_TPS65090=y +CONFIG_DM_RNG=y +CONFIG_RNG_SANDBOX=y CONFIG_DM_PWM=y CONFIG_PWM_SANDBOX=y CONFIG_RAM=y diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index eda595f..6fb3f00 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -178,6 +178,8 @@ CONFIG_REGULATOR_RK8XX=y CONFIG_REGULATOR_S5M8767=y CONFIG_DM_REGULATOR_SANDBOX=y CONFIG_REGULATOR_TPS65090=y +CONFIG_DM_RNG=y +CONFIG_RNG_SANDBOX=y CONFIG_DM_PWM=y CONFIG_PWM_SANDBOX=y CONFIG_RAM=y From patchwork Wed Dec 4 11:53:43 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sughosh Ganu X-Patchwork-Id: 1204148 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=linaro.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 47SdGc60whz9sPV for ; Wed, 4 Dec 2019 23:20:21 +1100 (AEDT) Received: by phobos.denx.de (Postfix, from userid 109) id C3F6E81642; Wed, 4 Dec 2019 13:20:15 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on mail.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.2 Received: from phobos.denx.de (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id C40E48161D; Wed, 4 Dec 2019 12:56:28 +0100 (CET) Authentication-Results: mail.denx.de; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id BA9F18161F; Wed, 4 Dec 2019 12:55:04 +0100 (CET) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by phobos.denx.de (Postfix) with ESMTP id 54911808AE for ; Wed, 4 Dec 2019 12:54:17 +0100 (CET) Authentication-Results: mail.denx.de; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.denx.de; spf=fail smtp.mailfrom=sughosh.ganu@linaro.org Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7113F31B; Wed, 4 Dec 2019 03:54:16 -0800 (PST) Received: from usa.arm.com (a074948-lin.blr.arm.com [10.162.4.147]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id C58F83F68E; Wed, 4 Dec 2019 03:54:14 -0800 (PST) From: Sughosh Ganu To: u-boot@lists.denx.de Subject: [PATCH 7/7] test: rng: Add basic test for random number generator(rng) uclass Date: Wed, 4 Dec 2019 17:23:43 +0530 Message-Id: <1575460423-5080-8-git-send-email-sughosh.ganu@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1575460423-5080-1-git-send-email-sughosh.ganu@linaro.org> References: <1575460423-5080-1-git-send-email-sughosh.ganu@linaro.org> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.26 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.101.4 at mail.denx.de X-Virus-Status: Clean Add a unit test for testing the rng uclass functionality using the sandbox rng driver. Signed-off-by: Sughosh Ganu Reviewed-by: Patrice Chotard Reviewed-by: Simon Glass --- test/dm/Makefile | 1 + test/dm/rng.c | 26 ++++++++++++++++++++++++++ 2 files changed, 27 insertions(+) create mode 100644 test/dm/rng.c diff --git a/test/dm/Makefile b/test/dm/Makefile index 0c2fd5c..f61bf65 100644 --- a/test/dm/Makefile +++ b/test/dm/Makefile @@ -65,4 +65,5 @@ obj-$(CONFIG_VIRTIO_SANDBOX) += virtio.o obj-$(CONFIG_DMA) += dma.o obj-$(CONFIG_DM_MDIO) += mdio.o obj-$(CONFIG_DM_MDIO_MUX) += mdio_mux.o +obj-$(CONFIG_DM_RNG) += rng.o endif diff --git a/test/dm/rng.c b/test/dm/rng.c new file mode 100644 index 0000000..879e80a --- /dev/null +++ b/test/dm/rng.c @@ -0,0 +1,26 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (c) 2019, Linaro Limited + */ + +#include +#include +#include +#include +#include + +/* Basic test of the rng uclass */ +static int dm_test_rng_read(struct unit_test_state *uts) +{ + unsigned long val1 = 0, val2 = 0; + struct udevice *dev; + + ut_assertok(uclass_get_device(UCLASS_RNG, 0, &dev)); + ut_assertnonnull(dev); + dm_rng_read(dev, &val1, sizeof(val1)); + dm_rng_read(dev, &val2, sizeof(val2)); + ut_assert(val1 != val2); + + return 0; +} +DM_TEST(dm_test_rng_read, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);