From patchwork Wed Dec 4 10:10:35 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Clement Leger X-Patchwork-Id: 1204073 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=kalray.eu Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=kalray.eu header.i=@kalray.eu header.b="oEK30dCB"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 47SZPN2B0vz9sPV for ; Wed, 4 Dec 2019 21:11:04 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727351AbfLDKLD (ORCPT ); Wed, 4 Dec 2019 05:11:03 -0500 Received: from zimbra2.kalray.eu ([92.103.151.219]:56706 "EHLO zimbra2.kalray.eu" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726893AbfLDKLD (ORCPT ); Wed, 4 Dec 2019 05:11:03 -0500 Received: from localhost (localhost [127.0.0.1]) by zimbra2.kalray.eu (Postfix) with ESMTP id 679B727E1511; Wed, 4 Dec 2019 11:11:02 +0100 (CET) Received: from zimbra2.kalray.eu ([127.0.0.1]) by localhost (zimbra2.kalray.eu [127.0.0.1]) (amavisd-new, port 10032) with ESMTP id tSwZYGviSU2Y; Wed, 4 Dec 2019 11:11:02 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by zimbra2.kalray.eu (Postfix) with ESMTP id 1AC4827E1512; Wed, 4 Dec 2019 11:11:02 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.10.3 zimbra2.kalray.eu 1AC4827E1512 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kalray.eu; s=32AE1B44-9502-11E5-BA35-3734643DEF29; t=1575454262; bh=joVXQs8//R5Z6umVbn9rOFDYdh3oQu8E9e6vflv1fyA=; h=From:To:Date:Message-Id; b=oEK30dCBNu6Ow1RpCSLoon07shB0WGxeW4tYhzI3fwE6tW6D6DcMhLofLJCBM/8I5 +HvmwrRx7rawqFQovjK5bak/OchpmHshSDkicwRRlc2rT1JdeuOl1jiQA+hr5ZbzXD QBDnA9JmznfGZkbd3gMpo3wxlL2tGD8dPexa/lwQ= X-Virus-Scanned: amavisd-new at zimbra2.kalray.eu Received: from zimbra2.kalray.eu ([127.0.0.1]) by localhost (zimbra2.kalray.eu [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id C8aqRTfkIny3; Wed, 4 Dec 2019 11:11:02 +0100 (CET) Received: from triton.lin.mbt.kalray.eu (unknown [192.168.37.25]) by zimbra2.kalray.eu (Postfix) with ESMTPSA id F307227E1511; Wed, 4 Dec 2019 11:11:01 +0100 (CET) From: Clement Leger To: linux-kernel@vger.kernel.org Cc: Clement Leger , Linus Walleij , Bartosz Golaszewski , linux-gpio@vger.kernel.org Subject: [PATCH 1/5] gpio: export acpi_gpiochip_request_interrupts in gpio/driver.h Date: Wed, 4 Dec 2019 11:10:35 +0100 Message-Id: <20191204101042.4275-2-cleger@kalray.eu> X-Mailer: git-send-email 2.15.0.276.g89ea799 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org dwapb-gpio driver which uses this function will be moved to pinctrl for pinctrl support. Export this function in gpio/driver.h to allow using it. Signed-off-by: Clement Leger --- drivers/gpio/gpiolib-acpi.h | 4 ---- include/linux/gpio/driver.h | 12 ++++++++++++ 2 files changed, 12 insertions(+), 4 deletions(-) diff --git a/drivers/gpio/gpiolib-acpi.h b/drivers/gpio/gpiolib-acpi.h index 1c6d65cf0629..ba2f187babe3 100644 --- a/drivers/gpio/gpiolib-acpi.h +++ b/drivers/gpio/gpiolib-acpi.h @@ -34,7 +34,6 @@ struct acpi_gpio_info { void acpi_gpiochip_add(struct gpio_chip *chip); void acpi_gpiochip_remove(struct gpio_chip *chip); -void acpi_gpiochip_request_interrupts(struct gpio_chip *chip); void acpi_gpiochip_free_interrupts(struct gpio_chip *chip); int acpi_gpio_update_gpiod_flags(enum gpiod_flags *flags, @@ -56,9 +55,6 @@ int acpi_gpio_count(struct device *dev, const char *con_id); static inline void acpi_gpiochip_add(struct gpio_chip *chip) { } static inline void acpi_gpiochip_remove(struct gpio_chip *chip) { } -static inline void -acpi_gpiochip_request_interrupts(struct gpio_chip *chip) { } - static inline void acpi_gpiochip_free_interrupts(struct gpio_chip *chip) { } diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h index e2480ef94c55..40b9f13d77e1 100644 --- a/include/linux/gpio/driver.h +++ b/include/linux/gpio/driver.h @@ -733,6 +733,18 @@ void gpiochip_unlock_as_irq(struct gpio_chip *chip, unsigned int offset); struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc); + +#ifdef CONFIG_GPIO_ACPI + +void acpi_gpiochip_request_interrupts(struct gpio_chip *chip); + +#else + +static inline void acpi_gpiochip_request_interrupts(struct gpio_chip *chip) +{ +} + +#endif /* CONFIG_GPIO_ACPI */ #else /* CONFIG_GPIOLIB */ static inline struct gpio_chip *gpiod_to_chip(const struct gpio_desc *desc) From patchwork Wed Dec 4 10:10:36 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Clement Leger X-Patchwork-Id: 1204076 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=kalray.eu Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=kalray.eu header.i=@kalray.eu header.b="iHGSY+G9"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 47SZPV5Z92z9sRD for ; Wed, 4 Dec 2019 21:11:10 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727685AbfLDKLH (ORCPT ); Wed, 4 Dec 2019 05:11:07 -0500 Received: from zimbra2.kalray.eu ([92.103.151.219]:56790 "EHLO zimbra2.kalray.eu" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726893AbfLDKLF (ORCPT ); Wed, 4 Dec 2019 05:11:05 -0500 Received: from localhost (localhost [127.0.0.1]) by zimbra2.kalray.eu (Postfix) with ESMTP id B6A3827E1512; Wed, 4 Dec 2019 11:11:03 +0100 (CET) Received: from zimbra2.kalray.eu ([127.0.0.1]) by localhost (zimbra2.kalray.eu [127.0.0.1]) (amavisd-new, port 10032) with ESMTP id QBr2ZZHpmmH9; Wed, 4 Dec 2019 11:11:03 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by zimbra2.kalray.eu (Postfix) with ESMTP id E5BD327E1514; Wed, 4 Dec 2019 11:11:02 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.10.3 zimbra2.kalray.eu E5BD327E1514 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kalray.eu; s=32AE1B44-9502-11E5-BA35-3734643DEF29; t=1575454262; bh=f9BmQnKca9zYSdX+q4rJqbMj658y7CcwGNmmAXtMQP4=; h=From:To:Date:Message-Id; b=iHGSY+G9emUlkNeDaTTBswj7Q7yfNOOse6jfttP/Vx4D3tYs7OZbMwqw56ktsOQms ELMwCEKi3KEoPhi3O1oc3USspOScjEK1YUn8lJ2HsObNvhJBA+Ztp6LSBP9g3fkcQh mB2IkpnMfAwGR6oas1suOSSMxDeNrTJuNfw8GkZI= X-Virus-Scanned: amavisd-new at zimbra2.kalray.eu Received: from zimbra2.kalray.eu ([127.0.0.1]) by localhost (zimbra2.kalray.eu [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id tofpMMaoXJ43; Wed, 4 Dec 2019 11:11:02 +0100 (CET) Received: from triton.lin.mbt.kalray.eu (unknown [192.168.37.25]) by zimbra2.kalray.eu (Postfix) with ESMTPSA id C94F627E1512; Wed, 4 Dec 2019 11:11:02 +0100 (CET) From: Clement Leger To: linux-kernel@vger.kernel.org Cc: Clement Leger , Linus Walleij , Bartosz Golaszewski , Hoan Tran , linux-gpio@vger.kernel.org Subject: [PATCH 2/5] pinctrl: dw: move gpio-dwapb.c to pinctrl folder Date: Wed, 4 Dec 2019 11:10:36 +0100 Message-Id: <20191204101042.4275-3-cleger@kalray.eu> X-Mailer: git-send-email 2.15.0.276.g89ea799 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org dwapb-gpio block also have alternate function selection possibility. In order to convert it pinctrl support, move it to pinctrl folder. Signed-off-by: Clement Leger --- MAINTAINERS | 4 ++-- drivers/gpio/Kconfig | 8 -------- drivers/gpio/Makefile | 1 - drivers/pinctrl/Kconfig | 1 + drivers/pinctrl/Makefile | 1 + drivers/pinctrl/dw/Kconfig | 9 +++++++++ drivers/pinctrl/dw/Makefile | 4 ++++ drivers/{gpio/gpio-dwapb.c => pinctrl/dw/pinctrl-dwapb.c} | 3 --- 8 files changed, 17 insertions(+), 14 deletions(-) create mode 100644 drivers/pinctrl/dw/Kconfig create mode 100644 drivers/pinctrl/dw/Makefile rename drivers/{gpio/gpio-dwapb.c => pinctrl/dw/pinctrl-dwapb.c} (99%) diff --git a/MAINTAINERS b/MAINTAINERS index f9a81b9de40a..35b90ad9f594 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -15868,11 +15868,11 @@ R: Andy Shevchenko S: Maintained F: drivers/tty/serial/8250/8250_dw.c -SYNOPSYS DESIGNWARE APB GPIO DRIVER +SYNOPSYS DESIGNWARE APB PINCTRL & GPIO DRIVER M: Hoan Tran L: linux-gpio@vger.kernel.org S: Maintained -F: drivers/gpio/gpio-dwapb.c +F: drivers/pinctrl/dw/pinctrl-dwapb.c F: Documentation/devicetree/bindings/gpio/snps-dwapb-gpio.txt SYNOPSYS DESIGNWARE AXI DMAC DRIVER diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 8adffd42f8cb..982583615d11 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -195,14 +195,6 @@ config GPIO_DAVINCI help Say yes here to enable GPIO support for TI Davinci/Keystone SoCs. -config GPIO_DWAPB - tristate "Synopsys DesignWare APB GPIO driver" - select GPIO_GENERIC - select GENERIC_IRQ_CHIP - help - Say Y or M here to build support for the Synopsys DesignWare APB - GPIO block. - config GPIO_EIC_SPRD tristate "Spreadtrum EIC support" depends on ARCH_SPRD || COMPILE_TEST diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 34eb8b2b12dd..2ceb7eb2bf18 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -49,7 +49,6 @@ obj-$(CONFIG_GPIO_DA9052) += gpio-da9052.o obj-$(CONFIG_GPIO_DA9055) += gpio-da9055.o obj-$(CONFIG_GPIO_DAVINCI) += gpio-davinci.o obj-$(CONFIG_GPIO_DLN2) += gpio-dln2.o -obj-$(CONFIG_GPIO_DWAPB) += gpio-dwapb.o obj-$(CONFIG_GPIO_EIC_SPRD) += gpio-eic-sprd.o obj-$(CONFIG_GPIO_EM) += gpio-em.o obj-$(CONFIG_GPIO_EP93XX) += gpio-ep93xx.o diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index 3bfbf2ff6e2b..70d7329c2942 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig @@ -388,6 +388,7 @@ source "drivers/pinctrl/actions/Kconfig" source "drivers/pinctrl/aspeed/Kconfig" source "drivers/pinctrl/bcm/Kconfig" source "drivers/pinctrl/berlin/Kconfig" +source "drivers/pinctrl/dw/Kconfig" source "drivers/pinctrl/freescale/Kconfig" source "drivers/pinctrl/intel/Kconfig" source "drivers/pinctrl/mvebu/Kconfig" diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile index 879f312bfb75..ceed62c6f784 100644 --- a/drivers/pinctrl/Makefile +++ b/drivers/pinctrl/Makefile @@ -52,6 +52,7 @@ obj-y += actions/ obj-$(CONFIG_ARCH_ASPEED) += aspeed/ obj-y += bcm/ obj-$(CONFIG_PINCTRL_BERLIN) += berlin/ +obj-y += dw/ obj-y += freescale/ obj-$(CONFIG_X86) += intel/ obj-y += mvebu/ diff --git a/drivers/pinctrl/dw/Kconfig b/drivers/pinctrl/dw/Kconfig new file mode 100644 index 000000000000..8b57c27eab1f --- /dev/null +++ b/drivers/pinctrl/dw/Kconfig @@ -0,0 +1,9 @@ +# SPDX-License-Identifier: GPL-2.0-only +config GPIO_DWAPB + tristate "Synopsys DesignWare APB GPIO driver" + select GPIOLIB + select GPIOLIB_IRQCHIP + select GPIO_GENERIC + help + Say Y or M here to build support for the Synopsys DesignWare APB + GPIO block. diff --git a/drivers/pinctrl/dw/Makefile b/drivers/pinctrl/dw/Makefile new file mode 100644 index 000000000000..6bda37902e23 --- /dev/null +++ b/drivers/pinctrl/dw/Makefile @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: GPL-2.0 +# DesignWare pinctrl support + +obj-$(CONFIG_PINCTRL_DWAPB) += pinctrl-dwapb.o diff --git a/drivers/gpio/gpio-dwapb.c b/drivers/pinctrl/dw/pinctrl-dwapb.c similarity index 99% rename from drivers/gpio/gpio-dwapb.c rename to drivers/pinctrl/dw/pinctrl-dwapb.c index 92e127e74813..62e598bdd9ff 100644 --- a/drivers/gpio/gpio-dwapb.c +++ b/drivers/pinctrl/dw/pinctrl-dwapb.c @@ -26,9 +26,6 @@ #include #include -#include "gpiolib.h" -#include "gpiolib-acpi.h" - #define GPIO_SWPORTA_DR 0x00 #define GPIO_SWPORTA_DDR 0x04 #define GPIO_SWPORTB_DR 0x0c From patchwork Wed Dec 4 10:10:37 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Clement Leger X-Patchwork-Id: 1204075 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=kalray.eu Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=kalray.eu header.i=@kalray.eu header.b="GJ8+87S1"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 47SZPT4cZgz9sR7 for ; Wed, 4 Dec 2019 21:11:09 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727671AbfLDKLH (ORCPT ); Wed, 4 Dec 2019 05:11:07 -0500 Received: from zimbra2.kalray.eu ([92.103.151.219]:56760 "EHLO zimbra2.kalray.eu" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727560AbfLDKLE (ORCPT ); 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Wed, 4 Dec 2019 11:11:03 +0100 (CET) Received: from triton.lin.mbt.kalray.eu (unknown [192.168.37.25]) by zimbra2.kalray.eu (Postfix) with ESMTPSA id 02B6227E1552; Wed, 4 Dec 2019 11:11:03 +0100 (CET) From: Clement Leger To: linux-kernel@vger.kernel.org Cc: Clement Leger , Hoan Tran , Linus Walleij , linux-gpio@vger.kernel.org Subject: [PATCH 3/5] pinctrl: dw: use devm_gpiochip_add_data Date: Wed, 4 Dec 2019 11:10:37 +0100 Message-Id: <20191204101042.4275-4-cleger@kalray.eu> X-Mailer: git-send-email 2.15.0.276.g89ea799 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Use managed gpiochip_add_data for easier handling of exit paths. Signed-off-by: Clement Leger --- drivers/pinctrl/dw/pinctrl-dwapb.c | 13 +------------ 1 file changed, 1 insertion(+), 12 deletions(-) diff --git a/drivers/pinctrl/dw/pinctrl-dwapb.c b/drivers/pinctrl/dw/pinctrl-dwapb.c index 62e598bdd9ff..3750205408e3 100644 --- a/drivers/pinctrl/dw/pinctrl-dwapb.c +++ b/drivers/pinctrl/dw/pinctrl-dwapb.c @@ -529,7 +529,7 @@ static int dwapb_gpio_add_port(struct dwapb_gpio *gpio, if (pp->has_irq) dwapb_configure_irqs(gpio, port, pp); - err = gpiochip_add_data(&port->gc, port); + err = devm_gpiochip_add_data(gpio->dev, &port->gc, port); if (err) dev_err(gpio->dev, "failed to register gpiochip for port%d\n", port->idx); @@ -543,15 +543,6 @@ static int dwapb_gpio_add_port(struct dwapb_gpio *gpio, return err; } -static void dwapb_gpio_unregister(struct dwapb_gpio *gpio) -{ - unsigned int m; - - for (m = 0; m < gpio->nr_ports; ++m) - if (gpio->ports[m].is_registered) - gpiochip_remove(&gpio->ports[m].gc); -} - static struct dwapb_platform_data * dwapb_gpio_get_pdata(struct device *dev) { @@ -719,7 +710,6 @@ static int dwapb_gpio_probe(struct platform_device *pdev) return 0; out_unregister: - dwapb_gpio_unregister(gpio); dwapb_irq_teardown(gpio); clk_disable_unprepare(gpio->clk); @@ -730,7 +720,6 @@ static int dwapb_gpio_remove(struct platform_device *pdev) { struct dwapb_gpio *gpio = platform_get_drvdata(pdev); - dwapb_gpio_unregister(gpio); dwapb_irq_teardown(gpio); reset_control_assert(gpio->rst); clk_disable_unprepare(gpio->clk); From patchwork Wed Dec 4 10:10:38 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Clement Leger X-Patchwork-Id: 1204077 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=kalray.eu Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=kalray.eu header.i=@kalray.eu header.b="GXS6IijC"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 47SZPk1mSrz9sR7 for ; Wed, 4 Dec 2019 21:11:22 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727654AbfLDKLH (ORCPT ); Wed, 4 Dec 2019 05:11:07 -0500 Received: from zimbra2.kalray.eu ([92.103.151.219]:56806 "EHLO zimbra2.kalray.eu" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727601AbfLDKLG (ORCPT ); Wed, 4 Dec 2019 05:11:06 -0500 Received: from localhost (localhost [127.0.0.1]) by zimbra2.kalray.eu (Postfix) with ESMTP id 2483D27E1615; Wed, 4 Dec 2019 11:11:04 +0100 (CET) Received: from zimbra2.kalray.eu ([127.0.0.1]) by localhost (zimbra2.kalray.eu [127.0.0.1]) (amavisd-new, port 10032) with ESMTP id gvrRT0rHAEdz; Wed, 4 Dec 2019 11:11:03 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by zimbra2.kalray.eu (Postfix) with ESMTP id 5C27827E105F; Wed, 4 Dec 2019 11:11:03 +0100 (CET) DKIM-Filter: OpenDKIM Filter v2.10.3 zimbra2.kalray.eu 5C27827E105F DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kalray.eu; s=32AE1B44-9502-11E5-BA35-3734643DEF29; t=1575454263; bh=kqlc+GicvRWTqiGeSKGpuPVSyUpC4IzwPGGUuISpl68=; h=From:To:Date:Message-Id; b=GXS6IijCHokzvT81WLifrL15YEhumVEqgNupy1qlzhwJU7414cOBS/g3xhjzQudLD vDGPUNl2Paf44yvFPtBEHfvK2OqbPeJp2Tfo5kZ1Uj17oLBnpLa/U6lEOt1xwtz3lE MXlucV8okAfuZ6YsarYdOBRraNyebMgiwVr+6vzw= X-Virus-Scanned: amavisd-new at zimbra2.kalray.eu Received: from zimbra2.kalray.eu ([127.0.0.1]) by localhost (zimbra2.kalray.eu [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id G4zHnzc5Esd0; Wed, 4 Dec 2019 11:11:03 +0100 (CET) Received: from triton.lin.mbt.kalray.eu (unknown [192.168.37.25]) by zimbra2.kalray.eu (Postfix) with ESMTPSA id 45CE827E0E3A; Wed, 4 Dec 2019 11:11:03 +0100 (CET) From: Clement Leger To: linux-kernel@vger.kernel.org Cc: Clement Leger , Linus Walleij , Hoan Tran , linux-gpio@vger.kernel.org Subject: [PATCH 4/5] pinctrl: dw: add pinctrl support for dwapb gpio driver Date: Wed, 4 Dec 2019 11:10:38 +0100 Message-Id: <20191204101042.4275-5-cleger@kalray.eu> X-Mailer: git-send-email 2.15.0.276.g89ea799 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Synopsys designware gpio controller also has pinmuxing functionnality. Pinmuxing allows to choose between software and hardware mode. When using hardware mode, an external signal controls the pin output. This patch adds support for pinctrl framework in the gpio driver. This support is conditionned by the snps,has-pinctrl device tree property. Indeed, the functionnality can be detected only if the gpio IP has been configured using paremeters encoding which is not always present. If property is present, then the pinctrl will be registered and will allow switching to the "hw" functionnality and hence enable the alternate function. Signed-off-by: Clement Leger --- drivers/pinctrl/dw/Kconfig | 2 + drivers/pinctrl/dw/pinctrl-dwapb.c | 263 ++++++++++++++++++++++++++++++- include/linux/platform_data/gpio-dwapb.h | 1 + 3 files changed, 260 insertions(+), 6 deletions(-) diff --git a/drivers/pinctrl/dw/Kconfig b/drivers/pinctrl/dw/Kconfig index 8b57c27eab1f..2bcc51813d80 100644 --- a/drivers/pinctrl/dw/Kconfig +++ b/drivers/pinctrl/dw/Kconfig @@ -4,6 +4,8 @@ config GPIO_DWAPB select GPIOLIB select GPIOLIB_IRQCHIP select GPIO_GENERIC + select PINMUX + select GENERIC_PINCONF help Say Y or M here to build support for the Synopsys DesignWare APB GPIO block. diff --git a/drivers/pinctrl/dw/pinctrl-dwapb.c b/drivers/pinctrl/dw/pinctrl-dwapb.c index 3750205408e3..063bc36319d7 100644 --- a/drivers/pinctrl/dw/pinctrl-dwapb.c +++ b/drivers/pinctrl/dw/pinctrl-dwapb.c @@ -25,15 +25,22 @@ #include #include #include +#include + +#include "../pinctrl-utils.h" #define GPIO_SWPORTA_DR 0x00 #define GPIO_SWPORTA_DDR 0x04 +#define GPIO_SWPORTA_CTL 0x08 #define GPIO_SWPORTB_DR 0x0c #define GPIO_SWPORTB_DDR 0x10 +#define GPIO_SWPORTB_CTL 0x14 #define GPIO_SWPORTC_DR 0x18 #define GPIO_SWPORTC_DDR 0x1c +#define GPIO_SWPORTC_CTL 0x20 #define GPIO_SWPORTD_DR 0x24 #define GPIO_SWPORTD_DDR 0x28 +#define GPIO_SWPORTD_CTL 0x2c #define GPIO_INTEN 0x30 #define GPIO_INTMASK 0x34 #define GPIO_INTTYPE_LEVEL 0x38 @@ -45,11 +52,16 @@ #define GPIO_EXT_PORTB 0x54 #define GPIO_EXT_PORTC 0x58 #define GPIO_EXT_PORTD 0x5c +#define GPIO_CONFIG_REG1 0x74 + +#define GPIO_CONFIG_REG1_HW_BIT 8 +#define GPIO_CONFIG_REG1_SINGLE_CTL_BIT 4 #define DWAPB_MAX_PORTS 4 #define GPIO_EXT_PORT_STRIDE 0x04 /* register stride 32 bits */ #define GPIO_SWPORT_DR_STRIDE 0x0c /* register stride 3*32 bits */ #define GPIO_SWPORT_DDR_STRIDE 0x0c /* register stride 3*32 bits */ +#define GPIO_SWPORT_CTL_STRIDE 0x0c /* register stride 3*32 bits */ #define GPIO_REG_OFFSET_V2 1 @@ -77,13 +89,16 @@ struct dwapb_context { #endif struct dwapb_gpio_port { - struct gpio_chip gc; - bool is_registered; - struct dwapb_gpio *gpio; + struct gpio_chip gc; + bool is_registered; + struct dwapb_gpio *gpio; #ifdef CONFIG_PM_SLEEP - struct dwapb_context *ctx; + struct dwapb_context *ctx; #endif - unsigned int idx; + unsigned int idx; + struct pinctrl_dev *pctl; + struct pinctrl_desc pctldesc; + struct pinctrl_gpio_range range; }; struct dwapb_gpio { @@ -97,6 +112,89 @@ struct dwapb_gpio { struct clk *clk; }; +enum dwapb_gpio_func { + DWAPB_GPIO_SW_FUNC = 0, + DWAPB_GPIO_HW_FUNC = 1, +}; + +#define DWAPB_PINCTRL_PIN(pin) PINCTRL_PIN(pin, "pin" #pin) + +static const struct pinctrl_pin_desc dwapb_pins[] = { + DWAPB_PINCTRL_PIN(0), + DWAPB_PINCTRL_PIN(1), + DWAPB_PINCTRL_PIN(2), + DWAPB_PINCTRL_PIN(3), + DWAPB_PINCTRL_PIN(4), + DWAPB_PINCTRL_PIN(5), + DWAPB_PINCTRL_PIN(6), + DWAPB_PINCTRL_PIN(7), + DWAPB_PINCTRL_PIN(8), + DWAPB_PINCTRL_PIN(9), + DWAPB_PINCTRL_PIN(10), + DWAPB_PINCTRL_PIN(11), + DWAPB_PINCTRL_PIN(12), + DWAPB_PINCTRL_PIN(13), + DWAPB_PINCTRL_PIN(14), + DWAPB_PINCTRL_PIN(15), + DWAPB_PINCTRL_PIN(16), + DWAPB_PINCTRL_PIN(17), + DWAPB_PINCTRL_PIN(18), + DWAPB_PINCTRL_PIN(19), + DWAPB_PINCTRL_PIN(20), + DWAPB_PINCTRL_PIN(21), + DWAPB_PINCTRL_PIN(22), + DWAPB_PINCTRL_PIN(23), + DWAPB_PINCTRL_PIN(24), + DWAPB_PINCTRL_PIN(25), + DWAPB_PINCTRL_PIN(26), + DWAPB_PINCTRL_PIN(27), + DWAPB_PINCTRL_PIN(28), + DWAPB_PINCTRL_PIN(29), + DWAPB_PINCTRL_PIN(30), + DWAPB_PINCTRL_PIN(31) +}; + +/* One pin per group */ +static const char * const dwapb_gpio_groups[] = { + "pin0", + "pin1", + "pin2", + "pin3", + "pin4", + "pin5", + "pin6", + "pin7", + "pin8", + "pin9", + "pin10", + "pin11", + "pin12", + "pin13", + "pin14", + "pin15", + "pin16", + "pin17", + "pin18", + "pin19", + "pin20", + "pin21", + "pin22", + "pin23", + "pin24", + "pin25", + "pin26", + "pin27", + "pin28", + "pin29", + "pin30", + "pin31" +}; + +static const char *const dwapb_gpio_functions[] = { + [DWAPB_GPIO_SW_FUNC] = "sw", + [DWAPB_GPIO_HW_FUNC] = "hw", +}; + static inline u32 gpio_reg_v2_convert(unsigned int offset) { switch (offset) { @@ -484,6 +582,151 @@ static void dwapb_irq_teardown(struct dwapb_gpio *gpio) gpio->domain = NULL; } +static int dwapb_pctl_get_groups_count(struct pinctrl_dev *pctldev) +{ + struct dwapb_gpio_port *port = pinctrl_dev_get_drvdata(pctldev); + + return port->gc.ngpio; +} + +static const char *dwapb_pctl_get_group_name(struct pinctrl_dev *pctldev, + unsigned selector) +{ + struct dwapb_gpio_port *port = pinctrl_dev_get_drvdata(pctldev); + + /* Exactly one group per pin */ + return port->pctldesc.pins[selector].name; +} + +static int dwapb_pctl_get_group_pins(struct pinctrl_dev *pctldev, + unsigned selector, + const unsigned **pins, + unsigned *num_pins) +{ + struct dwapb_gpio_port *port = pinctrl_dev_get_drvdata(pctldev); + + *pins = &port->pctldesc.pins[selector].number; + *num_pins = 1; + + return 0; +} + +static const struct pinctrl_ops dwapb_pctl_ops = { + .get_groups_count = dwapb_pctl_get_groups_count, + .get_group_name = dwapb_pctl_get_group_name, + .get_group_pins = dwapb_pctl_get_group_pins, + .dt_node_to_map = pinconf_generic_dt_node_to_map_all, + .dt_free_map = pinctrl_utils_free_map, +}; + +static int dwapb_gpio_get_function_count(struct pinctrl_dev *pctldev) +{ + return ARRAY_SIZE(dwapb_gpio_functions); +} + +static const char *dwapb_gpio_get_function_name(struct pinctrl_dev *pctldev, + unsigned selector) +{ + return dwapb_gpio_functions[selector]; +} + +static int dwapb_gpio_get_function_groups(struct pinctrl_dev *pctldev, + unsigned selector, + const char * const **groups, + unsigned * const num_groups) +{ + struct dwapb_gpio_port *port = pinctrl_dev_get_drvdata(pctldev); + + *groups = dwapb_gpio_groups; + *num_groups = port->gc.ngpio; + + return 0; +} + +static int dwapb_gpio_set_mux(struct pinctrl_dev *pctldev, unsigned selector, + unsigned group) +{ + struct dwapb_gpio_port *port = pinctrl_dev_get_drvdata(pctldev); + struct dwapb_gpio *gpio = port->gpio; + struct gpio_chip *gc = &port->gc; + unsigned int reg_off; + unsigned long flags; + u32 val; + + dev_info(gpio->dev, "Setting func %s on pin %d", + dwapb_gpio_functions[selector], group); + + reg_off = GPIO_SWPORTA_CTL + (port->idx * GPIO_SWPORT_CTL_STRIDE); + spin_lock_irqsave(&gc->bgpio_lock, flags); + val = dwapb_read(gpio, reg_off); + if (selector == 0) + val &= ~BIT(group); + else + val |= BIT(group); + dwapb_write(gpio, reg_off, val); + spin_unlock_irqrestore(&gc->bgpio_lock, flags); + + return 0; +} + +static int dwapb_gpio_pmx_gpio_request(struct pinctrl_dev *pctldev, + struct pinctrl_gpio_range *range, + unsigned int pin) +{ + return dwapb_gpio_set_mux(pctldev, DWAPB_GPIO_SW_FUNC, pin); +} + +struct pinmux_ops dwapb_pmux_ops = { + .get_functions_count = dwapb_gpio_get_function_count, + .get_function_name = dwapb_gpio_get_function_name, + .get_function_groups = dwapb_gpio_get_function_groups, + .set_mux = dwapb_gpio_set_mux, + .gpio_request_enable = dwapb_gpio_pmx_gpio_request, +}; + +static int dwapb_gpio_add_pinctrl(struct dwapb_gpio *gpio, + struct dwapb_port_property *pp, + struct dwapb_gpio_port *port) +{ + struct pinctrl_desc *desc; + struct pinctrl_gpio_range *range; + int ret; + + desc = &port->pctldesc; + + desc->pins = dwapb_pins; + desc->npins = pp->ngpio; + desc->name = dev_name(gpio->dev); + desc->owner = THIS_MODULE; + desc->pctlops = &dwapb_pctl_ops; + desc->pmxops = &dwapb_pmux_ops; + + ret = devm_pinctrl_register_and_init(gpio->dev, &port->pctldesc, port, + &port->pctl); + if (ret) { + dev_err(gpio->dev, "Failed to register pinctrl device\n"); + return ret; + } + + ret = pinctrl_enable(port->pctl); + if (ret) { + dev_err(gpio->dev, "pinctrl enable failed\n"); + return ret; + } + + range = &port->range; + range->name = dev_name(gpio->dev); + range->id = port->idx; + range->pin_base = 0; + range->base = port->gc.base; + range->npins = pp->ngpio; + range->gc = &port->gc; + + pinctrl_add_gpio_range(port->pctl, range); + + return 0; +} + static int dwapb_gpio_add_port(struct dwapb_gpio *gpio, struct dwapb_port_property *pp, unsigned int offs) @@ -536,6 +779,12 @@ static int dwapb_gpio_add_port(struct dwapb_gpio *gpio, else port->is_registered = true; + if (!err && pp->has_pinctrl) { + err = dwapb_gpio_add_pinctrl(gpio, pp, port); + if (err) + return err; + } + /* Add GPIO-signaled ACPI event support */ if (pp->has_irq) acpi_gpiochip_request_interrupts(&port->gc); @@ -589,6 +838,8 @@ dwapb_gpio_get_pdata(struct device *dev) pp->ngpio = 32; } + pp->has_pinctrl = fwnode_property_read_bool(fwnode, + "snps,has-pinctrl"); pp->irq_shared = false; pp->gpio_base = -1; @@ -822,7 +1073,7 @@ static SIMPLE_DEV_PM_OPS(dwapb_gpio_pm_ops, dwapb_gpio_suspend, static struct platform_driver dwapb_gpio_driver = { .driver = { - .name = "gpio-dwapb", + .name = "pinctrl-dwapb", .pm = &dwapb_gpio_pm_ops, .of_match_table = of_match_ptr(dwapb_of_match), .acpi_match_table = ACPI_PTR(dwapb_acpi_match), diff --git a/include/linux/platform_data/gpio-dwapb.h b/include/linux/platform_data/gpio-dwapb.h index 3c606c450d05..2633bb745317 100644 --- a/include/linux/platform_data/gpio-dwapb.h +++ b/include/linux/platform_data/gpio-dwapb.h @@ -14,6 +14,7 @@ struct dwapb_port_property { int irq[32]; bool has_irq; bool irq_shared; + bool has_pinctrl; }; struct dwapb_platform_data { From patchwork Wed Dec 4 10:10:39 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Clement Leger X-Patchwork-Id: 1204078 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=quarantine dis=none) header.from=kalray.eu Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=kalray.eu header.i=@kalray.eu header.b="MIsRZrhb"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 47SZPl1yhKz9sRD for ; Wed, 4 Dec 2019 21:11:23 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727621AbfLDKLG (ORCPT ); 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Wed, 4 Dec 2019 11:11:03 +0100 (CET) Received: from triton.lin.mbt.kalray.eu (unknown [192.168.37.25]) by zimbra2.kalray.eu (Postfix) with ESMTPSA id 7DB6C27E0A05; Wed, 4 Dec 2019 11:11:03 +0100 (CET) From: Clement Leger To: linux-kernel@vger.kernel.org Cc: Clement Leger , Linus Walleij , Bartosz Golaszewski , Rob Herring , Mark Rutland , Hoan Tran , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 5/5] dt-bindings: pinctrl: dw: move sps, dwapb-gpio.txt to pinctrl Date: Wed, 4 Dec 2019 11:10:39 +0100 Message-Id: <20191204101042.4275-6-cleger@kalray.eu> X-Mailer: git-send-email 2.15.0.276.g89ea799 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Since the driver has been moved to pinctrl and now supports it, move the documentation into pinctrl folder. In the same time, add documentation for pinctrl properties such has snps,has-pinctrl and description of pin alternate functions. Signed-off-by: Clement Leger --- .../bindings/{gpio => pinctrl}/snps-dwapb-gpio.txt | 21 ++++++++++++++++++++- MAINTAINERS | 2 +- 2 files changed, 21 insertions(+), 2 deletions(-) rename Documentation/devicetree/bindings/{gpio => pinctrl}/snps-dwapb-gpio.txt (76%) diff --git a/Documentation/devicetree/bindings/gpio/snps-dwapb-gpio.txt b/Documentation/devicetree/bindings/pinctrl/snps-dwapb-gpio.txt similarity index 76% rename from Documentation/devicetree/bindings/gpio/snps-dwapb-gpio.txt rename to Documentation/devicetree/bindings/pinctrl/snps-dwapb-gpio.txt index 839dd32ffe11..4fb1b754a2bd 100644 --- a/Documentation/devicetree/bindings/gpio/snps-dwapb-gpio.txt +++ b/Documentation/devicetree/bindings/pinctrl/snps-dwapb-gpio.txt @@ -1,4 +1,4 @@ -* Synopsys DesignWare APB GPIO controller +* Synopsys DesignWare APB GPIO & pinmux controller Required properties: - compatible : Should contain "snps,dw-apb-gpio" @@ -33,8 +33,16 @@ controller. use the interrupts-extended property to specify the interrupts and set the interrupt controller handle for unused interrupts to 0. - snps,nr-gpios : The number of pins in the port, a single cell. +- snps,has-pinctrl : If present, register the pinctrl controller. - resets : Reset line for the controller. +Required properties for pin configuration node: +- function: string representing a function to mux for pins + dw apb controller only has two functions for each pins (sw and hw). When set + in software mode, the gpio controller controls the pin output. When + configured in hardware mode, an external peripheral controls the pin signal. +- pins: string array of pins to be muxed. + Example: gpio: gpio@20000 { @@ -60,6 +68,17 @@ gpio: gpio@20000 { gpio-controller; #gpio-cells = <2>; snps,nr-gpios = <8>; + snps,has-pinctrl; reg = <1>; + + uart0_pins: pinmux_uart0_pins { + function = "hw"; + pins = "pin0", "pin1"; + }; + + uart1_pins: pinmux_uart1_pins { + function = "hw"; + pins = "pin2", "pin3"; + }; }; }; diff --git a/MAINTAINERS b/MAINTAINERS index 35b90ad9f594..e8f9e827d687 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -15873,7 +15873,7 @@ M: Hoan Tran L: linux-gpio@vger.kernel.org S: Maintained F: drivers/pinctrl/dw/pinctrl-dwapb.c -F: Documentation/devicetree/bindings/gpio/snps-dwapb-gpio.txt +F: Documentation/devicetree/bindings/pinctrl/snps-dwapb-gpio.txt SYNOPSYS DESIGNWARE AXI DMAC DRIVER M: Eugeniy Paltsev