From patchwork Wed Nov 27 01:02:03 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haren Myneni X-Patchwork-Id: 1201279 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 47N2f84LJFz9sS9 for ; Wed, 27 Nov 2019 12:06:24 +1100 (AEDT) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.vnet.ibm.com Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 47N2f820VfzDqYY for ; Wed, 27 Nov 2019 12:06:24 +1100 (AEDT) X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; 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Wed, 27 Nov 2019 01:03:22 +0000 (GMT) Received: from b03ledav005.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 5488EBE054; Wed, 27 Nov 2019 01:03:22 +0000 (GMT) Received: from [9.70.82.143] (unknown [9.70.82.143]) by b03ledav005.gho.boulder.ibm.com (Postfix) with ESMTP; Wed, 27 Nov 2019 01:03:22 +0000 (GMT) Subject: [PATCH 01/14] powerpc/vas: Describe vas-port and interrupts properties From: Haren Myneni To: linuxppc-dev@lists.ozlabs.org, devicetree@vger.kernel.org, mpe@ellerman.id.au, npiggin@gmail.com, mikey@neuling.org, herbert@gondor.apana.org.au Date: Tue, 26 Nov 2019 17:02:03 -0800 Message-ID: <1574816523.13250.4.camel@hbabu-laptop> Mime-Version: 1.0 X-Mailer: Evolution 2.28.3 X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95, 18.0.572 definitions=2019-11-26_08:2019-11-26, 2019-11-26 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 clxscore=1015 impostorscore=0 suspectscore=0 adultscore=0 priorityscore=1501 mlxscore=0 lowpriorityscore=0 malwarescore=0 phishscore=0 mlxlogscore=868 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-1910280000 definitions=main-1911270006 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sukadev@linux.vnet.ibm.com Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" [PATCH 01/14] powerpc/vas: Describe vas-port and interrupts properties Signed-off-by: Haren Myneni --- Documentation/devicetree/bindings/powerpc/ibm,vas.txt | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/powerpc/ibm,vas.txt b/Documentation/devicetree/bindings/powerpc/ibm,vas.txt index bf11d2f..12de08b 100644 --- a/Documentation/devicetree/bindings/powerpc/ibm,vas.txt +++ b/Documentation/devicetree/bindings/powerpc/ibm,vas.txt @@ -11,6 +11,8 @@ Required properties: window context start and length, OS/User window context start and length, "Paste address" start and length, "Paste window id" start bit and number of bits) +- ibm,vas-port : Port address for the interrupt. +- interrupts: IRQ value for each VAS instance and level. Example: @@ -18,5 +20,8 @@ Example: compatible = "ibm,vas", "ibm,power9-vas"; reg = <0x6019100000000 0x2000000 0x6019000000000 0x100000000 0x8000000000000 0x100000000 0x20 0x10>; name = "vas"; + interrupts = <0x1f 0>; + interrupt-parent = <&mpic>; ibm,vas-id = <0x1>; + ibm,vas-port = <0x6010001000000>; }; From patchwork Wed Nov 27 01:03:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haren Myneni X-Patchwork-Id: 1201280 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 47N2hV5rNrz9sS9 for ; Wed, 27 Nov 2019 12:08:26 +1100 (AEDT) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.vnet.ibm.com Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 47N2hV3QMkzDqQK for ; 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Tue, 26 Nov 2019 20:04:47 -0500 Received: from m0098421.ppops.net (m0098421.ppops.net [127.0.0.1]) by pps.reinject (8.16.0.36/8.16.0.36) with SMTP id xAR14lmj107105; Tue, 26 Nov 2019 20:04:47 -0500 Received: from ppma03wdc.us.ibm.com (ba.79.3fa9.ip4.static.sl-reverse.com [169.63.121.186]) by mx0a-001b2d01.pphosted.com with ESMTP id 2whcxq3hk0-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 26 Nov 2019 20:04:47 -0500 Received: from pps.filterd (ppma03wdc.us.ibm.com [127.0.0.1]) by ppma03wdc.us.ibm.com (8.16.0.27/8.16.0.27) with SMTP id xAR1015e022360; Wed, 27 Nov 2019 01:04:46 GMT Received: from b01cxnp22033.gho.pok.ibm.com (b01cxnp22033.gho.pok.ibm.com [9.57.198.23]) by ppma03wdc.us.ibm.com with ESMTP id 2wevd6g80u-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 27 Nov 2019 01:04:46 +0000 Received: from b01ledav004.gho.pok.ibm.com (b01ledav004.gho.pok.ibm.com [9.57.199.109]) by b01cxnp22033.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id xAR14kTF35717422 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 27 Nov 2019 01:04:46 GMT Received: from b01ledav004.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 6A9A2112062; Wed, 27 Nov 2019 01:04:46 +0000 (GMT) Received: from b01ledav004.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id BC355112061; Wed, 27 Nov 2019 01:04:45 +0000 (GMT) Received: from [9.70.82.143] (unknown [9.70.82.143]) by b01ledav004.gho.pok.ibm.com (Postfix) with ESMTP; Wed, 27 Nov 2019 01:04:45 +0000 (GMT) Subject: [PATCH 02/14] Revert "powerpc/powernv: remove the unused vas_win_paste_addr and vas_win_id functions" From: Haren Myneni To: linuxppc-dev@lists.ozlabs.org, devicetree@vger.kernel.org, mpe@ellerman.id.au, npiggin@gmail.com, mikey@neuling.org, herbert@gondor.apana.org.au Date: Tue, 26 Nov 2019 17:03:27 -0800 Message-ID: <1574816607.13250.6.camel@hbabu-laptop> Mime-Version: 1.0 X-Mailer: Evolution 2.28.3 X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95, 18.0.572 definitions=2019-11-26_08:2019-11-26, 2019-11-26 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 spamscore=0 mlxlogscore=999 lowpriorityscore=0 priorityscore=1501 impostorscore=0 mlxscore=0 malwarescore=0 adultscore=0 phishscore=0 suspectscore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-1910280000 definitions=main-1911270006 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sukadev@linux.vnet.ibm.com Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" This reverts commit 452d23c0f6bd97f2fd8a9691fee79b76040a0feb. User space send windows (NX GZIP compression) need vas_win_paste_addr() to mmap window paste address and vas_win_id() to get window ID when window address is given. Added vas_win_id() and vas_win_paste_addr() with: commit 61f3cca8cda97 ("powerpc/vas: Define vas_win_id()") commit 5676be2fb7035 ("powerpc/vas: Define vas_win_paste_addr()") Signed-off-by:Haren Myneni --- arch/powerpc/include/asm/vas.h | 10 ++++++++++ arch/powerpc/platforms/powernv/vas-window.c | 19 +++++++++++++++++++ arch/powerpc/platforms/powernv/vas.h | 20 ++++++++++++++++++++ 3 files changed, 49 insertions(+) diff --git a/arch/powerpc/include/asm/vas.h b/arch/powerpc/include/asm/vas.h index f93e6b0..da0b198 100644 --- a/arch/powerpc/include/asm/vas.h +++ b/arch/powerpc/include/asm/vas.h @@ -163,4 +163,14 @@ struct vas_window *vas_tx_win_open(int vasid, enum vas_cop_type cop, */ int vas_paste_crb(struct vas_window *win, int offset, bool re); +/* + * Return a system-wide unique id for the VAS window @win. + */ +extern u32 vas_win_id(struct vas_window *win); + +/* + * Return the power bus paste address associated with @win so the caller + * can map that address into their address space. + */ +extern u64 vas_win_paste_addr(struct vas_window *win); #endif /* __ASM_POWERPC_VAS_H */ diff --git a/arch/powerpc/platforms/powernv/vas-window.c b/arch/powerpc/platforms/powernv/vas-window.c index 0c0d27d..ea5ca02 100644 --- a/arch/powerpc/platforms/powernv/vas-window.c +++ b/arch/powerpc/platforms/powernv/vas-window.c @@ -40,6 +40,16 @@ static void compute_paste_address(struct vas_window *window, u64 *addr, int *len pr_debug("Txwin #%d: Paste addr 0x%llx\n", winid, *addr); } +u64 vas_win_paste_addr(struct vas_window *win) +{ + u64 addr; + + compute_paste_address(win, &addr, NULL); + + return addr; +} +EXPORT_SYMBOL(vas_win_paste_addr); + static inline void get_hvwc_mmio_bar(struct vas_window *window, u64 *start, int *len) { @@ -1254,3 +1264,12 @@ int vas_win_close(struct vas_window *window) return 0; } EXPORT_SYMBOL_GPL(vas_win_close); + +/* + * Return a system-wide unique window id for the window @win. + */ +u32 vas_win_id(struct vas_window *win) +{ + return encode_pswid(win->vinst->vas_id, win->winid); +} +EXPORT_SYMBOL_GPL(vas_win_id); diff --git a/arch/powerpc/platforms/powernv/vas.h b/arch/powerpc/platforms/powernv/vas.h index 5574aec..9cc5251 100644 --- a/arch/powerpc/platforms/powernv/vas.h +++ b/arch/powerpc/platforms/powernv/vas.h @@ -444,6 +444,26 @@ static inline u64 read_hvwc_reg(struct vas_window *win, return in_be64(win->hvwc_map+reg); } +/* + * Encode/decode the Partition Send Window ID (PSWID) for a window in + * a way that we can uniquely identify any window in the system. i.e. + * we should be able to locate the 'struct vas_window' given the PSWID. + * + * Bits Usage + * 0:7 VAS id (8 bits) + * 8:15 Unused, 0 (3 bits) + * 16:31 Window id (16 bits) + */ +static inline u32 encode_pswid(int vasid, int winid) +{ + u32 pswid = 0; + + pswid |= vasid << (31 - 7); + pswid |= winid; + + return pswid; +} + static inline void decode_pswid(u32 pswid, int *vasid, int *winid) { if (vasid) From patchwork Wed Nov 27 01:04:36 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haren Myneni X-Patchwork-Id: 1201281 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 47N2nc2sXFz9sSl for ; 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Wed, 27 Nov 2019 01:05:56 +0000 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp22034.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id xAR15tRo48431392 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 27 Nov 2019 01:05:55 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id A0F50AC05B; Wed, 27 Nov 2019 01:05:55 +0000 (GMT) Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E81BFAC059; Wed, 27 Nov 2019 01:05:54 +0000 (GMT) Received: from [9.70.82.143] (unknown [9.70.82.143]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP; Wed, 27 Nov 2019 01:05:54 +0000 (GMT) Subject: [PATCH 03/14] powerpc/vas: Define nx_fault_stamp in coprocessor_request_block From: Haren Myneni To: linuxppc-dev@lists.ozlabs.org, devicetree@vger.kernel.org, mpe@ellerman.id.au, npiggin@gmail.com, mikey@neuling.org, herbert@gondor.apana.org.au Date: Tue, 26 Nov 2019 17:04:36 -0800 Message-ID: <1574816676.13250.8.camel@hbabu-laptop> Mime-Version: 1.0 X-Mailer: Evolution 2.28.3 X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95, 18.0.572 definitions=2019-11-26_08:2019-11-26, 2019-11-26 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 mlxscore=0 suspectscore=0 spamscore=0 phishscore=0 mlxlogscore=896 bulkscore=0 priorityscore=1501 impostorscore=0 malwarescore=0 adultscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-1910280000 definitions=main-1911270006 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sukadev@linux.vnet.ibm.com Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" Kernel sets fault address and status in CRB for NX page fault on user space address after processing page fault. User space gets the signal and handles the fault mentioned in CRB by bringing the page in to memory and send NX request again. Signed-off-by: Sukadev Bhattiprolu Signed-off-by: Haren Myneni --- arch/powerpc/include/asm/icswx.h | 32 +++++++++++++++++++++++++++++++- 1 file changed, 31 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/include/asm/icswx.h b/arch/powerpc/include/asm/icswx.h index 9872f85..c071471 100644 --- a/arch/powerpc/include/asm/icswx.h +++ b/arch/powerpc/include/asm/icswx.h @@ -108,6 +108,21 @@ struct data_descriptor_entry { __be64 address; } __packed __aligned(DDE_ALIGN); +/* 4.3.2 NX-stamped Fault CRB */ + +#define NX_STAMP_ALIGN (0x10) + +#define NX_STAMP_ACCESS_MASK (0x01) +#define NX_STAMP_ACCESS_READ 0 +#define NX_STAMP_ACCESS_WRITE 1 + +struct nx_fault_stamp { + __be64 fault_storage_addr; + __be16 reserved; + __u8 flags; + __u8 fault_status; + __be32 pswid; +} __packed __aligned(NX_STAMP_ALIGN); /* Chapter 6.5.2 Coprocessor-Request Block (CRB) */ @@ -135,11 +150,26 @@ struct coprocessor_request_block { struct coprocessor_completion_block ccb; - u8 reserved[48]; + union { + struct nx_fault_stamp nx; + u8 reserved[16]; + } stamp; + + u8 reserved[32]; struct coprocessor_status_block csb; } __packed __aligned(CRB_ALIGN); +#define crb_csb_addr(c) __be64_to_cpu(c->csb_addr) +#define crb_nx_fault_addr(c) __be64_to_cpu(c->stamp.nx.fault_storage_addr) +#define crb_nx_flags(c) c->stamp.nx.flags +#define crb_nx_fault_status(c) c->stamp.nx.fault_status + +static inline uint32_t crb_nx_pswid(struct coprocessor_request_block *crb) +{ + return __be32_to_cpu(crb->stamp.nx.pswid); +} + /* RFC02167 Initiate Coprocessor Instructions document * Chapter 8.2.1.1.1 RS From patchwork Wed Nov 27 01:05:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haren Myneni X-Patchwork-Id: 1201282 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 47N2r40rQ7z9sSl for ; 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Wed, 27 Nov 2019 01:06:51 +0000 Received: from b01ledav003.gho.pok.ibm.com (b01ledav003.gho.pok.ibm.com [9.57.199.108]) by b01cxnp22034.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id xAR16oTR33882456 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 27 Nov 2019 01:06:51 GMT Received: from b01ledav003.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id DC45AB2068; Wed, 27 Nov 2019 01:06:50 +0000 (GMT) Received: from b01ledav003.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 2D758B2065; Wed, 27 Nov 2019 01:06:50 +0000 (GMT) Received: from [9.70.82.143] (unknown [9.70.82.143]) by b01ledav003.gho.pok.ibm.com (Postfix) with ESMTP; Wed, 27 Nov 2019 01:06:50 +0000 (GMT) Subject: [PATCH 04/14] powerpc/vas: Setup IRQ mapping and register port for each window From: Haren Myneni To: linuxppc-dev@lists.ozlabs.org, devicetree@vger.kernel.org, mpe@ellerman.id.au, npiggin@gmail.com, mikey@neuling.org, herbert@gondor.apana.org.au Date: Tue, 26 Nov 2019 17:05:31 -0800 Message-ID: <1574816731.13250.9.camel@hbabu-laptop> Mime-Version: 1.0 X-Mailer: Evolution 2.28.3 X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95, 18.0.572 definitions=2019-11-26_08:2019-11-26, 2019-11-26 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 spamscore=0 mlxlogscore=999 lowpriorityscore=0 priorityscore=1501 impostorscore=0 mlxscore=0 malwarescore=0 adultscore=0 phishscore=0 suspectscore=2 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-1910280000 definitions=main-1911270006 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sukadev@linux.vnet.ibm.com Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" Read interrupt and port values from the device tree, setup IRQ mapping and register IRQ for each VAS instance. Set port value for each NX window. When NX sees a fault on CRB, kernel gets an interrupt and handles the fault. IRQ setup and fault handling is needed only for user space send windows. So for kernel requests, ignore if interrupts property is not available. Signed-off-by: Sukadev Bhattiprolu Signed-off-by: Haren Myneni --- arch/powerpc/platforms/powernv/vas-window.c | 14 ++++++ arch/powerpc/platforms/powernv/vas.c | 68 ++++++++++++++++++++++++++--- arch/powerpc/platforms/powernv/vas.h | 2 + 3 files changed, 78 insertions(+), 6 deletions(-) diff --git a/arch/powerpc/platforms/powernv/vas-window.c b/arch/powerpc/platforms/powernv/vas-window.c index ea5ca02..ad6be91 100644 --- a/arch/powerpc/platforms/powernv/vas-window.c +++ b/arch/powerpc/platforms/powernv/vas-window.c @@ -758,6 +758,8 @@ static void init_winctx_for_rxwin(struct vas_window *rxwin, winctx->min_scope = VAS_SCOPE_LOCAL; winctx->max_scope = VAS_SCOPE_VECTORED_GROUP; + if (rxwin->vinst->virq) + winctx->irq_port = rxwin->vinst->irq_port; } static bool rx_win_args_valid(enum vas_cop_type cop, @@ -959,6 +961,8 @@ static void init_winctx_for_txwin(struct vas_window *txwin, winctx->tc_mode = txattr->tc_mode; winctx->min_scope = VAS_SCOPE_LOCAL; winctx->max_scope = VAS_SCOPE_VECTORED_GROUP; + if (txwin->vinst->virq) + winctx->irq_port = txwin->vinst->irq_port; winctx->pswid = 0; } @@ -1050,6 +1054,16 @@ struct vas_window *vas_tx_win_open(int vasid, enum vas_cop_type cop, } } else { /* + * Interrupt hanlder setup failed. Means NX can not generate + * fault for page fault. So not opening for user space tx + * window. + */ + if (!vinst->virq) { + rc = -ENODEV; + goto free_window; + } + + /* * A user mapping must ensure that context switch issues * CP_ABORT for this thread. */ diff --git a/arch/powerpc/platforms/powernv/vas.c b/arch/powerpc/platforms/powernv/vas.c index ed9cc6d..71bddaa 100644 --- a/arch/powerpc/platforms/powernv/vas.c +++ b/arch/powerpc/platforms/powernv/vas.c @@ -14,6 +14,8 @@ #include #include #include +#include +#include #include #include "vas.h" @@ -23,9 +25,33 @@ static DEFINE_PER_CPU(int, cpu_vas_id); +static irqreturn_t vas_irq_handler(int virq, void *data) +{ + struct vas_instance *vinst = data; + + pr_devel("VAS %d: virq %d\n", vinst->vas_id, virq); + + return IRQ_HANDLED; +} + +static void vas_irq_fault_handle_setup(struct vas_instance *vinst) +{ + int rc; + char devname[64]; + + snprintf(devname, sizeof(devname), "vas-inst-%d", vinst->vas_id); + rc = request_irq(vinst->virq, vas_irq_handler, 0, devname, vinst); + if (rc) { + pr_err("VAS[%d]: Request IRQ(%d) failed with %d\n", + vinst->vas_id, vinst->virq, rc); + vinst->virq = 0; + } +} + static int init_vas_instance(struct platform_device *pdev) { - int rc, cpu, vasid; + int rc, cpu, vasid, nresources = 5; + uint64_t port; struct resource *res; struct vas_instance *vinst; struct device_node *dn = pdev->dev.of_node; @@ -36,7 +62,18 @@ static int init_vas_instance(struct platform_device *pdev) return -ENODEV; } - if (pdev->num_resources != 4) { + rc = of_property_read_u64(dn, "ibm,vas-port", &port); + if (rc) { + pr_err("No ibm,vas-port property for %s?\n", pdev->name); + /* No interrupts property */ + nresources = 4; + } + + /* + * interrupts property is available with 'ibm,vas-port' property. + * 4 Resources and 1 IRQ if interrupts property is available. + */ + if (pdev->num_resources != nresources) { pr_err("Unexpected DT configuration for [%s, %d]\n", pdev->name, vasid); return -ENODEV; @@ -51,6 +88,7 @@ static int init_vas_instance(struct platform_device *pdev) mutex_init(&vinst->mutex); vinst->vas_id = vasid; vinst->pdev = pdev; + vinst->irq_port = port; res = &pdev->resource[0]; vinst->hvwc_bar_start = res->start; @@ -66,12 +104,23 @@ static int init_vas_instance(struct platform_device *pdev) pr_err("Bad 'paste_win_id_shift' in DT, %llx\n", res->end); goto free_vinst; } - vinst->paste_win_id_shift = 63 - res->end; - pr_devel("Initialized instance [%s, %d], paste_base 0x%llx, " - "paste_win_id_shift 0x%llx\n", pdev->name, vasid, - vinst->paste_base_addr, vinst->paste_win_id_shift); + /* interrupts property */ + if (pdev->num_resources == 5) { + res = &pdev->resource[4]; + vinst->virq = res->start; + if (vinst->virq <= 0) { + pr_err("IRQ resource is not available for [%s, %d]\n", + pdev->name, vasid); + vinst->virq = 0; + } + } + + pr_devel("Initialized instance [%s, %d] paste_base 0x%llx paste_win_id_shift 0x%llx IRQ %d Port 0x%llx\n", + pdev->name, vasid, vinst->paste_base_addr, + vinst->paste_win_id_shift, vinst->virq, + vinst->irq_port); for_each_possible_cpu(cpu) { if (cpu_to_chip_id(cpu) == of_get_ibm_chip_id(dn)) @@ -82,6 +131,13 @@ static int init_vas_instance(struct platform_device *pdev) list_add(&vinst->node, &vas_instances); mutex_unlock(&vas_mutex); + /* + * IRQ and fault handling setup is needed only for user space + * send windows. + */ + if (vinst->virq) + vas_irq_fault_handle_setup(vinst); + vas_instance_init_dbgdir(vinst); dev_set_drvdata(&pdev->dev, vinst); diff --git a/arch/powerpc/platforms/powernv/vas.h b/arch/powerpc/platforms/powernv/vas.h index 9cc5251..bf7d3db 100644 --- a/arch/powerpc/platforms/powernv/vas.h +++ b/arch/powerpc/platforms/powernv/vas.h @@ -313,6 +313,8 @@ struct vas_instance { u64 paste_base_addr; u64 paste_win_id_shift; + u64 irq_port; + int virq; struct mutex mutex; struct vas_window *rxwin[VAS_COP_TYPE_MAX]; struct vas_window *windows[VAS_WINDOWS_PER_CHIP]; From patchwork Wed Nov 27 01:06:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haren Myneni X-Patchwork-Id: 1201283 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 47N2tR24Wsz9sSl for ; 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Wed, 27 Nov 2019 01:07:41 +0000 Received: from b01ledav001.gho.pok.ibm.com (b01ledav001.gho.pok.ibm.com [9.57.199.106]) by b01cxnp22036.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id xAR17eGb14811934 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 27 Nov 2019 01:07:40 GMT Received: from b01ledav001.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id B28BF28059; Wed, 27 Nov 2019 01:07:40 +0000 (GMT) Received: from b01ledav001.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E725C28058; Wed, 27 Nov 2019 01:07:39 +0000 (GMT) Received: from [9.70.82.143] (unknown [9.70.82.143]) by b01ledav001.gho.pok.ibm.com (Postfix) with ESMTP; Wed, 27 Nov 2019 01:07:39 +0000 (GMT) Subject: [PATCH 05/14] powerpc/vas: Setup fault window per VAS instance From: Haren Myneni To: linuxppc-dev@lists.ozlabs.org, devicetree@vger.kernel.org, mpe@ellerman.id.au, npiggin@gmail.com, mikey@neuling.org, herbert@gondor.apana.org.au Date: Tue, 26 Nov 2019 17:06:21 -0800 Message-ID: <1574816781.13250.10.camel@hbabu-laptop> Mime-Version: 1.0 X-Mailer: Evolution 2.28.3 X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95, 18.0.572 definitions=2019-11-26_08:2019-11-26, 2019-11-26 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 mlxscore=0 bulkscore=0 malwarescore=0 suspectscore=2 adultscore=0 priorityscore=1501 phishscore=0 lowpriorityscore=0 clxscore=1015 spamscore=0 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-1910280000 definitions=main-1911270007 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sukadev@linux.vnet.ibm.com Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" Setup fault window for each VAS instance. When NX gets fault on request buffer, write fault CRBs in the corresponding fault FIFO and then sends an interrupt to the OS. Signed-off-by: Sukadev Bhattiprolu Signed-off-by: Haren Myneni --- arch/powerpc/platforms/powernv/Makefile | 2 +- arch/powerpc/platforms/powernv/vas-fault.c | 105 ++++++++++++++++++++++++++++ arch/powerpc/platforms/powernv/vas-window.c | 13 +++- arch/powerpc/platforms/powernv/vas.c | 12 ++++ arch/powerpc/platforms/powernv/vas.h | 6 ++ 5 files changed, 134 insertions(+), 4 deletions(-) create mode 100644 arch/powerpc/platforms/powernv/vas-fault.c diff --git a/arch/powerpc/platforms/powernv/Makefile b/arch/powerpc/platforms/powernv/Makefile index a3ac964..74c2246 100644 --- a/arch/powerpc/platforms/powernv/Makefile +++ b/arch/powerpc/platforms/powernv/Makefile @@ -17,6 +17,6 @@ obj-$(CONFIG_MEMORY_FAILURE) += opal-memory-errors.o obj-$(CONFIG_OPAL_PRD) += opal-prd.o obj-$(CONFIG_PERF_EVENTS) += opal-imc.o obj-$(CONFIG_PPC_MEMTRACE) += memtrace.o -obj-$(CONFIG_PPC_VAS) += vas.o vas-window.o vas-debug.o +obj-$(CONFIG_PPC_VAS) += vas.o vas-window.o vas-debug.o vas-fault.o obj-$(CONFIG_OCXL_BASE) += ocxl.o obj-$(CONFIG_SCOM_DEBUGFS) += opal-xscom.o diff --git a/arch/powerpc/platforms/powernv/vas-fault.c b/arch/powerpc/platforms/powernv/vas-fault.c new file mode 100644 index 0000000..a5e63a5 --- /dev/null +++ b/arch/powerpc/platforms/powernv/vas-fault.c @@ -0,0 +1,105 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * VAS Fault handling. + * Copyright 2019, IBM Corporation + */ + +#define pr_fmt(fmt) "vas: " fmt + +#include +#include +#include +#include +#include +#include + +#include "vas.h" + +/* + * The maximum FIFO size for fault window can be 8MB + * (VAS_RX_FIFO_SIZE_MAX). Using 4MB FIFO since each VAS + * instance will be having fault window. + * 8MB FIFO can be used if expects more faults for each VAS + * instance. + */ +#define VAS_FAULT_WIN_FIFO_SIZE (4 << 20) + +/* + * Fault window is opened per VAS instance. NX pastes fault CRB in fault + * FIFO upon page faults. + */ +int vas_setup_fault_window(struct vas_instance *vinst) +{ + struct vas_rx_win_attr attr; + + vinst->fault_fifo_size = VAS_FAULT_WIN_FIFO_SIZE; + vinst->fault_fifo = kzalloc(vinst->fault_fifo_size, GFP_KERNEL); + if (!vinst->fault_fifo) { + pr_err("Unable to alloc %d bytes for fault_fifo\n", + vinst->fault_fifo_size); + return -ENOMEM; + } + + vas_init_rx_win_attr(&attr, VAS_COP_TYPE_FAULT); + + attr.rx_fifo_size = vinst->fault_fifo_size; + attr.rx_fifo = vinst->fault_fifo; + + /* + * Max creds is based on number of CRBs can fit in the FIFO. + * (fault_fifo_size/CRB_SIZE). If 8MB FIFO is used, max creds + * will be 0xffff since the receive creds field is 16bits wide. + */ + attr.wcreds_max = vinst->fault_fifo_size / CRB_SIZE; + attr.lnotify_lpid = 0; + attr.lnotify_pid = mfspr(SPRN_PID); + attr.lnotify_tid = mfspr(SPRN_PID); + + vinst->fault_win = vas_rx_win_open(vinst->vas_id, VAS_COP_TYPE_FAULT, + &attr); + + if (IS_ERR(vinst->fault_win)) { + pr_err("VAS: Error %ld opening FaultWin\n", + PTR_ERR(vinst->fault_win)); + kfree(vinst->fault_fifo); + return PTR_ERR(vinst->fault_win); + } + + pr_devel("VAS: Created FaultWin %d, LPID/PID/TID [%d/%d/%d]\n", + vinst->fault_win->winid, attr.lnotify_lpid, + attr.lnotify_pid, attr.lnotify_tid); + + return 0; +} + +/* + * We do not remove VAS instances. The following functions are needed + * when VAS hotplug is supported. + */ +#if 0 +/* + * Close the fault window and free the receive FIFO. + * + * TODO:vas_win_close() will block till pending requests are drained. + * The fault thread itself allocates the FIFO, opens the window + * and when done, closes the window and frees the FIFO. + * Are there any other race condition to watch for here or in + * vas_win_close()? + * + */ +int vas_cleanup_fault_window(struct vas_instance *vinst) +{ + int rc; + + rc = vas_win_close(vinst->fault_win); + if (rc < 0) { + pr_err("VAS Fault handler %d: error %d closing window\n", + vinst->vas_id, rc); + } + + kfree(vinst->fault_fifo); + vinst->fault_fifo = NULL; + + return rc; +} +#endif diff --git a/arch/powerpc/platforms/powernv/vas-window.c b/arch/powerpc/platforms/powernv/vas-window.c index ad6be91..5f1faeb 100644 --- a/arch/powerpc/platforms/powernv/vas-window.c +++ b/arch/powerpc/platforms/powernv/vas-window.c @@ -383,7 +383,7 @@ int init_winctx_regs(struct vas_window *window, struct vas_winctx *winctx) init_xlate_regs(window, winctx->user_win); val = 0ULL; - val = SET_FIELD(VAS_FAULT_TX_WIN, val, 0); + val = SET_FIELD(VAS_FAULT_TX_WIN, val, winctx->fault_win_id); write_hvwc_reg(window, VREG(FAULT_TX_WIN), val); /* In PowerNV, interrupts go to HV. */ @@ -839,9 +839,10 @@ void vas_init_rx_win_attr(struct vas_rx_win_attr *rxattr, enum vas_cop_type cop) rxattr->fault_win = true; rxattr->notify_disable = true; rxattr->rx_wcred_mode = true; - rxattr->tx_wcred_mode = true; rxattr->rx_win_ord_mode = true; rxattr->tx_win_ord_mode = true; + rxattr->rej_no_credit = true; + rxattr->tc_mode = VAS_THRESH_DISABLED; } else if (cop == VAS_COP_TYPE_FTW) { rxattr->user_win = true; rxattr->intr_disable = true; @@ -956,6 +957,12 @@ static void init_winctx_for_txwin(struct vas_window *txwin, winctx->lpid = txattr->lpid; winctx->pidr = txattr->pidr; winctx->rx_win_id = txwin->rxwin->winid; + /* + * IRQ and fault window setup is successful. Set fault window + * for the send window so that ready to handle faults. + */ + if (txwin->vinst->virq) + winctx->fault_win_id = txwin->vinst->fault_win->winid; winctx->dma_type = VAS_DMA_TYPE_INJECT; winctx->tc_mode = txattr->tc_mode; @@ -964,7 +971,7 @@ static void init_winctx_for_txwin(struct vas_window *txwin, if (txwin->vinst->virq) winctx->irq_port = txwin->vinst->irq_port; - winctx->pswid = 0; + winctx->pswid = txattr->pswid ? txattr->pswid : vas_win_id(txwin); } static bool tx_win_args_valid(enum vas_cop_type cop, diff --git a/arch/powerpc/platforms/powernv/vas.c b/arch/powerpc/platforms/powernv/vas.c index 71bddaa..dd0e06c 100644 --- a/arch/powerpc/platforms/powernv/vas.c +++ b/arch/powerpc/platforms/powernv/vas.c @@ -45,6 +45,18 @@ static void vas_irq_fault_handle_setup(struct vas_instance *vinst) pr_err("VAS[%d]: Request IRQ(%d) failed with %d\n", vinst->vas_id, vinst->virq, rc); vinst->virq = 0; + return; + } + + /* + * Fault window is used only for user space send windows. + * So if vinst->virq is NULL, tx_win_open returns -ENODEV + * for user space. + */ + rc = vas_setup_fault_window(vinst); + if (rc) { + free_irq(vinst->virq, vinst); + vinst->virq = 0; } } diff --git a/arch/powerpc/platforms/powernv/vas.h b/arch/powerpc/platforms/powernv/vas.h index bf7d3db..e23fd69 100644 --- a/arch/powerpc/platforms/powernv/vas.h +++ b/arch/powerpc/platforms/powernv/vas.h @@ -315,6 +315,10 @@ struct vas_instance { u64 irq_port; int virq; + int fault_fifo_size; + void *fault_fifo; + struct vas_window *fault_win; /* Fault window */ + struct mutex mutex; struct vas_window *rxwin[VAS_COP_TYPE_MAX]; struct vas_window *windows[VAS_WINDOWS_PER_CHIP]; @@ -408,6 +412,8 @@ struct vas_winctx { extern void vas_instance_init_dbgdir(struct vas_instance *vinst); extern void vas_window_init_dbgdir(struct vas_window *win); extern void vas_window_free_dbgdir(struct vas_window *win); +extern int vas_setup_fault_window(struct vas_instance *vinst); +extern int vas_cleanup_fault_window(struct vas_instance *vinst); static inline void vas_log_write(struct vas_window *win, char *name, void *regptr, u64 val) From patchwork Wed Nov 27 01:08:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haren Myneni X-Patchwork-Id: 1201285 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 47N2wj6j6jz9sSm for ; Wed, 27 Nov 2019 12:19:01 +1100 (AEDT) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.vnet.ibm.com Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 47N2wj5NlHzDqch for ; Wed, 27 Nov 2019 12:19:01 +1100 (AEDT) X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=linux.vnet.ibm.com (client-ip=148.163.158.5; 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Wed, 27 Nov 2019 01:09:39 +0000 (GMT) Received: from b03ledav006.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id CE93BC6059; Wed, 27 Nov 2019 01:09:38 +0000 (GMT) Received: from [9.70.82.143] (unknown [9.70.82.143]) by b03ledav006.gho.boulder.ibm.com (Postfix) with ESMTP; Wed, 27 Nov 2019 01:09:38 +0000 (GMT) Subject: [PATCH 06/14] powerpc/vas: Setup fault handler per VAS instance From: Haren Myneni To: linuxppc-dev@lists.ozlabs.org, devicetree@vger.kernel.org, mpe@ellerman.id.au, npiggin@gmail.com, mikey@neuling.org, herbert@gondor.apana.org.au Date: Tue, 26 Nov 2019 17:08:20 -0800 Message-ID: <1574816900.13250.12.camel@hbabu-laptop> Mime-Version: 1.0 X-Mailer: Evolution 2.28.3 X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95, 18.0.572 definitions=2019-11-26_08:2019-11-26, 2019-11-26 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 spamscore=0 mlxlogscore=999 lowpriorityscore=0 priorityscore=1501 impostorscore=0 mlxscore=0 malwarescore=0 adultscore=0 phishscore=0 suspectscore=2 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-1910280000 definitions=main-1911270007 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sukadev@linux.vnet.ibm.com Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" Fault handler is created as kernel thread for each VAS instance and invoked whenever NX generates page fault. This thread reads CRBs from fault FIFO and process them. Signed-off-by: Sukadev Bhattiprolu Signed-off-by: Haren Myneni --- arch/powerpc/platforms/powernv/vas-fault.c | 54 ++++++++++++++++++++++++++++++ arch/powerpc/platforms/powernv/vas.c | 7 ++++ arch/powerpc/platforms/powernv/vas.h | 6 ++++ 3 files changed, 67 insertions(+) diff --git a/arch/powerpc/platforms/powernv/vas-fault.c b/arch/powerpc/platforms/powernv/vas-fault.c index a5e63a5..c6c105c 100644 --- a/arch/powerpc/platforms/powernv/vas-fault.c +++ b/arch/powerpc/platforms/powernv/vas-fault.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include "vas.h" @@ -24,6 +25,54 @@ */ #define VAS_FAULT_WIN_FIFO_SIZE (4 << 20) +struct task_struct *fault_handler; + +void vas_wakeup_fault_handler(int virq, void *arg) +{ + struct vas_instance *vinst = arg; + + atomic_inc(&vinst->pending_fault); + wake_up(&vinst->fault_wq); +} + +/* + * Fault handler thread for each VAS instance and process fault CRBs. + */ +static int fault_handler_func(void *arg) +{ + struct vas_instance *vinst = (struct vas_instance *)arg; + + do { + if (signal_pending(current)) + flush_signals(current); + + wait_event_interruptible(vinst->fault_wq, + atomic_read(&vinst->pending_fault) || + kthread_should_stop()); + + if (kthread_should_stop()) + break; + + atomic_dec(&vinst->pending_fault); + } while (!kthread_should_stop()); + + return 0; +} + +/* + * Create a thread that processes the fault CRBs. + */ +int vas_setup_fault_handler(struct vas_instance *vinst) +{ + vinst->fault_handler = kthread_run(fault_handler_func, (void *)vinst, + "vas-fault-%u", vinst->vas_id); + + if (IS_ERR(vinst->fault_handler)) + return PTR_ERR(vinst->fault_handler); + + return 0; +} + /* * Fault window is opened per VAS instance. NX pastes fault CRB in fault * FIFO upon page faults. @@ -102,4 +151,9 @@ int vas_cleanup_fault_window(struct vas_instance *vinst) return rc; } + +void vas_cleanup_fault_handler(struct vas_instance *vinst) +{ + kthread_stop(vinst->fault_handler); +} #endif diff --git a/arch/powerpc/platforms/powernv/vas.c b/arch/powerpc/platforms/powernv/vas.c index dd0e06c..db2aca4 100644 --- a/arch/powerpc/platforms/powernv/vas.c +++ b/arch/powerpc/platforms/powernv/vas.c @@ -30,6 +30,7 @@ static irqreturn_t vas_irq_handler(int virq, void *data) struct vas_instance *vinst = data; pr_devel("VAS %d: virq %d\n", vinst->vas_id, virq); + vas_wakeup_fault_handler(virq, data); return IRQ_HANDLED; } @@ -54,6 +55,10 @@ static void vas_irq_fault_handle_setup(struct vas_instance *vinst) * for user space. */ rc = vas_setup_fault_window(vinst); + + if (!rc) + rc = vas_setup_fault_handler(vinst); + if (rc) { free_irq(vinst->virq, vinst); vinst->virq = 0; @@ -129,6 +134,8 @@ static int init_vas_instance(struct platform_device *pdev) } } + init_waitqueue_head(&vinst->fault_wq); + pr_devel("Initialized instance [%s, %d] paste_base 0x%llx paste_win_id_shift 0x%llx IRQ %d Port 0x%llx\n", pdev->name, vasid, vinst->paste_base_addr, vinst->paste_win_id_shift, vinst->virq, diff --git a/arch/powerpc/platforms/powernv/vas.h b/arch/powerpc/platforms/powernv/vas.h index e23fd69..ee284b3 100644 --- a/arch/powerpc/platforms/powernv/vas.h +++ b/arch/powerpc/platforms/powernv/vas.h @@ -317,6 +317,9 @@ struct vas_instance { int virq; int fault_fifo_size; void *fault_fifo; + atomic_t pending_fault; + wait_queue_head_t fault_wq; + struct task_struct *fault_handler; struct vas_window *fault_win; /* Fault window */ struct mutex mutex; @@ -414,6 +417,9 @@ struct vas_winctx { extern void vas_window_free_dbgdir(struct vas_window *win); extern int vas_setup_fault_window(struct vas_instance *vinst); extern int vas_cleanup_fault_window(struct vas_instance *vinst); +extern void vas_wakeup_fault_handler(int virq, void *arg); +extern int vas_setup_fault_handler(struct vas_instance *vinst); +extern void vas_cleanup_fault_handler(struct vas_instance *vinst); static inline void vas_log_write(struct vas_window *win, char *name, void *regptr, u64 val) From patchwork Wed Nov 27 01:09:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haren Myneni X-Patchwork-Id: 1201286 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 47N2z81dZPz9sSm for ; Wed, 27 Nov 2019 12:21:08 +1100 (AEDT) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.vnet.ibm.com Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 47N2z76dLmzDqch for ; Wed, 27 Nov 2019 12:21:07 +1100 (AEDT) X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=none (no SPF record) smtp.mailfrom=linux.vnet.ibm.com (client-ip=148.163.156.1; helo=mx0a-001b2d01.pphosted.com; envelope-from=haren@linux.vnet.ibm.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.vnet.ibm.com Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 47N2l95kpvzDqQK for ; Wed, 27 Nov 2019 12:10:45 +1100 (AEDT) Received: from pps.filterd (m0098396.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id xAR1951l043514; Tue, 26 Nov 2019 20:10:38 -0500 Received: from pps.reinject (localhost [127.0.0.1]) by mx0a-001b2d01.pphosted.com with ESMTP id 2whcxqunrg-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 26 Nov 2019 20:10:37 -0500 Received: from m0098396.ppops.net (m0098396.ppops.net [127.0.0.1]) by pps.reinject (8.16.0.36/8.16.0.36) with SMTP id xAR1AbWM047007; Tue, 26 Nov 2019 20:10:37 -0500 Received: from ppma01dal.us.ibm.com (83.d6.3fa9.ip4.static.sl-reverse.com [169.63.214.131]) by mx0a-001b2d01.pphosted.com with ESMTP id 2whcxqunrb-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 26 Nov 2019 20:10:37 -0500 Received: from pps.filterd (ppma01dal.us.ibm.com [127.0.0.1]) by ppma01dal.us.ibm.com (8.16.0.27/8.16.0.27) with SMTP id xAR1A3RV024508; Wed, 27 Nov 2019 01:10:36 GMT Received: from b01cxnp22035.gho.pok.ibm.com (b01cxnp22035.gho.pok.ibm.com [9.57.198.25]) by ppma01dal.us.ibm.com with ESMTP id 2wevd6rd1k-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 27 Nov 2019 01:10:36 +0000 Received: from b01ledav002.gho.pok.ibm.com (b01ledav002.gho.pok.ibm.com [9.57.199.107]) by b01cxnp22035.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id xAR1AZ6h41419078 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 27 Nov 2019 01:10:35 GMT Received: from b01ledav002.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 55E1A124052; Wed, 27 Nov 2019 01:10:35 +0000 (GMT) Received: from b01ledav002.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id A566F124053; Wed, 27 Nov 2019 01:10:34 +0000 (GMT) Received: from [9.70.82.143] (unknown [9.70.82.143]) by b01ledav002.gho.pok.ibm.com (Postfix) with ESMTP; Wed, 27 Nov 2019 01:10:34 +0000 (GMT) Subject: [PATCH 07/14] powerpc/vas: Read and process fault CRBs From: Haren Myneni To: linuxppc-dev@lists.ozlabs.org, devicetree@vger.kernel.org, mpe@ellerman.id.au, npiggin@gmail.com, mikey@neuling.org, herbert@gondor.apana.org.au Date: Tue, 26 Nov 2019 17:09:16 -0800 Message-ID: <1574816956.13250.13.camel@hbabu-laptop> Mime-Version: 1.0 X-Mailer: Evolution 2.28.3 X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95, 18.0.572 definitions=2019-11-26_08:2019-11-26, 2019-11-26 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=999 lowpriorityscore=0 phishscore=0 priorityscore=1501 impostorscore=0 mlxscore=0 malwarescore=0 suspectscore=0 spamscore=0 clxscore=1015 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-1910280000 definitions=main-1911270007 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sukadev@linux.vnet.ibm.com Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" NX pastes CRB in fault FIFO and generates interrupt whenever faults on CRB. OS reads CRBs from fault FIFO and process them by setting faulting address in fault_storge_addr in CRB and update CSB. When CSB status is changed, process sends NX request after touching the fault address. Signed-off-by: Sukadev Bhattiprolu Signed-off-by: Haren Myneni --- arch/powerpc/platforms/powernv/vas-fault.c | 81 +++++++++++++++++++++++++++++ arch/powerpc/platforms/powernv/vas-window.c | 51 ++++++++++++++++++ arch/powerpc/platforms/powernv/vas.h | 3 ++ 3 files changed, 135 insertions(+) diff --git a/arch/powerpc/platforms/powernv/vas-fault.c b/arch/powerpc/platforms/powernv/vas-fault.c index c6c105c..7a8b2b5 100644 --- a/arch/powerpc/platforms/powernv/vas-fault.c +++ b/arch/powerpc/platforms/powernv/vas-fault.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include "vas.h" @@ -36,6 +37,84 @@ void vas_wakeup_fault_handler(int virq, void *arg) } /* + * Process CRBs that we receive on the fault window. + */ +static void process_fault_crbs(struct vas_instance *vinst) +{ + void *fifo; + struct vas_window *window; + struct coprocessor_request_block buf; + struct coprocessor_request_block *crb; + u64 csb_addr; + + crb = &buf; + + /* + * VAS can interrupt with multiple page faults. So process all + * valid CRBs within fault FIFO until reaches invalid CRB. + * For valid CRBs, csb_addr should be valid address points to CSB + * section within CRB. After reading CRB entry, it is reset with + * 0's in fault FIFO. + * + * In case kernel receives another interrupt with different page + * fault and is processed by the previous handling, will be returned + * from this function when it sees invalid CRB (means 0's). + */ + do { + mutex_lock(&vinst->mutex); + + /* + * Advance the fault fifo pointer to next CRB. + * Use CRB_SIZE rather than sizeof(*crb) since the latter is + * aligned to CRB_ALIGN (256) but the CRB written to by VAS is + * only CRB_SIZE in len. + */ + fifo = vinst->fault_fifo + (vinst->fault_crbs * CRB_SIZE); + csb_addr = ((struct coprocessor_request_block *)fifo)->csb_addr; + + /* + * Return if reached invalid CRB. + */ + if (!csb_addr) { + mutex_unlock(&vinst->mutex); + return; + } + + vinst->fault_crbs++; + if (vinst->fault_crbs == vinst->fault_fifo_size/CRB_SIZE) + vinst->fault_crbs = 0; + + memcpy(crb, fifo, CRB_SIZE); + memset(fifo, 0, CRB_SIZE); + mutex_unlock(&vinst->mutex); + + pr_devel("VAS[%d] fault_fifo %p, fifo %p, fault_crbs %d pending %d\n", + vinst->vas_id, vinst->fault_fifo, fifo, + vinst->fault_crbs, + atomic_read(&vinst->pending_fault)); + + window = vas_pswid_to_window(vinst, crb_nx_pswid(crb)); + + if (IS_ERR(window)) { + /* + * What now? We got an interrupt about a specific send + * window but we can't find that window and we can't + * even clean it up (return credit). + * But we should not get here. + */ + pr_err("VAS[%d] fault_fifo %p, fifo %p, pswid 0x%x, fault_crbs %d, pending %d bad CRB?\n", + vinst->vas_id, vinst->fault_fifo, fifo, + crb_nx_pswid(crb), vinst->fault_crbs, + atomic_read(&vinst->pending_fault)); + + WARN_ON_ONCE(1); + return; + } + + } while (true); +} + +/* * Fault handler thread for each VAS instance and process fault CRBs. */ static int fault_handler_func(void *arg) @@ -54,6 +133,8 @@ static int fault_handler_func(void *arg) break; atomic_dec(&vinst->pending_fault); + process_fault_crbs(vinst); + } while (!kthread_should_stop()); return 0; diff --git a/arch/powerpc/platforms/powernv/vas-window.c b/arch/powerpc/platforms/powernv/vas-window.c index 5f1faeb..7fc1542 100644 --- a/arch/powerpc/platforms/powernv/vas-window.c +++ b/arch/powerpc/platforms/powernv/vas-window.c @@ -1294,3 +1294,54 @@ u32 vas_win_id(struct vas_window *win) return encode_pswid(win->vinst->vas_id, win->winid); } EXPORT_SYMBOL_GPL(vas_win_id); + +struct vas_window *vas_pswid_to_window(struct vas_instance *vinst, + uint32_t pswid) +{ + int winid; + struct vas_window *window; + + if (!pswid) { + pr_devel("%s: called for pswid 0!\n", __func__); + return ERR_PTR(-ESRCH); + } + + decode_pswid(pswid, NULL, &winid); + + if (winid >= VAS_WINDOWS_PER_CHIP) + return ERR_PTR(-ESRCH); + + /* + * If application closes the window before the hardware + * returns the fault CRB, we should wait in vas_win_close() + * for the pending requests. so the window must be active + * and the process alive. + * + * If its a kernel process, we should not get any faults and + * should not get here. + */ + window = vinst->windows[winid]; + + if (!window) { + pr_err("PSWID decode: Could not find window for winid %d pswid %d vinst 0x%p\n", + winid, pswid, vinst); + return NULL; + } + + /* + * Do some sanity checks on the decoded window. Window should be + * NX GZIP user send window. FTW windows should not incur faults + * since their CRBs are ignored (not queued on FIFO or processed + * by NX). + */ + if (!window->tx_win || !window->user_win || !window->nx_win || + window->cop == VAS_COP_TYPE_FAULT || + window->cop == VAS_COP_TYPE_FTW) { + pr_err("PSWID decode: id %d, tx %d, user %d, nx %d, cop %d\n", + winid, window->tx_win, window->user_win, + window->nx_win, window->cop); + WARN_ON(1); + } + + return window; +} diff --git a/arch/powerpc/platforms/powernv/vas.h b/arch/powerpc/platforms/powernv/vas.h index ee284b3..eb929c7 100644 --- a/arch/powerpc/platforms/powernv/vas.h +++ b/arch/powerpc/platforms/powernv/vas.h @@ -317,6 +317,7 @@ struct vas_instance { int virq; int fault_fifo_size; void *fault_fifo; + int fault_crbs; atomic_t pending_fault; wait_queue_head_t fault_wq; struct task_struct *fault_handler; @@ -420,6 +421,8 @@ struct vas_winctx { extern void vas_wakeup_fault_handler(int virq, void *arg); extern int vas_setup_fault_handler(struct vas_instance *vinst); extern void vas_cleanup_fault_handler(struct vas_instance *vinst); +extern struct vas_window *vas_pswid_to_window(struct vas_instance *vinst, + uint32_t pswid); static inline void vas_log_write(struct vas_window *win, char *name, void *regptr, u64 val) From patchwork Wed Nov 27 01:10:05 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haren Myneni X-Patchwork-Id: 1201287 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 47N31935GVz9sSn for ; Wed, 27 Nov 2019 12:22:53 +1100 (AEDT) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.vnet.ibm.com Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 47N3191yPPzDqlX for ; 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Wed, 27 Nov 2019 01:11:25 GMT Received: from b01ledav005.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 1BEE2AE060; Wed, 27 Nov 2019 01:11:25 +0000 (GMT) Received: from b01ledav005.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 5D17AAE05F; Wed, 27 Nov 2019 01:11:24 +0000 (GMT) Received: from [9.70.82.143] (unknown [9.70.82.143]) by b01ledav005.gho.pok.ibm.com (Postfix) with ESMTP; Wed, 27 Nov 2019 01:11:24 +0000 (GMT) Subject: [PATCH 08/14] powerpc/vas: Take reference to PID and mm for user space windows From: Haren Myneni To: linuxppc-dev@lists.ozlabs.org, devicetree@vger.kernel.org, mpe@ellerman.id.au, npiggin@gmail.com, mikey@neuling.org, herbert@gondor.apana.org.au Date: Tue, 26 Nov 2019 17:10:05 -0800 Message-ID: <1574817005.13250.14.camel@hbabu-laptop> Mime-Version: 1.0 X-Mailer: Evolution 2.28.3 X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95, 18.0.572 definitions=2019-11-26_08:2019-11-26, 2019-11-26 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 clxscore=1015 impostorscore=0 mlxlogscore=916 suspectscore=2 priorityscore=1501 spamscore=0 phishscore=0 lowpriorityscore=0 malwarescore=0 mlxscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-1910280000 definitions=main-1911270007 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sukadev@linux.vnet.ibm.com Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" Process close windows after its requests are completed. In multi-thread applications, child can open a window but release FD will not be called upon its exit. Parent thread will be closing it later upon its exit. The parent can also send NX requests with this window and NX can generate page faults. After kernel handles the page fault, send signal to process by using PID if CSB address is invalid. Parent thread will not receive signal since its PID is different from the one saved in vas_window. So use tgid in case if the task for the pid saved in window is not running and send signal to its parent. To prevent reusing the pid until the window closed, take reference to pid and task mm. Signed-off-by: Haren Myneni --- arch/powerpc/platforms/powernv/vas-debug.c | 2 +- arch/powerpc/platforms/powernv/vas-window.c | 44 ++++++++++++++++++++++++++--- arch/powerpc/platforms/powernv/vas.h | 14 ++++++++- 3 files changed, 54 insertions(+), 6 deletions(-) diff --git a/arch/powerpc/platforms/powernv/vas-debug.c b/arch/powerpc/platforms/powernv/vas-debug.c index 09e63df..ef9a717 100644 --- a/arch/powerpc/platforms/powernv/vas-debug.c +++ b/arch/powerpc/platforms/powernv/vas-debug.c @@ -38,7 +38,7 @@ static int info_show(struct seq_file *s, void *private) seq_printf(s, "Type: %s, %s\n", cop_to_str(window->cop), window->tx_win ? "Send" : "Receive"); - seq_printf(s, "Pid : %d\n", window->pid); + seq_printf(s, "Pid : %d\n", vas_window_pid(window)); unlock: mutex_unlock(&vas_mutex); diff --git a/arch/powerpc/platforms/powernv/vas-window.c b/arch/powerpc/platforms/powernv/vas-window.c index 7fc1542..ad3104c 100644 --- a/arch/powerpc/platforms/powernv/vas-window.c +++ b/arch/powerpc/platforms/powernv/vas-window.c @@ -12,6 +12,8 @@ #include #include #include +#include +#include #include #include #include "vas.h" @@ -887,8 +889,6 @@ struct vas_window *vas_rx_win_open(int vasid, enum vas_cop_type cop, rxwin->user_win = rxattr->user_win; rxwin->cop = cop; rxwin->wcreds_max = rxattr->wcreds_max ?: VAS_WCREDS_DEFAULT; - if (rxattr->user_win) - rxwin->pid = task_pid_vnr(current); init_winctx_for_rxwin(rxwin, rxattr, &winctx); init_winctx_regs(rxwin, &winctx); @@ -1037,7 +1037,6 @@ struct vas_window *vas_tx_win_open(int vasid, enum vas_cop_type cop, txwin->tx_win = 1; txwin->rxwin = rxwin; txwin->nx_win = txwin->rxwin->nx_win; - txwin->pid = attr->pid; txwin->user_win = attr->user_win; txwin->wcreds_max = attr->wcreds_max ?: VAS_WCREDS_DEFAULT; @@ -1079,6 +1078,34 @@ struct vas_window *vas_tx_win_open(int vasid, enum vas_cop_type cop, goto free_window; } + if (txwin->user_win) { + /* + * Window opened by child thread may not be closed when + * it exits. So take reference to its pid and release it + * when the window is free by parent thread. + * Acquire a reference to the task's pid to make sure + * pid will not be re-used. + */ + txwin->pid = get_task_pid(current, PIDTYPE_PID); + /* + * Acquire a reference to the task's mm. + */ + txwin->mm = get_task_mm(current); + + if (txwin->mm) { + mmput(txwin->mm); + mmgrab(txwin->mm); + mm_context_add_copro(txwin->mm); + } else { + put_pid(txwin->pid); + pr_err("VAS: pid(%d): mm_struct is not found\n", + current->pid); + rc = -EPERM; + goto free_window; + } + txwin->tgid = task_tgid_vnr(current); + } + set_vinst_win(vinst, txwin); return txwin; @@ -1277,8 +1304,17 @@ int vas_win_close(struct vas_window *window) poll_window_castout(window); /* if send window, drop reference to matching receive window */ - if (window->tx_win) + if (window->tx_win) { + if (window->user_win) { + /* Drop references to pid and mm */ + put_pid(window->pid); + if (window->mm) { + mmdrop(window->mm); + mm_context_remove_copro(window->mm); + } + } put_rx_win(window->rxwin); + } vas_window_free(window); diff --git a/arch/powerpc/platforms/powernv/vas.h b/arch/powerpc/platforms/powernv/vas.h index eb929c7..03a1c9f 100644 --- a/arch/powerpc/platforms/powernv/vas.h +++ b/arch/powerpc/platforms/powernv/vas.h @@ -343,7 +343,9 @@ struct vas_window { bool user_win; /* True if user space window */ void *hvwc_map; /* HV window context */ void *uwc_map; /* OS/User window context */ - pid_t pid; /* Linux process id of owner */ + struct pid *pid; /* Linux process id of owner */ + pid_t tgid; /* Thread group ID of owner */ + struct mm_struct *mm; /* Linux process mm_struct */ int wcreds_max; /* Window credits */ char *dbgname; @@ -424,6 +426,16 @@ struct vas_winctx { extern struct vas_window *vas_pswid_to_window(struct vas_instance *vinst, uint32_t pswid); +static inline int vas_window_pid(struct vas_window *window) +{ + return pid_vnr(window->pid); +} + +static inline int vas_window_tgid(struct vas_window *window) +{ + return window->tgid; +} + static inline void vas_log_write(struct vas_window *win, char *name, void *regptr, u64 val) {