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[68.189.91.139]) by smtp.gmail.com with ESMTPSA id a12sm23677734pfk.188.2019.11.18.17.12.20 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 18 Nov 2019 17:12:21 -0800 (PST) From: Tim Harvey To: u-boot@lists.denx.de Date: Mon, 18 Nov 2019 17:12:02 -0800 Message-Id: <1574125922-31259-1-git-send-email-tharvey@gateworks.com> X-Mailer: git-send-email 2.7.4 Cc: Stefan Roese Subject: [U-Boot] [RFC PATCH] spl: nand: use nand pagesize to fix loading FIT images X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The nand read functions are page-aligned to the writesize of the NAND device. This fixes loading non-page-aligned elements. I ran into this issue while trying to convert the IMX6 Gateworks Ventana board support to DM which requires NAND based FIT images to handle multiple DTB's. I'm not sure how anyone could be using NAND based FIT images without some sort of page size alignment other than the 1 byte in the current code. Note that the RAW NAND drivers deal with byte offsets/counts instead of sector offsets/counts like the blk devices but we are able to handle the conversion within spl_nand.c. Sending this as an RFC as I'm looking for the correct way to handle getting the mtd_info to find the page size. Certainly using get_nand_dev_by_index(0) is not the way to go as its not even implemented by many of the nand drivers. Signed-off-by: Tim Harvey --- common/spl/spl_nand.c | 14 +++++++++----- drivers/mtd/nand/raw/mxs_nand_spl.c | 4 ++++ 2 files changed, 13 insertions(+), 5 deletions(-) diff --git a/common/spl/spl_nand.c b/common/spl/spl_nand.c index 5f8a111..280ee3b 100644 --- a/common/spl/spl_nand.c +++ b/common/spl/spl_nand.c @@ -36,14 +36,16 @@ static int spl_nand_load_image(struct spl_image_info *spl_image, } #else -static ulong spl_nand_fit_read(struct spl_load_info *load, ulong offs, - ulong size, void *dst) +static ulong spl_nand_fit_read(struct spl_load_info *load, ulong page, + ulong pages, void *dst) { int ret; + ulong offs = page * load->bl_len; + ulong size = pages * load->bl_len; ret = nand_spl_load_image(offs, size, dst); if (!ret) - return size; + return pages; else return 0; } @@ -51,6 +53,7 @@ static ulong spl_nand_fit_read(struct spl_load_info *load, ulong offs, static int spl_nand_load_element(struct spl_image_info *spl_image, int offset, struct image_header *header) { + struct mtd_info *mtd = get_nand_dev_by_index(0); int err; err = nand_spl_load_image(offset, sizeof(*header), (void *)header); @@ -65,9 +68,10 @@ static int spl_nand_load_element(struct spl_image_info *spl_image, load.dev = NULL; load.priv = NULL; load.filename = NULL; - load.bl_len = 1; + load.bl_len = mtd->writesize; load.read = spl_nand_fit_read; - return spl_load_simple_fit(spl_image, &load, offset, header); + return spl_load_simple_fit(spl_image, &load, + offset / load.bl_len, header); } else if (IS_ENABLED(CONFIG_SPL_LOAD_IMX_CONTAINER)) { struct spl_load_info load; diff --git a/drivers/mtd/nand/raw/mxs_nand_spl.c b/drivers/mtd/nand/raw/mxs_nand_spl.c index 975a91a..222fa5c 100644 --- a/drivers/mtd/nand/raw/mxs_nand_spl.c +++ b/drivers/mtd/nand/raw/mxs_nand_spl.c @@ -11,6 +11,10 @@ static struct mtd_info *mtd; static struct nand_chip nand_chip; +struct mtd_info *get_nand_dev_by_index(int dev) { + return mtd; +} + static void mxs_nand_command(struct mtd_info *mtd, unsigned int command, int column, int page_addr) {