From patchwork Sun Nov 10 15:40:04 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 1192625 X-Patchwork-Delegate: van.freenix@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="L2SqLq9l"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 479yrz5bGcz9sP4 for ; Mon, 11 Nov 2019 02:40:49 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 17262C21E1E; Sun, 10 Nov 2019 15:40:39 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=FREEMAIL_FROM, RCVD_IN_MSPIKE_H2, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 34C09C21C4A; Sun, 10 Nov 2019 15:40:37 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 7D58FC21C4A; Sun, 10 Nov 2019 15:40:36 +0000 (UTC) Received: from mail-wr1-f68.google.com (mail-wr1-f68.google.com [209.85.221.68]) by lists.denx.de (Postfix) with ESMTPS id F3150C21C2C for ; Sun, 10 Nov 2019 15:40:35 +0000 (UTC) Received: by mail-wr1-f68.google.com with SMTP id a15so11959232wrf.9 for ; Sun, 10 Nov 2019 07:40:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=MWJ1gxysSvzuEQ66RH32kfZOOScOYsIRZ/1sc95F4CI=; b=L2SqLq9lDcloT9cWLJB49wBTZTGhVbvL082+sXvT9aXd8RCQoTtcir07Yn2+yxsHGX 6zQdWM9ODJAO3pWmsTg0Ybz2OeQmXoze6qgUvd2qIDPZcJswqp74MGXYeseFFYzJJQu0 kJ+L9Eu1HMWBbBUFHRpiNwMr5Hqj6tZOlLkJwuLB0vLbVcSiaGAWnWUH8Y0AsL9yVzgh sbcyLyJ6oIWGWOqZeHJ/Er/m+uNKvKZKOH+KXLnRdTImRqqBDb/VSvGO8Mq05ttFu3yh +ZnGTKWMr6M43giB1Hywpvuj9j+75NOYZsaUVlGKnkJ5owiHYj9xcdQG1LnVYRHFUGSo GhxA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=MWJ1gxysSvzuEQ66RH32kfZOOScOYsIRZ/1sc95F4CI=; b=VLfve1var5EV6keR4eTQFpLSQxAKEvOvwX7ayoo+XqMsWM6xBRJ3xEUk7g+q3oC0P0 kqSmKalTJeWxiHSwtT5yRzARYMwHSLajKO0jBY75nNsGBaiijVif4LIN5kvv+ciSnV0G W2Z0+OZ3PRB6UxSM4axNvl6DzkoWyEsKun8b9XkdBjr/NRfzU2U3kX/+J13zK5aUIVmK cGqzBzBGL6FXKQWLQqvYnHXYEUmxSs3XY4xqXAJeORSSCc8DTFjRouJy1+0tRXPtYNJT wMqEtg+raTUjNLec7Iy3+WQ7MysNFNQwcJnSwPehpxs7Ihet0kUQSlDY+2ISeOseGapn iV7Q== X-Gm-Message-State: APjAAAVSMz0/mxADCLrzPuXTn1GjhzAWtaLtNBgqnQxRSfHlqfmlGNm+ cBTef2vSh3G61rkdYARLFKpT0HQ5Xns= X-Google-Smtp-Source: APXvYqwZcM77xOFxlwMcaxtEzWNfbI+Xv43MnzS3UhA8BZLX4tbQE+k+woRyIWul7Lt+gZKCB/c4RQ== X-Received: by 2002:adf:f386:: with SMTP id m6mr11090482wro.201.1573400435099; Sun, 10 Nov 2019 07:40:35 -0800 (PST) Received: from chi.lan (p578adb1c.dip0.t-ipconnect.de. [87.138.219.28]) by smtp.gmail.com with ESMTPSA id v10sm24948918wmg.48.2019.11.10.07.40.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 10 Nov 2019 07:40:34 -0800 (PST) From: Marek Vasut X-Google-Original-From: Marek Vasut To: u-boot@lists.denx.de Date: Sun, 10 Nov 2019 16:40:04 +0100 Message-Id: <20191110154012.24603-1-marek.vasut+renesas@gmail.com> X-Mailer: git-send-email 2.24.0.rc1 MIME-Version: 1.0 Cc: Marek Vasut Subject: [U-Boot] [PATCH 1/9] mmc: tmio: sdhi: Track current tap number in private data X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Retain the tap number from last calibration in private data. This will be later used for SCC error checking after each command. Signed-off-by: Marek Vasut Cc: Masahiro Yamada --- drivers/mmc/renesas-sdhi.c | 31 ++++++++++++++++--------------- drivers/mmc/tmio-common.h | 1 + 2 files changed, 17 insertions(+), 15 deletions(-) diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c index 0cb65b480d..acc44e5b90 100644 --- a/drivers/mmc/renesas-sdhi.c +++ b/drivers/mmc/renesas-sdhi.c @@ -289,8 +289,7 @@ static unsigned int renesas_sdhi_compare_scc_data(struct tmio_sd_priv *priv) } static int renesas_sdhi_select_tuning(struct tmio_sd_priv *priv, - unsigned int tap_num, unsigned int taps, - unsigned int smpcmp) + unsigned int taps, unsigned int smpcmp) { unsigned long tap_cnt; /* counter of tuning success */ unsigned long tap_start;/* start position of tuning success */ @@ -307,14 +306,14 @@ static int renesas_sdhi_select_tuning(struct tmio_sd_priv *priv, tmio_sd_writel(priv, 0, RENESAS_SDHI_SCC_RVSREQ); /* Merge the results */ - for (i = 0; i < tap_num * 2; i++) { + for (i = 0; i < priv->tap_num * 2; i++) { if (!(taps & BIT(i))) { - taps &= ~BIT(i % tap_num); - taps &= ~BIT((i % tap_num) + tap_num); + taps &= ~BIT(i % priv->tap_num); + taps &= ~BIT((i % priv->tap_num) + priv->tap_num); } if (!(smpcmp & BIT(i))) { - smpcmp &= ~BIT(i % tap_num); - smpcmp &= ~BIT((i % tap_num) + tap_num); + smpcmp &= ~BIT(i % priv->tap_num); + smpcmp &= ~BIT((i % priv->tap_num) + priv->tap_num); } } @@ -327,7 +326,7 @@ static int renesas_sdhi_select_tuning(struct tmio_sd_priv *priv, ntap = 0; tap_start = 0; tap_end = 0; - for (i = 0; i < tap_num * 2; i++) { + for (i = 0; i < priv->tap_num * 2; i++) { if (taps & BIT(i)) ntap++; else { @@ -350,12 +349,12 @@ static int renesas_sdhi_select_tuning(struct tmio_sd_priv *priv, * If all of the TAP is OK, the sampling clock position is selected by * identifying the change point of data. */ - if (tap_cnt == tap_num * 2) { + if (tap_cnt == priv->tap_num * 2) { match_cnt = 0; ntap = 0; tap_start = 0; tap_end = 0; - for (i = 0; i < tap_num * 2; i++) { + for (i = 0; i < priv->tap_num * 2; i++) { if (smpcmp & BIT(i)) ntap++; else { @@ -378,7 +377,7 @@ static int renesas_sdhi_select_tuning(struct tmio_sd_priv *priv, select = true; if (select) - priv->tap_set = ((tap_start + tap_end) / 2) % tap_num; + priv->tap_set = ((tap_start + tap_end) / 2) % priv->tap_num; else return -EIO; @@ -419,15 +418,17 @@ int renesas_sdhi_execute_tuning(struct udevice *dev, uint opcode) /* Tuning is not supported */ goto out; - if (tap_num * 2 >= sizeof(taps) * 8) { + priv->tap_num = tap_num; + + if (priv->tap_num * 2 >= sizeof(taps) * 8) { dev_err(dev, "Too many taps, skipping tuning. Please consider updating size of taps field of tmio_mmc_host\n"); goto out; } /* Issue CMD19 twice for each tap */ - for (i = 0; i < 2 * tap_num; i++) { - renesas_sdhi_prepare_tuning(priv, i % tap_num); + for (i = 0; i < 2 * priv->tap_num; i++) { + renesas_sdhi_prepare_tuning(priv, i % priv->tap_num); /* Force PIO for the tuning */ caps = priv->caps; @@ -447,7 +448,7 @@ int renesas_sdhi_execute_tuning(struct udevice *dev, uint opcode) mdelay(1); } - ret = renesas_sdhi_select_tuning(priv, tap_num, taps, smpcmp); + ret = renesas_sdhi_select_tuning(priv, taps, smpcmp); out: if (ret < 0) { diff --git a/drivers/mmc/tmio-common.h b/drivers/mmc/tmio-common.h index 51607de142..da89cc90c2 100644 --- a/drivers/mmc/tmio-common.h +++ b/drivers/mmc/tmio-common.h @@ -138,6 +138,7 @@ struct tmio_sd_priv { #endif #if CONFIG_IS_ENABLED(RENESAS_SDHI) u8 tap_set; + u8 tap_num; u8 nrtaps; bool needs_adjust_hs400; bool adjust_hs400_enable; From patchwork Sun Nov 10 15:40:05 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 1192631 X-Patchwork-Delegate: van.freenix@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="KQt2zd+u"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 479yvd3qZfz9sPJ for ; Mon, 11 Nov 2019 02:43:09 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 38F55C21E47; Sun, 10 Nov 2019 15:41:00 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=FREEMAIL_FROM, RCVD_IN_MSPIKE_H2, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 30020C21E16; Sun, 10 Nov 2019 15:40:48 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 7DBB2C21DD7; Sun, 10 Nov 2019 15:40:40 +0000 (UTC) Received: from mail-wm1-f68.google.com (mail-wm1-f68.google.com [209.85.128.68]) by lists.denx.de (Postfix) with ESMTPS id 5FF27C21C8B for ; Sun, 10 Nov 2019 15:40:37 +0000 (UTC) Received: by mail-wm1-f68.google.com with SMTP id t26so10797974wmi.4 for ; Sun, 10 Nov 2019 07:40:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=eFzw7Fk/OWSxiqCaG+RNOkMsPHBeUjRrg2U4C3H41dY=; b=KQt2zd+ub/aweU9HZFvaw6BH2DfF3JjBXy9zc59hQy7SJEsIyYa7UqEORt7oyu/i1A 4Nvnx7zGbbXsh51poshu7eFffbIrA/ytyb/L8V5V9TvA4SHBSwvjrERLsGTRYqNeXZHv yQKq6Bqt0gO2ZJU+OSj1jcr+tJYp2A8/dlIdAP1j0ltyUy30Z5SSlwyLOmtZ+N2Bj9g2 +JID9mJTmWn1PA9Uo2pIfKvC7skY2YCdxGBbasMdZN79ADonGTdwKNi5wefQDeCQNiOR j0Z6MxfJbNOa2Zk1o1HqG99GRnw9qFbrC/RV7vUBlmbm1nxbBfcfQ9l6lK+NDRC5kMor MSlQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=eFzw7Fk/OWSxiqCaG+RNOkMsPHBeUjRrg2U4C3H41dY=; b=BLo6Uk/2F+qf7+WwvzsolD5kEueyFqSQgVTDprv9j63xJycI+rdiWnW1boYOVSRQrq MRdlMbmsw1QZVsFdLPZULwqsUW8peGyy2J1cY5r/clF85+E7cwj6IKdHB74mEj42y5Sb BgxNEipHOTr2IF7tJ60ISjecTsStehYEA/pBjMQve0t48yl2zwlLzRfKQP5toS6qxio3 g5DnlyI2orm4nyq29TQGh2cJNEA00fSZVLRPOvPnwpSeJflSh1vZauNwwzEwgobY8UXP Q+WTFTFXZknA7vCNM4mOxAozZuXOrqo35X/o34Seu1mgBQPUxGvm39Y50z67pDPfKUI7 JTXw== X-Gm-Message-State: APjAAAXsaUHsFYOC7GJn19Ey+mZJ4FS434nvLJ4QgigMskIvQKNzlNbC MoSGyZ+cc4OUNAJPT3PaAfXrX+Nnwj0= X-Google-Smtp-Source: APXvYqy9CNQL0yP00K+g9gBnu0KMQjsnNkNqeM0akV9BCllBUyBAbzZJxO7B7V5rwKeJWMGULNfnPA== X-Received: by 2002:a1c:a4c5:: with SMTP id n188mr16445332wme.30.1573400436591; Sun, 10 Nov 2019 07:40:36 -0800 (PST) Received: from chi.lan (p578adb1c.dip0.t-ipconnect.de. [87.138.219.28]) by smtp.gmail.com with ESMTPSA id v10sm24948918wmg.48.2019.11.10.07.40.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 10 Nov 2019 07:40:35 -0800 (PST) From: Marek Vasut X-Google-Original-From: Marek Vasut To: u-boot@lists.denx.de Date: Sun, 10 Nov 2019 16:40:05 +0100 Message-Id: <20191110154012.24603-2-marek.vasut+renesas@gmail.com> X-Mailer: git-send-email 2.24.0.rc1 In-Reply-To: <20191110154012.24603-1-marek.vasut+renesas@gmail.com> References: <20191110154012.24603-1-marek.vasut+renesas@gmail.com> MIME-Version: 1.0 Cc: Marek Vasut Subject: [U-Boot] [PATCH 2/9] mmc: tmio: sdhi: Track SMPCMP valu in private data X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Retain the SMPCMP value from last calibration in private data. This will be later used for skipping bad taps. Signed-off-by: Marek Vasut Cc: Masahiro Yamada --- drivers/mmc/renesas-sdhi.c | 18 ++++++++++-------- drivers/mmc/tmio-common.h | 1 + 2 files changed, 11 insertions(+), 8 deletions(-) diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c index acc44e5b90..2f34173d03 100644 --- a/drivers/mmc/renesas-sdhi.c +++ b/drivers/mmc/renesas-sdhi.c @@ -289,7 +289,7 @@ static unsigned int renesas_sdhi_compare_scc_data(struct tmio_sd_priv *priv) } static int renesas_sdhi_select_tuning(struct tmio_sd_priv *priv, - unsigned int taps, unsigned int smpcmp) + unsigned int taps) { unsigned long tap_cnt; /* counter of tuning success */ unsigned long tap_start;/* start position of tuning success */ @@ -311,9 +311,9 @@ static int renesas_sdhi_select_tuning(struct tmio_sd_priv *priv, taps &= ~BIT(i % priv->tap_num); taps &= ~BIT((i % priv->tap_num) + priv->tap_num); } - if (!(smpcmp & BIT(i))) { - smpcmp &= ~BIT(i % priv->tap_num); - smpcmp &= ~BIT((i % priv->tap_num) + priv->tap_num); + if (!(priv->smpcmp & BIT(i))) { + priv->smpcmp &= ~BIT(i % priv->tap_num); + priv->smpcmp &= ~BIT((i % priv->tap_num) + priv->tap_num); } } @@ -355,7 +355,7 @@ static int renesas_sdhi_select_tuning(struct tmio_sd_priv *priv, tap_start = 0; tap_end = 0; for (i = 0; i < priv->tap_num * 2; i++) { - if (smpcmp & BIT(i)) + if (priv->smpcmp & BIT(i)) ntap++; else { if (ntap > match_cnt) { @@ -398,7 +398,7 @@ int renesas_sdhi_execute_tuning(struct udevice *dev, uint opcode) struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); struct mmc *mmc = upriv->mmc; unsigned int tap_num; - unsigned int taps = 0, smpcmp = 0; + unsigned int taps = 0; int i, ret = 0; u32 caps; @@ -426,6 +426,8 @@ int renesas_sdhi_execute_tuning(struct udevice *dev, uint opcode) goto out; } + priv->smpcmp = 0; + /* Issue CMD19 twice for each tap */ for (i = 0; i < 2 * priv->tap_num; i++) { renesas_sdhi_prepare_tuning(priv, i % priv->tap_num); @@ -443,12 +445,12 @@ int renesas_sdhi_execute_tuning(struct udevice *dev, uint opcode) ret = renesas_sdhi_compare_scc_data(priv); if (ret == 0) - smpcmp |= BIT(i); + priv->smpcmp |= BIT(i); mdelay(1); } - ret = renesas_sdhi_select_tuning(priv, taps, smpcmp); + ret = renesas_sdhi_select_tuning(priv, taps); out: if (ret < 0) { diff --git a/drivers/mmc/tmio-common.h b/drivers/mmc/tmio-common.h index da89cc90c2..79f51d21af 100644 --- a/drivers/mmc/tmio-common.h +++ b/drivers/mmc/tmio-common.h @@ -137,6 +137,7 @@ struct tmio_sd_priv { struct clk clk; #endif #if CONFIG_IS_ENABLED(RENESAS_SDHI) + unsigned int smpcmp; u8 tap_set; u8 tap_num; u8 nrtaps; From patchwork Sun Nov 10 15:40:06 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 1192629 X-Patchwork-Delegate: van.freenix@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; 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[87.138.219.28]) by smtp.gmail.com with ESMTPSA id v10sm24948918wmg.48.2019.11.10.07.40.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 10 Nov 2019 07:40:36 -0800 (PST) From: Marek Vasut X-Google-Original-From: Marek Vasut To: u-boot@lists.denx.de Date: Sun, 10 Nov 2019 16:40:06 +0100 Message-Id: <20191110154012.24603-3-marek.vasut+renesas@gmail.com> X-Mailer: git-send-email 2.24.0.rc1 In-Reply-To: <20191110154012.24603-1-marek.vasut+renesas@gmail.com> References: <20191110154012.24603-1-marek.vasut+renesas@gmail.com> MIME-Version: 1.0 Cc: Marek Vasut Subject: [U-Boot] [PATCH 3/9] mmc: tmio: sdhi: Use 4 tuning taps on M3W up to ES1.2 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The M3W up to ES1.2 uses 4 tuning taps for HS400, make it so. Signed-off-by: Marek Vasut Cc: Masahiro Yamada --- drivers/mmc/renesas-sdhi.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c index 2f34173d03..3f20a690a2 100644 --- a/drivers/mmc/renesas-sdhi.c +++ b/drivers/mmc/renesas-sdhi.c @@ -622,9 +622,12 @@ static void renesas_sdhi_filter_caps(struct udevice *dev) priv->adjust_hs400_calibrate = 0x2; } - /* H3 ES2.0 uses 4 tuning taps */ - if ((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7795) && - (rmobile_get_cpu_rev_integer() == 2)) + /* H3 ES1.x, ES2.0 and M3W ES1.0, ES1.1, ES1.2 uses 4 tuning taps */ + if (((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7795) && + (rmobile_get_cpu_rev_integer() <= 2)) || + ((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) && + (rmobile_get_cpu_rev_integer() == 1) && + (rmobile_get_cpu_rev_fraction() <= 2))) priv->nrtaps = 4; else priv->nrtaps = 8; From patchwork Sun Nov 10 15:40:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 1192626 X-Patchwork-Delegate: van.freenix@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="N/PS16BI"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 479ysR2Jh1z9sP4 for ; Mon, 11 Nov 2019 02:41:15 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id C2E7BC21E1D; Sun, 10 Nov 2019 15:40:51 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=FREEMAIL_FROM, RCVD_IN_MSPIKE_H2, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 9FF8DC21DA2; Sun, 10 Nov 2019 15:40:46 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id E929AC21C50; Sun, 10 Nov 2019 15:40:42 +0000 (UTC) Received: from mail-wr1-f68.google.com (mail-wr1-f68.google.com [209.85.221.68]) by lists.denx.de (Postfix) with ESMTPS id 8B3C7C21C4A for ; Sun, 10 Nov 2019 15:40:39 +0000 (UTC) Received: by mail-wr1-f68.google.com with SMTP id a15so11959320wrf.9 for ; Sun, 10 Nov 2019 07:40:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=LVD68YET0FjM7b8kHRJCPHN/SWefWcPrGPSdZOZdIhc=; b=N/PS16BIOaYYWTij6rS32zzncO9mtnADFWFm2VZLK3fv68zpSq4xW5pzHpcSLZ2LIf jBi7RYTOzTAgGV8qu7tlCANY29mi51ll43zRg8BqkEcyXP+zeaM1oK6AgR121D7WO0iD TSavisa0MBcv1Ju8b00mwmiqjno4VoM/YK7uTp8Y+3/xIwBgtjIJBsLtZyHKWfjtMZeL O3xk4Pr5QwIlXR4yIuAYfmTUhYpHzo88QVdUo212R6H3pdiwLesdeXA6bxfhi1wv8naQ E8vOH4MN7Dlh3P06cIOwfurF9AFEFACI9IVFqkNw7DGEowKgdUq2q8eSQXpVKKQ7apJn EBzg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=LVD68YET0FjM7b8kHRJCPHN/SWefWcPrGPSdZOZdIhc=; b=BsAZSGWRlX50NCy8AcqW1qIFtX0NWKLvMvRtyRS+LqvvCu9K+C0fXtp/S89FhhqL/Z y4ssvXiyAI+gUWI3lWkKHUaeSDNAoLVDvYL77zU4PnLJ9MkZHaYXTjRejJipmLh6cqla AqY9dERzhB3+klGVcopKs8flV0K4XRdVWeMWhlCz7NABI3zVLIYq5xm8RqQy/BHwrJ6V tkHyuwFuL7Y7jiPuxOAof7egEpnB7aNyXkc3h8bopENCG01G4uufFGfklqlxMf6Cz/JS JBR4btfC31E31c9dsTydD/eMcTxMSbStFcqOMIXjtvgwwfvMxg6QnELTYgzmoZfF0gPT 269Q== X-Gm-Message-State: APjAAAVIJM0Z0v0WnQTRt0I5cxuCICEh/0IyJxYVH+/QuBPXieHCrjgM M7bDdTW9xEZYx3RlvPNLb/mR5jfO+Og= X-Google-Smtp-Source: APXvYqz/O466NQu4h/vWj06h9qB0VGla8SAdCxSqS9asWuZ2yqLk6pTn6NIcexBowJktEfENH/pNUg== X-Received: by 2002:a5d:4d4a:: with SMTP id a10mr17978379wru.35.1573400438908; Sun, 10 Nov 2019 07:40:38 -0800 (PST) Received: from chi.lan (p578adb1c.dip0.t-ipconnect.de. [87.138.219.28]) by smtp.gmail.com with ESMTPSA id v10sm24948918wmg.48.2019.11.10.07.40.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 10 Nov 2019 07:40:38 -0800 (PST) From: Marek Vasut X-Google-Original-From: Marek Vasut To: u-boot@lists.denx.de Date: Sun, 10 Nov 2019 16:40:07 +0100 Message-Id: <20191110154012.24603-4-marek.vasut+renesas@gmail.com> X-Mailer: git-send-email 2.24.0.rc1 In-Reply-To: <20191110154012.24603-1-marek.vasut+renesas@gmail.com> References: <20191110154012.24603-1-marek.vasut+renesas@gmail.com> MIME-Version: 1.0 Cc: Marek Vasut Subject: [U-Boot] [PATCH 4/9] mmc: tmio: sdhi: Adjust DT2FF settings for HS400 mode X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Adjust the DT2FF offsets in HS400 according to latest information from the chip vendor. Signed-off-by: Marek Vasut Cc: Masahiro Yamada --- drivers/mmc/renesas-sdhi.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c index 3f20a690a2..8c96e5c8a4 100644 --- a/drivers/mmc/renesas-sdhi.c +++ b/drivers/mmc/renesas-sdhi.c @@ -253,13 +253,13 @@ static int renesas_sdhi_hs400(struct udevice *dev) if (taps == 4) { tmio_sd_writel(priv, priv->tap_set >> 1, RENESAS_SDHI_SCC_TAPSET); + tmio_sd_writel(priv, hs400 ? 0x100 : 0x300, + RENESAS_SDHI_SCC_DT2FF); } else { tmio_sd_writel(priv, priv->tap_set, RENESAS_SDHI_SCC_TAPSET); + tmio_sd_writel(priv, 0x300, RENESAS_SDHI_SCC_DT2FF); } - tmio_sd_writel(priv, hs400 ? 0x704 : 0x300, - RENESAS_SDHI_SCC_DT2FF); - reg = tmio_sd_readl(priv, RENESAS_SDHI_SCC_CKSEL); reg |= RENESAS_SDHI_SCC_CKSEL_DTSEL; tmio_sd_writel(priv, reg, RENESAS_SDHI_SCC_CKSEL); From patchwork Sun Nov 10 15:40:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 1192627 X-Patchwork-Delegate: van.freenix@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="Id2T1U8F"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 479ytK2WDHz9sP4 for ; Mon, 11 Nov 2019 02:42:01 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 0F33DC21DFA; Sun, 10 Nov 2019 15:41:43 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=FREEMAIL_FROM, RCVD_IN_MSPIKE_H2, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id D8C88C21E07; Sun, 10 Nov 2019 15:41:38 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id DB84BC21E0B; Sun, 10 Nov 2019 15:40:43 +0000 (UTC) Received: from mail-wr1-f67.google.com (mail-wr1-f67.google.com [209.85.221.67]) by lists.denx.de (Postfix) with ESMTPS id C8A98C21E36 for ; Sun, 10 Nov 2019 15:40:40 +0000 (UTC) Received: by mail-wr1-f67.google.com with SMTP id i12so5073846wro.5 for ; Sun, 10 Nov 2019 07:40:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=P5o+o7XsGtcEJ33QuyAO9ksz7XLOlJy/3pTfL7mMscM=; b=Id2T1U8FNlPibCZPoqX0AlgOuIaDmJFB4XfATfonG+XHzZgEXdHrCwXu69Fk3mauZo NNy5IdlURP3fl+lGrhBoiWWUUfCZESFabvdAjCZpDNanysGFEFA+fGmpc9uOJJ75cDjD Unmewz0I2e4KYEsrs3VYcy9G1aLZZrNdwWPiLwqacq24YtUy/OuahTyfQzIAq0GvtX5n td2jyEOW40zAS28QSBRrIi8Mruw+/oSmqJoHZWALLpVUTk3tYpyD8sT0ObpV31T7i8r9 lFvsVmBpwqnC82JjvzlC/qySU8i6og1CZqrpxG+PaRV8izW4+15KS3mJ7/PsT4XilNsY khgw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=P5o+o7XsGtcEJ33QuyAO9ksz7XLOlJy/3pTfL7mMscM=; b=evthfe/93tEroHY1iGe5loPR+++RHIiwZjoqhPw4n7AUBZDTRfaRgfhk5/TT4K43vF kVMHpctXG76FCVN0KQb0nuMasj2J8hOahe+bulqCEjkAlMOyb89EMiV3gOmeA1AN2utQ BdPdMjgeCcjNDP1KYteRIGsocgrb5HK23/aLl+gFkpkqoZoPDNyzuVR79WerFOCW3AR9 dgP7EGev8txEvtJ+yC7gSMCSVcKcV6YU0d0Se+ThcZTjdojccRkBq4GmRUy4sS4t08sD FK2u5b9a8SVtlNxj2jR8RexDmL7GIK6J/kA3QPqjMvNipuCM/W1ttQAM7YyDxQ+hXlu5 x/jg== X-Gm-Message-State: APjAAAWZJt/Et/Qaw+wvhmh1KIsbvgZCXZDuAleGDvLj5VBkUn7Df7ym Y0G5kw60Srg6TuequlVfcKZ8PzFmXmY= X-Google-Smtp-Source: APXvYqzusbjgWm4fdbnjsB54AAuz56Ioo5RRct5fXEK/fB5I/NskcDRMPq5RlTCBW+Z3S3DyXMQZBg== X-Received: by 2002:a5d:694d:: with SMTP id r13mr16254575wrw.395.1573400440149; Sun, 10 Nov 2019 07:40:40 -0800 (PST) Received: from chi.lan (p578adb1c.dip0.t-ipconnect.de. [87.138.219.28]) by smtp.gmail.com with ESMTPSA id v10sm24948918wmg.48.2019.11.10.07.40.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 10 Nov 2019 07:40:39 -0800 (PST) From: Marek Vasut X-Google-Original-From: Marek Vasut To: u-boot@lists.denx.de Date: Sun, 10 Nov 2019 16:40:08 +0100 Message-Id: <20191110154012.24603-5-marek.vasut+renesas@gmail.com> X-Mailer: git-send-email 2.24.0.rc1 In-Reply-To: <20191110154012.24603-1-marek.vasut+renesas@gmail.com> References: <20191110154012.24603-1-marek.vasut+renesas@gmail.com> MIME-Version: 1.0 Cc: Marek Vasut Subject: [U-Boot] [PATCH 5/9] mmc: tmio: sdhi: Adjust HS400 calibration offsets X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Adjust the TMPPORT3 offsets according to the latest information from the chip vendor. Signed-off-by: Marek Vasut Cc: Masahiro Yamada --- drivers/mmc/renesas-sdhi.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c index 8c96e5c8a4..79672653ff 100644 --- a/drivers/mmc/renesas-sdhi.c +++ b/drivers/mmc/renesas-sdhi.c @@ -604,22 +604,22 @@ static void renesas_sdhi_filter_caps(struct udevice *dev) (rmobile_get_cpu_rev_integer() == 1) && (rmobile_get_cpu_rev_fraction() > 2)) { priv->adjust_hs400_enable = true; - priv->adjust_hs400_offset = 0; + priv->adjust_hs400_offset = 3; priv->adjust_hs400_calibrate = 0x9; } /* M3N can use HS400 with manual adjustment */ if (rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77965) { priv->adjust_hs400_enable = true; - priv->adjust_hs400_offset = 0; + priv->adjust_hs400_offset = 3; priv->adjust_hs400_calibrate = 0x0; } /* E3 can use HS400 with manual adjustment */ if (rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77990) { priv->adjust_hs400_enable = true; - priv->adjust_hs400_offset = 0; - priv->adjust_hs400_calibrate = 0x2; + priv->adjust_hs400_offset = 3; + priv->adjust_hs400_calibrate = 0x4; } /* H3 ES1.x, ES2.0 and M3W ES1.0, ES1.1, ES1.2 uses 4 tuning taps */ From patchwork Sun Nov 10 15:40:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 1192633 X-Patchwork-Delegate: van.freenix@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="HverSW5S"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 479yxc3dvMz9sP4 for ; Mon, 11 Nov 2019 02:44:52 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 05F13C21E76; Sun, 10 Nov 2019 15:42:08 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=FREEMAIL_FROM, RCVD_IN_MSPIKE_H2, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id EE31AC21E07; Sun, 10 Nov 2019 15:41:51 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 5E605C21E2F; Sun, 10 Nov 2019 15:40:44 +0000 (UTC) Received: from mail-wm1-f65.google.com (mail-wm1-f65.google.com [209.85.128.65]) by lists.denx.de (Postfix) with ESMTPS id F0C18C21D74 for ; Sun, 10 Nov 2019 15:40:41 +0000 (UTC) Received: by mail-wm1-f65.google.com with SMTP id t26so10798092wmi.4 for ; Sun, 10 Nov 2019 07:40:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=JYk7BN2nIveyQcvXt5evMMOpRCOBgitme3atdhkisCA=; b=HverSW5ScVNJgbLc8pnzLuTYXBQkN5JvhhVM8cqs/B5jfP1xSxSOAnX4ynszrqfv1u x2F9kr3Kt59r0wHv3E4G7C/9Pmfii3aBxVu2KVjSDN3lXedPfO3SRFobSjhSV21V4NDl WJrtPE/pp32SGj/fbg5JHUBYGBnxZo4a+R6YxrXyHYsk0clFx+U1JXTRjQepm/ag1rP9 JqVktgIJ99lFPSr934v3guod/fczyg6jBXwvFYkKzAe0C1dED4x8F36WHlNZnHfxYhAU k46p4dtAcpmAbN8eZ2YSWXqjHhTQmqKG5pTD2r1ZBH5oA5hW0pLiSKOM/Z4EddEAP2bN LHtg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=JYk7BN2nIveyQcvXt5evMMOpRCOBgitme3atdhkisCA=; b=QPwkDUU6RMEcO0huX1TIrBgtKUrXHAdS1hLkI/R6CHdCnSvth9vx8B1QRiaokxM8wS pOA8kiwvAr7mgNsPMJlj8XXKJhORojgAIvhQz3GALAWEHVVxYjaRhSXksxXxMXoTtyL/ As6NO6pm6WpGnUcQNkKuS+aGAtbqiUBAebIL6AV+/+slu4orRcQ+vM1lnDmHYwLcpetq Ls4azhvcuNT0nt/hxzG3y7sEANYy29vpq+eqMU5zWwO0Ulx48KIP9icZatx40QsNlwij nIf25DFnu42PxmRPmPvblDpkce0in6ImW7fk6hktrkkriQyqAar2y4O9aQE0m2sb1dZ6 12bg== X-Gm-Message-State: APjAAAU1sB2xjYSgeKCciFZVt+wFNylyDGGMTMDAR2eHdJimNTXS3Lfz KoQGT1p/UHDXzf/7XiH/aQ+cQxo7wnU= X-Google-Smtp-Source: APXvYqzqmQsij3T0DTkLa5EZjE3xfrr4Qe+jSAjW166KTgzKwvCyuq7nr+6VvD0Bmwi0Pme6Pjx9Jg== X-Received: by 2002:a1c:2b82:: with SMTP id r124mr16948682wmr.112.1573400441287; Sun, 10 Nov 2019 07:40:41 -0800 (PST) Received: from chi.lan (p578adb1c.dip0.t-ipconnect.de. [87.138.219.28]) by smtp.gmail.com with ESMTPSA id v10sm24948918wmg.48.2019.11.10.07.40.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 10 Nov 2019 07:40:40 -0800 (PST) From: Marek Vasut X-Google-Original-From: Marek Vasut To: u-boot@lists.denx.de Date: Sun, 10 Nov 2019 16:40:09 +0100 Message-Id: <20191110154012.24603-6-marek.vasut+renesas@gmail.com> X-Mailer: git-send-email 2.24.0.rc1 In-Reply-To: <20191110154012.24603-1-marek.vasut+renesas@gmail.com> References: <20191110154012.24603-1-marek.vasut+renesas@gmail.com> MIME-Version: 1.0 Cc: Marek Vasut Subject: [U-Boot] [PATCH 6/9] mmc: tmio: sdhi: Disable auto-retuning in HS400 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Disable the auto-retuning in HS400 mode in favor of manual calibration. Signed-off-by: Marek Vasut Cc: Masahiro Yamada --- drivers/mmc/renesas-sdhi.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c index 79672653ff..8c690a27b2 100644 --- a/drivers/mmc/renesas-sdhi.c +++ b/drivers/mmc/renesas-sdhi.c @@ -229,7 +229,9 @@ static int renesas_sdhi_hs400(struct udevice *dev) if (ret < 0) return ret; - tmio_sd_writel(priv, 0, RENESAS_SDHI_SCC_RVSREQ); + reg = tmio_sd_readl(priv, RENESAS_SDHI_SCC_RVSCNTL); + reg &= ~RENESAS_SDHI_SCC_RVSCNTL_RVSEN; + tmio_sd_writel(priv, reg, RENESAS_SDHI_SCC_RVSCNTL); reg = tmio_sd_readl(priv, RENESAS_SDHI_SCC_TMPPORT2); if (hs400) { @@ -264,10 +266,6 @@ static int renesas_sdhi_hs400(struct udevice *dev) reg |= RENESAS_SDHI_SCC_CKSEL_DTSEL; tmio_sd_writel(priv, reg, RENESAS_SDHI_SCC_CKSEL); - reg = tmio_sd_readl(priv, RENESAS_SDHI_SCC_RVSCNTL); - reg |= RENESAS_SDHI_SCC_RVSCNTL_RVSEN; - tmio_sd_writel(priv, reg, RENESAS_SDHI_SCC_RVSCNTL); - /* Execute adjust hs400 offset after setting to HS400 mode */ if (hs400) priv->needs_adjust_hs400 = true; From patchwork Sun Nov 10 15:40:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 1192628 X-Patchwork-Delegate: van.freenix@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="UD5O8Tbn"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 479ytz0f3Yz9sPJ for ; Mon, 11 Nov 2019 02:42:35 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id C1C32C21E9F; Sun, 10 Nov 2019 15:41:32 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=FREEMAIL_FROM, RCVD_IN_MSPIKE_H2, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id E3680C21E08; Sun, 10 Nov 2019 15:41:19 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 18649C21C2C; Sun, 10 Nov 2019 15:40:45 +0000 (UTC) Received: from mail-wr1-f68.google.com (mail-wr1-f68.google.com [209.85.221.68]) by lists.denx.de (Postfix) with ESMTPS id E806CC21E02 for ; Sun, 10 Nov 2019 15:40:42 +0000 (UTC) Received: by mail-wr1-f68.google.com with SMTP id t1so12009375wrv.4 for ; Sun, 10 Nov 2019 07:40:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=SBXLZE/BCq0HWTV1XLChqT3rqVqP7VKSBDhQ8+UOsHM=; b=UD5O8Tbn34g1ttedwH6pGs5p7/X6tO5pjVHN9a1s+G2XVnoh26zP+qTFZoPjHlvJ90 n5xTbpfVSNzU9p2SMPv1XZArXnUzeTkl2bTrUOzYpObsk7zVbJVo/fVd9TUz8Otkxr2Z yxNyWK+OMXLEnNBvnOM5d/S0+kctYHa5VWt6cUW6gIX8UuCt5P5hrljcXz1oYIEjdNNs mbSYa03n7E6YekUV5BYhOzZ+FVidgdeByA2SRXIAc6Otha77GJU0+E0qFnnlaLoZ1cG0 q50DgtaqRVn/0JubRnUZuBsmHj+HoxLqJ+UDNJQi99L5AQtoCXarZ12x4h1oMmM9HkOD 8gdg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=SBXLZE/BCq0HWTV1XLChqT3rqVqP7VKSBDhQ8+UOsHM=; b=fSXp3jfTdfxZZPpxzKY1ODggBua5zTZ3iM64d5wXwx/1COh9xz+j84R3mwd4RWb/Ub X3uhmTRF68o1d4evEz/Gn0MW0wZpC3xeA7vxg6M9yYCXSTk7fUY0lFnkalAD/h0DdDjm mDZ3qfgWEFyIjA5hDcmXgImnI8uPFqe7jOO/q1OHt8Dh7meLaM7cDXUmUxAFd+pZg/40 w01yiVTl0NN9emKc5WmPONkuz1aGVvjcqDxTg/KiInhTUtAhXXzaapBICkyx1541nISp Z84WTuyfGwxZubMufYaOBkW07KnIPa/7PYxQZnpxJVr3CaK5pOcCCmwn0isuMUWWGxtL 0dYQ== X-Gm-Message-State: APjAAAURwuA+Fa6g0p/36uuh9eyan67fJxlfN1nnkGcaPYYJtwz5jzo/ 8vMRopFcIgGOMlttCc6d61EV7RD+x28= X-Google-Smtp-Source: APXvYqxGg14Baa/0E59D1+XAJpHSzWFNKoPi7BEUMbk1H0rJA4Iyydv9qMuYZRvZ/FgWEcaLj1pENw== X-Received: by 2002:adf:e449:: with SMTP id t9mr17796781wrm.196.1573400442298; Sun, 10 Nov 2019 07:40:42 -0800 (PST) Received: from chi.lan (p578adb1c.dip0.t-ipconnect.de. [87.138.219.28]) by smtp.gmail.com with ESMTPSA id v10sm24948918wmg.48.2019.11.10.07.40.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 10 Nov 2019 07:40:41 -0800 (PST) From: Marek Vasut X-Google-Original-From: Marek Vasut To: u-boot@lists.denx.de Date: Sun, 10 Nov 2019 16:40:10 +0100 Message-Id: <20191110154012.24603-7-marek.vasut+renesas@gmail.com> X-Mailer: git-send-email 2.24.0.rc1 In-Reply-To: <20191110154012.24603-1-marek.vasut+renesas@gmail.com> References: <20191110154012.24603-1-marek.vasut+renesas@gmail.com> MIME-Version: 1.0 Cc: Marek Vasut Subject: [U-Boot] [PATCH 7/9] mmc: tmio: sdhi: Add SCC error checking X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Check SCC for errors after check command if applicable and optionally adjust the bus skew settings accordingly. Signed-off-by: Marek Vasut Cc: Masahiro Yamada --- drivers/mmc/renesas-sdhi.c | 85 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 85 insertions(+) diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c index 8c690a27b2..dcc77dd86c 100644 --- a/drivers/mmc/renesas-sdhi.c +++ b/drivers/mmc/renesas-sdhi.c @@ -34,7 +34,12 @@ #define RENESAS_SDHI_SCC_RVSCNTL_RVSEN BIT(0) #define RENESAS_SDHI_SCC_RVSREQ 0x814 #define RENESAS_SDHI_SCC_RVSREQ_RVSERR BIT(2) +#define RENESAS_SDHI_SCC_RVSREQ_REQTAPUP BIT(1) +#define RENESAS_SDHI_SCC_RVSREQ_REQTAPDOWN BIT(0) #define RENESAS_SDHI_SCC_SMPCMP 0x818 +#define RENESAS_SDHI_SCC_SMPCMP_CMD_ERR (BIT(24) | BIT(8)) +#define RENESAS_SDHI_SCC_SMPCMP_CMD_REQUP BIT(24) +#define RENESAS_SDHI_SCC_SMPCMP_CMD_REQDOWN BIT(8) #define RENESAS_SDHI_SCC_TMPPORT2 0x81c #define RENESAS_SDHI_SCC_TMPPORT2_HS400EN BIT(31) #define RENESAS_SDHI_SCC_TMPPORT2_HS400OSEL BIT(4) @@ -87,6 +92,84 @@ static void sd_scc_tmpport_write32(struct tmio_sd_priv *priv, u32 addr, u32 val) tmio_sd_writel(priv, 0, RENESAS_SDHI_SCC_TMPPORT4); } +static bool renesas_sdhi_check_scc_error(struct udevice *dev) +{ + struct tmio_sd_priv *priv = dev_get_priv(dev); + struct mmc *mmc = mmc_get_mmc_dev(dev); + unsigned long new_tap = priv->tap_set; + u32 reg, smpcmp; + + if ((priv->caps & TMIO_SD_CAP_RCAR_UHS) && + (mmc->selected_mode != UHS_SDR104) && + (mmc->selected_mode != MMC_HS_200) && + (mmc->selected_mode != MMC_HS_400) && + (priv->nrtaps != 4)) + return false; + + reg = tmio_sd_readl(priv, RENESAS_SDHI_SCC_RVSCNTL); + /* Handle automatic tuning correction */ + if (reg & RENESAS_SDHI_SCC_RVSCNTL_RVSEN) { + reg = tmio_sd_readl(priv, RENESAS_SDHI_SCC_RVSREQ); + if (reg & RENESAS_SDHI_SCC_RVSREQ_RVSERR) { + tmio_sd_writel(priv, 0, RENESAS_SDHI_SCC_RVSREQ); + return true; + } + + return false; + } + + /* Handle manual tuning correction */ + reg = tmio_sd_readl(priv, RENESAS_SDHI_SCC_RVSREQ); + if (!reg) /* No error */ + return false; + + tmio_sd_writel(priv, 0, RENESAS_SDHI_SCC_RVSREQ); + + if (mmc->selected_mode == MMC_HS_400) { + /* + * Correction Error Status contains CMD and DAT signal status. + * In HS400, DAT signal based on DS signal, not CLK. + * Therefore, use only CMD status. + */ + smpcmp = tmio_sd_readl(priv, RENESAS_SDHI_SCC_SMPCMP) & + RENESAS_SDHI_SCC_SMPCMP_CMD_ERR; + + switch (smpcmp) { + case 0: + return false; /* No error in CMD signal */ + case RENESAS_SDHI_SCC_SMPCMP_CMD_REQUP: + new_tap = (priv->tap_set + + priv->tap_num + 1) % priv->tap_num; + break; + case RENESAS_SDHI_SCC_SMPCMP_CMD_REQDOWN: + new_tap = (priv->tap_set + + priv->tap_num - 1) % priv->tap_num; + break; + default: + return true; /* Need re-tune */ + } + + priv->tap_set = new_tap; + } else { + if (reg & RENESAS_SDHI_SCC_RVSREQ_RVSERR) + return true; /* Need re-tune */ + else if (reg & RENESAS_SDHI_SCC_RVSREQ_REQTAPUP) + priv->tap_set = (priv->tap_set + + priv->tap_num + 1) % priv->tap_num; + else if (reg & RENESAS_SDHI_SCC_RVSREQ_REQTAPDOWN) + priv->tap_set = (priv->tap_set + + priv->tap_num - 1) % priv->tap_num; + else + return false; + } + + /* Set TAP position */ + tmio_sd_writel(priv, priv->tap_set >> ((priv->nrtaps == 4) ? 1 : 0), + RENESAS_SDHI_SCC_TAPSET); + + return false; +} + static void renesas_sdhi_adjust_hs400_mode_enable(struct tmio_sd_priv *priv) { u32 calib_code; @@ -536,6 +619,8 @@ static int renesas_sdhi_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, CONFIG_IS_ENABLED(MMC_HS400_SUPPORT) struct tmio_sd_priv *priv = dev_get_priv(dev); + renesas_sdhi_check_scc_error(dev); + if (cmd->cmdidx == MMC_CMD_SEND_STATUS) renesas_sdhi_adjust_hs400_mode_enable(priv); #endif From patchwork Sun Nov 10 15:40:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 1192630 X-Patchwork-Delegate: van.freenix@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="jA/JUj8r"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 479yvM6Thnz9sP4 for ; Mon, 11 Nov 2019 02:42:55 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 696B5C21E39; Sun, 10 Nov 2019 15:41:19 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=FREEMAIL_FROM, RCVD_IN_MSPIKE_H2, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 51EFFC21E1A; Sun, 10 Nov 2019 15:41:18 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 4A624C21DB3; Sun, 10 Nov 2019 15:40:47 +0000 (UTC) Received: from mail-wr1-f66.google.com (mail-wr1-f66.google.com [209.85.221.66]) by lists.denx.de (Postfix) with ESMTPS id 55A19C21E49 for ; Sun, 10 Nov 2019 15:40:44 +0000 (UTC) Received: by mail-wr1-f66.google.com with SMTP id i12so5073928wro.5 for ; Sun, 10 Nov 2019 07:40:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=0w0VN0bMK0EoneBgs8Tzt56TgTsh4aXRangwINoakM8=; b=jA/JUj8rA33AcmIC71wUjOJnGPgmyfqkg/i0PtLUr7d1AQSRcDl8f81FP3XWFOxOvC 3NJHaOmtECelamWRKOGrvl7mV8s3z1CYu+QG7QS7zHKOdZ1VQ8LJMfn3gOkMuY1r6ocr DD3DtjXf08E6iu7ho63eivvtGgO+l/cCX1tCV93cjFv5RKAMPz6mu4QSR7zysb4XNN1n 65rdyyNTZ2/aMWnRQjCNSMbftfT0qZW4SOeO00by+ETsOp00VF1Q/hoBHvTnwFNzoKDk /XN4xdCgiS1GzM9udY0jHxdcuf5lioMvd9KEfs5z5H8QMf8lX446FDICXWAYSsrYn/0e gNIA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=0w0VN0bMK0EoneBgs8Tzt56TgTsh4aXRangwINoakM8=; b=KEuVBhrIzJU3WwQUzDuG15Km36x0Ll9K8hDEzww5NxYOstD5VFQYFuOOIgyqAz2sin bossN8kubCQEx55eAs0mUNLd4Sqs/GnwJHY9AJb68ip4BDIRKeMux4dEC3sximE02TGg Uf4RDe7zQTZayVoMe9QXvNH/e/gYpyiP+8gWn13eg+Sap4S/nAZE3yj9BeTDfLGDFLXe XHDvGraX0I5AwMAPTWIgTKf/VnYGy1YlNRlx6dBnSduIO9k4TBxl1GIShgXzkjaXIeA2 ELcFpQxOVIWTXoju8rC+jjnvIrciN+YlkH+HNMhqqmMYMTfOJyOXs/MY+aklHpvrCvw3 u2Gg== X-Gm-Message-State: APjAAAXlSlzdmmkN/btlyyvjS90kJ1yf9ZEiHqYs14FeFivNoGB4BYoJ nXY17/U1Di+myIohqS+VXsWkSvCLHCM= X-Google-Smtp-Source: APXvYqwv8DBqrMjAwrYyTpXhfeZCsa63Fnicor3Y9+gUE5fwvDm/8Z5DcuncHUEMtt3EHCU6IoO7ZA== X-Received: by 2002:a5d:61c6:: with SMTP id q6mr6188064wrv.13.1573400443614; Sun, 10 Nov 2019 07:40:43 -0800 (PST) Received: from chi.lan (p578adb1c.dip0.t-ipconnect.de. [87.138.219.28]) by smtp.gmail.com with ESMTPSA id v10sm24948918wmg.48.2019.11.10.07.40.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 10 Nov 2019 07:40:43 -0800 (PST) From: Marek Vasut X-Google-Original-From: Marek Vasut To: u-boot@lists.denx.de Date: Sun, 10 Nov 2019 16:40:11 +0100 Message-Id: <20191110154012.24603-8-marek.vasut+renesas@gmail.com> X-Mailer: git-send-email 2.24.0.rc1 In-Reply-To: <20191110154012.24603-1-marek.vasut+renesas@gmail.com> References: <20191110154012.24603-1-marek.vasut+renesas@gmail.com> MIME-Version: 1.0 Cc: Marek Vasut Subject: [U-Boot] [PATCH 8/9] mmc: tmio: sdhi: Skip bad taps X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Some of the tuning taps produce suboptimal results. Add code which skips those "bad" taps. Signed-off-by: Marek Vasut Cc: Masahiro Yamada --- drivers/mmc/renesas-sdhi.c | 49 +++++++++++++++++++++++++++++++++++++- drivers/mmc/tmio-common.h | 1 + 2 files changed, 49 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c index dcc77dd86c..087d8b47a8 100644 --- a/drivers/mmc/renesas-sdhi.c +++ b/drivers/mmc/renesas-sdhi.c @@ -97,6 +97,7 @@ static bool renesas_sdhi_check_scc_error(struct udevice *dev) struct tmio_sd_priv *priv = dev_get_priv(dev); struct mmc *mmc = mmc_get_mmc_dev(dev); unsigned long new_tap = priv->tap_set; + unsigned long error_tap = priv->tap_set; u32 reg, smpcmp; if ((priv->caps & TMIO_SD_CAP_RCAR_UHS) && @@ -140,15 +141,32 @@ static bool renesas_sdhi_check_scc_error(struct udevice *dev) case RENESAS_SDHI_SCC_SMPCMP_CMD_REQUP: new_tap = (priv->tap_set + priv->tap_num + 1) % priv->tap_num; + error_tap = (priv->tap_set + + priv->tap_num - 1) % priv->tap_num; break; case RENESAS_SDHI_SCC_SMPCMP_CMD_REQDOWN: new_tap = (priv->tap_set + priv->tap_num - 1) % priv->tap_num; + error_tap = (priv->tap_set + + priv->tap_num + 1) % priv->tap_num; break; default: return true; /* Need re-tune */ } + if (priv->hs400_bad_tap & BIT(new_tap)) { + /* + * New tap is bad tap (cannot change). + * Compare with HS200 tuning result. + * In HS200 tuning, when smpcmp[error_tap] + * is OK, retune is executed. + */ + if (priv->smpcmp & BIT(error_tap)) + return true; /* Need retune */ + + return false; /* cannot change */ + } + priv->tap_set = new_tap; } else { if (reg & RENESAS_SDHI_SCC_RVSREQ_RVSERR) @@ -303,6 +321,7 @@ static int renesas_sdhi_hs400(struct udevice *dev) struct mmc *mmc = mmc_get_mmc_dev(dev); bool hs400 = (mmc->selected_mode == MMC_HS_400); int ret, taps = hs400 ? priv->nrtaps : 8; + unsigned long new_tap; u32 reg; if (taps == 4) /* HS400 on 4tap SoC needs different clock */ @@ -335,6 +354,24 @@ static int renesas_sdhi_hs400(struct udevice *dev) RENESAS_SDHI_SCC_DTCNTL_TAPEN, RENESAS_SDHI_SCC_DTCNTL); + /* Avoid bad TAP */ + if (priv->hs400_bad_tap & BIT(priv->tap_set)) { + new_tap = (priv->tap_set + + priv->tap_num + 1) % priv->tap_num; + + if (priv->hs400_bad_tap & BIT(new_tap)) + new_tap = (priv->tap_set + + priv->tap_num - 1) % priv->tap_num; + + if (priv->hs400_bad_tap & BIT(new_tap)) { + new_tap = priv->tap_set; + debug("Three consecutive bad tap is prohibited\n"); + } + + priv->tap_set = new_tap; + tmio_sd_writel(priv, priv->tap_set, RENESAS_SDHI_SCC_TAPSET); + } + if (taps == 4) { tmio_sd_writel(priv, priv->tap_set >> 1, RENESAS_SDHI_SCC_TAPSET); @@ -682,13 +719,23 @@ static void renesas_sdhi_filter_caps(struct udevice *dev) (rmobile_get_cpu_rev_fraction() <= 2))) plat->cfg.host_caps &= ~MMC_MODE_HS400; - /* M3W ES1.x for x>2 can use HS400 with manual adjustment */ + /* H3 ES2.0, ES3.0 and M3W ES1.2 and M3N bad taps */ + if (((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7795) && + (rmobile_get_cpu_rev_integer() >= 2)) || + ((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) && + (rmobile_get_cpu_rev_integer() == 1) && + (rmobile_get_cpu_rev_fraction() == 2)) || + (rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77965)) + priv->hs400_bad_tap = BIT(2) | BIT(3) | BIT(6) | BIT(7); + + /* M3W ES1.x for x>2 can use HS400 with manual adjustment and taps */ if ((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) && (rmobile_get_cpu_rev_integer() == 1) && (rmobile_get_cpu_rev_fraction() > 2)) { priv->adjust_hs400_enable = true; priv->adjust_hs400_offset = 3; priv->adjust_hs400_calibrate = 0x9; + priv->hs400_bad_tap = BIT(1) | BIT(3) | BIT(5) | BIT(7); } /* M3N can use HS400 with manual adjustment */ diff --git a/drivers/mmc/tmio-common.h b/drivers/mmc/tmio-common.h index 79f51d21af..f39118e337 100644 --- a/drivers/mmc/tmio-common.h +++ b/drivers/mmc/tmio-common.h @@ -145,6 +145,7 @@ struct tmio_sd_priv { bool adjust_hs400_enable; u8 adjust_hs400_offset; u8 adjust_hs400_calibrate; + u8 hs400_bad_tap; #endif ulong (*clk_get_rate)(struct tmio_sd_priv *); }; From patchwork Sun Nov 10 15:40:12 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 1192632 X-Patchwork-Delegate: van.freenix@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; 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[87.138.219.28]) by smtp.gmail.com with ESMTPSA id v10sm24948918wmg.48.2019.11.10.07.40.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 10 Nov 2019 07:40:44 -0800 (PST) From: Marek Vasut X-Google-Original-From: Marek Vasut To: u-boot@lists.denx.de Date: Sun, 10 Nov 2019 16:40:12 +0100 Message-Id: <20191110154012.24603-9-marek.vasut+renesas@gmail.com> X-Mailer: git-send-email 2.24.0.rc1 In-Reply-To: <20191110154012.24603-1-marek.vasut+renesas@gmail.com> References: <20191110154012.24603-1-marek.vasut+renesas@gmail.com> MIME-Version: 1.0 Cc: Marek Vasut Subject: [U-Boot] [PATCH 9/9] mmc: tmio: sdhi: Add calibration tables X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Instead of using single fixed value for the calibration offset, add tables which dynamically adjust this per calibration code from the SCC. Signed-off-by: Marek Vasut Cc: Masahiro Yamada --- drivers/mmc/renesas-sdhi.c | 97 ++++++++++++++++++++++++++++++++------ drivers/mmc/tmio-common.h | 1 + 2 files changed, 83 insertions(+), 15 deletions(-) diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c index 087d8b47a8..d47f24425b 100644 --- a/drivers/mmc/renesas-sdhi.c +++ b/drivers/mmc/renesas-sdhi.c @@ -63,6 +63,49 @@ #define RENESAS_SDHI_MAX_TAP 3 +#define CALIB_TABLE_MAX (RENESAS_SDHI_SCC_TMPPORT_CALIB_CODE_MASK + 1) + +static const u8 r8a7795_calib_table[2][CALIB_TABLE_MAX] = { + { 0, 0, 0, 0, 0, 1, 1, 2, 3, 4, 5, 5, 6, 6, 7, 11, + 15, 16, 16, 17, 17, 17, 17, 17, 18, 18, 18, 18, 19, 20, 21, 21 }, + { 3, 3, 4, 4, 5, 6, 6, 7, 8, 8, 9, 9, 10, 11, 12, 15, + 16, 16, 17, 17, 17, 17, 17, 18, 18, 18, 18, 19, 20, 21, 22, 22 } +}; + +static const u8 r8a7796_rev1_calib_table[2][CALIB_TABLE_MAX] = { + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 2, 3, 4, 9, + 15, 15, 15, 16, 16, 16, 16, 16, 17, 18, 19, 20, 21, 21, 22, 22 }, + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, + 2, 9, 16, 17, 17, 17, 18, 18, 18, 18, 19, 20, 21, 22, 23, 24} +}; + +static const u8 r8a7796_rev3_calib_table[2][CALIB_TABLE_MAX] = { + { 0, 0, 0, 0, 2, 3, 4, 4, 5, 6, 7, 7, 8, 9, 9, 10, + 11, 12, 13, 15, 16, 17, 17, 18, 19, 19, 20, 21, 21, 22, 23, 23 }, + { 1, 2, 2, 3, 4, 4, 5, 6, 6, 7, 8, 9, 9, 10, 11, 12, + 13, 14, 15, 16, 17, 17, 18, 19, 20, 20, 21, 22, 22, 23, 24, 24 } +}; + +static const u8 r8a77965_calib_table[2][CALIB_TABLE_MAX] = { + { 0, 1, 2, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 15, + 16, 17, 18, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 29 }, + { 0, 1, 2, 2, 2, 3, 4, 5, 6, 7, 9, 10, 11, 12, 13, 15, + 16, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 31 } +}; + +static const u8 r8a77990_calib_table[2][CALIB_TABLE_MAX] = { + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, + { 0, 0, 1, 2, 3, 4, 4, 4, 4, 5, 5, 6, 7, 8, 10, 11, + 12, 13, 14, 16, 17, 18, 18, 18, 19, 19, 20, 24, 26, 26, 26, 26 } +}; + +static int rmobile_is_gen3_mmc0(struct tmio_sd_priv *priv) +{ + /* On R-Car Gen3, MMC0 is at 0xee140000 */ + return (uintptr_t)(priv->regbase) == 0xee140000; +} + static u32 sd_scc_tmpport_read32(struct tmio_sd_priv *priv, u32 addr) { /* read mode */ @@ -198,28 +241,30 @@ static void renesas_sdhi_adjust_hs400_mode_enable(struct tmio_sd_priv *priv) if (!priv->needs_adjust_hs400) return; + if (!priv->adjust_hs400_calib_table) + return; + /* * Enabled Manual adjust HS400 mode * * 1) Disabled Write Protect * W(addr=0x00, WP_DISABLE_CODE) - * 2) Read Calibration code and adjust - * R(addr=0x26) - adjust value - * 3) Enabled Manual Calibration + * + * 2) Read Calibration code + * read_value = R(addr=0x26) + * 3) Refer to calibration table + * Calibration code = table[read_value] + * 4) Enabled Manual Calibration * W(addr=0x22, manual mode | Calibration code) - * 4) Set Offset value to TMPPORT3 Reg + * 5) Set Offset value to TMPPORT3 Reg */ sd_scc_tmpport_write32(priv, 0x00, RENESAS_SDHI_SCC_TMPPORT_DISABLE_WP_CODE); calib_code = sd_scc_tmpport_read32(priv, 0x26); calib_code &= RENESAS_SDHI_SCC_TMPPORT_CALIB_CODE_MASK; - if (calib_code > priv->adjust_hs400_calibrate) - calib_code -= priv->adjust_hs400_calibrate; - else - calib_code = 0; sd_scc_tmpport_write32(priv, 0x22, RENESAS_SDHI_SCC_TMPPORT_MANUAL_MODE | - calib_code); + priv->adjust_hs400_calib_table[calib_code]); tmio_sd_writel(priv, priv->adjust_hs400_offset, RENESAS_SDHI_SCC_TMPPORT3); @@ -711,12 +756,12 @@ static void renesas_sdhi_filter_caps(struct udevice *dev) if (!(priv->caps & TMIO_SD_CAP_RCAR_GEN3)) return; - /* HS400 is not supported on H3 ES1.x and M3W ES1.0,ES1.1,ES1.2 */ + /* HS400 is not supported on H3 ES1.x and M3W ES1.0, ES1.1 */ if (((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7795) && (rmobile_get_cpu_rev_integer() <= 1)) || ((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) && (rmobile_get_cpu_rev_integer() == 1) && - (rmobile_get_cpu_rev_fraction() <= 2))) + (rmobile_get_cpu_rev_fraction() < 2))) plat->cfg.host_caps &= ~MMC_MODE_HS400; /* H3 ES2.0, ES3.0 and M3W ES1.2 and M3N bad taps */ @@ -728,28 +773,50 @@ static void renesas_sdhi_filter_caps(struct udevice *dev) (rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77965)) priv->hs400_bad_tap = BIT(2) | BIT(3) | BIT(6) | BIT(7); + /* H3 ES3.0 can use HS400 with manual adjustment */ + if ((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7795) && + (rmobile_get_cpu_rev_integer() >= 3)) { + priv->adjust_hs400_enable = true; + priv->adjust_hs400_offset = 0; + priv->adjust_hs400_calib_table = + r8a7795_calib_table[!rmobile_is_gen3_mmc0(priv)]; + } + + /* M3W ES1.2 can use HS400 with manual adjustment */ + if ((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) && + (rmobile_get_cpu_rev_integer() == 1) && + (rmobile_get_cpu_rev_fraction() == 2)) { + priv->adjust_hs400_enable = true; + priv->adjust_hs400_offset = 3; + priv->adjust_hs400_calib_table = + r8a7796_rev1_calib_table[!rmobile_is_gen3_mmc0(priv)]; + } + /* M3W ES1.x for x>2 can use HS400 with manual adjustment and taps */ if ((rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A7796) && (rmobile_get_cpu_rev_integer() == 1) && (rmobile_get_cpu_rev_fraction() > 2)) { priv->adjust_hs400_enable = true; - priv->adjust_hs400_offset = 3; - priv->adjust_hs400_calibrate = 0x9; + priv->adjust_hs400_offset = 0; priv->hs400_bad_tap = BIT(1) | BIT(3) | BIT(5) | BIT(7); + priv->adjust_hs400_calib_table = + r8a7796_rev3_calib_table[!rmobile_is_gen3_mmc0(priv)]; } /* M3N can use HS400 with manual adjustment */ if (rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77965) { priv->adjust_hs400_enable = true; priv->adjust_hs400_offset = 3; - priv->adjust_hs400_calibrate = 0x0; + priv->adjust_hs400_calib_table = + r8a77965_calib_table[!rmobile_is_gen3_mmc0(priv)]; } /* E3 can use HS400 with manual adjustment */ if (rmobile_get_cpu_type() == RMOBILE_CPU_TYPE_R8A77990) { priv->adjust_hs400_enable = true; priv->adjust_hs400_offset = 3; - priv->adjust_hs400_calibrate = 0x4; + priv->adjust_hs400_calib_table = + r8a77990_calib_table[!rmobile_is_gen3_mmc0(priv)]; } /* H3 ES1.x, ES2.0 and M3W ES1.0, ES1.1, ES1.2 uses 4 tuning taps */ diff --git a/drivers/mmc/tmio-common.h b/drivers/mmc/tmio-common.h index f39118e337..047458849b 100644 --- a/drivers/mmc/tmio-common.h +++ b/drivers/mmc/tmio-common.h @@ -146,6 +146,7 @@ struct tmio_sd_priv { u8 adjust_hs400_offset; u8 adjust_hs400_calibrate; u8 hs400_bad_tap; + const u8 *adjust_hs400_calib_table; #endif ulong (*clk_get_rate)(struct tmio_sd_priv *); };