From patchwork Wed Nov 6 14:48:23 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 1190474 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.intel.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 477TtW0GC5z9sP3 for ; Thu, 7 Nov 2019 01:48:33 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731608AbfKFOsd (ORCPT ); Wed, 6 Nov 2019 09:48:33 -0500 Received: from mga11.intel.com ([192.55.52.93]:26747 "EHLO mga11.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726945AbfKFOsc (ORCPT ); Wed, 6 Nov 2019 09:48:32 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 06 Nov 2019 06:48:32 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.68,275,1569308400"; d="scan'208";a="201117588" Received: from black.fi.intel.com ([10.237.72.28]) by fmsmga007.fm.intel.com with ESMTP; 06 Nov 2019 06:48:30 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id 127C6115; Wed, 6 Nov 2019 16:48:30 +0200 (EET) From: Andy Shevchenko To: Mika Westerberg , linux-gpio@vger.kernel.org, Bartosz Golaszewski , Linus Walleij Cc: Andy Shevchenko Subject: [PATCH v1 2/8] pinctrl: lynxpoint: Use raw_spinlock for locking Date: Wed, 6 Nov 2019 16:48:23 +0200 Message-Id: <20191106144829.32275-3-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.24.0.rc1 In-Reply-To: <20191106144829.32275-1-andriy.shevchenko@linux.intel.com> References: <20191106144829.32275-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The Intel Lynxpoint pinctrl driver implements irqchip callbacks which are called with desc->lock raw_spinlock held. In mainline this is fine because spinlock resolves to raw_spinlock. However, running the same code in -rt we will get a BUG() asserted. This is because in -rt spinlocks are preemptible so taking the driver private spinlock in irqchip callbacks causes might_sleep() to trigger. In order to keep -rt happy but at the same time make sure that register accesses get serialized, convert the driver to use raw_spinlock instead. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/intel/pinctrl-lynxpoint.c | 28 +++++++++++------------ 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/drivers/pinctrl/intel/pinctrl-lynxpoint.c b/drivers/pinctrl/intel/pinctrl-lynxpoint.c index e9e47c0d5be7..6467095523cc 100644 --- a/drivers/pinctrl/intel/pinctrl-lynxpoint.c +++ b/drivers/pinctrl/intel/pinctrl-lynxpoint.c @@ -47,7 +47,7 @@ struct lp_gpio { struct gpio_chip chip; struct platform_device *pdev; - spinlock_t lock; + raw_spinlock_t lock; unsigned long reg_base; }; @@ -144,7 +144,7 @@ static int lp_irq_type(struct irq_data *d, unsigned type) if (hwirq >= lg->chip.ngpio) return -EINVAL; - spin_lock_irqsave(&lg->lock, flags); + raw_spin_lock_irqsave(&lg->lock, flags); value = inl(reg); /* set both TRIG_SEL and INV bits to 0 for rising edge */ @@ -164,7 +164,7 @@ static int lp_irq_type(struct irq_data *d, unsigned type) value |= TRIG_SEL_BIT | INT_INV_BIT; outl(value, reg); - spin_unlock_irqrestore(&lg->lock, flags); + raw_spin_unlock_irqrestore(&lg->lock, flags); return 0; } @@ -181,14 +181,14 @@ static void lp_gpio_set(struct gpio_chip *chip, unsigned offset, int value) unsigned long reg = lp_gpio_reg(chip, offset, LP_CONFIG1); unsigned long flags; - spin_lock_irqsave(&lg->lock, flags); + raw_spin_lock_irqsave(&lg->lock, flags); if (value) outl(inl(reg) | OUT_LVL_BIT, reg); else outl(inl(reg) & ~OUT_LVL_BIT, reg); - spin_unlock_irqrestore(&lg->lock, flags); + raw_spin_unlock_irqrestore(&lg->lock, flags); } static int lp_gpio_direction_input(struct gpio_chip *chip, unsigned offset) @@ -197,9 +197,9 @@ static int lp_gpio_direction_input(struct gpio_chip *chip, unsigned offset) unsigned long reg = lp_gpio_reg(chip, offset, LP_CONFIG1); unsigned long flags; - spin_lock_irqsave(&lg->lock, flags); + raw_spin_lock_irqsave(&lg->lock, flags); outl(inl(reg) | DIR_BIT, reg); - spin_unlock_irqrestore(&lg->lock, flags); + raw_spin_unlock_irqrestore(&lg->lock, flags); return 0; } @@ -213,9 +213,9 @@ static int lp_gpio_direction_output(struct gpio_chip *chip, lp_gpio_set(chip, offset, value); - spin_lock_irqsave(&lg->lock, flags); + raw_spin_lock_irqsave(&lg->lock, flags); outl(inl(reg) & ~DIR_BIT, reg); - spin_unlock_irqrestore(&lg->lock, flags); + raw_spin_unlock_irqrestore(&lg->lock, flags); return 0; } @@ -266,9 +266,9 @@ static void lp_irq_enable(struct irq_data *d) unsigned long reg = lp_gpio_reg(&lg->chip, hwirq, LP_INT_ENABLE); unsigned long flags; - spin_lock_irqsave(&lg->lock, flags); + raw_spin_lock_irqsave(&lg->lock, flags); outl(inl(reg) | BIT(hwirq % 32), reg); - spin_unlock_irqrestore(&lg->lock, flags); + raw_spin_unlock_irqrestore(&lg->lock, flags); } static void lp_irq_disable(struct irq_data *d) @@ -279,9 +279,9 @@ static void lp_irq_disable(struct irq_data *d) unsigned long reg = lp_gpio_reg(&lg->chip, hwirq, LP_INT_ENABLE); unsigned long flags; - spin_lock_irqsave(&lg->lock, flags); + raw_spin_lock_irqsave(&lg->lock, flags); outl(inl(reg) & ~BIT(hwirq % 32), reg); - spin_unlock_irqrestore(&lg->lock, flags); + raw_spin_unlock_irqrestore(&lg->lock, flags); } static struct irq_chip lp_irqchip = { @@ -345,7 +345,7 @@ static int lp_gpio_probe(struct platform_device *pdev) return -EBUSY; } - spin_lock_init(&lg->lock); + raw_spin_lock_init(&lg->lock); gc = &lg->chip; gc->label = dev_name(dev); From patchwork Wed Nov 6 14:48:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 1190477 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.intel.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 477TtZ1kmrz9sQy for ; Thu, 7 Nov 2019 01:48:38 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728712AbfKFOsd (ORCPT ); Wed, 6 Nov 2019 09:48:33 -0500 Received: from mga14.intel.com ([192.55.52.115]:45533 "EHLO mga14.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726945AbfKFOsd (ORCPT ); Wed, 6 Nov 2019 09:48:33 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 06 Nov 2019 06:48:32 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.68,275,1569308400"; d="scan'208";a="192484618" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga007.jf.intel.com with ESMTP; 06 Nov 2019 06:48:30 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id 1793F14E; Wed, 6 Nov 2019 16:48:30 +0200 (EET) From: Andy Shevchenko To: Mika Westerberg , linux-gpio@vger.kernel.org, Bartosz Golaszewski , Linus Walleij Cc: Andy Shevchenko Subject: [PATCH v1 3/8] pinctrl: lynxpoint: Correct amount of pins Date: Wed, 6 Nov 2019 16:48:24 +0200 Message-Id: <20191106144829.32275-4-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.24.0.rc1 In-Reply-To: <20191106144829.32275-1-andriy.shevchenko@linux.intel.com> References: <20191106144829.32275-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org When we count from 0 it's possible to get into off-by-one error. That's what had happened to this driver. So, correct amount of pins and related typos in the code. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/intel/pinctrl-lynxpoint.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/pinctrl/intel/pinctrl-lynxpoint.c b/drivers/pinctrl/intel/pinctrl-lynxpoint.c index 6467095523cc..ebc523233df4 100644 --- a/drivers/pinctrl/intel/pinctrl-lynxpoint.c +++ b/drivers/pinctrl/intel/pinctrl-lynxpoint.c @@ -18,9 +18,9 @@ #include #include -/* LynxPoint chipset has support for 94 gpio pins */ +/* LynxPoint chipset has support for 95 GPIO pins */ -#define LP_NUM_GPIO 94 +#define LP_NUM_GPIO 95 /* Bitmapped register offsets */ #define LP_ACPI_OWNED 0x00 /* Bitmap, set by bios, 0: pin reserved for ACPI */ @@ -54,11 +54,11 @@ struct lp_gpio { /* * Lynxpoint gpios are controlled through both bitmapped registers and * per gpio specific registers. The bitmapped registers are in chunks of - * 3 x 32bit registers to cover all 94 gpios + * 3 x 32bit registers to cover all 95 GPIOs * * per gpio specific registers consist of two 32bit registers per gpio - * (LP_CONFIG1 and LP_CONFIG2), with 94 gpios there's a total of - * 188 config registers. + * (LP_CONFIG1 and LP_CONFIG2), with 95 GPIOs there's a total of + * 190 config registers. * * A simplified view of the register layout look like this: * @@ -67,7 +67,7 @@ struct lp_gpio { * LP_ACPI_OWNED[94:64] gpio ownerships for gpios 63-94 * ... * LP_INT_ENABLE[31:0] ... - * LP_INT_ENABLE[63:31] ... + * LP_INT_ENABLE[63:32] ... * LP_INT_ENABLE[94:64] ... * LP0_CONFIG1 (gpio 0) config1 reg for gpio 0 (per gpio registers) * LP0_CONFIG2 (gpio 0) config2 reg for gpio 0 From patchwork Wed Nov 6 14:48:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 1190478 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.intel.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 477TtZ5mXtz9sR0 for ; Thu, 7 Nov 2019 01:48:38 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726945AbfKFOsd (ORCPT ); Wed, 6 Nov 2019 09:48:33 -0500 Received: from mga06.intel.com ([134.134.136.31]:46609 "EHLO mga06.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729430AbfKFOsd (ORCPT ); Wed, 6 Nov 2019 09:48:33 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 06 Nov 2019 06:48:32 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.68,275,1569308400"; d="scan'208";a="353498317" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga004.jf.intel.com with ESMTP; 06 Nov 2019 06:48:31 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id 29FEF300; Wed, 6 Nov 2019 16:48:30 +0200 (EET) From: Andy Shevchenko To: Mika Westerberg , linux-gpio@vger.kernel.org, Bartosz Golaszewski , Linus Walleij Cc: Andy Shevchenko Subject: [PATCH v1 4/8] pinctrl: lynxpoint: Keep pointer to struct device instead of its container Date: Wed, 6 Nov 2019 16:48:25 +0200 Message-Id: <20191106144829.32275-5-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.24.0.rc1 In-Reply-To: <20191106144829.32275-1-andriy.shevchenko@linux.intel.com> References: <20191106144829.32275-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org There is no need to keep pointer to struct platform_device, which is container of struct device, because the latter is what have been used everywhere outside of ->probe() path. In any case we may derive pointer to the container when needed. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/intel/pinctrl-lynxpoint.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/pinctrl/intel/pinctrl-lynxpoint.c b/drivers/pinctrl/intel/pinctrl-lynxpoint.c index ebc523233df4..dbca1ff076c8 100644 --- a/drivers/pinctrl/intel/pinctrl-lynxpoint.c +++ b/drivers/pinctrl/intel/pinctrl-lynxpoint.c @@ -46,7 +46,7 @@ struct lp_gpio { struct gpio_chip chip; - struct platform_device *pdev; + struct device *dev; raw_spinlock_t lock; unsigned long reg_base; }; @@ -103,11 +103,11 @@ static int lp_gpio_request(struct gpio_chip *chip, unsigned offset) unsigned long conf2 = lp_gpio_reg(chip, offset, LP_CONFIG2); unsigned long acpi_use = lp_gpio_reg(chip, offset, LP_ACPI_OWNED); - pm_runtime_get(&lg->pdev->dev); /* should we put if failed */ + pm_runtime_get(lg->dev); /* should we put if failed */ /* Fail if BIOS reserved pin for ACPI use */ if (!(inl(acpi_use) & BIT(offset % 32))) { - dev_err(&lg->pdev->dev, "gpio %d reserved for ACPI\n", offset); + dev_err(lg->dev, "gpio %d reserved for ACPI\n", offset); return -EBUSY; } /* Fail if pin is in alternate function mode (not GPIO mode) */ @@ -129,7 +129,7 @@ static void lp_gpio_free(struct gpio_chip *chip, unsigned offset) /* disable input sensing */ outl(inl(conf2) | GPINDIS_BIT, conf2); - pm_runtime_put(&lg->pdev->dev); + pm_runtime_put(lg->dev); } static int lp_irq_type(struct irq_data *d, unsigned type) @@ -325,7 +325,7 @@ static int lp_gpio_probe(struct platform_device *pdev) if (!lg) return -ENOMEM; - lg->pdev = pdev; + lg->dev = dev; platform_set_drvdata(pdev, lg); io_rc = platform_get_resource(pdev, IORESOURCE_IO, 0); From patchwork Wed Nov 6 14:48:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 1190481 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.intel.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 477Ttd2MXwz9sP3 for ; Thu, 7 Nov 2019 01:48:41 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729430AbfKFOsg (ORCPT ); Wed, 6 Nov 2019 09:48:36 -0500 Received: from mga09.intel.com ([134.134.136.24]:65092 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731713AbfKFOsf (ORCPT ); Wed, 6 Nov 2019 09:48:35 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 06 Nov 2019 06:48:35 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.68,275,1569308400"; d="scan'208";a="377067550" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga005.jf.intel.com with ESMTP; 06 Nov 2019 06:48:33 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id 3900B33B; Wed, 6 Nov 2019 16:48:30 +0200 (EET) From: Andy Shevchenko To: Mika Westerberg , linux-gpio@vger.kernel.org, Bartosz Golaszewski , Linus Walleij Cc: Andy Shevchenko Subject: [PATCH v1 5/8] pinctrl: lynxpoint: Use %pR to print IO resource Date: Wed, 6 Nov 2019 16:48:26 +0200 Message-Id: <20191106144829.32275-6-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.24.0.rc1 In-Reply-To: <20191106144829.32275-1-andriy.shevchenko@linux.intel.com> References: <20191106144829.32275-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Replace explicit casting by pointer to struct resource with specifier replacement to %pR to print the IO resource. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/intel/pinctrl-lynxpoint.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/pinctrl/intel/pinctrl-lynxpoint.c b/drivers/pinctrl/intel/pinctrl-lynxpoint.c index dbca1ff076c8..05921729fe78 100644 --- a/drivers/pinctrl/intel/pinctrl-lynxpoint.c +++ b/drivers/pinctrl/intel/pinctrl-lynxpoint.c @@ -340,8 +340,7 @@ static int lp_gpio_probe(struct platform_device *pdev) reg_len = resource_size(io_rc); if (!devm_request_region(dev, lg->reg_base, reg_len, "lp-gpio")) { - dev_err(dev, "failed requesting IO region 0x%x\n", - (unsigned int)lg->reg_base); + dev_err(dev, "failed requesting IO region %pR\n", &io_rc); return -EBUSY; } From patchwork Wed Nov 6 14:48:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 1190479 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.intel.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 477Ttb40C3z9sR3 for ; Thu, 7 Nov 2019 01:48:39 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731665AbfKFOsf (ORCPT ); Wed, 6 Nov 2019 09:48:35 -0500 Received: from mga01.intel.com ([192.55.52.88]:55344 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729430AbfKFOsf (ORCPT ); Wed, 6 Nov 2019 09:48:35 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 06 Nov 2019 06:48:34 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.68,275,1569308400"; d="scan'208";a="227984470" Received: from black.fi.intel.com ([10.237.72.28]) by FMSMGA003.fm.intel.com with ESMTP; 06 Nov 2019 06:48:33 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id 42E00189; Wed, 6 Nov 2019 16:48:30 +0200 (EET) From: Andy Shevchenko To: Mika Westerberg , linux-gpio@vger.kernel.org, Bartosz Golaszewski , Linus Walleij Cc: Andy Shevchenko Subject: [PATCH v1 6/8] pinctrl: lynxpoint: Switch to memory mapped IO accessors Date: Wed, 6 Nov 2019 16:48:27 +0200 Message-Id: <20191106144829.32275-7-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.24.0.rc1 In-Reply-To: <20191106144829.32275-1-andriy.shevchenko@linux.intel.com> References: <20191106144829.32275-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Convert driver to use memory mapped IO accessors. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/intel/pinctrl-lynxpoint.c | 83 +++++++++++------------ 1 file changed, 40 insertions(+), 43 deletions(-) diff --git a/drivers/pinctrl/intel/pinctrl-lynxpoint.c b/drivers/pinctrl/intel/pinctrl-lynxpoint.c index 05921729fe78..d3065b5a5f75 100644 --- a/drivers/pinctrl/intel/pinctrl-lynxpoint.c +++ b/drivers/pinctrl/intel/pinctrl-lynxpoint.c @@ -48,7 +48,7 @@ struct lp_gpio { struct gpio_chip chip; struct device *dev; raw_spinlock_t lock; - unsigned long reg_base; + void __iomem *regs; }; /* @@ -80,7 +80,7 @@ struct lp_gpio { * LP94_CONFIG2 (gpio 94) ... */ -static unsigned long lp_gpio_reg(struct gpio_chip *chip, unsigned offset, +static void __iomem *lp_gpio_reg(struct gpio_chip *chip, unsigned offset, int reg) { struct lp_gpio *lg = gpiochip_get_data(chip); @@ -93,29 +93,29 @@ static unsigned long lp_gpio_reg(struct gpio_chip *chip, unsigned offset, /* bitmapped registers */ reg_offset = (offset / 32) * 4; - return lg->reg_base + reg + reg_offset; + return lg->regs + reg + reg_offset; } static int lp_gpio_request(struct gpio_chip *chip, unsigned offset) { struct lp_gpio *lg = gpiochip_get_data(chip); - unsigned long reg = lp_gpio_reg(chip, offset, LP_CONFIG1); - unsigned long conf2 = lp_gpio_reg(chip, offset, LP_CONFIG2); - unsigned long acpi_use = lp_gpio_reg(chip, offset, LP_ACPI_OWNED); + void __iomem *reg = lp_gpio_reg(chip, offset, LP_CONFIG1); + void __iomem *conf2 = lp_gpio_reg(chip, offset, LP_CONFIG2); + void __iomem *acpi_use = lp_gpio_reg(chip, offset, LP_ACPI_OWNED); pm_runtime_get(lg->dev); /* should we put if failed */ /* Fail if BIOS reserved pin for ACPI use */ - if (!(inl(acpi_use) & BIT(offset % 32))) { + if (!(ioread32(acpi_use) & BIT(offset % 32))) { dev_err(lg->dev, "gpio %d reserved for ACPI\n", offset); return -EBUSY; } /* Fail if pin is in alternate function mode (not GPIO mode) */ - if (!(inl(reg) & USE_SEL_BIT)) + if (!(ioread32(reg) & USE_SEL_BIT)) return -ENODEV; /* enable input sensing */ - outl(inl(conf2) & ~GPINDIS_BIT, conf2); + iowrite32(ioread32(conf2) & ~GPINDIS_BIT, conf2); return 0; @@ -124,10 +124,10 @@ static int lp_gpio_request(struct gpio_chip *chip, unsigned offset) static void lp_gpio_free(struct gpio_chip *chip, unsigned offset) { struct lp_gpio *lg = gpiochip_get_data(chip); - unsigned long conf2 = lp_gpio_reg(chip, offset, LP_CONFIG2); + void __iomem *conf2 = lp_gpio_reg(chip, offset, LP_CONFIG2); /* disable input sensing */ - outl(inl(conf2) | GPINDIS_BIT, conf2); + iowrite32(ioread32(conf2) | GPINDIS_BIT, conf2); pm_runtime_put(lg->dev); } @@ -137,15 +137,15 @@ static int lp_irq_type(struct irq_data *d, unsigned type) struct gpio_chip *gc = irq_data_get_irq_chip_data(d); struct lp_gpio *lg = gpiochip_get_data(gc); u32 hwirq = irqd_to_hwirq(d); + void __iomem *reg = lp_gpio_reg(&lg->chip, hwirq, LP_CONFIG1); unsigned long flags; u32 value; - unsigned long reg = lp_gpio_reg(&lg->chip, hwirq, LP_CONFIG1); if (hwirq >= lg->chip.ngpio) return -EINVAL; raw_spin_lock_irqsave(&lg->lock, flags); - value = inl(reg); + value = ioread32(reg); /* set both TRIG_SEL and INV bits to 0 for rising edge */ if (type & IRQ_TYPE_EDGE_RISING) @@ -163,7 +163,7 @@ static int lp_irq_type(struct irq_data *d, unsigned type) if (type & IRQ_TYPE_LEVEL_HIGH) value |= TRIG_SEL_BIT | INT_INV_BIT; - outl(value, reg); + iowrite32(value, reg); raw_spin_unlock_irqrestore(&lg->lock, flags); return 0; @@ -171,22 +171,22 @@ static int lp_irq_type(struct irq_data *d, unsigned type) static int lp_gpio_get(struct gpio_chip *chip, unsigned offset) { - unsigned long reg = lp_gpio_reg(chip, offset, LP_CONFIG1); - return !!(inl(reg) & IN_LVL_BIT); + void __iomem *reg = lp_gpio_reg(chip, offset, LP_CONFIG1); + return !!(ioread32(reg) & IN_LVL_BIT); } static void lp_gpio_set(struct gpio_chip *chip, unsigned offset, int value) { struct lp_gpio *lg = gpiochip_get_data(chip); - unsigned long reg = lp_gpio_reg(chip, offset, LP_CONFIG1); + void __iomem *reg = lp_gpio_reg(chip, offset, LP_CONFIG1); unsigned long flags; raw_spin_lock_irqsave(&lg->lock, flags); if (value) - outl(inl(reg) | OUT_LVL_BIT, reg); + iowrite32(ioread32(reg) | OUT_LVL_BIT, reg); else - outl(inl(reg) & ~OUT_LVL_BIT, reg); + iowrite32(ioread32(reg) & ~OUT_LVL_BIT, reg); raw_spin_unlock_irqrestore(&lg->lock, flags); } @@ -194,11 +194,11 @@ static void lp_gpio_set(struct gpio_chip *chip, unsigned offset, int value) static int lp_gpio_direction_input(struct gpio_chip *chip, unsigned offset) { struct lp_gpio *lg = gpiochip_get_data(chip); - unsigned long reg = lp_gpio_reg(chip, offset, LP_CONFIG1); + void __iomem *reg = lp_gpio_reg(chip, offset, LP_CONFIG1); unsigned long flags; raw_spin_lock_irqsave(&lg->lock, flags); - outl(inl(reg) | DIR_BIT, reg); + iowrite32(ioread32(reg) | DIR_BIT, reg); raw_spin_unlock_irqrestore(&lg->lock, flags); return 0; @@ -208,13 +208,13 @@ static int lp_gpio_direction_output(struct gpio_chip *chip, unsigned offset, int value) { struct lp_gpio *lg = gpiochip_get_data(chip); - unsigned long reg = lp_gpio_reg(chip, offset, LP_CONFIG1); + void __iomem *reg = lp_gpio_reg(chip, offset, LP_CONFIG1); unsigned long flags; lp_gpio_set(chip, offset, value); raw_spin_lock_irqsave(&lg->lock, flags); - outl(inl(reg) & ~DIR_BIT, reg); + iowrite32(ioread32(reg) & ~DIR_BIT, reg); raw_spin_unlock_irqrestore(&lg->lock, flags); return 0; @@ -226,7 +226,8 @@ static void lp_gpio_irq_handler(struct irq_desc *desc) struct gpio_chip *gc = irq_desc_get_handler_data(desc); struct lp_gpio *lg = gpiochip_get_data(gc); struct irq_chip *chip = irq_data_get_irq_chip(data); - unsigned long reg, ena, pending; + void __iomem *reg, *ena; + unsigned long pending; u32 base, pin; /* check from GPIO controller which pin triggered the interrupt */ @@ -235,13 +236,13 @@ static void lp_gpio_irq_handler(struct irq_desc *desc) ena = lp_gpio_reg(&lg->chip, base, LP_INT_ENABLE); /* Only interrupts that are enabled */ - pending = inl(reg) & inl(ena); + pending = ioread32(reg) & ioread32(ena); for_each_set_bit(pin, &pending, 32) { unsigned irq; /* Clear before handling so we don't lose an edge */ - outl(BIT(pin), reg); + iowrite32(BIT(pin), reg); irq = irq_find_mapping(lg->chip.irq.domain, base + pin); generic_handle_irq(irq); @@ -263,11 +264,11 @@ static void lp_irq_enable(struct irq_data *d) struct gpio_chip *gc = irq_data_get_irq_chip_data(d); struct lp_gpio *lg = gpiochip_get_data(gc); u32 hwirq = irqd_to_hwirq(d); - unsigned long reg = lp_gpio_reg(&lg->chip, hwirq, LP_INT_ENABLE); + void __iomem *reg = lp_gpio_reg(&lg->chip, hwirq, LP_INT_ENABLE); unsigned long flags; raw_spin_lock_irqsave(&lg->lock, flags); - outl(inl(reg) | BIT(hwirq % 32), reg); + iowrite32(ioread32(reg) | BIT(hwirq % 32), reg); raw_spin_unlock_irqrestore(&lg->lock, flags); } @@ -276,11 +277,11 @@ static void lp_irq_disable(struct irq_data *d) struct gpio_chip *gc = irq_data_get_irq_chip_data(d); struct lp_gpio *lg = gpiochip_get_data(gc); u32 hwirq = irqd_to_hwirq(d); - unsigned long reg = lp_gpio_reg(&lg->chip, hwirq, LP_INT_ENABLE); + void __iomem *reg = lp_gpio_reg(&lg->chip, hwirq, LP_INT_ENABLE); unsigned long flags; raw_spin_lock_irqsave(&lg->lock, flags); - outl(inl(reg) & ~BIT(hwirq % 32), reg); + iowrite32(ioread32(reg) & ~BIT(hwirq % 32), reg); raw_spin_unlock_irqrestore(&lg->lock, flags); } @@ -297,16 +298,16 @@ static struct irq_chip lp_irqchip = { static int lp_gpio_irq_init_hw(struct gpio_chip *chip) { struct lp_gpio *lg = gpiochip_get_data(chip); - unsigned long reg; + void __iomem *reg; unsigned base; for (base = 0; base < lg->chip.ngpio; base += 32) { /* disable gpio pin interrupts */ reg = lp_gpio_reg(&lg->chip, base, LP_INT_ENABLE); - outl(0, reg); + iowrite32(0, reg); /* Clear interrupt status register */ reg = lp_gpio_reg(&lg->chip, base, LP_INT_STAT); - outl(0xffffffff, reg); + iowrite32(0xffffffff, reg); } return 0; @@ -318,7 +319,6 @@ static int lp_gpio_probe(struct platform_device *pdev) struct gpio_chip *gc; struct resource *io_rc, *irq_rc; struct device *dev = &pdev->dev; - unsigned long reg_len; int ret = -ENODEV; lg = devm_kzalloc(dev, sizeof(struct lp_gpio), GFP_KERNEL); @@ -329,18 +329,14 @@ static int lp_gpio_probe(struct platform_device *pdev) platform_set_drvdata(pdev, lg); io_rc = platform_get_resource(pdev, IORESOURCE_IO, 0); - irq_rc = platform_get_resource(pdev, IORESOURCE_IRQ, 0); - if (!io_rc) { dev_err(dev, "missing IO resources\n"); return -EINVAL; } - lg->reg_base = io_rc->start; - reg_len = resource_size(io_rc); - - if (!devm_request_region(dev, lg->reg_base, reg_len, "lp-gpio")) { - dev_err(dev, "failed requesting IO region %pR\n", &io_rc); + lg->regs = devm_ioport_map(dev, io_rc->start, resource_size(io_rc)); + if (!lg->regs) { + dev_err(dev, "failed mapping IO region %pR\n", &io_rc); return -EBUSY; } @@ -361,6 +357,7 @@ static int lp_gpio_probe(struct platform_device *pdev) gc->parent = dev; /* set up interrupts */ + irq_rc = platform_get_resource(pdev, IORESOURCE_IRQ, 0); if (irq_rc && irq_rc->start) { struct gpio_irq_chip *girq; @@ -403,14 +400,14 @@ static int lp_gpio_runtime_resume(struct device *dev) static int lp_gpio_resume(struct device *dev) { struct lp_gpio *lg = dev_get_drvdata(dev); - unsigned long reg; + void __iomem *reg; int i; /* on some hardware suspend clears input sensing, re-enable it here */ for (i = 0; i < lg->chip.ngpio; i++) { if (gpiochip_is_requested(&lg->chip, i) != NULL) { reg = lp_gpio_reg(&lg->chip, i, LP_CONFIG2); - outl(inl(reg) & ~GPINDIS_BIT, reg); + iowrite32(ioread32(reg) & ~GPINDIS_BIT, reg); } } return 0; From patchwork Wed Nov 6 14:48:28 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 1190482 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.intel.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 477Ttd60GJz9sPv for ; Thu, 7 Nov 2019 01:48:41 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731691AbfKFOsf (ORCPT ); Wed, 6 Nov 2019 09:48:35 -0500 Received: from mga05.intel.com ([192.55.52.43]:8775 "EHLO mga05.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729430AbfKFOsf (ORCPT ); Wed, 6 Nov 2019 09:48:35 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 06 Nov 2019 06:48:35 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.68,275,1569308400"; d="scan'208";a="214266649" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga002.jf.intel.com with ESMTP; 06 Nov 2019 06:48:33 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id 52A9B458; Wed, 6 Nov 2019 16:48:30 +0200 (EET) From: Andy Shevchenko To: Mika Westerberg , linux-gpio@vger.kernel.org, Bartosz Golaszewski , Linus Walleij Cc: Andy Shevchenko Subject: [PATCH v1 7/8] pinctrl: lynxpoint: Convert unsigned to unsigned int Date: Wed, 6 Nov 2019 16:48:28 +0200 Message-Id: <20191106144829.32275-8-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.24.0.rc1 In-Reply-To: <20191106144829.32275-1-andriy.shevchenko@linux.intel.com> References: <20191106144829.32275-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Simple type conversion with no functional change implied. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/intel/pinctrl-lynxpoint.c | 24 +++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/drivers/pinctrl/intel/pinctrl-lynxpoint.c b/drivers/pinctrl/intel/pinctrl-lynxpoint.c index d3065b5a5f75..49dcdc2c205d 100644 --- a/drivers/pinctrl/intel/pinctrl-lynxpoint.c +++ b/drivers/pinctrl/intel/pinctrl-lynxpoint.c @@ -80,7 +80,7 @@ struct lp_gpio { * LP94_CONFIG2 (gpio 94) ... */ -static void __iomem *lp_gpio_reg(struct gpio_chip *chip, unsigned offset, +static void __iomem *lp_gpio_reg(struct gpio_chip *chip, unsigned int offset, int reg) { struct lp_gpio *lg = gpiochip_get_data(chip); @@ -96,7 +96,7 @@ static void __iomem *lp_gpio_reg(struct gpio_chip *chip, unsigned offset, return lg->regs + reg + reg_offset; } -static int lp_gpio_request(struct gpio_chip *chip, unsigned offset) +static int lp_gpio_request(struct gpio_chip *chip, unsigned int offset) { struct lp_gpio *lg = gpiochip_get_data(chip); void __iomem *reg = lp_gpio_reg(chip, offset, LP_CONFIG1); @@ -121,7 +121,7 @@ static int lp_gpio_request(struct gpio_chip *chip, unsigned offset) return 0; } -static void lp_gpio_free(struct gpio_chip *chip, unsigned offset) +static void lp_gpio_free(struct gpio_chip *chip, unsigned int offset) { struct lp_gpio *lg = gpiochip_get_data(chip); void __iomem *conf2 = lp_gpio_reg(chip, offset, LP_CONFIG2); @@ -132,7 +132,7 @@ static void lp_gpio_free(struct gpio_chip *chip, unsigned offset) pm_runtime_put(lg->dev); } -static int lp_irq_type(struct irq_data *d, unsigned type) +static int lp_irq_type(struct irq_data *d, unsigned int type) { struct gpio_chip *gc = irq_data_get_irq_chip_data(d); struct lp_gpio *lg = gpiochip_get_data(gc); @@ -169,13 +169,13 @@ static int lp_irq_type(struct irq_data *d, unsigned type) return 0; } -static int lp_gpio_get(struct gpio_chip *chip, unsigned offset) +static int lp_gpio_get(struct gpio_chip *chip, unsigned int offset) { void __iomem *reg = lp_gpio_reg(chip, offset, LP_CONFIG1); return !!(ioread32(reg) & IN_LVL_BIT); } -static void lp_gpio_set(struct gpio_chip *chip, unsigned offset, int value) +static void lp_gpio_set(struct gpio_chip *chip, unsigned int offset, int value) { struct lp_gpio *lg = gpiochip_get_data(chip); void __iomem *reg = lp_gpio_reg(chip, offset, LP_CONFIG1); @@ -191,7 +191,7 @@ static void lp_gpio_set(struct gpio_chip *chip, unsigned offset, int value) raw_spin_unlock_irqrestore(&lg->lock, flags); } -static int lp_gpio_direction_input(struct gpio_chip *chip, unsigned offset) +static int lp_gpio_direction_input(struct gpio_chip *chip, unsigned int offset) { struct lp_gpio *lg = gpiochip_get_data(chip); void __iomem *reg = lp_gpio_reg(chip, offset, LP_CONFIG1); @@ -204,8 +204,8 @@ static int lp_gpio_direction_input(struct gpio_chip *chip, unsigned offset) return 0; } -static int lp_gpio_direction_output(struct gpio_chip *chip, - unsigned offset, int value) +static int lp_gpio_direction_output(struct gpio_chip *chip, unsigned int offset, + int value) { struct lp_gpio *lg = gpiochip_get_data(chip); void __iomem *reg = lp_gpio_reg(chip, offset, LP_CONFIG1); @@ -239,7 +239,7 @@ static void lp_gpio_irq_handler(struct irq_desc *desc) pending = ioread32(reg) & ioread32(ena); for_each_set_bit(pin, &pending, 32) { - unsigned irq; + unsigned int irq; /* Clear before handling so we don't lose an edge */ iowrite32(BIT(pin), reg); @@ -299,7 +299,7 @@ static int lp_gpio_irq_init_hw(struct gpio_chip *chip) { struct lp_gpio *lg = gpiochip_get_data(chip); void __iomem *reg; - unsigned base; + unsigned int base; for (base = 0; base < lg->chip.ngpio; base += 32) { /* disable gpio pin interrupts */ @@ -371,7 +371,7 @@ static int lp_gpio_probe(struct platform_device *pdev) GFP_KERNEL); if (!girq->parents) return -ENOMEM; - girq->parents[0] = (unsigned)irq_rc->start; + girq->parents[0] = (unsigned int)irq_rc->start; girq->default_type = IRQ_TYPE_NONE; girq->handler = handle_bad_irq; } From patchwork Wed Nov 6 14:48:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 1190480 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.intel.com Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 477Ttc3LCPz9sRM for ; Thu, 7 Nov 2019 01:48:40 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731729AbfKFOsf (ORCPT ); Wed, 6 Nov 2019 09:48:35 -0500 Received: from mga09.intel.com ([134.134.136.24]:65092 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731691AbfKFOsf (ORCPT ); Wed, 6 Nov 2019 09:48:35 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 06 Nov 2019 06:48:35 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.68,275,1569308400"; d="scan'208";a="377067551" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga005.jf.intel.com with ESMTP; 06 Nov 2019 06:48:33 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id 582243BC; Wed, 6 Nov 2019 16:48:30 +0200 (EET) From: Andy Shevchenko To: Mika Westerberg , linux-gpio@vger.kernel.org, Bartosz Golaszewski , Linus Walleij Cc: Andy Shevchenko Subject: [PATCH v1 8/8] pinctrl: lynxpoint: Move ->remove closer to ->probe() Date: Wed, 6 Nov 2019 16:48:29 +0200 Message-Id: <20191106144829.32275-9-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.24.0.rc1 In-Reply-To: <20191106144829.32275-1-andriy.shevchenko@linux.intel.com> References: <20191106144829.32275-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Consolidate ->remove and ->probe() callbacks for better maintenance. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/intel/pinctrl-lynxpoint.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/pinctrl/intel/pinctrl-lynxpoint.c b/drivers/pinctrl/intel/pinctrl-lynxpoint.c index 49dcdc2c205d..43dc15b9ad4a 100644 --- a/drivers/pinctrl/intel/pinctrl-lynxpoint.c +++ b/drivers/pinctrl/intel/pinctrl-lynxpoint.c @@ -387,6 +387,12 @@ static int lp_gpio_probe(struct platform_device *pdev) return 0; } +static int lp_gpio_remove(struct platform_device *pdev) +{ + pm_runtime_disable(&pdev->dev); + return 0; +} + static int lp_gpio_runtime_suspend(struct device *dev) { return 0; @@ -426,12 +432,6 @@ static const struct acpi_device_id lynxpoint_gpio_acpi_match[] = { }; MODULE_DEVICE_TABLE(acpi, lynxpoint_gpio_acpi_match); -static int lp_gpio_remove(struct platform_device *pdev) -{ - pm_runtime_disable(&pdev->dev); - return 0; -} - static struct platform_driver lp_gpio_driver = { .probe = lp_gpio_probe, .remove = lp_gpio_remove,